From e2ed0002bd9952d6728b82d13798a57aa8991ce7 Mon Sep 17 00:00:00 2001
From: Nav <nav@navnav.me>
Date: Wed, 13 Dec 2023 20:40:14 +0000
Subject: [PATCH] More TDF reformatting

---
 .../AVR8/D-SERIES/AVR128DA28.xml              |  483 +-
 .../AVR8/D-SERIES/AVR128DA32.xml              |  492 +-
 .../AVR8/D-SERIES/AVR128DA48.xml              |  720 +-
 .../AVR8/D-SERIES/AVR128DA64.xml              |  765 +--
 .../AVR8/D-SERIES/AVR128DB28.xml              |  549 +-
 .../AVR8/D-SERIES/AVR128DB32.xml              |  558 +-
 .../AVR8/D-SERIES/AVR128DB48.xml              |  822 +--
 .../AVR8/D-SERIES/AVR128DB64.xml              |  861 +--
 .../AVR8/D-SERIES/AVR16DD14.xml               | 5706 +++------------
 .../AVR8/D-SERIES/AVR16DD20.xml               | 5903 +++-------------
 .../AVR8/D-SERIES/AVR16DD28.xml               | 6037 +++-------------
 .../AVR8/D-SERIES/AVR16DD32.xml               | 6103 +++--------------
 .../AVR8/D-SERIES/AVR32DA28.xml               |  480 +-
 .../AVR8/D-SERIES/AVR32DA32.xml               |  489 +-
 .../AVR8/D-SERIES/AVR32DA48.xml               |  717 +-
 .../AVR8/D-SERIES/AVR32DB28.xml               |  549 +-
 .../AVR8/D-SERIES/AVR32DB32.xml               |  558 +-
 .../AVR8/D-SERIES/AVR32DB48.xml               |  822 +--
 .../AVR8/D-SERIES/AVR32DD14.xml               | 5706 +++------------
 .../AVR8/D-SERIES/AVR32DD20.xml               | 5903 +++-------------
 .../AVR8/D-SERIES/AVR32DD28.xml               | 6037 +++-------------
 .../AVR8/D-SERIES/AVR32DD32.xml               | 6103 +++--------------
 .../AVR8/D-SERIES/AVR64DA28.xml               |  483 +-
 .../AVR8/D-SERIES/AVR64DA32.xml               |  492 +-
 .../AVR8/D-SERIES/AVR64DA48.xml               |  720 +-
 .../AVR8/D-SERIES/AVR64DA64.xml               |  765 +--
 .../AVR8/D-SERIES/AVR64DB28.xml               |  549 +-
 .../AVR8/D-SERIES/AVR64DB32.xml               |  558 +-
 .../AVR8/D-SERIES/AVR64DB48.xml               |  822 +--
 .../AVR8/D-SERIES/AVR64DB64.xml               |  861 +--
 .../AVR8/D-SERIES/AVR64DD14.xml               |  462 +-
 .../AVR8/D-SERIES/AVR64DD20.xml               |  477 +-
 .../AVR8/D-SERIES/AVR64DD28.xml               |  492 +-
 .../AVR8/D-SERIES/AVR64DD32.xml               |  501 +-
 .../AVR8/E-SERIES/AVR64EA28.xml               | 5639 +++------------
 .../AVR8/E-SERIES/AVR64EA32.xml               | 5706 +++------------
 .../AVR8/E-SERIES/AVR64EA48.xml               | 6041 +++-------------
 .../AVR8/MEGA/AT90CAN128.xml                  |  384 +-
 .../AVR8/MEGA/AT90CAN32.xml                   |  348 +-
 .../AVR8/MEGA/AT90CAN64.xml                   |  352 +-
 .../AVR8/MEGA/AT90PWM1.xml                    |  291 +-
 .../AVR8/MEGA/AT90PWM161.xml                  |  297 +-
 .../AVR8/MEGA/AT90PWM216.xml                  |  288 +-
 .../AVR8/MEGA/AT90PWM2B.xml                   |  315 +-
 .../AVR8/MEGA/AT90PWM316.xml                  |  327 +-
 .../AVR8/MEGA/AT90PWM3B.xml                   |  315 +-
 .../AVR8/MEGA/AT90PWM81.xml                   |  288 +-
 .../AVR8/MEGA/AT90USB1286.xml                 |  378 +-
 .../AVR8/MEGA/AT90USB1287.xml                 |  381 +-
 .../AVR8/MEGA/AT90USB162.xml                  |  270 +-
 .../AVR8/MEGA/AT90USB646.xml                  |  381 +-
 .../AVR8/MEGA/AT90USB647.xml                  |  381 +-
 .../AVR8/MEGA/AT90USB82.xml                   |  270 +-
 .../AVR8/MEGA/ATMEGA128.xml                   |  405 +-
 .../AVR8/MEGA/ATMEGA1280.xml                  |  624 +-
 .../AVR8/MEGA/ATMEGA1281.xml                  |  603 +-
 .../AVR8/MEGA/ATMEGA1284.xml                  |  426 +-
 .../AVR8/MEGA/ATMEGA1284P.xml                 |  435 +-
 .../AVR8/MEGA/ATMEGA1284RFR2.xml              | 1089 +--
 .../AVR8/MEGA/ATMEGA128A.xml                  |  387 +-
 .../AVR8/MEGA/ATMEGA128RFA1.xml               |  801 +--
 .../AVR8/MEGA/ATMEGA128RFR2.xml               | 1089 +--
 .../AVR8/MEGA/ATMEGA16.xml                    |  333 +-
 .../AVR8/MEGA/ATMEGA1608.xml                  |  318 +-
 .../AVR8/MEGA/ATMEGA1609.xml                  |  333 +-
 .../AVR8/MEGA/ATMEGA162.xml                   |  309 +-
 .../AVR8/MEGA/ATMEGA164A.xml                  |  411 +-
 .../AVR8/MEGA/ATMEGA164P.xml                  |  429 +-
 .../AVR8/MEGA/ATMEGA164PA.xml                 |  420 +-
 .../AVR8/MEGA/ATMEGA165A.xml                  |  270 +-
 .../AVR8/MEGA/ATMEGA165P.xml                  |  270 +-
 .../AVR8/MEGA/ATMEGA165PA.xml                 |  270 +-
 .../AVR8/MEGA/ATMEGA168.xml                   |  357 +-
 .../AVR8/MEGA/ATMEGA168A.xml                  |  348 +-
 .../AVR8/MEGA/ATMEGA168P.xml                  |  354 +-
 .../AVR8/MEGA/ATMEGA168PA.xml                 |  357 +-
 .../AVR8/MEGA/ATMEGA168PB.xml                 |  330 +-
 .../AVR8/MEGA/ATMEGA169A.xml                  |  291 +-
 .../AVR8/MEGA/ATMEGA169P.xml                  |  294 +-
 .../AVR8/MEGA/ATMEGA169PA.xml                 |  291 +-
 .../AVR8/MEGA/ATMEGA16A.xml                   |  321 +-
 .../AVR8/MEGA/ATMEGA16M1.xml                  |  369 +-
 .../AVR8/MEGA/ATMEGA16U2.xml                  |  285 +-
 .../AVR8/MEGA/ATMEGA16U4.xml                  |  384 +-
 .../AVR8/MEGA/ATMEGA2560.xml                  |  624 +-
 .../AVR8/MEGA/ATMEGA2561.xml                  |  603 +-
 .../AVR8/MEGA/ATMEGA2564RFR2.xml              | 1089 +--
 .../AVR8/MEGA/ATMEGA256RFR2.xml               | 1089 +--
 .../AVR8/MEGA/ATMEGA32.xml                    |  333 +-
 .../AVR8/MEGA/ATMEGA3208.xml                  |  315 +-
 .../AVR8/MEGA/ATMEGA3209.xml                  |  330 +-
 .../AVR8/MEGA/ATMEGA324A.xml                  |  411 +-
 .../AVR8/MEGA/ATMEGA324P.xml                  |  432 +-
 .../AVR8/MEGA/ATMEGA324PA.xml                 |  411 +-
 .../AVR8/MEGA/ATMEGA324PB.xml                 |  471 +-
 .../AVR8/MEGA/ATMEGA325.xml                   |  270 +-
 .../AVR8/MEGA/ATMEGA3250.xml                  |  276 +-
 .../AVR8/MEGA/ATMEGA3250A.xml                 |  276 +-
 .../AVR8/MEGA/ATMEGA3250P.xml                 |  276 +-
 .../AVR8/MEGA/ATMEGA3250PA.xml                |  276 +-
 .../AVR8/MEGA/ATMEGA325A.xml                  |  270 +-
 .../AVR8/MEGA/ATMEGA325P.xml                  |  270 +-
 .../AVR8/MEGA/ATMEGA325PA.xml                 |  270 +-
 .../AVR8/MEGA/ATMEGA328.xml                   |  351 +-
 .../AVR8/MEGA/ATMEGA328P.xml                  |  357 +-
 .../AVR8/MEGA/ATMEGA328PB.xml                 |  331 +-
 .../AVR8/MEGA/ATMEGA329.xml                   |  285 +-
 .../AVR8/MEGA/ATMEGA3290.xml                  |  279 +-
 .../AVR8/MEGA/ATMEGA3290A.xml                 |  279 +-
 .../AVR8/MEGA/ATMEGA3290P.xml                 |  282 +-
 .../AVR8/MEGA/ATMEGA3290PA.xml                |  282 +-
 .../AVR8/MEGA/ATMEGA329A.xml                  |  288 +-
 .../AVR8/MEGA/ATMEGA329P.xml                  |  291 +-
 .../AVR8/MEGA/ATMEGA329PA.xml                 |  288 +-
 .../AVR8/MEGA/ATMEGA32A.xml                   |  324 +-
 .../AVR8/MEGA/ATMEGA32C1.xml                  |  336 +-
 .../AVR8/MEGA/ATMEGA32M1.xml                  |  372 +-
 .../AVR8/MEGA/ATMEGA32U2.xml                  |  285 +-
 .../AVR8/MEGA/ATMEGA32U4.xml                  |  384 +-
 .../AVR8/MEGA/ATMEGA406.xml                   |  163 +-
 .../AVR8/MEGA/ATMEGA48.xml                    |  354 +-
 .../AVR8/MEGA/ATMEGA4808.xml                  |  315 +-
 .../AVR8/MEGA/ATMEGA4809.xml                  |  333 +-
 .../AVR8/MEGA/ATMEGA48A.xml                   |  336 +-
 .../AVR8/MEGA/ATMEGA48P.xml                   |  348 +-
 .../AVR8/MEGA/ATMEGA48PA.xml                  |  348 +-
 .../AVR8/MEGA/ATMEGA48PB.xml                  |  318 +-
 .../AVR8/MEGA/ATMEGA64.xml                    |  411 +-
 .../AVR8/MEGA/ATMEGA640.xml                   |  624 +-
 .../AVR8/MEGA/ATMEGA644.xml                   |  411 +-
 .../AVR8/MEGA/ATMEGA644A.xml                  |  405 +-
 .../AVR8/MEGA/ATMEGA644P.xml                  |  432 +-
 .../AVR8/MEGA/ATMEGA644PA.xml                 |  414 +-
 .../AVR8/MEGA/ATMEGA644RFR2.xml               | 1089 +--
 .../AVR8/MEGA/ATMEGA645.xml                   |  270 +-
 .../AVR8/MEGA/ATMEGA6450.xml                  |  276 +-
 .../AVR8/MEGA/ATMEGA6450A.xml                 |  276 +-
 .../AVR8/MEGA/ATMEGA6450P.xml                 |  276 +-
 .../AVR8/MEGA/ATMEGA645A.xml                  |  270 +-
 .../AVR8/MEGA/ATMEGA645P.xml                  |  270 +-
 .../AVR8/MEGA/ATMEGA649.xml                   |  285 +-
 .../AVR8/MEGA/ATMEGA6490.xml                  |  279 +-
 .../AVR8/MEGA/ATMEGA6490A.xml                 |  279 +-
 .../AVR8/MEGA/ATMEGA6490P.xml                 |  279 +-
 .../AVR8/MEGA/ATMEGA649A.xml                  |  279 +-
 .../AVR8/MEGA/ATMEGA649P.xml                  |  279 +-
 .../AVR8/MEGA/ATMEGA64A.xml                   |  399 +-
 .../AVR8/MEGA/ATMEGA64C1.xml                  |  342 +-
 .../AVR8/MEGA/ATMEGA64M1.xml                  |  372 +-
 .../AVR8/MEGA/ATMEGA64RFR2.xml                | 1089 +--
 .../AVR8/MEGA/ATMEGA808.xml                   |  318 +-
 .../AVR8/MEGA/ATMEGA809.xml                   |  333 +-
 .../AVR8/MEGA/ATMEGA88.xml                    |  357 +-
 .../AVR8/MEGA/ATMEGA88A.xml                   |  348 +-
 .../AVR8/MEGA/ATMEGA88P.xml                   |  354 +-
 .../AVR8/MEGA/ATMEGA88PA.xml                  |  360 +-
 .../AVR8/MEGA/ATMEGA88PB.xml                  |  330 +-
 .../AVR8/MEGA/ATMEGA8U2.xml                   |  285 +-
 .../AVR8/TINY/ATTINY13.xml                    |  141 +-
 .../AVR8/TINY/ATTINY13A.xml                   |  144 +-
 .../AVR8/TINY/ATTINY1604.xml                  |  342 +-
 .../AVR8/TINY/ATTINY1606.xml                  |  348 +-
 .../AVR8/TINY/ATTINY1607.xml                  |  342 +-
 .../AVR8/TINY/ATTINY1614.xml                  |  387 +-
 .../AVR8/TINY/ATTINY1616.xml                  |  393 +-
 .../AVR8/TINY/ATTINY1617.xml                  |  387 +-
 .../AVR8/TINY/ATTINY1624.xml                  |  381 +-
 .../AVR8/TINY/ATTINY1626.xml                  |  390 +-
 .../AVR8/TINY/ATTINY1627.xml                  |  387 +-
 .../AVR8/TINY/ATTINY1634.xml                  |  165 +-
 .../AVR8/TINY/ATTINY167.xml                   |  310 +-
 .../AVR8/TINY/ATTINY202.xml                   |  318 +-
 .../AVR8/TINY/ATTINY204.xml                   |  324 +-
 .../AVR8/TINY/ATTINY212.xml                   |  354 +-
 .../AVR8/TINY/ATTINY214.xml                   |  360 +-
 .../AVR8/TINY/ATTINY2313.xml                  |  231 +-
 .../AVR8/TINY/ATTINY2313A.xml                 |  240 +-
 .../AVR8/TINY/ATTINY24.xml                    |  246 +-
 .../AVR8/TINY/ATTINY24A.xml                   |  279 +-
 .../AVR8/TINY/ATTINY25.xml                    |  309 +-
 .../AVR8/TINY/ATTINY261.xml                   |  273 +-
 .../AVR8/TINY/ATTINY261A.xml                  |  255 +-
 .../AVR8/TINY/ATTINY3216.xml                  |  387 +-
 .../AVR8/TINY/ATTINY3217.xml                  |  387 +-
 .../AVR8/TINY/ATTINY402.xml                   |  318 +-
 .../AVR8/TINY/ATTINY404.xml                   |  324 +-
 .../AVR8/TINY/ATTINY406.xml                   |  330 +-
 .../AVR8/TINY/ATTINY412.xml                   |  354 +-
 .../AVR8/TINY/ATTINY414.xml                   |  360 +-
 .../AVR8/TINY/ATTINY416.xml                   |  366 +-
 .../AVR8/TINY/ATTINY417.xml                   |  360 +-
 .../AVR8/TINY/ATTINY4313.xml                  |  240 +-
 .../AVR8/TINY/ATTINY43U.xml                   |  258 +-
 .../AVR8/TINY/ATTINY44.xml                    |  246 +-
 .../AVR8/TINY/ATTINY441.xml                   |  250 +-
 .../AVR8/TINY/ATTINY44A.xml                   |  276 +-
 .../AVR8/TINY/ATTINY45.xml                    |  285 +-
 .../AVR8/TINY/ATTINY461.xml                   |  273 +-
 .../AVR8/TINY/ATTINY461A.xml                  |  255 +-
 .../AVR8/TINY/ATTINY48.xml                    |  177 +-
 .../AVR8/TINY/ATTINY804.xml                   |  342 +-
 .../AVR8/TINY/ATTINY806.xml                   |  348 +-
 .../AVR8/TINY/ATTINY807.xml                   |  342 +-
 .../AVR8/TINY/ATTINY814.xml                   |  363 +-
 .../AVR8/TINY/ATTINY816.xml                   |  369 +-
 .../AVR8/TINY/ATTINY817.xml                   |  363 +-
 .../AVR8/TINY/ATTINY828.xml                   |  216 +-
 .../AVR8/TINY/ATTINY84.xml                    |  246 +-
 .../AVR8/TINY/ATTINY841.xml                   |  250 +-
 .../AVR8/TINY/ATTINY84A.xml                   |  270 +-
 .../AVR8/TINY/ATTINY85.xml                    |  279 +-
 .../AVR8/TINY/ATTINY861.xml                   |  273 +-
 .../AVR8/TINY/ATTINY861A.xml                  |  255 +-
 .../AVR8/TINY/ATTINY87.xml                    |  310 +-
 .../AVR8/TINY/ATTINY88.xml                    |  177 +-
 .../AVR8/XMEGA/ATXMEGA128A1.xml               |   99 +-
 .../AVR8/XMEGA/ATXMEGA128A1U.xml              |  147 +-
 .../AVR8/XMEGA/ATXMEGA128A3.xml               |   96 +-
 .../AVR8/XMEGA/ATXMEGA128A3U.xml              |  144 +-
 .../AVR8/XMEGA/ATXMEGA128A4U.xml              |  147 +-
 .../AVR8/XMEGA/ATXMEGA128B1.xml               |  141 +-
 .../AVR8/XMEGA/ATXMEGA128B3.xml               |  141 +-
 .../AVR8/XMEGA/ATXMEGA128C3.xml               |  120 +-
 .../AVR8/XMEGA/ATXMEGA128D3.xml               |  114 +-
 .../AVR8/XMEGA/ATXMEGA128D4.xml               |  129 +-
 .../AVR8/XMEGA/ATXMEGA16A4.xml                |   96 +-
 .../AVR8/XMEGA/ATXMEGA16A4U.xml               |  147 +-
 .../AVR8/XMEGA/ATXMEGA16C4.xml                |  129 +-
 .../AVR8/XMEGA/ATXMEGA16D4.xml                |  111 +-
 .../AVR8/XMEGA/ATXMEGA16E5.xml                |  376 +-
 .../AVR8/XMEGA/ATXMEGA192A3.xml               |   96 +-
 .../AVR8/XMEGA/ATXMEGA192A3U.xml              |  144 +-
 .../AVR8/XMEGA/ATXMEGA192C3.xml               |  114 +-
 .../AVR8/XMEGA/ATXMEGA192D3.xml               |  114 +-
 .../AVR8/XMEGA/ATXMEGA256A3.xml               |   99 +-
 .../AVR8/XMEGA/ATXMEGA256A3B.xml              |   99 +-
 .../AVR8/XMEGA/ATXMEGA256A3BU.xml             |  141 +-
 .../AVR8/XMEGA/ATXMEGA256A3U.xml              |  144 +-
 .../AVR8/XMEGA/ATXMEGA256C3.xml               |  120 +-
 .../AVR8/XMEGA/ATXMEGA256D3.xml               |  114 +-
 .../AVR8/XMEGA/ATXMEGA32A4.xml                |   96 +-
 .../AVR8/XMEGA/ATXMEGA32A4U.xml               |  147 +-
 .../AVR8/XMEGA/ATXMEGA32C3.xml                |  120 +-
 .../AVR8/XMEGA/ATXMEGA32C4.xml                |  129 +-
 .../AVR8/XMEGA/ATXMEGA32D3.xml                |  114 +-
 .../AVR8/XMEGA/ATXMEGA32D4.xml                |  111 +-
 .../AVR8/XMEGA/ATXMEGA32E5.xml                |  376 +-
 .../AVR8/XMEGA/ATXMEGA384C3.xml               |  138 +-
 .../AVR8/XMEGA/ATXMEGA384D3.xml               |  126 +-
 .../AVR8/XMEGA/ATXMEGA64A1.xml                |   99 +-
 .../AVR8/XMEGA/ATXMEGA64A1U.xml               |  147 +-
 .../AVR8/XMEGA/ATXMEGA64A3.xml                |   96 +-
 .../AVR8/XMEGA/ATXMEGA64A3U.xml               |  144 +-
 .../AVR8/XMEGA/ATXMEGA64A4U.xml               |  147 +-
 .../AVR8/XMEGA/ATXMEGA64B1.xml                |  138 +-
 .../AVR8/XMEGA/ATXMEGA64B3.xml                |  138 +-
 .../AVR8/XMEGA/ATXMEGA64C3.xml                |  120 +-
 .../AVR8/XMEGA/ATXMEGA64D3.xml                |  114 +-
 .../AVR8/XMEGA/ATXMEGA64D4.xml                |  126 +-
 .../AVR8/XMEGA/ATXMEGA8E5.xml                 |  376 +-
 260 files changed, 39840 insertions(+), 110851 deletions(-)

diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA28.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA28.xml
index 76af2fde..2d153d17 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA28.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA28.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR128DA28" package="SOIC28" pinout="SOIC28" speedmax="24000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR128DA28" package="SOIC28" pinout="SOIC28" speedmax="24000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR128DA28" family="AVR8" architecture="AVR8X" avr-family="AVR DA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x4000" start="0x4000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x20000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -97,8 +88,7 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
@@ -107,8 +97,7 @@
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -156,16 +145,11 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
                     </signals>
                 </instance>
             </module>
@@ -362,8 +346,7 @@
                     <signals>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
@@ -542,28 +525,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -573,8 +551,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -637,10 +614,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -660,12 +635,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -781,23 +754,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -868,44 +836,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -930,14 +886,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -1123,12 +1075,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Extended Z-Pointer Address bits" mask="0x1" name="RAMPZ" rw="RW"/>
                 </register>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1156,12 +1106,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1207,145 +1155,111 @@
         <module caption="Event System" id="avrda" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
                 <register caption="User 13 - PTC" initval="0x00" name="USERPTCSTART" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1381,17 +1295,12 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1435,15 +1344,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1491,15 +1396,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1547,15 +1448,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1594,15 +1491,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1641,15 +1534,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1685,15 +1574,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1729,15 +1614,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1774,13 +1655,10 @@
         <module caption="Fuses" id="avrda" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1791,24 +1669,21 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x00" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1834,8 +1709,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -1912,8 +1786,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -1960,10 +1833,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_v6_port" name="PORT">
@@ -2055,14 +1926,10 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2093,8 +1960,7 @@
                     <bitfield caption="USART2 Signals" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -2231,12 +2097,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2328,8 +2192,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2425,8 +2288,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2544,8 +2406,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2581,13 +2442,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2680,18 +2539,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2834,17 +2690,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -2859,12 +2712,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2876,10 +2726,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -2982,17 +2830,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3007,19 +2852,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3042,8 +2883,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3061,8 +2901,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA32.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA32.xml
index 56a12058..768b5f7c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA32.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA32.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR128DA32" package="QFN32" pinout="QFN32" speedmax="24000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR128DA32" package="QFN32" pinout="QFN32" speedmax="24000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR128DA32" family="AVR8" architecture="AVR8X" avr-family="AVR DA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x4000" start="0x4000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x20000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -101,8 +92,7 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
@@ -111,8 +101,7 @@
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -162,18 +151,12 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -384,14 +367,11 @@
                     <signals>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
                 </instance>
@@ -583,28 +563,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -614,8 +589,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -678,10 +652,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -701,12 +673,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -826,23 +796,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -913,44 +878,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -975,14 +928,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -1168,12 +1117,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Extended Z-Pointer Address bits" mask="0x1" name="RAMPZ" rw="RW"/>
                 </register>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1201,12 +1148,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1252,145 +1197,111 @@
         <module caption="Event System" id="avrda" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
                 <register caption="User 13 - PTC" initval="0x00" name="USERPTCSTART" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1426,17 +1337,12 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1480,15 +1386,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1536,15 +1438,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1592,15 +1490,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1639,15 +1533,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1690,15 +1580,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1738,15 +1624,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1782,15 +1664,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1827,13 +1705,10 @@
         <module caption="Fuses" id="avrda" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1844,24 +1719,21 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x00" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1887,8 +1759,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -1965,8 +1836,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2013,10 +1883,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_v6_port" name="PORT">
@@ -2108,14 +1976,10 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2148,8 +2012,7 @@
                     <bitfield caption="USART2 Signals" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -2295,12 +2158,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2392,8 +2253,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2489,8 +2349,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2608,8 +2467,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2645,13 +2503,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2744,18 +2600,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2898,17 +2751,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -2923,12 +2773,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2940,10 +2787,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -3046,17 +2891,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3071,19 +2913,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3106,8 +2944,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3125,8 +2962,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA48.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA48.xml
index a753506b..ee11cae9 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA48.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA48.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR128DA48" package="QFN48" pinout="QFN48" speedmax="24000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR128DA48" package="QFN48" pinout="QFN48" speedmax="24000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR128DA48" family="AVR8" architecture="AVR8X" avr-family="AVR DA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x4000" start="0x4000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x20000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -111,20 +102,17 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="2" pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
-                                pad="PC6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -178,24 +166,15 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2" pad="PC7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4" pad="PE2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -485,15 +464,12 @@
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOA" pad="PB4"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOB" index="1" pad="PB5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
                 </instance>
@@ -751,28 +727,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -782,8 +753,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -846,10 +816,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -869,12 +837,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -1002,23 +968,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -1103,64 +1064,46 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 4 Control B" initval="0x00" name="LUT4CTRLB" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 5 Control B" initval="0x00" name="LUT5CTRLB" offset="0x1d" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 4 Control C" initval="0x00" name="LUT4CTRLC" offset="0x1a" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 5 Control C" initval="0x00" name="LUT5CTRLC" offset="0x1e" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -1194,20 +1137,14 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Control 1" initval="0x00" name="INTCTRL1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW"
-                              values="CCL_INTMODE4"/>
-                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW"
-                              values="CCL_INTMODE5"/>
+                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW" values="CCL_INTMODE4"/>
+                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW" values="CCL_INTMODE5"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x3f" name="INT" rw="RW"/>
@@ -1409,12 +1346,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Extended Z-Pointer Address bits" mask="0x1" name="RAMPZ" rw="RW"/>
                 </register>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1442,12 +1377,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1493,205 +1426,156 @@
         <module caption="Event System" id="avrda" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Multiplexer Channel 8" initval="0x00" name="CHANNEL8" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW"
-                              values="EVSYS_CHANNEL8"/>
+                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW" values="EVSYS_CHANNEL8"/>
                 </register>
                 <register caption="Multiplexer Channel 9" initval="0x00" name="CHANNEL9" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW"
-                              values="EVSYS_CHANNEL9"/>
+                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW" values="EVSYS_CHANNEL9"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW"
-                          size="1">
+                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
                 <register caption="User 13 - PTC" initval="0x00" name="USERPTCSTART" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 29 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3D" rw="RW"
-                          size="1">
+                <register caption="User 29 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 37 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x45" rw="RW"
-                          size="1">
+                <register caption="User 37 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x45" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 38 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x46" rw="RW"
-                          size="1">
+                <register caption="User 38 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x46" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 24 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x38" rw="RW"
-                          size="1">
+                <register caption="User 24 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x38" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 25 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x39" rw="RW"
-                          size="1">
+                <register caption="User 25 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x39" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1727,17 +1611,12 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1750,12 +1629,9 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
@@ -1801,15 +1677,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1821,15 +1693,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
@@ -1879,15 +1747,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1899,15 +1763,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x44"/>
@@ -1955,15 +1815,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1975,15 +1831,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x44"/>
@@ -2022,15 +1874,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2042,15 +1890,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port E Pin 0" name="PORTE_PIN0" value="0x40"/>
@@ -2093,15 +1937,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2113,15 +1953,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port E Pin 0" name="PORTE_PIN0" value="0x40"/>
@@ -2161,15 +1997,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2181,15 +2013,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="USART 3 XCK" name="USART3_XCK" value="0x63"/>
@@ -2221,15 +2049,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2241,15 +2065,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="USART 3 XCK" name="USART3_XCK" value="0x63"/>
@@ -2281,15 +2101,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2301,15 +2117,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="USART 3 XCK" name="USART3_XCK" value="0x63"/>
@@ -2341,15 +2153,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2361,15 +2169,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="USART 3 XCK" name="USART3_XCK" value="0x63"/>
@@ -2408,13 +2212,10 @@
         <module caption="Fuses" id="avrda" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -2425,24 +2226,21 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x00" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -2468,8 +2266,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2546,8 +2343,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2594,10 +2390,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_v6_port" name="PORT">
@@ -2689,16 +2483,11 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
-                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW"
-                              values="PORTMUX_LUT4"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW" values="PORTMUX_LUT4"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2739,10 +2528,8 @@
                     <bitfield caption="USART4 Signals" mask="0x3" name="USART4" rw="RW" values="PORTMUX_USART4"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
-                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW"
-                              values="PORTMUX_ZCD1"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW" values="PORTMUX_ZCD1"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -2933,12 +2720,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -3030,8 +2815,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -3127,8 +2911,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -3246,8 +3029,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -3283,13 +3065,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -3383,18 +3163,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -3537,17 +3314,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -3562,12 +3336,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -3579,10 +3350,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -3685,17 +3454,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3710,19 +3476,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3745,8 +3507,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3764,8 +3525,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA64.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA64.xml
index 7da4c4e5..23ff90a7 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA64.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DA64.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR128DA64" package="QFN64" pinout="QFN64" speedmax="24000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR128DA64" package="QFN64" pinout="QFN64" speedmax="24000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR128DA64" family="AVR8" architecture="AVR8X" avr-family="AVR DA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x4000" start="0x4000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x20000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -115,20 +106,17 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="2" pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
-                                pad="PC6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -137,14 +125,12 @@
                         <signal function="CCL_IN" group="LUT4_IN" index="0" pad="PB0"/>
                         <signal function="CCL_IN" group="LUT4_IN" index="1" pad="PB1"/>
                         <signal function="CCL_IN" group="LUT4_IN" index="2" pad="PB2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT4" function="CCL_ALT" group="LUT4_OUT" index="0"
-                                pad="PB6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT4" function="CCL_ALT" group="LUT4_OUT" index="0" pad="PB6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT4" function="CCL" group="LUT4_OUT" index="0" pad="PB3"/>
                         <signal function="CCL_IN" group="LUT5_IN" index="0" pad="PG0"/>
                         <signal function="CCL_IN" group="LUT5_IN" index="1" pad="PG1"/>
                         <signal function="CCL_IN" group="LUT5_IN" index="2" pad="PG2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT5" function="CCL_ALT" group="LUT5_OUT" index="0"
-                                pad="PG6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT5" function="CCL_ALT" group="LUT5_OUT" index="0" pad="PG6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT5" function="CCL" group="LUT5_OUT" index="0" pad="PG3"/>
                     </signals>
                 </instance>
@@ -190,32 +176,19 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS_ALT" group="EVOUT" index="1"
-                                pad="PB7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS_ALT" group="EVOUT" index="4"
-                                pad="PE7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS_ALT" group="EVOUT" index="6"
-                                pad="PG7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS" group="EVOUT" index="6"
-                                pad="PG2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS_ALT" group="EVOUT" index="1" pad="PB7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2" pad="PC7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS_ALT" group="EVOUT" index="4" pad="PE7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4" pad="PE2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS_ALT" group="EVOUT" index="6" pad="PG7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS" group="EVOUT" index="6" pad="PG2"/>
                     </signals>
                 </instance>
             </module>
@@ -569,22 +542,16 @@
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOA" pad="PB4"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOB" index="1"
-                                pad="PG5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOB" index="1" pad="PG5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOB" index="1" pad="PB5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOC" index="2"
-                                pad="PG6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOC" index="2" pad="PG6"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOC" index="2" pad="PB6"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOD" index="3"
-                                pad="PG7"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOD" index="3" pad="PG7"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOD" index="3" pad="PB7"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
@@ -883,28 +850,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -914,8 +876,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -978,10 +939,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -1001,12 +960,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -1142,23 +1099,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -1243,64 +1195,46 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 4 Control B" initval="0x00" name="LUT4CTRLB" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 5 Control B" initval="0x00" name="LUT5CTRLB" offset="0x1d" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 4 Control C" initval="0x00" name="LUT4CTRLC" offset="0x1a" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 5 Control C" initval="0x00" name="LUT5CTRLC" offset="0x1e" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -1334,20 +1268,14 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Control 1" initval="0x00" name="INTCTRL1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW"
-                              values="CCL_INTMODE4"/>
-                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW"
-                              values="CCL_INTMODE5"/>
+                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW" values="CCL_INTMODE4"/>
+                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW" values="CCL_INTMODE5"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x3f" name="INT" rw="RW"/>
@@ -1550,12 +1478,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Extended Z-Pointer Address bits" mask="0x1" name="RAMPZ" rw="RW"/>
                 </register>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1583,12 +1509,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1634,221 +1558,168 @@
         <module caption="Event System" id="avrda" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Multiplexer Channel 8" initval="0x00" name="CHANNEL8" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW"
-                              values="EVSYS_CHANNEL8"/>
+                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW" values="EVSYS_CHANNEL8"/>
                 </register>
                 <register caption="Multiplexer Channel 9" initval="0x00" name="CHANNEL9" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW"
-                              values="EVSYS_CHANNEL9"/>
+                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW" values="EVSYS_CHANNEL9"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW"
-                          size="1">
+                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - EVOUTG" initval="0x00" name="USEREVSYSEVOUTG" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 20 - EVOUTG" initval="0x00" name="USEREVSYSEVOUTG" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
                 <register caption="User 13 - PTC" initval="0x00" name="USERPTCSTART" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 29 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3D" rw="RW"
-                          size="1">
+                <register caption="User 29 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 37 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x45" rw="RW"
-                          size="1">
+                <register caption="User 37 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x45" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 38 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x46" rw="RW"
-                          size="1">
+                <register caption="User 38 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x46" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 39 - TCB4 Event A" initval="0x00" name="USERTCB4CAPT" offset="0x47" rw="RW"
-                          size="1">
+                <register caption="User 39 - TCB4 Event A" initval="0x00" name="USERTCB4CAPT" offset="0x47" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCB4 Event B" initval="0x00" name="USERTCB4COUNT" offset="0x48" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCB4 Event B" initval="0x00" name="USERTCB4COUNT" offset="0x48" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 24 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x38" rw="RW"
-                          size="1">
+                <register caption="User 24 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x38" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 25 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x39" rw="RW"
-                          size="1">
+                <register caption="User 25 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x39" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - USART5" initval="0x00" name="USERUSART5IRDA" offset="0x3A" rw="RW"
-                          size="1">
+                <register caption="User 26 - USART5" initval="0x00" name="USERUSART5IRDA" offset="0x3A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1884,17 +1755,12 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1908,12 +1774,9 @@
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -1964,15 +1827,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1985,15 +1844,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2048,15 +1903,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2069,15 +1920,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2128,15 +1975,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2149,15 +1992,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2199,15 +2038,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2220,15 +2055,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2278,15 +2109,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2299,15 +2126,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2354,15 +2177,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2375,15 +2194,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2426,15 +2241,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2447,15 +2258,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2498,15 +2305,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2519,15 +2322,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2562,15 +2361,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2583,15 +2378,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2633,13 +2424,10 @@
         <module caption="Fuses" id="avrda" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -2650,24 +2438,21 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x00" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -2693,8 +2478,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2771,8 +2555,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2819,10 +2602,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_v6_port" name="PORT">
@@ -2914,18 +2695,12 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
-                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW"
-                              values="PORTMUX_LUT4"/>
-                    <bitfield caption="CCL Look-Up Table 5 Signals" mask="0x20" name="LUT5" rw="RW"
-                              values="PORTMUX_LUT5"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW" values="PORTMUX_LUT4"/>
+                    <bitfield caption="CCL Look-Up Table 5 Signals" mask="0x20" name="LUT5" rw="RW" values="PORTMUX_LUT5"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2969,12 +2744,9 @@
                     <bitfield caption="USART5 Signals" mask="0xc" name="USART5" rw="RW" values="PORTMUX_USART5"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
-                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW"
-                              values="PORTMUX_ZCD1"/>
-                    <bitfield caption="Zero Cross Detector 2 Output" mask="0x4" name="ZCD2" rw="RW"
-                              values="PORTMUX_ZCD2"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW" values="PORTMUX_ZCD1"/>
+                    <bitfield caption="Zero Cross Detector 2 Output" mask="0x4" name="ZCD2" rw="RW" values="PORTMUX_ZCD2"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -3197,12 +2969,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -3294,8 +3064,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -3391,8 +3160,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -3510,8 +3278,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -3547,13 +3314,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -3647,18 +3412,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -3801,17 +3563,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -3826,12 +3585,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -3843,10 +3599,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -3949,17 +3703,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3974,19 +3725,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -4009,8 +3756,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -4028,8 +3774,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB28.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB28.xml
index 13851d23..4c32c7e1 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB28.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB28.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR128DB28" package="SOIC28" pinout="SOIC28" speedmax="32000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR128DB28" package="SOIC28" pinout="SOIC28" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR128DB28" family="AVR8" architecture="AVR8X" avr-family="AVR DB">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x4000" start="0x4000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x20000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -93,8 +84,7 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
@@ -102,8 +92,7 @@
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -153,16 +142,11 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
                     </signals>
                 </instance>
             </module>
@@ -351,8 +335,7 @@
                     <signals>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
@@ -528,28 +511,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -559,8 +537,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -623,10 +600,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -646,12 +621,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -786,23 +759,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -873,44 +841,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -935,14 +891,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -1051,17 +1003,14 @@
                 </register>
                 <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Enable" mask="0x1" name="CFDEN" rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                     <bitfield caption="Clock Failure Detect Test" mask="0x2" name="CFDTST" rw="W"/>
                 </register>
-                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x1" name="CFD" rw="RW"/>
                     <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x1" name="CFD" rw="RW"/>
                 </register>
                 <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
@@ -1149,8 +1098,7 @@
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
                 <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF" value="0x1"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -1176,12 +1124,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Extended Z-Pointer Address bits" mask="0x1" name="RAMPZ" rw="RW"/>
                 </register>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1209,12 +1155,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1260,174 +1204,132 @@
         <module caption="Event System" id="chip" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW"
-                          size="1">
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B"
-                          rw="RW" size="1">
+                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW"
-                          size="1">
+                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW"
-                          size="1">
+                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F"
-                          rw="RW" size="1">
+                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW"
-                          size="1">
+                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW"
-                          size="1">
+                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW"
-                          size="1">
+                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW"
-                          size="1">
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1465,15 +1367,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1519,15 +1417,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1576,15 +1470,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1633,15 +1523,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1682,15 +1568,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1731,15 +1613,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1777,15 +1655,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1823,15 +1697,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1868,13 +1738,10 @@
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1885,26 +1752,22 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1930,8 +1793,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2025,8 +1887,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2073,10 +1934,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="Operational Amplifier System" id="amp_opamp_ctrl_avr_v1" name="OPAMP">
@@ -2096,19 +1955,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP0_MUXPOS"/>
+                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP0_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12"
-                          rw="RW" size="1">
+                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 0 Settle" initval="0x00" name="OP0SETTLE" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2125,19 +1979,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP1_MUXPOS"/>
+                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP1_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A"
-                          rw="RW" size="1">
+                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 1 Settle" initval="0x00" name="OP1SETTLE" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2303,14 +2152,10 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2342,8 +2187,7 @@
                     <bitfield caption="USART2 Signals" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -2503,12 +2347,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2600,8 +2442,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2697,8 +2538,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2816,8 +2656,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2853,13 +2692,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2952,18 +2789,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -3106,17 +2940,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -3131,12 +2962,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -3148,10 +2976,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -3254,17 +3080,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3279,19 +3102,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3314,8 +3133,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3333,8 +3151,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB32.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB32.xml
index c7cdaa07..2e108aeb 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB32.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB32.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR128DB32" package="QFN32" pinout="QFN32" speedmax="32000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR128DB32" package="QFN32" pinout="QFN32" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR128DB32" family="AVR8" architecture="AVR8X" avr-family="AVR DB">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x4000" start="0x4000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x20000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -97,8 +88,7 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
@@ -106,8 +96,7 @@
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -159,18 +148,12 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -369,14 +352,11 @@
                     <signals>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
                 </instance>
@@ -563,28 +543,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -594,8 +569,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -658,10 +632,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -681,12 +653,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -821,23 +791,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -908,44 +873,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -970,14 +923,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -1086,17 +1035,14 @@
                 </register>
                 <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Enable" mask="0x1" name="CFDEN" rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                     <bitfield caption="Clock Failure Detect Test" mask="0x2" name="CFDTST" rw="W"/>
                 </register>
-                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x1" name="CFD" rw="RW"/>
                     <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x1" name="CFD" rw="RW"/>
                 </register>
                 <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
@@ -1184,8 +1130,7 @@
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
                 <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF" value="0x1"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -1211,12 +1156,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Extended Z-Pointer Address bits" mask="0x1" name="RAMPZ" rw="RW"/>
                 </register>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1244,12 +1187,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1295,174 +1236,132 @@
         <module caption="Event System" id="chip" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW"
-                          size="1">
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B"
-                          rw="RW" size="1">
+                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW"
-                          size="1">
+                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW"
-                          size="1">
+                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F"
-                          rw="RW" size="1">
+                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW"
-                          size="1">
+                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW"
-                          size="1">
+                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW"
-                          size="1">
+                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW"
-                          size="1">
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1500,15 +1399,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1554,15 +1449,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1611,15 +1502,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1668,15 +1555,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1717,15 +1600,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1770,15 +1649,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1820,15 +1695,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1866,15 +1737,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1911,13 +1778,10 @@
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1928,26 +1792,22 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1973,8 +1833,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2068,8 +1927,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2116,10 +1974,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="Operational Amplifier System" id="amp_opamp_ctrl_avr_v1" name="OPAMP">
@@ -2139,19 +1995,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP0_MUXPOS"/>
+                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP0_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12"
-                          rw="RW" size="1">
+                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 0 Settle" initval="0x00" name="OP0SETTLE" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2168,19 +2019,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP1_MUXPOS"/>
+                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP1_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A"
-                          rw="RW" size="1">
+                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 1 Settle" initval="0x00" name="OP1SETTLE" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2346,14 +2192,10 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2386,8 +2228,7 @@
                     <bitfield caption="USART2 Signals" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -2552,12 +2393,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2649,8 +2488,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2746,8 +2584,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2865,8 +2702,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2902,13 +2738,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -3001,18 +2835,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -3155,17 +2986,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -3180,12 +3008,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -3197,10 +3022,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -3303,17 +3126,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3328,19 +3148,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3363,8 +3179,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3382,8 +3197,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB48.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB48.xml
index 61a9b741..d578e1f8 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB48.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB48.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR128DB48" package="QFN48" pinout="QFN48" speedmax="32000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR128DB48" package="QFN48" pinout="QFN48" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR128DB48" family="AVR8" architecture="AVR8X" avr-family="AVR DB">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x4000" start="0x4000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x20000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -111,20 +102,17 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="2" pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
-                                pad="PC6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -180,24 +168,15 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2" pad="PC7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4" pad="PE2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -470,15 +449,12 @@
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOA" pad="PB4"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOB" index="1" pad="PB5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
                 </instance>
@@ -735,28 +711,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -766,8 +737,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -830,10 +800,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -853,12 +821,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -993,23 +959,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -1094,64 +1055,46 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 4 Control B" initval="0x00" name="LUT4CTRLB" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 5 Control B" initval="0x00" name="LUT5CTRLB" offset="0x1d" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 4 Control C" initval="0x00" name="LUT4CTRLC" offset="0x1a" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 5 Control C" initval="0x00" name="LUT5CTRLC" offset="0x1e" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -1185,20 +1128,14 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Control 1" initval="0x00" name="INTCTRL1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW"
-                              values="CCL_INTMODE4"/>
-                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW"
-                              values="CCL_INTMODE5"/>
+                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW" values="CCL_INTMODE4"/>
+                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW" values="CCL_INTMODE5"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x3f" name="INT" rw="RW"/>
@@ -1324,17 +1261,14 @@
                 </register>
                 <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Enable" mask="0x1" name="CFDEN" rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                     <bitfield caption="Clock Failure Detect Test" mask="0x2" name="CFDTST" rw="W"/>
                 </register>
-                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x1" name="CFD" rw="RW"/>
                     <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x1" name="CFD" rw="RW"/>
                 </register>
                 <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
@@ -1422,8 +1356,7 @@
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
                 <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF" value="0x1"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -1449,12 +1382,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Extended Z-Pointer Address bits" mask="0x1" name="RAMPZ" rw="RW"/>
                 </register>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1482,12 +1413,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1533,250 +1462,189 @@
         <module caption="Event System" id="chip" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Multiplexer Channel 8" initval="0x00" name="CHANNEL8" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW"
-                              values="EVSYS_CHANNEL8"/>
+                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW" values="EVSYS_CHANNEL8"/>
                 </register>
                 <register caption="Multiplexer Channel 9" initval="0x00" name="CHANNEL9" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW"
-                              values="EVSYS_CHANNEL9"/>
+                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW" values="EVSYS_CHANNEL9"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW"
-                          size="1">
+                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW"
-                          size="1">
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B"
-                          rw="RW" size="1">
+                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW"
-                          size="1">
+                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW"
-                          size="1">
+                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F"
-                          rw="RW" size="1">
+                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW"
-                          size="1">
+                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW"
-                          size="1">
+                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW"
-                          size="1">
+                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 51 - OPAMP2 Disable" initval="0x00" name="USEROPAMP2DISABLE" offset="0x53"
-                          rw="RW" size="1">
+                <register caption="User 51 - OPAMP2 Disable" initval="0x00" name="USEROPAMP2DISABLE" offset="0x53" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 53 - OPAMP2 Drive" initval="0x00" name="USEROPAMP2DRIVE" offset="0x55" rw="RW"
-                          size="1">
+                <register caption="User 53 - OPAMP2 Drive" initval="0x00" name="USEROPAMP2DRIVE" offset="0x55" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 52 - OPAMP2 Dump" initval="0x00" name="USEROPAMP2DUMP" offset="0x54" rw="RW"
-                          size="1">
+                <register caption="User 52 - OPAMP2 Dump" initval="0x00" name="USEROPAMP2DUMP" offset="0x54" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 50 - OPAMP2 Enable" initval="0x00" name="USEROPAMP2ENABLE" offset="0x52" rw="RW"
-                          size="1">
+                <register caption="User 50 - OPAMP2 Enable" initval="0x00" name="USEROPAMP2ENABLE" offset="0x52" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW"
-                          size="1">
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 29 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3D" rw="RW"
-                          size="1">
+                <register caption="User 29 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 37 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x45" rw="RW"
-                          size="1">
+                <register caption="User 37 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x45" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 24 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x38" rw="RW"
-                          size="1">
+                <register caption="User 24 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x38" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1814,15 +1682,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1835,15 +1699,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
@@ -1892,15 +1752,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1913,15 +1769,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
@@ -1973,15 +1825,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1994,15 +1842,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x44"/>
@@ -2053,15 +1897,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2074,15 +1914,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x44"/>
@@ -2125,15 +1961,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2146,15 +1978,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port E Pin 0" name="PORTE_PIN0" value="0x40"/>
@@ -2200,15 +2028,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2221,15 +2045,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port E Pin 0" name="PORTE_PIN0" value="0x40"/>
@@ -2272,15 +2092,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2293,15 +2109,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="OPAMP2 Ready" name="OPAMP2_READY" value="0x36"/>
@@ -2336,15 +2148,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2357,15 +2165,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="OPAMP2 Ready" name="OPAMP2_READY" value="0x36"/>
@@ -2400,15 +2204,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2421,15 +2221,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="OPAMP2 Ready" name="OPAMP2_READY" value="0x36"/>
@@ -2466,15 +2262,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2485,15 +2277,11 @@
                 <value caption="Timer/Counter D0 event 1" name="TCD0_CMPASET" value="0xB1"/>
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="OPAMP2 Ready" name="OPAMP2_READY" value="0x36"/>
@@ -2533,13 +2321,10 @@
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -2550,26 +2335,22 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -2595,8 +2376,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2690,8 +2470,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2738,10 +2517,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="Operational Amplifier System" id="amp_opamp_ctrl_avr_v1" name="OPAMP">
@@ -2761,19 +2538,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP0_MUXPOS"/>
+                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP0_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12"
-                          rw="RW" size="1">
+                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 0 Settle" initval="0x00" name="OP0SETTLE" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2790,19 +2562,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP1_MUXPOS"/>
+                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP1_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A"
-                          rw="RW" size="1">
+                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 1 Settle" initval="0x00" name="OP1SETTLE" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2819,19 +2586,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 2 Input Multiplexer" initval="0x00" name="OP2INMUX" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP2_MUXPOS"/>
+                <register caption="Op Amp 2 Input Multiplexer" initval="0x00" name="OP2INMUX" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP2_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 2 Resistor Ladder Multiplexer" initval="0x00" name="OP2RESMUX" offset="0x22"
-                          rw="RW" size="1">
+                <register caption="Op Amp 2 Resistor Ladder Multiplexer" initval="0x00" name="OP2RESMUX" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 2 Settle" initval="0x00" name="OP2SETTLE" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -3006,18 +2768,12 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
-                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW"
-                              values="PORTMUX_LUT4"/>
-                    <bitfield caption="CCL Look-Up Table 5 Signals" mask="0x20" name="LUT5" rw="RW"
-                              values="PORTMUX_LUT5"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW" values="PORTMUX_LUT4"/>
+                    <bitfield caption="CCL Look-Up Table 5 Signals" mask="0x20" name="LUT5" rw="RW" values="PORTMUX_LUT5"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -3058,12 +2814,9 @@
                     <bitfield caption="USART4 Signals" mask="0x3" name="USART4" rw="RW" values="PORTMUX_USART4"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
-                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW"
-                              values="PORTMUX_ZCD1"/>
-                    <bitfield caption="Zero Cross Detector 2 Output" mask="0x4" name="ZCD2" rw="RW"
-                              values="PORTMUX_ZCD2"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW" values="PORTMUX_ZCD1"/>
+                    <bitfield caption="Zero Cross Detector 2 Output" mask="0x4" name="ZCD2" rw="RW" values="PORTMUX_ZCD2"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -3272,12 +3025,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -3369,8 +3120,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -3466,8 +3216,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -3585,8 +3334,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -3622,13 +3370,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -3722,18 +3468,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -3876,17 +3619,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -3901,12 +3641,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -3918,10 +3655,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -4024,17 +3759,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -4049,19 +3781,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -4084,8 +3812,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -4103,8 +3830,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB64.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB64.xml
index 6624de49..33cba529 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB64.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB64.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR128DB64" package="QFN64" pinout="QFN64" speedmax="32000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR128DB64" package="QFN64" pinout="QFN64" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR128DB64" family="AVR8" architecture="AVR8X" avr-family="AVR DB">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x4000" start="0x4000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x20000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x20000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -115,20 +106,17 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="2" pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
-                                pad="PC6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -137,14 +125,12 @@
                         <signal function="CCL_IN" group="LUT4_IN" index="0" pad="PB0"/>
                         <signal function="CCL_IN" group="LUT4_IN" index="1" pad="PB1"/>
                         <signal function="CCL_IN" group="LUT4_IN" index="2" pad="PB2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT4" function="CCL_ALT" group="LUT4_OUT" index="0"
-                                pad="PB6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT4" function="CCL_ALT" group="LUT4_OUT" index="0" pad="PB6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT4" function="CCL" group="LUT4_OUT" index="0" pad="PB3"/>
                         <signal function="CCL_IN" group="LUT5_IN" index="0" pad="PG0"/>
                         <signal function="CCL_IN" group="LUT5_IN" index="1" pad="PG1"/>
                         <signal function="CCL_IN" group="LUT5_IN" index="2" pad="PG2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT5" function="CCL_ALT" group="LUT5_OUT" index="0"
-                                pad="PG6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT5" function="CCL_ALT" group="LUT5_OUT" index="0" pad="PG6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT5" function="CCL" group="LUT5_OUT" index="0" pad="PG3"/>
                     </signals>
                 </instance>
@@ -192,32 +178,19 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS_ALT" group="EVOUT" index="1"
-                                pad="PB7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS_ALT" group="EVOUT" index="4"
-                                pad="PE7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS_ALT" group="EVOUT" index="6"
-                                pad="PG7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS" group="EVOUT" index="6"
-                                pad="PG2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS_ALT" group="EVOUT" index="1" pad="PB7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2" pad="PC7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS_ALT" group="EVOUT" index="4" pad="PE7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4" pad="PE2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS_ALT" group="EVOUT" index="6" pad="PG7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS" group="EVOUT" index="6" pad="PG2"/>
                     </signals>
                 </instance>
             </module>
@@ -540,22 +513,16 @@
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOA" pad="PB4"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOB" index="1"
-                                pad="PG5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOB" index="1" pad="PG5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOB" index="1" pad="PB5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOC" index="2"
-                                pad="PG6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOC" index="2" pad="PG6"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOC" index="2" pad="PB6"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOD" index="3"
-                                pad="PG7"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOD" index="3" pad="PG7"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOD" index="3" pad="PB7"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
@@ -843,28 +810,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -874,8 +836,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -938,10 +899,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -961,12 +920,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -1101,23 +1058,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -1202,64 +1154,46 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 4 Control B" initval="0x00" name="LUT4CTRLB" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 5 Control B" initval="0x00" name="LUT5CTRLB" offset="0x1d" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 4 Control C" initval="0x00" name="LUT4CTRLC" offset="0x1a" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 5 Control C" initval="0x00" name="LUT5CTRLC" offset="0x1e" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -1293,20 +1227,14 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Control 1" initval="0x00" name="INTCTRL1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW"
-                              values="CCL_INTMODE4"/>
-                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW"
-                              values="CCL_INTMODE5"/>
+                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW" values="CCL_INTMODE4"/>
+                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW" values="CCL_INTMODE5"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x3f" name="INT" rw="RW"/>
@@ -1432,17 +1360,14 @@
                 </register>
                 <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Enable" mask="0x1" name="CFDEN" rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                     <bitfield caption="Clock Failure Detect Test" mask="0x2" name="CFDTST" rw="W"/>
                 </register>
-                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x1" name="CFD" rw="RW"/>
                     <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x1" name="CFD" rw="RW"/>
                 </register>
                 <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
@@ -1530,8 +1455,7 @@
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
                 <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF" value="0x1"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -1557,12 +1481,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Extended Z-Pointer Address bits" mask="0x1" name="RAMPZ" rw="RW"/>
                 </register>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1590,12 +1512,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1641,266 +1561,201 @@
         <module caption="Event System" id="chip" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Multiplexer Channel 8" initval="0x00" name="CHANNEL8" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW"
-                              values="EVSYS_CHANNEL8"/>
+                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW" values="EVSYS_CHANNEL8"/>
                 </register>
                 <register caption="Multiplexer Channel 9" initval="0x00" name="CHANNEL9" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW"
-                              values="EVSYS_CHANNEL9"/>
+                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW" values="EVSYS_CHANNEL9"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW"
-                          size="1">
+                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW"
-                          size="1">
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 19 - EVOUTG" initval="0x00" name="USEREVSYSEVOUTG" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 19 - EVOUTG" initval="0x00" name="USEREVSYSEVOUTG" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B"
-                          rw="RW" size="1">
+                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW"
-                          size="1">
+                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW"
-                          size="1">
+                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F"
-                          rw="RW" size="1">
+                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW"
-                          size="1">
+                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW"
-                          size="1">
+                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW"
-                          size="1">
+                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 51 - OPAMP2 Disable" initval="0x00" name="USEROPAMP2DISABLE" offset="0x53"
-                          rw="RW" size="1">
+                <register caption="User 51 - OPAMP2 Disable" initval="0x00" name="USEROPAMP2DISABLE" offset="0x53" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 53 - OPAMP2 Drive" initval="0x00" name="USEROPAMP2DRIVE" offset="0x55" rw="RW"
-                          size="1">
+                <register caption="User 53 - OPAMP2 Drive" initval="0x00" name="USEROPAMP2DRIVE" offset="0x55" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 52 - OPAMP2 Dump" initval="0x00" name="USEROPAMP2DUMP" offset="0x54" rw="RW"
-                          size="1">
+                <register caption="User 52 - OPAMP2 Dump" initval="0x00" name="USEROPAMP2DUMP" offset="0x54" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 50 - OPAMP2 Enable" initval="0x00" name="USEROPAMP2ENABLE" offset="0x52" rw="RW"
-                          size="1">
+                <register caption="User 50 - OPAMP2 Enable" initval="0x00" name="USEROPAMP2ENABLE" offset="0x52" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW"
-                          size="1">
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 29 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3D" rw="RW"
-                          size="1">
+                <register caption="User 29 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 37 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x45" rw="RW"
-                          size="1">
+                <register caption="User 37 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x45" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 38 - TCB4 Event A" initval="0x00" name="USERTCB4CAPT" offset="0x46" rw="RW"
-                          size="1">
+                <register caption="User 38 - TCB4 Event A" initval="0x00" name="USERTCB4CAPT" offset="0x46" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 39 - TCB4 Event B" initval="0x00" name="USERTCB4COUNT" offset="0x47" rw="RW"
-                          size="1">
+                <register caption="User 39 - TCB4 Event B" initval="0x00" name="USERTCB4COUNT" offset="0x47" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 24 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x38" rw="RW"
-                          size="1">
+                <register caption="User 24 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x38" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 25 - USART5" initval="0x00" name="USERUSART5IRDA" offset="0x39" rw="RW"
-                          size="1">
+                <register caption="User 25 - USART5" initval="0x00" name="USERUSART5IRDA" offset="0x39" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1938,15 +1793,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1959,15 +1810,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2021,15 +1868,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2042,15 +1885,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2107,15 +1946,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2128,15 +1963,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2190,15 +2021,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2211,15 +2038,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2265,15 +2088,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2286,15 +2105,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2347,15 +2162,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2368,15 +2179,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2426,15 +2233,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2447,15 +2250,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2501,15 +2300,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2522,15 +2317,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2576,15 +2367,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2597,15 +2384,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2645,15 +2428,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2664,15 +2443,11 @@
                 <value caption="Timer/Counter D0 event 1" name="TCD0_CMPASET" value="0xB1"/>
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2715,13 +2490,10 @@
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -2732,26 +2504,22 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -2777,8 +2545,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2872,8 +2639,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2920,10 +2686,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="Operational Amplifier System" id="amp_opamp_ctrl_avr_v1" name="OPAMP">
@@ -2943,19 +2707,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP0_MUXPOS"/>
+                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP0_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12"
-                          rw="RW" size="1">
+                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 0 Settle" initval="0x00" name="OP0SETTLE" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2972,19 +2731,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP1_MUXPOS"/>
+                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP1_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A"
-                          rw="RW" size="1">
+                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 1 Settle" initval="0x00" name="OP1SETTLE" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -3001,19 +2755,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 2 Input Multiplexer" initval="0x00" name="OP2INMUX" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP2_MUXPOS"/>
+                <register caption="Op Amp 2 Input Multiplexer" initval="0x00" name="OP2INMUX" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP2_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 2 Resistor Ladder Multiplexer" initval="0x00" name="OP2RESMUX" offset="0x22"
-                          rw="RW" size="1">
+                <register caption="Op Amp 2 Resistor Ladder Multiplexer" initval="0x00" name="OP2RESMUX" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 2 Settle" initval="0x00" name="OP2SETTLE" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -3188,18 +2937,12 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
-                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW"
-                              values="PORTMUX_LUT4"/>
-                    <bitfield caption="CCL Look-Up Table 5 Signals" mask="0x20" name="LUT5" rw="RW"
-                              values="PORTMUX_LUT5"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW" values="PORTMUX_LUT4"/>
+                    <bitfield caption="CCL Look-Up Table 5 Signals" mask="0x20" name="LUT5" rw="RW" values="PORTMUX_LUT5"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -3243,12 +2986,9 @@
                     <bitfield caption="USART5 Signals" mask="0xc" name="USART5" rw="RW" values="PORTMUX_USART5"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
-                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW"
-                              values="PORTMUX_ZCD1"/>
-                    <bitfield caption="Zero Cross Detector 2 Output" mask="0x4" name="ZCD2" rw="RW"
-                              values="PORTMUX_ZCD2"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW" values="PORTMUX_ZCD1"/>
+                    <bitfield caption="Zero Cross Detector 2 Output" mask="0x4" name="ZCD2" rw="RW" values="PORTMUX_ZCD2"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -3470,12 +3210,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -3567,8 +3305,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -3664,8 +3401,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -3783,8 +3519,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -3820,13 +3555,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -3920,18 +3653,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -4074,17 +3804,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -4099,12 +3826,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -4116,10 +3840,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -4222,17 +3944,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -4247,19 +3966,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -4282,8 +3997,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -4301,8 +4015,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD14.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD14.xml
index 37b37876..ae28ec81 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD14.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD14.xml
@@ -1,105 +1,29 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR16DD14"
-                 package="SOIC14"
-                 pinout="SOIC14MVIO"
-                 speedmax="32000000"
-                 tempmax="125"
-                 tempmin="-40"
-                 vccmax="5.5"
-                 vccmin="1.8"/>
+        <variant ordercode="AVR16DD14" package="SOIC14" pinout="SOIC14MVIO" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR16DD14" family="AVR8" architecture="AVR8X" avr-family="AVR DD">
         <address-spaces>
-            <address-space endianness="little"
-                           id="data"
-                           name="data"
-                           size="0x10000"
-                           start="0x0000">
-                <memory-segment exec="0"
-                                name="IO"
-                                rw="RW"
-                                size="0x103F"
-                                start="0x00"
-                                type="io"/>
-                <memory-segment exec="0"
-                                name="LOCKBITS"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x04"
-                                start="0x1040"
-                                type="lockbits"/>
-                <memory-segment exec="0"
-                                name="FUSES"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x10"
-                                start="0x1050"
-                                type="fuses"/>
-                <memory-segment exec="0"
-                                name="USER_SIGNATURES"
-                                pagesize="0x20"
-                                rw="RW"
-                                size="0x20"
-                                start="0x1080"
-                                type="user_signatures"/>
-                <memory-segment exec="0"
-                                name="SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x03"
-                                start="0x1100"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="PROD_SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x7D"
-                                start="0x1103"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="EEPROM"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x100"
-                                start="0x1400"
-                                type="eeprom"/>
-                <memory-segment exec="0"
-                                name="INTERNAL_SRAM"
-                                rw="RW"
-                                size="0x800"
-                                start="0x7800"
-                                type="ram"/>
-                <memory-segment exec="0"
-                                name="MAPPED_PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x4000"
-                                start="0x8000"
-                                type="other"/>
+            <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+                <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00" type="io"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x04" start="0x1040" type="lockbits"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x1050" type="fuses"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x1080" type="user_signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x03" start="0x1100" type="signatures"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x1103" type="signatures"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x100" start="0x1400" type="eeprom"/>
+                <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x800" start="0x7800" type="ram"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x4000" start="0x8000" type="other"/>
             </address-space>
-            <address-space endianness="little"
-                           id="prog"
-                           name="prog"
-                           size="0x4000"
-                           start="0x0000">
-                <memory-segment exec="1"
-                                name="PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x4000"
-                                start="0x00"
-                                type="flash"/>
+            <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x4000" start="0x00" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
             <module id="cmp_control_v8" name="AC">
                 <instance name="AC0">
-                    <register-group address-space="data"
-                                    name="AC0"
-                                    name-in-module="AC"
-                                    offset="0x0680"/>
+                    <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
                     <signals>
                         <signal function="AC0" group="N" index="2" pad="PD7"/>
                         <signal function="AC0" group="N" index="3" pad="PC2"/>
@@ -110,10 +34,7 @@
             </module>
             <module id="adc_12b_diff_ctrl_v1" name="ADC">
                 <instance name="ADC0">
-                    <register-group address-space="data"
-                                    name="ADC0"
-                                    name-in-module="ADC"
-                                    offset="0x0600"/>
+                    <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
                     <signals>
                         <signal function="AIN0" group="AIN" index="4" pad="PD4"/>
                         <signal function="AIN0" group="AIN" index="5" pad="PD5"/>
@@ -127,78 +48,29 @@
             </module>
             <module id="bor_lvd_ctrl_v1" name="BOD">
                 <instance name="BOD">
-                    <register-group address-space="data"
-                                    name="BOD"
-                                    name-in-module="BOD"
-                                    offset="0x00A0"/>
+                    <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x00A0"/>
                 </instance>
             </module>
             <module id="cla_ccl_v1" name="CCL">
                 <instance name="CCL">
-                    <register-group address-space="data"
-                                    name="CCL"
-                                    name-in-module="CCL"
-                                    offset="0x01C0"/>
+                    <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
                     <signals>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_OUT"
-                                index="0"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_OUT"
-                                index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0" pad="PD6"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="CLKCTRL">
                 <instance name="CLKCTRL">
-                    <register-group address-space="data"
-                                    name="CLKCTRL"
-                                    name-in-module="CLKCTRL"
-                                    offset="0x0060"/>
+                    <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
                     <signals>
                         <signal function="CLKCTRL" group="EXTCLK" pad="PA0"/>
                         <signal function="CLKCTRL" group="XTALHF1" pad="PA0"/>
@@ -210,10 +82,7 @@
             </module>
             <module id="cpu_avr_xt_v1" name="CPU">
                 <instance name="CPU">
-                    <register-group address-space="data"
-                                    name="CPU"
-                                    name-in-module="CPU"
-                                    offset="0x0030"/>
+                    <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V4S"/>
                     </parameters>
@@ -221,26 +90,17 @@
             </module>
             <module id="int_8bit_v3" name="CPUINT">
                 <instance name="CPUINT">
-                    <register-group address-space="data"
-                                    name="CPUINT"
-                                    name-in-module="CPUINT"
-                                    offset="0x0110"/>
+                    <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
                 </instance>
             </module>
             <module id="math_pdi_crc_v1" name="CRCSCAN">
                 <instance name="CRCSCAN">
-                    <register-group address-space="data"
-                                    name="CRCSCAN"
-                                    name-in-module="CRCSCAN"
-                                    offset="0x0120"/>
+                    <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
                 </instance>
             </module>
             <module id="dac_nbit_ctrl_v5" name="DAC">
                 <instance name="DAC0">
-                    <register-group address-space="data"
-                                    name="DAC0"
-                                    name-in-module="DAC"
-                                    offset="0x06A0"/>
+                    <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
                     <signals>
                         <signal function="DAC0" group="OUT" index="0" pad="PD6"/>
                     </signals>
@@ -248,85 +108,49 @@
             </module>
             <module id="avrdd" name="EVSYS">
                 <instance name="EVSYS">
-                    <register-group address-space="data"
-                                    name="EVSYS"
-                                    name-in-module="EVSYS"
-                                    offset="0x0200"/>
+                    <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="5"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="FUSE">
                 <instance name="FUSE">
-                    <register-group address-space="data"
-                                    name="FUSE"
-                                    name-in-module="FUSE"
-                                    offset="0x1050"/>
+                    <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1050"/>
                 </instance>
             </module>
             <module id="avrdd" name="GPR">
                 <instance name="GPR">
-                    <register-group address-space="data"
-                                    name="GPR"
-                                    name-in-module="GPR"
-                                    offset="0x001C"/>
+                    <register-group address-space="data" name="GPR" name-in-module="GPR" offset="0x001C"/>
                 </instance>
             </module>
             <module id="avrdd" name="LOCK">
                 <instance name="LOCK">
-                    <register-group address-space="data"
-                                    name="LOCK"
-                                    name-in-module="LOCK"
-                                    offset="0x1040"/>
+                    <register-group address-space="data" name="LOCK" name-in-module="LOCK" offset="0x1040"/>
                 </instance>
             </module>
             <module id="io_multiv_ctrl_avr_v1" name="MVIO">
                 <instance name="MVIO">
-                    <register-group address-space="data"
-                                    name="MVIO"
-                                    name-in-module="MVIO"
-                                    offset="0x00C0"/>
+                    <register-group address-space="data" name="MVIO" name-in-module="MVIO" offset="0x00C0"/>
                 </instance>
             </module>
             <module id="nvm_ctrl_avr_v1" name="NVMCTRL">
                 <instance name="NVMCTRL">
-                    <register-group address-space="data"
-                                    name="NVMCTRL"
-                                    name-in-module="NVMCTRL"
-                                    offset="0x1000"/>
+                    <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_port" name="PORT">
                 <instance name="PORTA">
-                    <register-group address-space="data"
-                                    name="PORTA"
-                                    name-in-module="PORT"
-                                    offset="0x0400"/>
+                    <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
                     </signals>
                 </instance>
                 <instance name="PORTC">
-                    <register-group address-space="data"
-                                    name="PORTC"
-                                    name-in-module="PORT"
-                                    offset="0x0440"/>
+                    <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
                         <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
@@ -334,10 +158,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD">
-                    <register-group address-space="data"
-                                    name="PORTD"
-                                    name-in-module="PORT"
-                                    offset="0x0460"/>
+                    <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
                         <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
@@ -346,10 +167,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF">
-                    <register-group address-space="data"
-                                    name="PORTF"
-                                    name-in-module="PORT"
-                                    offset="0x04A0"/>
+                    <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="6" pad="PF6"/>
                         <signal function="IOPORT" group="PIN" index="7" pad="PF7"/>
@@ -358,18 +176,12 @@
             </module>
             <module id="avrdd" name="PORTMUX">
                 <instance name="PORTMUX">
-                    <register-group address-space="data"
-                                    name="PORTMUX"
-                                    name-in-module="PORTMUX"
-                                    offset="0x05E0"/>
+                    <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
                 </instance>
             </module>
             <module id="rst_integration_v8" name="RSTCTRL">
                 <instance name="RSTCTRL">
-                    <register-group address-space="data"
-                                    name="RSTCTRL"
-                                    name-in-module="RSTCTRL"
-                                    offset="0x0040"/>
+                    <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
                     <signals>
                         <signal function="OTHER" group="RESET" pad="PF6"/>
                     </signals>
@@ -377,364 +189,154 @@
             </module>
             <module id="tmr_16b_rtc_v1" name="RTC">
                 <instance name="RTC">
-                    <register-group address-space="data"
-                                    name="RTC"
-                                    name-in-module="RTC"
-                                    offset="0x0140"/>
+                    <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
                 </instance>
             </module>
             <module id="avrdd" name="SIGROW">
                 <instance name="SIGROW">
-                    <register-group address-space="data"
-                                    name="SIGROW"
-                                    name-in-module="SIGROW"
-                                    offset="0x1100"/>
+                    <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
                 </instance>
             </module>
             <module id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
                 <instance name="SLPCTRL">
-                    <register-group address-space="data"
-                                    name="SLPCTRL"
-                                    name-in-module="SLPCTRL"
-                                    offset="0x0050"/>
+                    <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
                 </instance>
             </module>
             <module id="spi_8bit_v2" name="SPI">
                 <instance name="SPI0">
-                    <register-group address-space="data"
-                                    name="SPI0"
-                                    name-in-module="SPI"
-                                    offset="0x0940"/>
+                    <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0940"/>
                     <signals>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MISO"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MOSI"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="SS"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MISO"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MOSI"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SS"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="MISO"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SS"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MISO"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MOSI"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SCK"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SS"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MISO" pad="PA1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MOSI" pad="PA0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="SS" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MISO" pad="PD5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MOSI" pad="PD4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SCK" pad="PD6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SS" pad="PD7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="MISO" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SCK" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SS" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MISO" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MOSI" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SCK" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SS" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="SYSCFG">
                 <instance name="SYSCFG">
-                    <register-group address-space="data"
-                                    name="SYSCFG"
-                                    name-in-module="SYSCFG"
-                                    offset="0x0F00"/>
+                    <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
                 </instance>
             </module>
             <module id="tmr_16b_pwm_v1" name="TCA">
                 <instance name="TCA0">
-                    <register-group address-space="data"
-                                    name="TCA0"
-                                    name-in-module="TCA"
-                                    offset="0x0A00"/>
+                    <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
                     <signals>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="3"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="4"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="5"
-                                pad="PD5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="3" pad="PC3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="4" pad="PD4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="5" pad="PD5"/>
                     </signals>
                 </instance>
             </module>
             <module id="tmr_16b_capture_v1" name="TCB">
                 <instance name="TCB0">
-                    <register-group address-space="data"
-                                    name="TCB0"
-                                    name-in-module="TCB"
-                                    offset="0x0B00"/>
+                    <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0B00"/>
                 </instance>
                 <instance name="TCB1">
-                    <register-group address-space="data"
-                                    name="TCB1"
-                                    name-in-module="TCB"
-                                    offset="0x0B10"/>
+                    <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0B10"/>
                 </instance>
                 <instance name="TCB2">
-                    <register-group address-space="data"
-                                    name="TCB2"
-                                    name-in-module="TCB"
-                                    offset="0x0B20"/>
+                    <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0B20"/>
                 </instance>
             </module>
             <module id="tmr_12b_psc_v1" name="TCD">
                 <instance name="TCD0">
-                    <register-group address-space="data"
-                                    name="TCD0"
-                                    name-in-module="TCD"
-                                    offset="0x0B80"/>
+                    <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0B80"/>
                     <signals>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOC"
-                                index="2"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOD"
-                                index="3"
-                                pad="PD5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2" pad="PD4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3" pad="PD5"/>
                     </signals>
                 </instance>
             </module>
             <module id="i2c_8bit_avr_v3" name="TWI">
                 <instance name="TWI0">
-                    <register-group address-space="data"
-                                    name="TWI0"
-                                    name-in-module="TWI"
-                                    offset="0x0900"/>
+                    <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0900"/>
                     <signals>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SCL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SDA"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SDA_DUAL" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SCL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SDA" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL" pad="PA1"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA" pad="PA0"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA_DUAL" pad="PC2"/>
                     </signals>
                 </instance>
             </module>
             <module id="uart_autobd_v4" name="USART">
                 <instance name="USART0">
-                    <register-group address-space="data"
-                                    name="USART0"
-                                    name-in-module="USART"
-                                    offset="0x0800"/>
+                    <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="RXD"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="TXD"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="RXD"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="TXD"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XDIR"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="RXD"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="TXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="XCK"
-                                pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="RXD" pad="PD5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="TXD" pad="PD4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XCK" pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XDIR" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="RXD" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="TXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="XCK" pad="PC3"/>
                     </signals>
                 </instance>
                 <instance name="USART1">
-                    <register-group address-space="data"
-                                    name="USART1"
-                                    name-in-module="USART"
-                                    offset="0x0820"/>
+                    <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="RXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XDIR"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="RXD"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="TXD"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="RXD" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="TXD" pad="PD6"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="USERROW">
                 <instance name="USERROW">
-                    <register-group address-space="data"
-                                    name="USERROW"
-                                    name-in-module="USERROW"
-                                    offset="0x1080"/>
+                    <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1080"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_vport" name="VPORT">
                 <instance name="VPORTA">
-                    <register-group address-space="data"
-                                    name="VPORTA"
-                                    name-in-module="VPORT"
-                                    offset="0x0000"/>
+                    <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
                 </instance>
                 <instance name="VPORTC">
-                    <register-group address-space="data"
-                                    name="VPORTC"
-                                    name-in-module="VPORT"
-                                    offset="0x0008"/>
+                    <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
                 </instance>
                 <instance name="VPORTD">
-                    <register-group address-space="data"
-                                    name="VPORTD"
-                                    name-in-module="VPORT"
-                                    offset="0x000C"/>
+                    <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
                 </instance>
                 <instance name="VPORTF">
-                    <register-group address-space="data"
-                                    name="VPORTF"
-                                    name-in-module="VPORT"
-                                    offset="0x0014"/>
+                    <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
                 </instance>
             </module>
             <module id="avrdd" name="VREF">
                 <instance name="VREF">
-                    <register-group address-space="data"
-                                    name="VREF"
-                                    name-in-module="VREF"
-                                    offset="0x00B0"/>
+                    <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00B0"/>
                 </instance>
             </module>
             <module id="wdt_windowed_v2" name="WDT">
                 <instance name="WDT">
-                    <register-group address-space="data"
-                                    name="WDT"
-                                    name-in-module="WDT"
-                                    offset="0x0100"/>
+                    <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
                 </instance>
             </module>
             <module id="cmp_zxover_ctrl_v3" name="ZCD">
                 <instance name="ZCD3">
-                    <register-group address-space="data"
-                                    name="ZCD3"
-                                    name-in-module="ZCD"
-                                    offset="0x06D8"/>
+                    <register-group address-space="data" name="ZCD3" name-in-module="ZCD" offset="0x06D8"/>
                     <signals>
-                        <signal field="PORTMUX.ZCDROUTEA.ZCD3"
-                                function="ZCD3"
-                                group="IN"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.ZCDROUTEA.ZCD3" function="ZCD3" group="IN" pad="PC2"/>
                     </signals>
                 </instance>
             </module>
@@ -806,90 +408,31 @@
     <modules>
         <module caption="Analog Comparator" id="cmp_control_v8" name="AC">
             <register-group caption="Analog Comparator" name="AC" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Hysteresis Mode"
-                              mask="0x06"
-                              name="HYSMODE"
-                              rw="RW"
-                              values="AC_HYSMODE"/>
-                    <bitfield caption="Power profile"
-                              mask="0x18"
-                              name="POWER"
-                              rw="RW"
-                              values="AC_POWER"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Power profile" mask="0x18" name="POWER" rw="RW" values="AC_POWER"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Mux Control A"
-                          initval="0x00"
-                          name="MUXCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input MUX Selection"
-                              mask="0x07"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection"
-                              mask="0x38"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="AC_MUXPOS"/>
-                    <bitfield caption="AC Output Initial Value"
-                              mask="0x40"
-                              name="INITVAL"
-                              rw="RW"
-                              values="AC_INITVAL"/>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Negative Input MUX Selection" mask="0x07" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+                    <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
                 </register>
-                <register caption="DAC Voltage Reference"
-                          initval="0xFF"
-                          name="DACREF"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="DAC Voltage Reference" initval="0xFF" name="DACREF" offset="0x5" rw="RW" size="1">
                     <bitfield caption="DACREF" mask="0xFF" name="DACREF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="WINSEL" value="0x00"/>
                     <mode name="WINDOW" qualifier="WINSEL" value="0x01 0x02"/>
                     <bitfield caption="Interrupt Enable" mask="0x01" name="CMP" rw="RW"/>
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="INTMODE"
-                              rw="RW"
-                              values="AC_NORMAL_INTMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" modes="NORMAL" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Comparator Interrupt Flag"
-                              mask="0x01"
-                              name="CMPIF"
-                              rw="RW"/>
-                    <bitfield caption="Analog Comparator State"
-                              mask="0x10"
-                              name="CMPSTATE"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x01" name="CMPIF" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -899,23 +442,15 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption"
-                       name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
                 <value caption="Power profile 3" name="PROFILE3" value="0x3"/>
             </value-group>
             <value-group caption="Interrupt Mode select" name="AC_NORMAL_INTMODE">
-                <value caption="Positive and negative inputs crosses"
-                       name="BOTHEDGE"
-                       value="0x0"/>
-                <value caption="Positive input goes below negative input"
-                       name="NEGEDGE"
-                       value="0x2"/>
-                <value caption="Positive input goes above negative input"
-                       name="POSEDGE"
-                       value="0x3"/>
+                <value caption="Positive and negative inputs crosses" name="BOTHEDGE" value="0x0"/>
+                <value caption="Positive input goes below negative input" name="NEGEDGE" value="0x2"/>
+                <value caption="Positive input goes above negative input" name="POSEDGE" value="0x3"/>
             </value-group>
             <value-group caption="AC Output Initial Value select" name="AC_INITVAL">
                 <value caption="Output initialized to 0" name="LOW" value="0x0"/>
@@ -933,194 +468,62 @@
                 <value caption="Positive Pin 4" name="AINP4" value="0x04"/>
             </value-group>
         </module>
-        <module caption="Analog to Digital Converter"
-                id="adc_12b_diff_ctrl_v1"
-                name="ADC">
+        <module caption="Analog to Digital Converter" id="adc_12b_diff_ctrl_v1" name="ADC">
             <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="ADC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Free running mode" mask="0x02" name="FREERUN" rw="RW"/>
-                    <bitfield caption="Resolution selection"
-                              mask="0x0C"
-                              name="RESSEL"
-                              rw="RW"
-                              values="ADC_RESSEL"/>
+                    <bitfield caption="Resolution selection" mask="0x0C" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
                     <bitfield caption="Left adjust result" mask="0x10" name="LEFTADJ" rw="RW"/>
-                    <bitfield caption="Conversion mode"
-                              mask="0x20"
-                              name="CONVMODE"
-                              rw="RW"
-                              values="ADC_CONVMODE"/>
+                    <bitfield caption="Conversion mode" mask="0x20" name="CONVMODE" rw="RW" values="ADC_CONVMODE"/>
                     <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Accumulation Samples"
-                              mask="0x07"
-                              name="SAMPNUM"
-                              rw="RW"
-                              values="ADC_SAMPNUM"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x07" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Pre-scaler"
-                              mask="0x0F"
-                              name="PRESC"
-                              rw="RW"
-                              values="ADC_PRESC"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x0F" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sampling Delay Selection"
-                              mask="0x0F"
-                              name="SAMPDLY"
-                              rw="RW"
-                              values="ADC_SAMPDLY"/>
-                    <bitfield caption="Initial Delay Selection"
-                              mask="0xE0"
-                              name="INITDLY"
-                              rw="RW"
-                              values="ADC_INITDLY"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Sampling Delay Selection" mask="0x0F" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xE0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Window Comparator Mode"
-                              mask="0x07"
-                              name="WINCM"
-                              rw="RW"
-                              values="ADC_WINCM"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x07" name="WINCM" rw="RW" values="ADC_WINCM"/>
                 </register>
-                <register caption="Sample Control"
-                          initval="0x00"
-                          name="SAMPCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Sample lenght" mask="0xFF" name="SAMPLEN" rw="RW"/>
                 </register>
-                <register caption="Positive mux input"
-                          initval="0x00"
-                          name="MUXPOS"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="ADC_MUXPOS"/>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
-                <register caption="Negative mux input"
-                          initval="0x00"
-                          name="MUXNEG"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="ADC_MUXNEG"/>
+                <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
-                <register caption="Command"
-                          initval="0x00"
-                          name="COMMAND"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Start Conversion" mask="0x01" name="STCONV" rw="RW"/>
                     <bitfield caption="Stop Conversion" mask="0x02" name="SPCONV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Start Event Input Enable"
-                              mask="0x01"
-                              name="STARTEI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x01" name="STARTEI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Result Ready Interrupt Enable"
-                              mask="0x01"
-                              name="RESRDY"
-                              rw="RW"/>
-                    <bitfield caption="Window Comparator Interrupt Enable"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x01" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
                     <bitfield caption="Result Ready Flag" mask="0x01" name="RESRDY" rw="RW"/>
-                    <bitfield caption="Window Comparator Flag"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Data"
-                          initval="0x00"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Temporary" mask="0xFF" name="TEMP" rw="RW"/>
                 </register>
-                <register caption="ADC Accumulator Result"
-                          name="RES"
-                          offset="0x10"
-                          rw="R"
-                          size="2"/>
-                <register caption="Window comparator low threshold"
-                          name="WINLT"
-                          offset="0x12"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Window comparator high threshold"
-                          name="WINHT"
-                          offset="0x14"
-                          rw="RW"
-                          size="2"/>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Conversion mode select" name="ADC_CONVMODE">
                 <value caption="Single-Ended mode" name="SINGLEENDED" value="0x0"/>
@@ -1250,99 +653,33 @@
         </module>
         <module caption="Bod interface" id="bor_lvd_ctrl_v1" name="BOD">
             <register-group caption="Bod interface" name="BOD" size="0x10">
-                <register caption="Control A"
-                          initval="0x01"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Operation in sleep mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="BOD_SLEEP"/>
-                    <bitfield caption="Operation in active mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="R"
-                              values="BOD_ACTIVE"/>
-                    <bitfield caption="Sample frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="R"
-                              values="BOD_SAMPFREQ"/>
+                <register caption="Control A" initval="0x01" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in sleep mode" mask="0x03" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                    <bitfield caption="Operation in active mode" mask="0x0C" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bod level"
-                              mask="0x07"
-                              name="LVL"
-                              rw="R"
-                              values="BOD_LVL"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x07" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor Control"
-                          initval="0x00"
-                          name="VLMCTRLA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level"
-                              mask="0x03"
-                              name="VLMLVL"
-                              rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x03" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor interrrupt enable"
-                              mask="0x01"
-                              name="VLMIE"
-                              rw="RW"/>
-                    <bitfield caption="Configuration"
-                              mask="0x06"
-                              name="VLMCFG"
-                              rw="RW"
-                              values="BOD_VLMCFG"/>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x01" name="VLMIE" rw="RW"/>
+                    <bitfield caption="Configuration" mask="0x06" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor interrupt flag"
-                              mask="0x01"
-                              name="VLMIF"
-                              rw="RW"/>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x01" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor status"
-                              mask="0x01"
-                              name="VLMS"
-                              rw="R"
-                              values="BOD_VLMS"/>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x01" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
                 <value caption="Disabled" name="DIS" value="0x00"/>
                 <value caption="Enabled" name="ENABLED" value="0x01"/>
                 <value caption="Sampled" name="SAMPLED" value="0x02"/>
-                <value caption="Enabled with wake-up halted until BOD is ready"
-                       name="ENWAKE"
-                       value="0x03"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
             </value-group>
             <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
                 <value caption="128Hz sampling frequency" name="128HZ" value="0x0"/>
@@ -1365,338 +702,103 @@
                 <value caption="VDD crosses VLM threshold" name="BOTH" value="0x02"/>
             </value-group>
             <value-group caption="Voltage level monitor status select" name="BOD_VLMS">
-                <value caption="The voltage is above the VLM threshold level"
-                       name="ABOVE"
-                       value="0x0"/>
-                <value caption="The voltage is below the VLM threshold level"
-                       name="BELOW"
-                       value="0x1"/>
+                <value caption="The voltage is above the VLM threshold level" name="ABOVE" value="0x0"/>
+                <value caption="The voltage is below the VLM threshold level" name="BELOW" value="0x1"/>
             </value-group>
             <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
                 <value caption="VLM Disabled" name="OFF" value="0x0"/>
-                <value caption="VLM threshold 5% above BOD level"
-                       name="5ABOVE"
-                       value="0x1"/>
-                <value caption="VLM threshold 15% above BOD level"
-                       name="15ABOVE"
-                       value="0x2"/>
-                <value caption="VLM threshold 25% above BOD level"
-                       name="25ABOVE"
-                       value="0x3"/>
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x1"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x2"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x3"/>
             </value-group>
         </module>
         <module caption="Configurable Custom Logic" id="cla_ccl_v1" name="CCL">
             <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Sequential Control 0"
-                          initval="0x00"
-                          name="SEQCTRL0"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Sequential Control 1"
-                          initval="0x00"
-                          name="SEQCTRL1"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Interrupt Control 0"
-                          initval="0x00"
-                          name="INTCTRL0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode for LUT0"
-                              mask="0x03"
-                              name="INTMODE0"
-                              rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1"
-                              mask="0x0C"
-                              name="INTMODE1"
-                              rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2"
-                              mask="0x30"
-                              name="INTMODE2"
-                              rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3"
-                              mask="0xC0"
-                              name="INTMODE3"
-                              rw="RW"
-                              values="CCL_INTMODE3"/>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x03" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0x0C" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xC0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x0F" name="INT" rw="RW"/>
                 </register>
-                <register caption="LUT 0 Control A"
-                          initval="0x00"
-                          name="LUT0CTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 0 Control A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 0 Control B"
-                          initval="0x00"
-                          name="LUT0CTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 0 Control C"
-                          initval="0x00"
-                          name="LUT0CTRLC"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 0"
-                          initval="0x00"
-                          name="TRUTH0"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 1 Control A"
-                          initval="0x00"
-                          name="LUT1CTRLA"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 1 Control A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 1 Control B"
-                          initval="0x00"
-                          name="LUT1CTRLB"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 1 Control C"
-                          initval="0x00"
-                          name="LUT1CTRLC"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 1"
-                          initval="0x00"
-                          name="TRUTH1"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 2 Control A"
-                          initval="0x00"
-                          name="LUT2CTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 2 Control A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 2 Control B"
-                          initval="0x00"
-                          name="LUT2CTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 2 Control C"
-                          initval="0x00"
-                          name="LUT2CTRLC"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 2"
-                          initval="0x00"
-                          name="TRUTH2"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 3 Control A"
-                          initval="0x00"
-                          name="LUT3CTRLA"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 3 Control A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 3 Control B"
-                          initval="0x00"
-                          name="LUT3CTRLB"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 3 Control C"
-                          initval="0x00"
-                          name="LUT3CTRLC"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 3"
-                          initval="0x00"
-                          name="TRUTH3"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
             </register-group>
@@ -1727,13 +829,9 @@
             <value-group caption="Clock Source Selection" name="CCL_CLKSRC">
                 <value caption="Peripheral Clock" name="CLKPER" value="0x0"/>
                 <value caption="Selection by INSEL2" name="IN2" value="0x1"/>
-                <value caption="Internal High-Frequency Oscillator"
-                       name="OSCHF"
-                       value="0x4"/>
+                <value caption="Internal High-Frequency Oscillator" name="OSCHF" value="0x4"/>
                 <value caption="32.768 kHz oscillator" name="OSC32K" value="0x5"/>
-                <value caption="32.768 kHz oscillator divided by 32"
-                       name="OSC1K"
-                       value="0x6"/>
+                <value caption="32.768 kHz oscillator divided by 32" name="OSC1K" value="0x6"/>
             </value-group>
             <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
                 <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
@@ -1799,195 +897,67 @@
         </module>
         <module caption="Clock controller" id="avrdd" name="CLKCTRL">
             <register-group caption="Clock controller" name="CLKCTRL" size="0x40">
-                <register caption="MCLK Control A"
-                          initval="0x00"
-                          name="MCLKCTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="CLKCTRL_CLKSEL"/>
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock select" mask="0x07" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
                     <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
                 </register>
-                <register caption="MCLK Control B"
-                          initval="0x00"
-                          name="MCLKCTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Prescaler enable" mask="0x01" name="PEN" rw="RW"/>
-                    <bitfield caption="Prescaler division"
-                              mask="0x1E"
-                              name="PDIV"
-                              rw="RW"
-                              values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler division" mask="0x1E" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
                 </register>
-                <register caption="MCLK Control C"
-                          initval="0x00"
-                          name="MCLKCTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Enable"
-                              mask="0x01"
-                              name="CFDEN"
-                              rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Test"
-                              mask="0x02"
-                              name="CFDTST"
-                              rw="W"/>
-                    <bitfield caption="Clock Failure Detect Source"
-                              mask="0x0C"
-                              name="CFDSRC"
-                              rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Enable" mask="0x01" name="CFDEN" rw="RW"/>
+                    <bitfield caption="Clock Failure Detect Test" mask="0x02" name="CFDTST" rw="W"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0x0C" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                 </register>
-                <register caption="MCLK Interrupt Control"
-                          initval="0x00"
-                          name="MCLKINTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Enable"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt type"
-                              mask="0x80"
-                              name="INTTYPE"
-                              rw="RW"
-                              values="CLKCTRL_INTTYPE"/>
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x01" name="CFD" rw="RW"/>
+                    <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags"
-                          initval="0x00"
-                          name="MCLKINTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Flag"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x01" name="CFD" rw="RW"/>
                 </register>
-                <register caption="MCLK Status"
-                          initval="0x00"
-                          name="MCLKSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="System Oscillator changing"
-                              mask="0x01"
-                              name="SOSC"
-                              rw="RW"/>
-                    <bitfield caption="High frequency oscillator status"
-                              mask="0x02"
-                              name="OSCHFS"
-                              rw="RW"/>
-                    <bitfield caption="32KHz oscillator status"
-                              mask="0x04"
-                              name="OSC32KS"
-                              rw="RW"/>
-                    <bitfield caption="32.768 kHz Crystal Oscillator status"
-                              mask="0x08"
-                              name="XOSC32KS"
-                              rw="RW"/>
+                <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="System Oscillator changing" mask="0x01" name="SOSC" rw="RW"/>
+                    <bitfield caption="High frequency oscillator status" mask="0x02" name="OSCHFS" rw="RW"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x04" name="OSC32KS" rw="RW"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x08" name="XOSC32KS" rw="RW"/>
                     <bitfield caption="External Clock status" mask="0x10" name="EXTS" rw="RW"/>
                     <bitfield caption="PLL oscillator status" mask="0x20" name="PLLS" rw="RW"/>
                 </register>
-                <register caption="OSCHF Control A"
-                          initval="0x0C"
-                          name="OSCHFCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Control A" initval="0x0C" name="OSCHFCTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="Autotune" mask="0x01" name="AUTOTUNE" rw="RW"/>
-                    <bitfield caption="Frequency select"
-                              mask="0x3C"
-                              name="FRQSEL"
-                              rw="RW"
-                              values="CLKCTRL_FRQSEL"/>
+                    <bitfield caption="Frequency select" mask="0x3C" name="FRQSEL" rw="RW" values="CLKCTRL_FRQSEL"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSCHF Tune"
-                          name="OSCHFTUNE"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Tune" name="OSCHFTUNE" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Tune" mask="0xFF" name="TUNE" rw="RW"/>
                 </register>
-                <register caption="PLL Control A"
-                          name="PLLCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multiplication factor"
-                              mask="0x03"
-                              name="MULFAC"
-                              rw="RW"
-                              values="CLKCTRL_MULFAC"/>
-                    <bitfield caption="Source"
-                              mask="0x40"
-                              name="SOURCE"
-                              rw="RW"
-                              values="CLKCTRL_SOURCE"/>
+                <register caption="PLL Control A" name="PLLCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Multiplication factor" mask="0x03" name="MULFAC" rw="RW" values="CLKCTRL_MULFAC"/>
+                    <bitfield caption="Source" mask="0x40" name="SOURCE" rw="RW" values="CLKCTRL_SOURCE"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSC32K Control A"
-                          initval="0x00"
-                          name="OSC32KCTRLA"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC32K Control A"
-                          initval="0x00"
-                          name="XOSC32KCTRLA"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Low power mode" mask="0x02" name="LPMODE" rw="RW"/>
                     <bitfield caption="Select" mask="0x04" name="SEL" rw="RW"/>
-                    <bitfield caption="Crystal startup time"
-                              mask="0x30"
-                              name="CSUT"
-                              rw="RW"
-                              values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC HF Control A"
-                          initval="0x00"
-                          name="XOSCHFCTRLA"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC HF Control A" initval="0x00" name="XOSCHFCTRLA" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="External Source Select"
-                              mask="0x02"
-                              name="SELHF"
-                              rw="RW"
-                              values="CLKCTRL_SELHF"/>
-                    <bitfield caption="Frequency Range"
-                              mask="0x0C"
-                              name="FRQRANGE"
-                              rw="RW"
-                              values="CLKCTRL_FRQRANGE"/>
-                    <bitfield caption="Start-up Time Select"
-                              mask="0x30"
-                              name="CSUTHF"
-                              rw="RW"
-                              values="CLKCTRL_CSUTHF"/>
+                    <bitfield caption="External Source Select" mask="0x02" name="SELHF" rw="RW" values="CLKCTRL_SELHF"/>
+                    <bitfield caption="Frequency Range" mask="0x0C" name="FRQRANGE" rw="RW" values="CLKCTRL_FRQRANGE"/>
+                    <bitfield caption="Start-up Time Select" mask="0x30" name="CSUTHF" rw="RW" values="CLKCTRL_CSUTHF"/>
                     <bitfield caption="Run Standby" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Clock select" name="CLKCTRL_CLKSEL">
-                <value caption="Internal high-frequency oscillator"
-                       name="OSCHF"
-                       value="0x0"/>
+                <value caption="Internal high-frequency oscillator" name="OSCHF" value="0x0"/>
                 <value caption="Internal 32.768 kHz oscillator" name="OSC32K" value="0x1"/>
                 <value caption="32.768 kHz crystal oscillator" name="XOSC32K" value="0x2"/>
                 <value caption="External clock" name="EXTCLK" value="0x3"/>
@@ -2031,12 +1001,8 @@
                 <value caption="3 x multiplication factor" name="3x" value="0x2"/>
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
-                <value caption="High frequency internal oscillator as PLL source"
-                       name="OSCHF"
-                       value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF"
-                       value="0x1"/>
+                <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -2062,44 +1028,19 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection"
-                          initval="0x00"
-                          name="CCP"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCP signature"
-                              mask="0xFF"
-                              name="CCP"
-                              rw="RW"
-                              values="CPU_CCP"/>
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Stack Pointer"
-                          initval="0x7FFF"
-                          name="SP"
-                          offset="0xD"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Status Register"
-                          initval="0x00"
-                          name="SREG"
-                          offset="0xF"
-                          rw="RW"
-                          size="1">
+                <register caption="Stack Pointer" initval="0x7FFF" name="SP" offset="0xD" rw="RW" size="2"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
                     <bitfield caption="Carry Flag" mask="0x01" name="C" rw="RW"/>
                     <bitfield caption="Zero Flag" mask="0x02" name="Z" rw="RW"/>
                     <bitfield caption="Negative Flag" mask="0x04" name="N" rw="RW"/>
-                    <bitfield caption="Two's Complement Overflow Flag"
-                              mask="0x08"
-                              name="V"
-                              rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V" rw="RW"/>
                     <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
                     <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
                     <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
-                    <bitfield caption="Global Interrupt Enable Flag"
-                              mask="0x80"
-                              name="I"
-                              rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="CCP signature select" name="CPU_CCP">
@@ -2109,530 +1050,157 @@
         </module>
         <module caption="Interrupt Controller" id="int_8bit_v3" name="CPUINT">
             <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Round-robin Scheduling Enable"
-                              mask="0x01"
-                              name="LVL0RR"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x01" name="LVL0RR" rw="RW"/>
                     <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
-                    <bitfield caption="Interrupt Vector Select"
-                              mask="0x40"
-                              name="IVSEL"
-                              rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Level 0 Interrupt Executing"
-                              mask="0x01"
-                              name="LVL0EX"
-                              rw="R"/>
-                    <bitfield caption="Level 1 Interrupt Executing"
-                              mask="0x02"
-                              name="LVL1EX"
-                              rw="R"/>
-                    <bitfield caption="Non-maskable Interrupt Executing"
-                              mask="0x80"
-                              name="NMIEX"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x01" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x02" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority"
-                          initval="0x00"
-                          name="LVL0PRI"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Level Priority"
-                              mask="0xFF"
-                              name="LVL0PRI"
-                              rw="RW"/>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xFF" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector"
-                          initval="0x00"
-                          name="LVL1VEC"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Vector with High Priority"
-                              mask="0xFF"
-                              name="LVL1VEC"
-                              rw="RW"/>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xFF" name="LVL1VEC" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="CRCSCAN" id="math_pdi_crc_v1" name="CRCSCAN">
             <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable CRC scan" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Enable NMI Trigger" mask="0x02" name="NMIEN" rw="RW"/>
                     <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CRC Source"
-                              mask="0x03"
-                              name="SRC"
-                              rw="RW"
-                              values="CRCSCAN_SRC"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x03" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
                 </register>
-                <register caption="Status"
-                          initval="0x02"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="CRC Busy" mask="0x01" name="BUSY" rw="R"/>
                     <bitfield caption="CRC Ok" mask="0x02" name="OK" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="CRC Source select" name="CRCSCAN_SRC">
                 <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
-                <value caption="CRC on boot and appl section of flash"
-                       name="APPLICATION"
-                       value="0x1"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
                 <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
             </value-group>
         </module>
-        <module caption="Digital to Analog Converter"
-                id="dac_nbit_ctrl_v5"
-                name="DAC">
+        <module caption="Digital to Analog Converter" id="dac_nbit_ctrl_v5" name="DAC">
             <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="DAC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="DATA Register"
-                          name="DATA"
-                          offset="0x2"
-                          rw="RW"
-                          size="2">
+                <register caption="DATA Register" name="DATA" offset="0x2" rw="RW" size="2">
                     <bitfield caption="Data" mask="0xFFC0" name="DATA" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Event System" id="avrdd" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Software Event A"
-                          initval="0x00"
-                          name="SWEVENTA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0xFF"
-                              name="SWEVENTA"
-                              rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0xFF" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
-                <register caption="Software Event B"
-                          initval="0x00"
-                          name="SWEVENTB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0x03"
-                              name="SWEVENTB"
-                              rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0x03" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
-                <register caption="Multiplexer Channel 0"
-                          initval="0x00"
-                          name="CHANNEL0"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 0 generator select"
-                              mask="0xFF"
-                              name="CHANNEL0"
-                              rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Channel 0 generator select" mask="0xFF" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
-                <register caption="Multiplexer Channel 1"
-                          initval="0x00"
-                          name="CHANNEL1"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 1 generator select"
-                              mask="0xFF"
-                              name="CHANNEL1"
-                              rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Channel 1 generator select" mask="0xFF" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
-                <register caption="Multiplexer Channel 2"
-                          initval="0x00"
-                          name="CHANNEL2"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 2 generator select"
-                              mask="0xFF"
-                              name="CHANNEL2"
-                              rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Channel 2 generator select" mask="0xFF" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
-                <register caption="Multiplexer Channel 3"
-                          initval="0x00"
-                          name="CHANNEL3"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 3 generator select"
-                              mask="0xFF"
-                              name="CHANNEL3"
-                              rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Channel 3 generator select" mask="0xFF" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
-                <register caption="Multiplexer Channel 4"
-                          initval="0x00"
-                          name="CHANNEL4"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 4 generator select"
-                              mask="0xFF"
-                              name="CHANNEL4"
-                              rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Channel 4 generator select" mask="0xFF" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
-                <register caption="Multiplexer Channel 5"
-                          initval="0x00"
-                          name="CHANNEL5"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 5 generator select"
-                              mask="0xFF"
-                              name="CHANNEL5"
-                              rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Channel 5 generator select" mask="0xFF" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT0A"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT0B"
-                          offset="0x21"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT1A"
-                          offset="0x22"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT1B"
-                          offset="0x23"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT2A"
-                          offset="0x24"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT2B"
-                          offset="0x25"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT3A"
-                          offset="0x26"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT3B"
-                          offset="0x27"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 12 - ADC0"
-                          initval="0x00"
-                          name="USERADC0START"
-                          offset="0x28"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTA"
-                          offset="0x29"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTC"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTD"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTF"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0"
-                          initval="0x00"
-                          name="USERUSART0IRDA"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1"
-                          initval="0x00"
-                          name="USERUSART1IRDA"
-                          offset="0x2E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A"
-                          initval="0x00"
-                          name="USERTCA0CNTA"
-                          offset="0x2F"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B"
-                          initval="0x00"
-                          name="USERTCA0CNTB"
-                          offset="0x30"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A"
-                          initval="0x00"
-                          name="USERTCB0CAPT"
-                          offset="0x31"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B"
-                          initval="0x00"
-                          name="USERTCB0COUNT"
-                          offset="0x32"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A"
-                          initval="0x00"
-                          name="USERTCB1CAPT"
-                          offset="0x33"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B"
-                          initval="0x00"
-                          name="USERTCB1COUNT"
-                          offset="0x34"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A"
-                          initval="0x00"
-                          name="USERTCB2CAPT"
-                          offset="0x35"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B"
-                          initval="0x00"
-                          name="USERTCB2COUNT"
-                          offset="0x36"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A"
-                          initval="0x00"
-                          name="USERTCD0INPUTA"
-                          offset="0x37"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B"
-                          initval="0x00"
-                          name="USERTCD0INPUTB"
-                          offset="0x38"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
             <value-group caption="Channel 0 generator select" name="EVSYS_CHANNEL0">
@@ -2641,30 +1209,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2673,21 +1225,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2705,30 +1247,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2737,21 +1263,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2769,30 +1285,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2806,21 +1306,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2838,30 +1328,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2875,21 +1349,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2907,30 +1371,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2939,21 +1387,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2971,30 +1409,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3003,21 +1425,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3045,149 +1457,48 @@
             </value-group>
             <value-group caption="User channel select" name="EVSYS_USER">
                 <value caption="Off" name="OFF" value="0x0"/>
-                <value caption="Connect user to event channel 0"
-                       name="CHANNEL0"
-                       value="0x1"/>
-                <value caption="Connect user to event channel 1"
-                       name="CHANNEL1"
-                       value="0x2"/>
-                <value caption="Connect user to event channel 2"
-                       name="CHANNEL2"
-                       value="0x3"/>
-                <value caption="Connect user to event channel 3"
-                       name="CHANNEL3"
-                       value="0x4"/>
-                <value caption="Connect user to event channel 4"
-                       name="CHANNEL4"
-                       value="0x5"/>
-                <value caption="Connect user to event channel 5"
-                       name="CHANNEL5"
-                       value="0x6"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
             </value-group>
         </module>
         <module caption="Fuses" id="avrdd" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Watchdog Configuration"
-                          initval="0x00"
-                          name="WDTCFG"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Watchdog Timeout Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="FUSE_WINDOW"/>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
-                <register caption="BOD Configuration"
-                          initval="0x00"
-                          name="BODCFG"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="BOD Operation in Sleep Mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="FUSE_SLEEP"/>
-                    <bitfield caption="BOD Operation in Active Mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="RW"
-                              values="FUSE_ACTIVE"/>
-                    <bitfield caption="BOD Sample Frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Level"
-                              mask="0xE0"
-                              name="LVL"
-                              rw="RW"
-                              values="FUSE_LVL"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x03" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x0C" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Level" mask="0xE0" name="LVL" rw="RW" values="FUSE_LVL"/>
                 </register>
-                <register caption="Oscillator Configuration"
-                          initval="0x00"
-                          name="OSCCFG"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Frequency Select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="FUSE_CLKSEL"/>
+                <register caption="Oscillator Configuration" initval="0x00" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x07" name="CLKSEL" rw="RW" values="FUSE_CLKSEL"/>
                 </register>
-                <register caption="System Configuration 0"
-                          initval="0xD0"
-                          name="SYSCFG0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="System Configuration 0" initval="0xD0" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="EEPROM Save" mask="0x01" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration"
-                              mask="0x08"
-                              name="RSTPINCFG"
-                              rw="RW"
-                              values="FUSE_RSTPINCFG"/>
-                    <bitfield caption="UPDI Pin Configuration"
-                              mask="0x10"
-                              name="UPDIPINCFG"
-                              rw="RW"
-                              values="FUSE_UPDIPINCFG"/>
-                    <bitfield caption="CRC Select"
-                              mask="0x20"
-                              name="CRCSEL"
-                              rw="RW"
-                              values="FUSE_CRCSEL"/>
-                    <bitfield caption="CRC Source"
-                              mask="0xC0"
-                              name="CRCSRC"
-                              rw="RW"
-                              values="FUSE_CRCSRC"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x08" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW" values="FUSE_UPDIPINCFG"/>
+                    <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
+                    <bitfield caption="CRC Source" mask="0xC0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                 </register>
-                <register caption="System Configuration 1"
-                          initval="0x08"
-                          name="SYSCFG1"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Startup Time"
-                              mask="0x07"
-                              name="SUT"
-                              rw="RW"
-                              values="FUSE_SUT"/>
-                    <bitfield caption="MVIO System Configuration"
-                              mask="0x18"
-                              name="MVSYSCFG"
-                              rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x07" name="SUT" rw="RW" values="FUSE_SUT"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                 </register>
-                <register caption="Code Section Size"
-                          initval="0x00"
-                          name="CODESIZE"
-                          offset="0x7"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Boot Section Size"
-                          initval="0x00"
-                          name="BOOTSIZE"
-                          offset="0x8"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
+                <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT"
-                       value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -3213,13 +1524,9 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)"
-                       name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
-                <value caption="CRC of application code and boot sections"
-                       name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -3231,12 +1538,8 @@
                 <value caption="UPDI Mode" name="UPDI" value="0x1"/>
             </value-group>
             <value-group caption="MVIO System Configuration select" name="FUSE_MVSYSCFG">
-                <value caption="Device used in a dual supply configuration"
-                       name="DUAL"
-                       value="0x1"/>
-                <value caption="Device used in a single supply configuration"
-                       name="SINGLE"
-                       value="0x2"/>
+                <value caption="Device used in a dual supply configuration" name="DUAL" value="0x1"/>
+                <value caption="Device used in a single supply configuration" name="SINGLE" value="0x2"/>
             </value-group>
             <value-group caption="Startup Time select" name="FUSE_SUT">
                 <value caption="0 ms" name="0MS" value="0x00"/>
@@ -3279,41 +1582,16 @@
         </module>
         <module caption="General Purpose Registers" id="avrdd" name="GPR">
             <register-group caption="General Purpose Registers" name="GPR" size="0x4">
-                <register caption="General Purpose Register 0"
-                          name="GPR0"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 1"
-                          name="GPR1"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 2"
-                          name="GPR2"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 3"
-                          name="GPR3"
-                          offset="0x3"
-                          rw="RW"
-                          size="1"/>
+                <register caption="General Purpose Register 0" name="GPR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose Register 1" name="GPR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose Register 2" name="GPR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose Register 3" name="GPR3" offset="0x3" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Lockbits" id="avrdd" name="LOCK">
             <register-group caption="Lockbits" name="LOCK" size="0x4">
-                <register caption="Lock Key Bits"
-                          initval="0x5CC5C55C"
-                          name="KEY"
-                          offset="0x0"
-                          rw="RW"
-                          size="4">
-                    <bitfield caption="Lock Key"
-                              mask="0xFFFFFFFF"
-                              name="KEY"
-                              rw="RW"
-                              values="LOCK_KEY"/>
+                <register caption="Lock Key Bits" initval="0x5CC5C55C" name="KEY" offset="0x0" rw="RW" size="4">
+                    <bitfield caption="Lock Key" mask="0xFFFFFFFF" name="KEY" rw="RW" values="LOCK_KEY"/>
                 </register>
             </register-group>
             <value-group caption="Lock Key select" name="LOCK_KEY">
@@ -3323,154 +1601,61 @@
         </module>
         <module caption="Multi-Voltage I/O" id="io_multiv_ctrl_avr_v1" name="MVIO">
             <register-group caption="Multi-Voltage I/O" name="MVIO" size="0x4">
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Enable"
-                              mask="0x01"
-                              name="VDDIO2IE"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Enable" mask="0x01" name="VDDIO2IE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Flag"
-                              mask="0x01"
-                              name="VDDIO2IF"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Flag" mask="0x01" name="VDDIO2IF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="VDDIO2 Status" mask="0x01" name="VDDIO2S" rw="R"/>
                 </register>
             </register-group>
         </module>
-        <module caption="Non-volatile Memory Controller"
-                id="nvm_ctrl_avr_v1"
-                name="NVMCTRL">
+        <module caption="Non-volatile Memory Controller" id="nvm_ctrl_avr_v1" name="NVMCTRL">
             <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x7F"
-                              name="CMD"
-                              rw="RW"
-                              values="NVMCTRL_CMD"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x30"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Application Code Write Protect"
-                              mask="0x01"
-                              name="APPCODEWP"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x30" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Application Code Write Protect" mask="0x01" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x02" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Application Data Write Protect"
-                              mask="0x04"
-                              name="APPDATAWP"
-                              rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space"
-                              mask="0x30"
-                              name="FLMAP"
-                              rw="RW"
-                              values="NVMCTRL_FLMAP"/>
-                    <bitfield caption="Flash Mapping Lock"
-                              mask="0x80"
-                              name="FLMAPLOCK"
-                              rw="RW"/>
+                    <bitfield caption="Application Data Write Protect" mask="0x04" name="APPDATAWP" rw="RW"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x02"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x02" rw="R" size="1">
                     <bitfield caption="Flash busy" mask="0x01" name="FBUSY" rw="R"/>
                     <bitfield caption="EEPROM busy" mask="0x02" name="EEBUSY" rw="R"/>
-                    <bitfield caption="Write error"
-                              mask="0x70"
-                              name="ERROR"
-                              rw="R"
-                              values="NVMCTRL_ERROR"/>
+                    <bitfield caption="Write error" mask="0x70" name="ERROR" rw="R" values="NVMCTRL_ERROR"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
-                <register caption="Address"
-                          name="ADDR"
-                          offset="0x08"
-                          rw="RW"
-                          size="4"/>
+                <register caption="Address" name="ADDR" offset="0x08" rw="RW" size="4"/>
             </register-group>
             <value-group caption="Command select" name="NVMCTRL_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
                 <value caption="No Operation" name="NOOP" value="0x01"/>
                 <value caption="Flash Write" name="FLWR" value="0x02"/>
                 <value caption="Flash Page Erase" name="FLPER" value="0x08"/>
-                <value caption="Flash Multi-Page Erase 2 pages"
-                       name="FLMPER2"
-                       value="0x09"/>
-                <value caption="Flash Multi-Page Erase 4 pages"
-                       name="FLMPER4"
-                       value="0x0A"/>
-                <value caption="Flash Multi-Page Erase 8 pages"
-                       name="FLMPER8"
-                       value="0x0B"/>
-                <value caption="Flash Multi-Page Erase 16 pages"
-                       name="FLMPER16"
-                       value="0x0C"/>
-                <value caption="Flash Multi-Page Erase 32 pages"
-                       name="FLMPER32"
-                       value="0x0D"/>
+                <value caption="Flash Multi-Page Erase 2 pages" name="FLMPER2" value="0x09"/>
+                <value caption="Flash Multi-Page Erase 4 pages" name="FLMPER4" value="0x0A"/>
+                <value caption="Flash Multi-Page Erase 8 pages" name="FLMPER8" value="0x0B"/>
+                <value caption="Flash Multi-Page Erase 16 pages" name="FLMPER16" value="0x0C"/>
+                <value caption="Flash Multi-Page Erase 32 pages" name="FLMPER32" value="0x0D"/>
                 <value caption="EEPROM Write" name="EEWR" value="0x12"/>
                 <value caption="EEPROM Erase and Write" name="EEERWR" value="0x13"/>
                 <value caption="EEPROM Byte Erase" name="EEBER" value="0x18"/>
-                <value caption="EEPROM Multi-Byte Erase 2 bytes"
-                       name="EEMBER2"
-                       value="0x19"/>
-                <value caption="EEPROM Multi-Byte Erase 4 bytes"
-                       name="EEMBER4"
-                       value="0x1A"/>
-                <value caption="EEPROM Multi-Byte Erase 8 bytes"
-                       name="EEMBER8"
-                       value="0x1B"/>
-                <value caption="EEPROM Multi-Byte Erase 16 bytes"
-                       name="EEMBER16"
-                       value="0x1C"/>
-                <value caption="EEPROM Multi-Byte Erase 32 bytes"
-                       name="EEMBER32"
-                       value="0x1D"/>
+                <value caption="EEPROM Multi-Byte Erase 2 bytes" name="EEMBER2" value="0x19"/>
+                <value caption="EEPROM Multi-Byte Erase 4 bytes" name="EEMBER4" value="0x1A"/>
+                <value caption="EEPROM Multi-Byte Erase 8 bytes" name="EEMBER8" value="0x1B"/>
+                <value caption="EEPROM Multi-Byte Erase 16 bytes" name="EEMBER16" value="0x1C"/>
+                <value caption="EEPROM Multi-Byte Erase 32 bytes" name="EEMBER32" value="0x1D"/>
                 <value caption="Chip Erase Command" name="CHER" value="0x20"/>
                 <value caption="EEPROM Erase Command" name="EECHER" value="0x30"/>
             </value-group>
@@ -3483,399 +1668,134 @@
             <value-group caption="Write error select" name="NVMCTRL_ERROR">
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
-                <value caption="Write to section not allowed"
-                       name="ILLEGALSADDR"
-                       value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted"
-                       name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed"
-                       name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_avr_v2_port" name="PORT">
             <register-group caption="I/O Ports" name="PORT" size="0x20">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Set"
-                          name="DIRSET"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Clear"
-                          name="DIRCLR"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Toggle"
-                          name="DIRTGL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Set"
-                          name="OUTSET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Clear"
-                          name="OUTCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Toggle"
-                          name="OUTTGL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
-                <register caption="Port Control"
-                          initval="0x00"
-                          name="PORTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Slew Rate Limit Enable" mask="0x01" name="SRL" rw="RW"/>
                 </register>
-                <register caption="Pin Control Config"
-                          initval="0x00"
-                          name="PINCONFIG"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin Control Config" initval="0x00" name="PINCONFIG" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin Control Update"
-                          initval="0x00"
-                          name="PINCTRLUPD"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control update mask"
-                              mask="0xFF"
-                              name="PINCTRLUPD"
-                              rw="RW"/>
+                <register caption="Pin Control Update" initval="0x00" name="PINCTRLUPD" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Pin control update mask" mask="0xFF" name="PINCTRLUPD" rw="RW"/>
                 </register>
-                <register caption="Pin Control Set"
-                          initval="0x00"
-                          name="PINCTRLSET"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control set mask"
-                              mask="0xFF"
-                              name="PINCTRLSET"
-                              rw="RW"/>
+                <register caption="Pin Control Set" initval="0x00" name="PINCTRLSET" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Pin control set mask" mask="0xFF" name="PINCTRLSET" rw="RW"/>
                 </register>
-                <register caption="Pin Control Clear"
-                          initval="0x00"
-                          name="PINCTRLCLR"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control clear mask"
-                              mask="0xFF"
-                              name="PINCTRLCLR"
-                              rw="RW"/>
+                <register caption="Pin Control Clear" initval="0x00" name="PINCTRLCLR" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Pin control clear mask" mask="0xFF" name="PINCTRLCLR" rw="RW"/>
                 </register>
-                <register caption="Pin 0 Control"
-                          initval="0x00"
-                          name="PIN0CTRL"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 1 Control"
-                          initval="0x00"
-                          name="PIN1CTRL"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 2 Control"
-                          initval="0x00"
-                          name="PIN2CTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 3 Control"
-                          initval="0x00"
-                          name="PIN3CTRL"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 4 Control"
-                          initval="0x00"
-                          name="PIN4CTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 5 Control"
-                          initval="0x00"
-                          name="PIN5CTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 6 Control"
-                          initval="0x00"
-                          name="PIN6CTRL"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 7 Control"
-                          initval="0x00"
-                          name="PIN7CTRL"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
-                <value caption="Interrupt disabled but input buffer enabled"
-                       name="INTDISABLE"
-                       value="0x0"/>
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
                 <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
                 <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
                 <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
-                <value caption="Digital Input Buffer disabled"
-                       name="INPUT_DISABLE"
-                       value="0x4"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
                 <value caption="Sense low Level" name="LEVEL" value="0x5"/>
             </value-group>
         </module>
         <module caption="Port Multiplexer" id="avrdd" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="EVSYS route A"
-                          initval="0x00"
-                          name="EVSYSROUTEA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Output A"
-                              mask="0x01"
-                              name="EVOUTA"
-                              rw="RW"
-                              values="PORTMUX_EVOUTA"/>
-                    <bitfield caption="Event Output C"
-                              mask="0x04"
-                              name="EVOUTC"
-                              rw="RW"
-                              values="PORTMUX_EVOUTC"/>
-                    <bitfield caption="Event Output D"
-                              mask="0x08"
-                              name="EVOUTD"
-                              rw="RW"
-                              values="PORTMUX_EVOUTD"/>
-                    <bitfield caption="Event Output F"
-                              mask="0x20"
-                              name="EVOUTF"
-                              rw="RW"
-                              values="PORTMUX_EVOUTF"/>
+                <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Event Output A" mask="0x01" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output C" mask="0x04" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x08" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
                 </register>
-                <register caption="CCL route A"
-                          initval="0x00"
-                          name="CCLROUTEA"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals"
-                              mask="0x01"
-                              name="LUT0"
-                              rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals"
-                              mask="0x02"
-                              name="LUT1"
-                              rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals"
-                              mask="0x04"
-                              name="LUT2"
-                              rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals"
-                              mask="0x08"
-                              name="LUT3"
-                              rw="RW"
-                              values="PORTMUX_LUT3"/>
+                <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x01" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x02" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x04" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x08" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
-                <register caption="USART route A"
-                          initval="0x00"
-                          name="USARTROUTEA"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="USART0 Signals"
-                              mask="0x07"
-                              name="USART0"
-                              rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="USART1 Signals"
-                              mask="0x18"
-                              name="USART1"
-                              rw="RW"
-                              values="PORTMUX_USART1"/>
+                <register caption="USART route A" initval="0x00" name="USARTROUTEA" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="USART0 Signals" mask="0x07" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="USART1 Signals" mask="0x18" name="USART1" rw="RW" values="PORTMUX_USART1"/>
                 </register>
-                <register caption="SPI route A"
-                          initval="0x00"
-                          name="SPIROUTEA"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI0 Signals"
-                              mask="0x07"
-                              name="SPI0"
-                              rw="RW"
-                              values="PORTMUX_SPI0"/>
+                <register caption="SPI route A" initval="0x00" name="SPIROUTEA" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="SPI0 Signals" mask="0x07" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                 </register>
-                <register caption="TWI route A"
-                          initval="0x00"
-                          name="TWIROUTEA"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TWI0 Signals"
-                              mask="0x03"
-                              name="TWI0"
-                              rw="RW"
-                              values="PORTMUX_TWI0"/>
+                <register caption="TWI route A" initval="0x00" name="TWIROUTEA" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="TWI0 Signals" mask="0x03" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="TCA route A"
-                          initval="0x00"
-                          name="TCAROUTEA"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCA0 Signals"
-                              mask="0x07"
-                              name="TCA0"
-                              rw="RW"
-                              values="PORTMUX_TCA0"/>
+                <register caption="TCA route A" initval="0x00" name="TCAROUTEA" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="TCA0 Signals" mask="0x07" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
                 </register>
-                <register caption="TCB route A"
-                          initval="0x00"
-                          name="TCBROUTEA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCB0 Output"
-                              mask="0x01"
-                              name="TCB0"
-                              rw="RW"
-                              values="PORTMUX_TCB0"/>
-                    <bitfield caption="TCB1 Output"
-                              mask="0x02"
-                              name="TCB1"
-                              rw="RW"
-                              values="PORTMUX_TCB1"/>
+                <register caption="TCB route A" initval="0x00" name="TCBROUTEA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="TCB0 Output" mask="0x01" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="TCB1 Output" mask="0x02" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
                 </register>
-                <register caption="TCD route A"
-                          initval="0x00"
-                          name="TCDROUTEA"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCD0 Signals"
-                              mask="0x07"
-                              name="TCD0"
-                              rw="RW"
-                              values="PORTMUX_TCD0"/>
+                <register caption="TCD route A" initval="0x00" name="TCDROUTEA" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="TCD0 Signals" mask="0x07" name="TCD0" rw="RW" values="PORTMUX_TCD0"/>
                 </register>
             </register-group>
             <value-group caption="CCL Look-Up Table 0 Signals select" name="PORTMUX_LUT0">
@@ -3964,199 +1884,69 @@
         </module>
         <module caption="Reset controller" id="rst_integration_v8" name="RSTCTRL">
             <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
-                <register caption="Reset Flags"
-                          initval="0x00"
-                          name="RSTFR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Power on Reset flag" mask="0x01" name="PORF" rw="RW"/>
-                    <bitfield caption="Brown out detector Reset flag"
-                              mask="0x02"
-                              name="BORF"
-                              rw="RW"/>
+                    <bitfield caption="Brown out detector Reset flag" mask="0x02" name="BORF" rw="RW"/>
                     <bitfield caption="External Reset flag" mask="0x04" name="EXTRF" rw="RW"/>
                     <bitfield caption="Watch dog Reset flag" mask="0x08" name="WDRF" rw="RW"/>
                     <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
                     <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
                 </register>
-                <register caption="Software Reset"
-                          initval="0x00"
-                          name="SWRR"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software reset enable"
-                              mask="0x01"
-                              name="SWRST"
-                              rw="RW"/>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x01" name="SWRST" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Real-Time Counter" id="tmr_16b_rtc_v1" name="RTC">
             <register-group caption="Real-Time Counter" name="RTC" size="0x20">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="RTCEN" rw="RW"/>
                     <bitfield caption="Correction enable" mask="0x04" name="CORREN" rw="RW"/>
-                    <bitfield caption="Prescaling Factor"
-                              mask="0x78"
-                              name="PRESCALER"
-                              rw="RW"
-                              values="RTC_PRESCALER"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
                     <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x01"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLABUSY"
-                              rw="R"/>
-                    <bitfield caption="Count Synchronization Busy Flag"
-                              mask="0x02"
-                              name="CNTBUSY"
-                              rw="R"/>
-                    <bitfield caption="Period Synchronization Busy Flag"
-                              mask="0x04"
-                              name="PERBUSY"
-                              rw="R"/>
-                    <bitfield caption="Comparator Synchronization Busy Flag"
-                              mask="0x08"
-                              name="CMPBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x02" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x04" name="PERBUSY" rw="R"/>
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x08" name="CMPBUSY" rw="R"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt enable"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt Flag"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Temporary"
-                          name="TEMP"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Debug control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Calibration"
-                          initval="0x00"
-                          name="CALIB"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Error Correction Value"
-                              mask="0x7F"
-                              name="ERROR"
-                              rw="RW"/>
-                    <bitfield caption="Error Correction Sign Bit"
-                              mask="0x80"
-                              name="SIGN"
-                              rw="RW"/>
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7F" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
                 </register>
-                <register caption="Clock Select"
-                          initval="0x00"
-                          name="CLKSEL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Select"
-                              mask="0x03"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="RTC_CLKSEL"/>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x03" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
                 </register>
                 <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
-                <register caption="Period"
-                          initval="0xFFFF"
-                          name="PER"
-                          offset="0x0A"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
                 <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
-                <register caption="PIT Control A"
-                          initval="0x00"
-                          name="PITCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="PITEN" rw="RW"/>
-                    <bitfield caption="Period"
-                              mask="0x78"
-                              name="PERIOD"
-                              rw="RW"
-                              values="RTC_PERIOD"/>
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
                 </register>
-                <register caption="PIT Status"
-                          initval="0x00"
-                          name="PITSTATUS"
-                          offset="0x11"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLBUSY"
-                              rw="R"/>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLBUSY" rw="R"/>
                 </register>
-                <register caption="PIT Interrupt Control"
-                          initval="0x00"
-                          name="PITINTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags"
-                          initval="0x00"
-                          name="PITINTFLAGS"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Debug control"
-                          initval="0x00"
-                          name="PITDBGCTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
             </register-group>
@@ -4204,156 +1994,42 @@
         </module>
         <module caption="Signature row" id="avrdd" name="SIGROW">
             <register-group caption="Signature row" name="SIGROW" size="0x40">
-                <register caption="Device ID Byte 0"
-                          name="DEVICEID0"
-                          offset="0x00"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 1"
-                          name="DEVICEID1"
-                          offset="0x01"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 2"
-                          name="DEVICEID2"
-                          offset="0x02"
-                          rw="R"
-                          size="1"/>
-                <register caption="Temperature Calibration 0"
-                          name="TEMPSENSE0"
-                          offset="0x04"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 0"
-                              mask="0xFFFF"
-                              name="TEMPSENSE0"
-                              rw="R"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Temperature Calibration 0" name="TEMPSENSE0" offset="0x04" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 0" mask="0xFFFF" name="TEMPSENSE0" rw="R"/>
                 </register>
-                <register caption="Temperature Calibration 1"
-                          name="TEMPSENSE1"
-                          offset="0x06"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 1"
-                              mask="0xFFFF"
-                              name="TEMPSENSE1"
-                              rw="R"/>
+                <register caption="Temperature Calibration 1" name="TEMPSENSE1" offset="0x06" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 1" mask="0xFFFF" name="TEMPSENSE1" rw="R"/>
                 </register>
-                <register caption="LOTNUM0"
-                          name="SERNUM0"
-                          offset="0x10"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM1"
-                          name="SERNUM1"
-                          offset="0x11"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM2"
-                          name="SERNUM2"
-                          offset="0x12"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM3"
-                          name="SERNUM3"
-                          offset="0x13"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM4"
-                          name="SERNUM4"
-                          offset="0x14"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM5"
-                          name="SERNUM5"
-                          offset="0x15"
-                          rw="R"
-                          size="1"/>
-                <register caption="RANDOM"
-                          name="SERNUM6"
-                          offset="0x16"
-                          rw="R"
-                          size="1"/>
-                <register caption="SCRIBE"
-                          name="SERNUM7"
-                          offset="0x17"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS0"
-                          name="SERNUM8"
-                          offset="0x18"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS1"
-                          name="SERNUM9"
-                          offset="0x19"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS0"
-                          name="SERNUM10"
-                          offset="0x1A"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS1"
-                          name="SERNUM11"
-                          offset="0x1B"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES0"
-                          name="SERNUM12"
-                          offset="0x1C"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES1"
-                          name="SERNUM13"
-                          offset="0x1D"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES2"
-                          name="SERNUM14"
-                          offset="0x1E"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES3"
-                          name="SERNUM15"
-                          offset="0x1F"
-                          rw="R"
-                          size="1"/>
+                <register caption="LOTNUM0" name="SERNUM0" offset="0x10" rw="R" size="1"/>
+                <register caption="LOTNUM1" name="SERNUM1" offset="0x11" rw="R" size="1"/>
+                <register caption="LOTNUM2" name="SERNUM2" offset="0x12" rw="R" size="1"/>
+                <register caption="LOTNUM3" name="SERNUM3" offset="0x13" rw="R" size="1"/>
+                <register caption="LOTNUM4" name="SERNUM4" offset="0x14" rw="R" size="1"/>
+                <register caption="LOTNUM5" name="SERNUM5" offset="0x15" rw="R" size="1"/>
+                <register caption="RANDOM" name="SERNUM6" offset="0x16" rw="R" size="1"/>
+                <register caption="SCRIBE" name="SERNUM7" offset="0x17" rw="R" size="1"/>
+                <register caption="XPOS0" name="SERNUM8" offset="0x18" rw="R" size="1"/>
+                <register caption="XPOS1" name="SERNUM9" offset="0x19" rw="R" size="1"/>
+                <register caption="YPOS0" name="SERNUM10" offset="0x1A" rw="R" size="1"/>
+                <register caption="YPOS1" name="SERNUM11" offset="0x1B" rw="R" size="1"/>
+                <register caption="RES0" name="SERNUM12" offset="0x1C" rw="R" size="1"/>
+                <register caption="RES1" name="SERNUM13" offset="0x1D" rw="R" size="1"/>
+                <register caption="RES2" name="SERNUM14" offset="0x1E" rw="R" size="1"/>
+                <register caption="RES3" name="SERNUM15" offset="0x1F" rw="R" size="1"/>
             </register-group>
         </module>
-        <module caption="Sleep Controller"
-                id="clk_sleep_ctrl_avr_v2"
-                name="SLPCTRL">
+        <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
             <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Sleep enable" mask="0x01" name="SEN" rw="RW"/>
-                    <bitfield caption="Sleep mode"
-                              mask="0x06"
-                              name="SMODE"
-                              rw="RW"
-                              values="SLPCTRL_SMODE"/>
+                    <bitfield caption="Sleep mode" mask="0x06" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="VREGCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Performance Mode"
-                              mask="0x07"
-                              name="PMODE"
-                              rw="RW"
-                              values="SLPCTRL_PMODE"/>
-                    <bitfield caption="High Temperature Low Leakage Enable"
-                              mask="0x10"
-                              name="HTLLEN"
-                              rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Performance Mode" mask="0x07" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                 </register>
             </register-group>
             <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
@@ -4361,8 +2037,7 @@
                 <value caption="Standby Mode" name="STDBY" value="0x01"/>
                 <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
             </value-group>
-            <value-group caption="High Temperature Low Leakage Enable select"
-                         name="SLPCTRL_HTLLEN">
+            <value-group caption="High Temperature Low Leakage Enable select" name="SLPCTRL_HTLLEN">
                 <value caption="Disabled" name="OFF" value="0x0"/>
                 <value caption="Enabled" name="ON" value="0x1"/>
             </value-group>
@@ -4373,110 +2048,36 @@
         </module>
         <module caption="Serial Peripheral Interface" id="spi_8bit_v2" name="SPI">
             <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable Module" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Prescaler"
-                              mask="0x06"
-                              name="PRESC"
-                              rw="RW"
-                              values="SPI_PRESC"/>
+                    <bitfield caption="Prescaler" mask="0x06" name="PRESC" rw="RW" values="SPI_PRESC"/>
                     <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
-                    <bitfield caption="Host Operation Enable"
-                              mask="0x20"
-                              name="MASTER"
-                              rw="RW"/>
+                    <bitfield caption="Host Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
                     <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI Mode"
-                              mask="0x03"
-                              name="MODE"
-                              rw="RW"
-                              values="SPI_MODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="SPI Mode" mask="0x03" name="MODE" rw="RW" values="SPI_MODE"/>
                     <bitfield caption="SPI Select Disable" mask="0x04" name="SSD" rw="RW"/>
-                    <bitfield caption="Buffer Mode Wait for Receive"
-                              mask="0x40"
-                              name="BUFWR"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Mode Wait for Receive" mask="0x40" name="BUFWR" rw="RW"/>
                     <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Enable" mask="0x01" name="IE" rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Enable"
-                              mask="0x10"
-                              name="SSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <mode name="DEFAULT" qualifier="SPI.CTRLB.BUFEN" value="0"/>
                     <mode name="BUFFERED" qualifier="SPI.CTRLB.BUFEN" value="1"/>
-                    <bitfield caption="Buffer Overflow"
-                              mask="0x01"
-                              modes="BUFFERED"
-                              name="BUFOVF"
-                              rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Flag"
-                              mask="0x10"
-                              modes="BUFFERED"
-                              name="SSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Flag"
-                              mask="0x20"
-                              modes="BUFFERED"
-                              name="DREIF"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Flag"
-                              mask="0x40"
-                              modes="BUFFERED"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              modes="BUFFERED"
-                              name="RXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Write Collision"
-                              mask="0x40"
-                              modes="DEFAULT"
-                              name="WRCOL"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt Flag"
-                              mask="0x80"
-                              modes="DEFAULT"
-                              name="IF"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Overflow" mask="0x01" modes="BUFFERED" name="BUFOVF" rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Flag" mask="0x10" modes="BUFFERED" name="SSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" modes="BUFFERED" name="DREIF" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" modes="BUFFERED" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" modes="BUFFERED" name="RXCIF" rw="RW"/>
+                    <bitfield caption="Write Collision" mask="0x40" modes="DEFAULT" name="WRCOL" rw="RW"/>
+                    <bitfield caption="Interrupt Flag" mask="0x80" modes="DEFAULT" name="IF" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
             </register-group>
@@ -4495,543 +2096,149 @@
         </module>
         <module caption="System Configuration Registers" id="avrdd" name="SYSCFG">
             <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
-                <register caption="Revision ID"
-                          name="REVID"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Control"
-                          name="OCDMCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Status"
-                          initval="0x00"
-                          name="OCDMSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+                <register caption="OCD Message Control" name="OCDMCTRL" offset="0x04" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMSTATUS" offset="0x05" rw="RW" size="1">
                     <bitfield caption="OCD Message Valid" mask="0x01" name="VALID" rw="RW"/>
                 </register>
             </register-group>
         </module>
-        <module caption="16-bit Timer/Counter Type A"
-                id="tmr_16b_pwm_v1"
-                name="TCA">
+        <module caption="16-bit Timer/Counter Type A" id="tmr_16b_pwm_v1" name="TCA">
             <register-group caption="16-bit Timer/Counter Type A" name="TCA" size="0x40">
-                <mode caption="Single Mode"
-                      name="SINGLE"
-                      qualifier="TCA.SINGLE.CTRLD.SPLITM"
-                      value="0"/>
-                <mode caption="Split Mode"
-                      name="SPLIT"
-                      qualifier="TCA.SPLIT.CTRLD.SPLITM"
-                      value="1"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <mode caption="Single Mode" name="SINGLE" qualifier="TCA.SINGLE.CTRLD.SPLITM" value="0"/>
+                <mode caption="Split Mode" name="SPLIT" qualifier="TCA.SPLIT.CTRLD.SPLITM" value="1"/>
+                <register caption="Control A" initval="0x00" modes="SINGLE" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x07"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                <register caption="Control B" initval="0x00" modes="SINGLE" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                     <bitfield caption="Auto Lock Update" mask="0x08" name="ALUPD" rw="RW"/>
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare 0 Waveform Output Value"
-                              mask="0x01"
-                              name="CMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Waveform Output Value"
-                              mask="0x02"
-                              name="CMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Waveform Output Value"
-                              mask="0x04"
-                              name="CMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SINGLE" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x01" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x02" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x04" name="CMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SINGLE" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Control E Clear" initval="0x00" modes="SINGLE" name="CTRLECLR" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Direction"
-                              mask="0x01"
-                              name="DIR"
-                              rw="RW"
-                              values="TCA_SINGLE_DIR"/>
+                <register caption="Control E Set" initval="0x00" modes="SINGLE" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control F Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Clear" initval="0x00" modes="SINGLE" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Control F Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFSET"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Set" initval="0x00" modes="SINGLE" name="CTRLFSET" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="EVCTRL"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Count on Event Input A"
-                              mask="0x01"
-                              name="CNTAEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action A"
-                              mask="0x0E"
-                              name="EVACTA"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTA"/>
-                    <bitfield caption="Count on Event Input B"
-                              mask="0x10"
-                              name="CNTBEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action B"
-                              mask="0xE0"
-                              name="EVACTB"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTB"/>
+                <register caption="Event Control" initval="0x00" modes="SINGLE" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input A" mask="0x01" name="CNTAEI" rw="RW"/>
+                    <bitfield caption="Event Action A" mask="0x0E" name="EVACTA" rw="RW" values="TCA_SINGLE_EVACTA"/>
+                    <bitfield caption="Count on Event Input B" mask="0x10" name="CNTBEI" rw="RW"/>
+                    <bitfield caption="Event Action B" mask="0xE0" name="EVACTB" rw="RW" values="TCA_SINGLE_EVACTB"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" modes="SINGLE" name="INTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" modes="SINGLE" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SINGLE" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary data for 16-bit Access"
-                          modes="SINGLE"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          modes="SINGLE"
-                          name="CNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period"
-                          modes="SINGLE"
-                          name="PER"
-                          offset="0x26"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0"
-                          modes="SINGLE"
-                          name="CMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1"
-                          modes="SINGLE"
-                          name="CMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2"
-                          modes="SINGLE"
-                          name="CMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period Buffer"
-                          modes="SINGLE"
-                          name="PERBUF"
-                          offset="0x36"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0 Buffer"
-                          modes="SINGLE"
-                          name="CMP0BUF"
-                          offset="0x38"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1 Buffer"
-                          modes="SINGLE"
-                          name="CMP1BUF"
-                          offset="0x3A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2 Buffer"
-                          modes="SINGLE"
-                          name="CMP2BUF"
-                          offset="0x3C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary data for 16-bit Access" modes="SINGLE" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Count" modes="SINGLE" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Period" modes="SINGLE" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Compare 0" modes="SINGLE" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 1" modes="SINGLE" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 2" modes="SINGLE" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Period Buffer" modes="SINGLE" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" modes="SINGLE" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" modes="SINGLE" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" modes="SINGLE" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" modes="SPLIT" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Enable"
-                              mask="0x01"
-                              name="LCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Enable"
-                              mask="0x02"
-                              name="LCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Enable"
-                              mask="0x04"
-                              name="LCMP2EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Enable"
-                              mask="0x10"
-                              name="HCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Enable"
-                              mask="0x20"
-                              name="HCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Enable"
-                              mask="0x40"
-                              name="HCMP2EN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" modes="SPLIT" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Enable" mask="0x01" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x02" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x04" name="LCMP2EN" rw="RW"/>
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Output Value"
-                              mask="0x01"
-                              name="LCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Output Value"
-                              mask="0x02"
-                              name="LCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Output Value"
-                              mask="0x04"
-                              name="LCMP2OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Output Value"
-                              mask="0x10"
-                              name="HCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Output Value"
-                              mask="0x20"
-                              name="HCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Output Value"
-                              mask="0x40"
-                              name="HCMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SPLIT" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x01" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x02" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x04" name="LCMP2OV" rw="RW"/>
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SPLIT" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Clear" initval="0x00" modes="SPLIT" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Set" initval="0x00" modes="SPLIT" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Enable"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Enable"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Enable"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Enable"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Enable"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" modes="SPLIT" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Flag"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Flag"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Flag"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Flag"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Flag"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" modes="SPLIT" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SPLIT" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Low Count"
-                          modes="SPLIT"
-                          name="LCNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Count"
-                          modes="SPLIT"
-                          name="HCNT"
-                          offset="0x21"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Period"
-                          modes="SPLIT"
-                          name="LPER"
-                          offset="0x26"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Period"
-                          modes="SPLIT"
-                          name="HPER"
-                          offset="0x27"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP0"
-                          offset="0x29"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP1"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP2"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Low Count" modes="SPLIT" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="High Count" modes="SPLIT" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="Low Period" modes="SPLIT" name="LPER" offset="0x26" rw="RW" size="1"/>
+                <register caption="High Period" modes="SPLIT" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
             </register-group>
             <value-group caption="Clock Selection" name="TCA_SINGLE_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5048,12 +2255,8 @@
                 <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
                 <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
                 <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
-                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM"
-                       name="DSBOTH"
-                       value="0x06"/>
-                <value caption="Dual Slope PWM, overflow on BOTTOM"
-                       name="DSBOTTOM"
-                       value="0x07"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
             </value-group>
             <value-group caption="Command select" name="TCA_SINGLE_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
@@ -5066,31 +2269,17 @@
                 <value caption="Count down" name="DOWN" value="0x1"/>
             </value-group>
             <value-group caption="Event Action A select" name="TCA_SINGLE_EVACTA">
-                <value caption="Count on positive edge event"
-                       name="CNT_POSEDGE"
-                       value="0x00"/>
+                <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
-                <value caption="Count on prescaled clock while event line is 1."
-                       name="CNT_HIGHLVL"
-                       value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
+                <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
-                <value caption="Restart counter at positive edge event"
-                       name="RESTART_POSEDGE"
-                       value="0x04"/>
-                <value caption="Restart counter on any edge event"
-                       name="RESTART_ANYEDGE"
-                       value="0x05"/>
-                <value caption="Restart counter while event line is 1."
-                       name="RESTART_HIGHLVL"
-                       value="0x06"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+                <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
+                <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
+                <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
             </value-group>
             <value-group caption="Clock Selection" name="TCA_SPLIT_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5110,107 +2299,46 @@
             </value-group>
             <value-group caption="Command Enable select" name="TCA_SPLIT_CMDEN">
                 <value caption="None" name="NONE" value="0x0"/>
-                <value caption="Both low byte and high byte counter"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Both low byte and high byte counter" name="BOTH" value="0x3"/>
             </value-group>
         </module>
         <module caption="16-bit Timer Type B" id="tmr_16b_capture_v1" name="TCB">
             <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Select"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCB_CLKSEL"/>
+                    <bitfield caption="Clock Select" mask="0x0E" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
                     <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
                     <bitfield caption="Cascade two timers" mask="0x20" name="CASCADE" rw="RW"/>
                     <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control Register B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Timer Mode"
-                              mask="0x07"
-                              name="CNTMODE"
-                              rw="RW"
-                              values="TCB_CNTMODE"/>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Timer Mode" mask="0x07" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
                     <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
                     <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
                     <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Event Input Enable" mask="0x01" name="CAPTEI" rw="RW"/>
                     <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
-                    <bitfield caption="Input Capture Noise Cancellation Filter"
-                              mask="0x40"
-                              name="FILTER"
-                              rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
                     <bitfield caption="Run" mask="0x01" name="RUN" rw="R"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Value"
-                          name="TEMP"
-                          offset="0x9"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          initval="0x0000"
-                          name="CNT"
-                          offset="0xA"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare or Capture"
-                          name="CCMP"
-                          offset="0xC"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock Select" name="TCB_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5222,247 +2350,78 @@
                 <value caption="Periodic Interrupt" name="INT" value="0x00"/>
                 <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
                 <value caption="Input Capture Event" name="CAPT" value="0x02"/>
-                <value caption="Input Capture Frequency measurement"
-                       name="FRQ"
-                       value="0x03"/>
-                <value caption="Input Capture Pulse-Width measurement"
-                       name="PW"
-                       value="0x04"/>
-                <value caption="Input Capture Frequency and Pulse-Width measurement"
-                       name="FRQPW"
-                       value="0x05"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
                 <value caption="Single Shot" name="SINGLE" value="0x06"/>
                 <value caption="8-bit PWM" name="PWM8" value="0x07"/>
             </value-group>
         </module>
         <module caption="Timer Counter D" id="tmr_12b_psc_v1" name="TCD">
             <register-group caption="Timer Counter D" name="TCD" size="0x40">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler"
-                              mask="0x06"
-                              name="SYNCPRES"
-                              rw="RW"
-                              values="TCD_SYNCPRES"/>
-                    <bitfield caption="Counter prescaler"
-                              mask="0x18"
-                              name="CNTPRES"
-                              rw="RW"
-                              values="TCD_CNTPRES"/>
-                    <bitfield caption="Clock select"
-                              mask="0x60"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCD_CLKSEL"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x06" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+                    <bitfield caption="Counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+                    <bitfield caption="Clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x03"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCD_WGMODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x03" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare output value override"
-                              mask="0x01"
-                              name="CMPOVR"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare output value override" mask="0x01" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Auto update" mask="0x02" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Fifty percent waveform"
-                              mask="0x08"
-                              name="FIFTY"
-                              rw="RW"/>
-                    <bitfield caption="Compare C output select"
-                              mask="0x40"
-                              name="CMPCSEL"
-                              rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select"
-                              mask="0x80"
-                              name="CMPDSEL"
-                              rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Fifty percent waveform" mask="0x08" name="FIFTY" rw="RW"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x0F" name="CMPAVAL" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0xF0" name="CMPBVAL" rw="RW"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronize end of cycle strobe"
-                              mask="0x01"
-                              name="SYNCEOC"
-                              rw="RW"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Synchronize end of cycle strobe" mask="0x01" name="SYNCEOC" rw="RW"/>
                     <bitfield caption="synchronize strobe" mask="0x02" name="SYNC" rw="RW"/>
                     <bitfield caption="Restart strobe" mask="0x04" name="RESTART" rw="RW"/>
-                    <bitfield caption="Software Capture A Strobe"
-                              mask="0x08"
-                              name="SCAPTUREA"
-                              rw="RW"/>
-                    <bitfield caption="Software Capture B Strobe"
-                              mask="0x10"
-                              name="SCAPTUREB"
-                              rw="RW"/>
-                    <bitfield caption="Disable at end of cycle"
-                              mask="0x80"
-                              name="DISEOC"
-                              rw="RW"/>
+                    <bitfield caption="Software Capture A Strobe" mask="0x08" name="SCAPTUREA" rw="RW"/>
+                    <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+                    <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
                 </register>
-                <register caption="EVCTRLA"
-                          initval="0x00"
-                          name="EVCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="EVCTRLB"
-                          initval="0x00"
-                          name="EVCTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Enable ready" mask="0x01" name="ENRDY" rw="R"/>
                     <bitfield caption="Command ready" mask="0x02" name="CMDRDY" rw="R"/>
                     <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
                     <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
                 </register>
-                <register caption="Input Control A"
-                          initval="0x00"
-                          name="INPUTCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Input Control B"
-                          initval="0x00"
-                          name="INPUTCTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Fault Control"
-                          initval="0x00"
-                          name="FAULTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x01" name="CMPA" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0x02" name="CMPB" rw="RW"/>
                     <bitfield caption="Compare C value" mask="0x04" name="CMPC" rw="RW"/>
@@ -5472,100 +2431,33 @@
                     <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
                     <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
                 </register>
-                <register caption="Delay Control"
-                          initval="0x00"
-                          name="DLYCTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Delay select"
-                              mask="0x03"
-                              name="DLYSEL"
-                              rw="RW"
-                              values="TCD_DLYSEL"/>
-                    <bitfield caption="Delay trigger"
-                              mask="0x0C"
-                              name="DLYTRIG"
-                              rw="RW"
-                              values="TCD_DLYTRIG"/>
-                    <bitfield caption="Delay prescaler"
-                              mask="0x30"
-                              name="DLYPRESC"
-                              rw="RW"
-                              values="TCD_DLYPRESC"/>
+                <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Delay select" mask="0x03" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+                    <bitfield caption="Delay trigger" mask="0x0C" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+                    <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
                 </register>
-                <register caption="Delay value"
-                          initval="0x00"
-                          name="DLYVAL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Delay value" mask="0xFF" name="DLYVAL" rw="RW"/>
                 </register>
-                <register caption="Dither Control A"
-                          initval="0x00"
-                          name="DITCTRL"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Dither select"
-                              mask="0x03"
-                              name="DITHERSEL"
-                              rw="RW"
-                              values="TCD_DITHERSEL"/>
+                <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Dither select" mask="0x03" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
                 </register>
-                <register caption="Dither value"
-                          initval="0x00"
-                          name="DITVAL"
-                          offset="0x19"
-                          rw="RW"
-                          size="1">
+                <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
                     <bitfield caption="Dither value" mask="0x0F" name="DITHER" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                     <bitfield caption="Fault detection" mask="0x04" name="FAULTDET" rw="RW"/>
                 </register>
-                <register caption="Capture A"
-                          name="CAPTUREA"
-                          offset="0x22"
-                          rw="R"
-                          size="2"/>
-                <register caption="Capture B"
-                          name="CAPTUREB"
-                          offset="0x24"
-                          rw="R"
-                          size="2"/>
-                <register caption="Compare A Set"
-                          name="CMPASET"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare A Clear"
-                          name="CMPACLR"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Set"
-                          name="CMPBSET"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Clear"
-                          name="CMPBCLR"
-                          offset="0x2E"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+                <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+                <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock select" name="TCD_CLKSEL">
-                <value caption="Internal High-Frequency oscillator"
-                       name="OSCHF"
-                       value="0x00"/>
+                <value caption="Internal High-Frequency oscillator" name="OSCHF" value="0x00"/>
                 <value caption="PLL" name="PLL" value="0x01"/>
                 <value caption="External Clock" name="EXTCLK" value="0x02"/>
                 <value caption="Peripheral clock" name="CLKPER" value="0x03"/>
@@ -5576,18 +2468,10 @@
                 <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
             </value-group>
             <value-group caption="Synchronization prescaler select" name="TCD_SYNCPRES">
-                <value caption="Selected clock source divided by 1"
-                       name="DIV1"
-                       value="0x00"/>
-                <value caption="Selected clock source divided by 2"
-                       name="DIV2"
-                       value="0x01"/>
-                <value caption="Selected clock source divided by 4"
-                       name="DIV4"
-                       value="0x02"/>
-                <value caption="Selected clock source divided by 8"
-                       name="DIV8"
-                       value="0x03"/>
+                <value caption="Selected clock source divided by 1" name="DIV1" value="0x00"/>
+                <value caption="Selected clock source divided by 2" name="DIV2" value="0x01"/>
+                <value caption="Selected clock source divided by 4" name="DIV4" value="0x02"/>
+                <value caption="Selected clock source divided by 8" name="DIV8" value="0x03"/>
             </value-group>
             <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
                 <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
@@ -5628,176 +2512,63 @@
             </value-group>
             <value-group caption="Event action select" name="TCD_ACTION">
                 <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
-                <value caption="Event trigger a fault and capture"
-                       name="CAPTURE"
-                       value="0x1"/>
+                <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
             </value-group>
             <value-group caption="Event config select" name="TCD_CFG">
-                <value caption="Neither Filter nor Asynchronous Event is enabled"
-                       name="NEITHER"
-                       value="0x0"/>
-                <value caption="Input Capture Noise Cancellation Filter enabled"
-                       name="FILTER"
-                       value="0x1"/>
-                <value caption="Asynchronous Event output qualification enabled"
-                       name="ASYNC"
-                       value="0x2"/>
+                <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+                <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+                <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="Edge select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW"
-                       value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH"
-                       value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
-                <value caption="Stop output, jump to opposite compare cycle and wait"
-                       name="JMPWAIT"
-                       value="0x01"/>
-                <value caption="Stop output, execute opposite compare cycle and wait"
-                       name="EXECWAIT"
-                       value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active"
-                       name="EXECFAULT"
-                       value="0x03"/>
-                <value caption="Stop all outputs, maintain frequency"
-                       name="FREQ"
-                       value="0x04"/>
-                <value caption="Stop all outputs, execute dead time while fault active"
-                       name="EXECDT"
-                       value="0x05"/>
-                <value caption="Stop all outputs, jump to next compare cycle and wait"
-                       name="WAIT"
-                       value="0x06"/>
-                <value caption="Stop all outputs, wait for software action"
-                       name="WAITSW"
-                       value="0x07"/>
-                <value caption="Stop output on edge, jump to next compare cycle"
-                       name="EDGETRIG"
-                       value="0x08"/>
-                <value caption="Stop output on edge, maintain frequency"
-                       name="EDGETRIGFREQ"
-                       value="0x09"/>
-                <value caption="Stop output at level, maintain frequency"
-                       name="LVLTRIGFREQ"
-                       value="0x0A"/>
+                <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
+                <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
+                <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
+                <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
+                <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
+                <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x07"/>
+                <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x08"/>
+                <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x09"/>
+                <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0x0A"/>
             </value-group>
         </module>
         <module caption="Two-Wire Interface" id="i2c_8bit_avr_v3" name="TWI">
             <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="SDA Setup Time"
-                              mask="0x10"
-                              name="SDASETUP"
-                              rw="RW"
-                              values="TWI_SDASETUP"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Dual Mode Control"
-                          initval="0x00"
-                          name="DUALCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
+                <register caption="Dual Mode Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Debug Run"
-                              mask="0x01"
-                              name="DBGRUN"
-                              rw="RW"
-                              values="TWI_DBGRUN"/>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW" values="TWI_DBGRUN"/>
                 </register>
-                <register caption="Host Control A"
-                          initval="0x00"
-                          name="MCTRLA"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Inactive Bus Time-Out"
-                              mask="0x0C"
-                              name="TIMEOUT"
-                              rw="RW"
-                              values="TWI_TIMEOUT"/>
+                    <bitfield caption="Inactive Bus Time-Out" mask="0x0C" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
                     <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
-                    <bitfield caption="Write Interrupt Enable"
-                              mask="0x40"
-                              name="WIEN"
-                              rw="RW"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
                     <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
                 </register>
-                <register caption="Host Control B"
-                          initval="0x00"
-                          name="MCTRLB"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="MCMD"
-                              rw="RW"
-                              values="TWI_MCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Host Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                     <bitfield caption="Flush" mask="0x08" name="FLUSH" rw="RW"/>
                 </register>
-                <register caption="Host STATUS"
-                          initval="0x00"
-                          name="MSTATUS"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bus State"
-                              mask="0x03"
-                              name="BUSSTATE"
-                              rw="RW"
-                              values="TWI_BUSSTATE"/>
+                <register caption="Host STATUS" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
@@ -5805,147 +2576,69 @@
                     <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
                     <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
                 </register>
-                <register caption="Host Baud Rate"
-                          initval="0x00"
-                          name="MBAUD"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Baud Rate" initval="0x00" name="MBAUD" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Baud Rate" mask="0xFF" name="BAUD" rw="RW"/>
                 </register>
-                <register caption="Host Address"
-                          initval="0x00"
-                          name="MADDR"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Address" initval="0x00" name="MADDR" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Host Data"
-                          initval="0x00"
-                          name="MDATA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Data" initval="0x00" name="MDATA" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Control A"
-                          initval="0x00"
-                          name="SCTRLA"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Address Recognition Mode"
-                              mask="0x04"
-                              name="PMEN"
-                              rw="RW"/>
+                    <bitfield caption="Address Recognition Mode" mask="0x04" name="PMEN" rw="RW"/>
                     <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Enable"
-                              mask="0x40"
-                              name="APIEN"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
                     <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
                 </register>
-                <register caption="Client Control B"
-                          initval="0x00"
-                          name="SCTRLB"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="SCMD"
-                              rw="RW"
-                              values="TWI_SCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Client Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                 </register>
-                <register caption="Client Status"
-                          initval="0x00"
-                          name="SSTATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Address or Stop"
-                              mask="0x01"
-                              name="AP"
-                              rw="RW"
-                              values="TWI_AP"/>
+                <register caption="Client Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Address or Stop" mask="0x01" name="AP" rw="RW" values="TWI_AP"/>
                     <bitfield caption="Read/Write Direction" mask="0x02" name="DIR" rw="RW"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Collision" mask="0x08" name="COLL" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
                     <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Flag"
-                              mask="0x40"
-                              name="APIF"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
                     <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
                 </register>
-                <register caption="Client Address"
-                          initval="0x00"
-                          name="SADDR"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address" initval="0x00" name="SADDR" offset="0xC" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Client Data"
-                          initval="0x00"
-                          name="SDATA"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Data" initval="0x00" name="SDATA" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Address Mask"
-                          initval="0x00"
-                          name="SADDRMASK"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address Mask" initval="0x00" name="SADDRMASK" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Address Mask Enable" mask="0x01" name="ADDREN" rw="RW"/>
                     <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Fast-mode Plus Enable select" name="TWI_FMPEN">
-                <value caption="Operating in Standard-mode or Fast-mode"
-                       name="OFF"
-                       value="0x0"/>
+                <value caption="Operating in Standard-mode or Fast-mode" name="OFF" value="0x0"/>
                 <value caption="Operating in Fast-mode Plus" name="ON" value="0x1"/>
             </value-group>
             <value-group caption="Input voltage transition level select" name="TWI_INPUTLVL">
                 <value caption="I2C input voltage transition level" name="I2C" value="0x0"/>
-                <value caption="SMBus 3.0 input voltage transition level"
-                       name="SMBUS"
-                       value="0x1"/>
+                <value caption="SMBus 3.0 input voltage transition level" name="SMBUS" value="0x1"/>
             </value-group>
             <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
                 <value caption="No SDA Hold Delay" name="OFF" value="0x0"/>
                 <value caption="Short SDA hold time" name="50NS" value="0x1"/>
-                <value caption="Meets SMBUS 2.0 specification under typical conditions"
-                       name="300NS"
-                       value="0x2"/>
-                <value caption="Meets SMBUS 2.0 specificaiton across all corners"
-                       name="500NS"
-                       value="0x3"/>
+                <value caption="Meets SMBUS 2.0 specification under typical conditions" name="300NS" value="0x2"/>
+                <value caption="Meets SMBUS 2.0 specificaiton across all corners" name="500NS" value="0x3"/>
             </value-group>
             <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
                 <value caption="SDA setup time is four clock cycles" name="4CYC" value="0"/>
                 <value caption="SDA setup time is eight clock cycle" name="8CYC" value="1"/>
             </value-group>
             <value-group caption="Debug Run select" name="TWI_DBGRUN">
-                <value caption="The peripheral is halted in Break Debug mode and ignores events"
-                       name="HALT"
-                       value="0"/>
-                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted"
-                       name="RUN"
-                       value="1"/>
+                <value caption="The peripheral is halted in Break Debug mode and ignores events" name="HALT" value="0"/>
+                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted" name="RUN" value="1"/>
             </value-group>
             <value-group caption="Inactive Bus Time-Out select" name="TWI_TIMEOUT">
                 <value caption="Bus time-out disabled. I2C." name="DISABLED" value="0"/>
@@ -5959,15 +2652,9 @@
             </value-group>
             <value-group caption="Command select" name="TWI_MCMD">
                 <value caption="No action" name="NOACT" value="0"/>
-                <value caption="Execute Acknowledge Action followed by repeated Start."
-                       name="REPSTART"
-                       value="1"/>
-                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR."
-                       name="RECVTRANS"
-                       value="2"/>
-                <value caption="Execute Acknowledge Action followed by issuing a Stop condition."
-                       name="STOP"
-                       value="3"/>
+                <value caption="Execute Acknowledge Action followed by repeated Start." name="REPSTART" value="1"/>
+                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR." name="RECVTRANS" value="2"/>
+                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP" value="3"/>
             </value-group>
             <value-group caption="Bus State select" name="TWI_BUSSTATE">
                 <value caption="Unknown bus state" name="UNKNOWN" value="0"/>
@@ -5978,254 +2665,81 @@
             <value-group caption="Command select" name="TWI_SCMD">
                 <value caption="No Action" name="NOACT" value="0"/>
                 <value caption="Complete transaction" name="COMPTRANS" value="2"/>
-                <value caption="Used in response to an interrupt"
-                       name="RESPONSE"
-                       value="3"/>
+                <value caption="Used in response to an interrupt" name="RESPONSE" value="3"/>
             </value-group>
             <value-group caption="Address or Stop select" name="TWI_AP">
-                <value caption="A Stop condition generated the interrupt on APIF flag"
-                       name="STOP"
-                       value="0"/>
-                <value caption="Address detection generated the interrupt on APIF flag"
-                       name="ADR"
-                       value="1"/>
+                <value caption="A Stop condition generated the interrupt on APIF flag" name="STOP" value="0"/>
+                <value caption="Address detection generated the interrupt on APIF flag" name="ADR" value="1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                            name="USART"
-                            size="0x10">
-                <register caption="Receive Data Low Byte"
-                          initval="0x00"
-                          name="RXDATAL"
-                          offset="0x0"
-                          rw="R"
-                          size="1">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xFF" name="DATA" rw="R"/>
                 </register>
-                <register caption="Receive Data High Byte"
-                          initval="0x00"
-                          name="RXDATAH"
-                          offset="0x1"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="Receiver Data Register"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="R"/>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Receiver Data Register" mask="0x01" name="DATA8" rw="R"/>
                     <bitfield caption="Parity Error" mask="0x02" name="PERR" rw="R"/>
                     <bitfield caption="Frame Error" mask="0x04" name="FERR" rw="R"/>
                     <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Transmit Data Low Byte"
-                          initval="0x00"
-                          name="TXDATAL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register"
-                              mask="0xFF"
-                              name="DATA"
-                              rw="RW"/>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Transmit Data High Byte"
-                          initval="0x00"
-                          name="TXDATAH"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="RW"/>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x01" name="DATA8" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Wait For Break" mask="0x01" name="WFB" rw="RW"/>
                     <bitfield caption="Break Detected Flag" mask="0x02" name="BDF" rw="RW"/>
-                    <bitfield caption="Inconsistent Sync Field Interrupt Flag"
-                              mask="0x08"
-                              name="ISFIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Start Interrupt"
-                              mask="0x10"
-                              name="RXSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Flag"
-                              mask="0x20"
-                              name="DREIF"
-                              rw="R"/>
-                    <bitfield caption="Transmit Interrupt Flag"
-                              mask="0x40"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x08" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="RS485 Mode internal transmitter"
-                              mask="0x01"
-                              name="RS485"
-                              rw="RW"
-                              values="USART_RS485"/>
-                    <bitfield caption="Auto-baud Error Interrupt Enable"
-                              mask="0x04"
-                              name="ABEIE"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x01" name="RS485" rw="RW" values="USART_RS485"/>
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x04" name="ABEIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x08" name="LBME" rw="RW"/>
-                    <bitfield caption="Receiver Start Frame Interrupt Enable"
-                              mask="0x10"
-                              name="RXSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transmit Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multi-processor Communication Mode"
-                              mask="0x01"
-                              name="MPCM"
-                              rw="RW"/>
-                    <bitfield caption="Receiver Mode"
-                              mask="0x06"
-                              name="RXMODE"
-                              rw="RW"
-                              values="USART_RXMODE"/>
-                    <bitfield caption="Open Drain Mode Enable"
-                              mask="0x08"
-                              name="ODME"
-                              rw="RW"/>
-                    <bitfield caption="Start Frame Detection Enable"
-                              mask="0x10"
-                              name="SFDEN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x06" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x08" name="ODME" rw="RW"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
                     <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
                     <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x03"
-                          name="CTRLC"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="USART.CTRLC.CMODE" value="0x00 0x01 0x02"/>
                     <mode name="MSPI" qualifier="USART.CTRLC.CMODE" value="0x03"/>
-                    <bitfield caption="Communication Mode"
-                              mask="0xC0"
-                              name="CMODE"
-                              rw="RW"
-                              values="USART_CMODE"/>
-                    <bitfield caption="SPI Host Mode, Clock Phase"
-                              mask="0x02"
-                              modes="MSPI"
-                              name="UCPHA"
-                              rw="RW"/>
-                    <bitfield caption="SPI Host Mode, Data Order"
-                              mask="0x04"
-                              modes="MSPI"
-                              name="UDORD"
-                              rw="RW"/>
-                    <bitfield caption="Character Size"
-                              mask="0x07"
-                              modes="NORMAL"
-                              name="CHSIZE"
-                              rw="RW"
-                              values="USART_NORMAL_CHSIZE"/>
-                    <bitfield caption="Stop Bit Mode"
-                              mask="0x08"
-                              modes="NORMAL"
-                              name="SBMODE"
-                              rw="RW"
-                              values="USART_NORMAL_SBMODE"/>
-                    <bitfield caption="Parity Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="PMODE"
-                              rw="RW"
-                              values="USART_NORMAL_PMODE"/>
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" rw="RW" values="USART_CMODE"/>
+                    <bitfield caption="SPI Host Mode, Clock Phase" mask="0x02" modes="MSPI" name="UCPHA" rw="RW"/>
+                    <bitfield caption="SPI Host Mode, Data Order" mask="0x04" modes="MSPI" name="UDORD" rw="RW"/>
+                    <bitfield caption="Character Size" mask="0x07" modes="NORMAL" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" modes="NORMAL" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" modes="NORMAL" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
                 </register>
-                <register caption="Baud Rate"
-                          initval="0x0000"
-                          name="BAUD"
-                          offset="0x8"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Auto Baud Window"
-                              mask="0xC0"
-                              name="ABW"
-                              rw="RW"
-                              values="USART_ABW"/>
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xC0" name="ABW" rw="RW" values="USART_ABW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="IrDA Event Input Enable"
-                              mask="0x01"
-                              name="IREI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x01" name="IREI" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control"
-                          initval="0x00"
-                          name="TXPLCTRL"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xFF" name="TXPL" rw="RW"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control"
-                          initval="0x00"
-                          name="RXPLCTRL"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7F" name="RXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -6250,12 +2764,8 @@
                 <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
                 <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
                 <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
-                <value caption="Character size: 9 bit read low byte first"
-                       name="9BITL"
-                       value="0x06"/>
-                <value caption="Character size: 9 bit read high byte first"
-                       name="9BITH"
-                       value="0x07"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
             </value-group>
             <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
                 <value caption="No Parity" name="DISABLED" value="0x00"/>
@@ -6275,234 +2785,62 @@
         </module>
         <module caption="User Row" id="avrdd" name="USERROW">
             <register-group caption="User Row" name="USERROW" size="0x20">
-                <register caption="User Row Byte 0"
-                          name="USERROW0"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 1"
-                          name="USERROW1"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 2"
-                          name="USERROW2"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 3"
-                          name="USERROW3"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 4"
-                          name="USERROW4"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 5"
-                          name="USERROW5"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 6"
-                          name="USERROW6"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 7"
-                          name="USERROW7"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 8"
-                          name="USERROW8"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 9"
-                          name="USERROW9"
-                          offset="0x09"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 10"
-                          name="USERROW10"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 11"
-                          name="USERROW11"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 12"
-                          name="USERROW12"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 13"
-                          name="USERROW13"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 14"
-                          name="USERROW14"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 15"
-                          name="USERROW15"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 16"
-                          name="USERROW16"
-                          offset="0x10"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 17"
-                          name="USERROW17"
-                          offset="0x11"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 18"
-                          name="USERROW18"
-                          offset="0x12"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 19"
-                          name="USERROW19"
-                          offset="0x13"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 20"
-                          name="USERROW20"
-                          offset="0x14"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 21"
-                          name="USERROW21"
-                          offset="0x15"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 22"
-                          name="USERROW22"
-                          offset="0x16"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 23"
-                          name="USERROW23"
-                          offset="0x17"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 24"
-                          name="USERROW24"
-                          offset="0x18"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 25"
-                          name="USERROW25"
-                          offset="0x19"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 26"
-                          name="USERROW26"
-                          offset="0x1A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 27"
-                          name="USERROW27"
-                          offset="0x1B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 28"
-                          name="USERROW28"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 29"
-                          name="USERROW29"
-                          offset="0x1D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 30"
-                          name="USERROW30"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 31"
-                          name="USERROW31"
-                          offset="0x1F"
-                          rw="RW"
-                          size="1"/>
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Virtual Ports" id="gpio_ports_avr_v2_vport" name="VPORT">
             <register-group caption="Virtual Ports" name="VPORT" size="0x4">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Voltage reference" id="avrdd" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
-                <register caption="ADC0 Reference"
-                          initval="0x00"
-                          name="ADC0REF"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="ADC0 Reference" initval="0x00" name="ADC0REF" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="DAC0 Reference"
-                          initval="0x00"
-                          name="DAC0REF"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="DAC0 Reference" initval="0x00" name="DAC0REF" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="AC Reference"
-                          initval="0x00"
-                          name="ACREF"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="AC Reference" initval="0x00" name="ACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
             </register-group>
@@ -6517,33 +2855,12 @@
         </module>
         <module caption="Watch-Dog Timer" id="wdt_windowed_v2" name="WDT">
             <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="WDT_PERIOD"/>
-                    <bitfield caption="Window"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="WDT_WINDOW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x0F" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xF0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Syncronization busy"
-                              mask="0x01"
-                              name="SYNCBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY" rw="R"/>
                     <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
                 </register>
             </register-group>
@@ -6578,60 +2895,25 @@
         </module>
         <module caption="Zero Cross Detect" id="cmp_zxover_ctrl_v3" name="ZCD">
             <register-group caption="Zero Cross Detect" name="ZCD" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Invert signal from pin"
-                              mask="0x08"
-                              name="INVERT"
-                              rw="RW"/>
+                    <bitfield caption="Invert signal from pin" mask="0x08" name="INVERT" rw="RW"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x03"
-                              name="INTMODE"
-                              rw="RW"
-                              values="ZCD_INTMODE"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x03" name="INTMODE" rw="RW" values="ZCD_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="ZCD Interrupt Flag" mask="0x01" name="CROSSIF" rw="RW"/>
-                    <bitfield caption="ZCD State"
-                              mask="0x10"
-                              name="STATE"
-                              rw="R"
-                              values="ZCD_STATE"/>
+                    <bitfield caption="ZCD State" mask="0x10" name="STATE" rw="R" values="ZCD_STATE"/>
                 </register>
             </register-group>
             <value-group caption="Interrupt Mode select" name="ZCD_INTMODE">
                 <value caption="No interrupt" name="NONE" value="0x0"/>
-                <value caption="Interrupt on rising input signal"
-                       name="RISING"
-                       value="0x1"/>
-                <value caption="Interrupt on falling input signal"
-                       name="FALLING"
-                       value="0x2"/>
-                <value caption="Interrupt on both rising and falling input signal"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Interrupt on rising input signal" name="RISING" value="0x1"/>
+                <value caption="Interrupt on falling input signal" name="FALLING" value="0x2"/>
+                <value caption="Interrupt on both rising and falling input signal" name="BOTH" value="0x3"/>
             </value-group>
             <value-group caption="ZCD State select" name="ZCD_STATE">
                 <value caption="Output is 0" name="LOW" value="0x0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD20.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD20.xml
index cad612af..8b7c60ce 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD20.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD20.xml
@@ -1,124 +1,41 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR16DD20"
-                 package="QFN20"
-                 pinout="QFN20MVIO"
-                 speedmax="32000000"
-                 tempmax="125"
-                 tempmin="-40"
-                 vccmax="5.5"
-                 vccmin="1.8"/>
+        <variant ordercode="AVR16DD20" package="QFN20" pinout="QFN20MVIO" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR16DD20" family="AVR8" architecture="AVR8X" avr-family="AVR DD">
         <address-spaces>
-            <address-space endianness="little"
-                           id="data"
-                           name="data"
-                           size="0x10000"
-                           start="0x0000">
-                <memory-segment exec="0"
-                                name="IO"
-                                rw="RW"
-                                size="0x103F"
-                                start="0x00"
-                                type="io"/>
-                <memory-segment exec="0"
-                                name="LOCKBITS"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x04"
-                                start="0x1040"
-                                type="lockbits"/>
-                <memory-segment exec="0"
-                                name="FUSES"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x10"
-                                start="0x1050"
-                                type="fuses"/>
-                <memory-segment exec="0"
-                                name="USER_SIGNATURES"
-                                pagesize="0x20"
-                                rw="RW"
-                                size="0x20"
-                                start="0x1080"
-                                type="user_signatures"/>
-                <memory-segment exec="0"
-                                name="SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x03"
-                                start="0x1100"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="PROD_SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x7D"
-                                start="0x1103"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="EEPROM"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x100"
-                                start="0x1400"
-                                type="eeprom"/>
-                <memory-segment exec="0"
-                                name="INTERNAL_SRAM"
-                                rw="RW"
-                                size="0x800"
-                                start="0x7800"
-                                type="ram"/>
-                <memory-segment exec="0"
-                                name="MAPPED_PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x4000"
-                                start="0x8000"
-                                type="other"/>
+            <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+                <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00" type="io"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x04" start="0x1040" type="lockbits"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x1050" type="fuses"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x1080" type="user_signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x03" start="0x1100" type="signatures"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x1103" type="signatures"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x100" start="0x1400" type="eeprom"/>
+                <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x800" start="0x7800" type="ram"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x4000" start="0x8000" type="other"/>
             </address-space>
-            <address-space endianness="little"
-                           id="prog"
-                           name="prog"
-                           size="0x4000"
-                           start="0x0000">
-                <memory-segment exec="1"
-                                name="PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x4000"
-                                start="0x00"
-                                type="flash"/>
+            <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x4000" start="0x00" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
             <module id="cmp_control_v8" name="AC">
                 <instance name="AC0">
-                    <register-group address-space="data"
-                                    name="AC0"
-                                    name-in-module="AC"
-                                    offset="0x0680"/>
+                    <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
                     <signals>
                         <signal function="AC0" group="N" index="2" pad="PD7"/>
                         <signal function="AC0" group="N" index="3" pad="PC2"/>
                         <signal function="AC0" group="P" index="3" pad="PD6"/>
                         <signal function="AC0" group="P" index="4" pad="PC3"/>
-                        <signal field="PORTMUX.ACROUTEA.AC0"
-                                function="AC0"
-                                group="OUT"
-                                index="0"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ACROUTEA.AC0" function="AC0" group="OUT" index="0" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
             <module id="adc_12b_diff_ctrl_v1" name="ADC">
                 <instance name="ADC0">
-                    <register-group address-space="data"
-                                    name="ADC0"
-                                    name-in-module="ADC"
-                                    offset="0x0600"/>
+                    <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
                     <signals>
                         <signal function="AIN0" group="AIN" index="4" pad="PD4"/>
                         <signal function="AIN0" group="AIN" index="5" pad="PD5"/>
@@ -138,98 +55,33 @@
             </module>
             <module id="bor_lvd_ctrl_v1" name="BOD">
                 <instance name="BOD">
-                    <register-group address-space="data"
-                                    name="BOD"
-                                    name-in-module="BOD"
-                                    offset="0x00A0"/>
+                    <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x00A0"/>
                 </instance>
             </module>
             <module id="cla_ccl_v1" name="CCL">
                 <instance name="CCL">
-                    <register-group address-space="data"
-                                    name="CCL"
-                                    name-in-module="CCL"
-                                    offset="0x01C0"/>
+                    <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
                     <signals>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_OUT"
-                                index="0"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_OUT"
-                                index="0"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_OUT"
-                                index="0"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_OUT"
-                                index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_OUT" index="0" pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0" pad="PD6"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="CLKCTRL">
                 <instance name="CLKCTRL">
-                    <register-group address-space="data"
-                                    name="CLKCTRL"
-                                    name-in-module="CLKCTRL"
-                                    offset="0x0060"/>
+                    <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
                     <signals>
                         <signal function="CLKCTRL" group="CLKOUT" pad="PA7"/>
                         <signal function="CLKCTRL" group="EXTCLK" pad="PA0"/>
@@ -242,10 +94,7 @@
             </module>
             <module id="cpu_avr_xt_v1" name="CPU">
                 <instance name="CPU">
-                    <register-group address-space="data"
-                                    name="CPU"
-                                    name-in-module="CPU"
-                                    offset="0x0030"/>
+                    <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V4S"/>
                     </parameters>
@@ -253,26 +102,17 @@
             </module>
             <module id="int_8bit_v3" name="CPUINT">
                 <instance name="CPUINT">
-                    <register-group address-space="data"
-                                    name="CPUINT"
-                                    name-in-module="CPUINT"
-                                    offset="0x0110"/>
+                    <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
                 </instance>
             </module>
             <module id="math_pdi_crc_v1" name="CRCSCAN">
                 <instance name="CRCSCAN">
-                    <register-group address-space="data"
-                                    name="CRCSCAN"
-                                    name-in-module="CRCSCAN"
-                                    offset="0x0120"/>
+                    <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
                 </instance>
             </module>
             <module id="dac_nbit_ctrl_v5" name="DAC">
                 <instance name="DAC0">
-                    <register-group address-space="data"
-                                    name="DAC0"
-                                    name-in-module="DAC"
-                                    offset="0x06A0"/>
+                    <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
                     <signals>
                         <signal function="DAC0" group="OUT" index="0" pad="PD6"/>
                     </signals>
@@ -280,85 +120,44 @@
             </module>
             <module id="avrdd" name="EVSYS">
                 <instance name="EVSYS">
-                    <register-group address-space="data"
-                                    name="EVSYS"
-                                    name-in-module="EVSYS"
-                                    offset="0x0200"/>
+                    <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="5"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT1" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="FUSE">
                 <instance name="FUSE">
-                    <register-group address-space="data"
-                                    name="FUSE"
-                                    name-in-module="FUSE"
-                                    offset="0x1050"/>
+                    <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1050"/>
                 </instance>
             </module>
             <module id="avrdd" name="GPR">
                 <instance name="GPR">
-                    <register-group address-space="data"
-                                    name="GPR"
-                                    name-in-module="GPR"
-                                    offset="0x001C"/>
+                    <register-group address-space="data" name="GPR" name-in-module="GPR" offset="0x001C"/>
                 </instance>
             </module>
             <module id="avrdd" name="LOCK">
                 <instance name="LOCK">
-                    <register-group address-space="data"
-                                    name="LOCK"
-                                    name-in-module="LOCK"
-                                    offset="0x1040"/>
+                    <register-group address-space="data" name="LOCK" name-in-module="LOCK" offset="0x1040"/>
                 </instance>
             </module>
             <module id="io_multiv_ctrl_avr_v1" name="MVIO">
                 <instance name="MVIO">
-                    <register-group address-space="data"
-                                    name="MVIO"
-                                    name-in-module="MVIO"
-                                    offset="0x00C0"/>
+                    <register-group address-space="data" name="MVIO" name-in-module="MVIO" offset="0x00C0"/>
                 </instance>
             </module>
             <module id="nvm_ctrl_avr_v1" name="NVMCTRL">
                 <instance name="NVMCTRL">
-                    <register-group address-space="data"
-                                    name="NVMCTRL"
-                                    name-in-module="NVMCTRL"
-                                    offset="0x1000"/>
+                    <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_port" name="PORT">
                 <instance name="PORTA">
-                    <register-group address-space="data"
-                                    name="PORTA"
-                                    name-in-module="PORT"
-                                    offset="0x0400"/>
+                    <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
@@ -371,10 +170,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC">
-                    <register-group address-space="data"
-                                    name="PORTC"
-                                    name-in-module="PORT"
-                                    offset="0x0440"/>
+                    <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
                         <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
@@ -382,10 +178,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD">
-                    <register-group address-space="data"
-                                    name="PORTD"
-                                    name-in-module="PORT"
-                                    offset="0x0460"/>
+                    <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
                         <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
@@ -394,10 +187,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF">
-                    <register-group address-space="data"
-                                    name="PORTF"
-                                    name-in-module="PORT"
-                                    offset="0x04A0"/>
+                    <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="6" pad="PF6"/>
                         <signal function="IOPORT" group="PIN" index="7" pad="PF7"/>
@@ -406,18 +196,12 @@
             </module>
             <module id="avrdd" name="PORTMUX">
                 <instance name="PORTMUX">
-                    <register-group address-space="data"
-                                    name="PORTMUX"
-                                    name-in-module="PORTMUX"
-                                    offset="0x05E0"/>
+                    <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
                 </instance>
             </module>
             <module id="rst_integration_v8" name="RSTCTRL">
                 <instance name="RSTCTRL">
-                    <register-group address-space="data"
-                                    name="RSTCTRL"
-                                    name-in-module="RSTCTRL"
-                                    offset="0x0040"/>
+                    <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
                     <signals>
                         <signal function="OTHER" group="RESET" pad="PF6"/>
                     </signals>
@@ -425,494 +209,187 @@
             </module>
             <module id="tmr_16b_rtc_v1" name="RTC">
                 <instance name="RTC">
-                    <register-group address-space="data"
-                                    name="RTC"
-                                    name-in-module="RTC"
-                                    offset="0x0140"/>
+                    <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
                 </instance>
             </module>
             <module id="avrdd" name="SIGROW">
                 <instance name="SIGROW">
-                    <register-group address-space="data"
-                                    name="SIGROW"
-                                    name-in-module="SIGROW"
-                                    offset="0x1100"/>
+                    <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
                 </instance>
             </module>
             <module id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
                 <instance name="SLPCTRL">
-                    <register-group address-space="data"
-                                    name="SLPCTRL"
-                                    name-in-module="SLPCTRL"
-                                    offset="0x0050"/>
+                    <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
                 </instance>
             </module>
             <module id="spi_8bit_v2" name="SPI">
                 <instance name="SPI0">
-                    <register-group address-space="data"
-                                    name="SPI0"
-                                    name-in-module="SPI"
-                                    offset="0x0940"/>
+                    <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0940"/>
                     <signals>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="MISO"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="MOSI"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="SCK"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="SS"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MISO"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MOSI"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="SS"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MISO"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MOSI"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SS"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="MISO"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SS"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MISO"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MOSI"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SCK"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SS"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="MISO" pad="PA5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="MOSI" pad="PA4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="SCK" pad="PA6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="SS" pad="PA7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MISO" pad="PA1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MOSI" pad="PA0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="SS" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MISO" pad="PD5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MOSI" pad="PD4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SCK" pad="PD6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SS" pad="PD7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="MISO" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SCK" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SS" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MISO" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MOSI" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SCK" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SS" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="SYSCFG">
                 <instance name="SYSCFG">
-                    <register-group address-space="data"
-                                    name="SYSCFG"
-                                    name-in-module="SYSCFG"
-                                    offset="0x0F00"/>
+                    <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
                 </instance>
             </module>
             <module id="tmr_16b_pwm_v1" name="TCA">
                 <instance name="TCA0">
-                    <register-group address-space="data"
-                                    name="TCA0"
-                                    name-in-module="TCA"
-                                    offset="0x0A00"/>
+                    <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
                     <signals>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="3"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="4"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="5"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="3"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="4"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="5"
-                                pad="PD5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="3" pad="PA3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="4" pad="PA4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="5" pad="PA5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="3" pad="PC3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="4" pad="PD4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="5" pad="PD5"/>
                     </signals>
                 </instance>
             </module>
             <module id="tmr_16b_capture_v1" name="TCB">
                 <instance name="TCB0">
-                    <register-group address-space="data"
-                                    name="TCB0"
-                                    name-in-module="TCB"
-                                    offset="0x0B00"/>
+                    <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0B00"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB0"
-                                function="TCB0"
-                                group="WO"
-                                index="0"
-                                pad="PA2"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA2"/>
                     </signals>
                 </instance>
                 <instance name="TCB1">
-                    <register-group address-space="data"
-                                    name="TCB1"
-                                    name-in-module="TCB"
-                                    offset="0x0B10"/>
+                    <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0B10"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB1"
-                                function="TCB1"
-                                group="WO"
-                                index="0"
-                                pad="PA3"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
                     </signals>
                 </instance>
                 <instance name="TCB2">
-                    <register-group address-space="data"
-                                    name="TCB2"
-                                    name-in-module="TCB"
-                                    offset="0x0B20"/>
+                    <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0B20"/>
                 </instance>
             </module>
             <module id="tmr_12b_psc_v1" name="TCD">
                 <instance name="TCD0">
-                    <register-group address-space="data"
-                                    name="TCD0"
-                                    name-in-module="TCD"
-                                    offset="0x0B80"/>
+                    <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0B80"/>
                     <signals>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOA"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOB"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOC"
-                                index="2"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOD"
-                                index="3"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOA"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOB"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOC"
-                                index="2"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOD"
-                                index="3"
-                                pad="PD5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOA" pad="PA4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOB" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2" pad="PD4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3" pad="PD5"/>
                     </signals>
                 </instance>
             </module>
             <module id="i2c_8bit_avr_v3" name="TWI">
                 <instance name="TWI0">
-                    <register-group address-space="data"
-                                    name="TWI0"
-                                    name-in-module="TWI"
-                                    offset="0x0900"/>
+                    <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0900"/>
                     <signals>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT1"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT1"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SCL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SDA"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SDA_DUAL" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT1" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT1" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SCL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SDA" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL" pad="PA1"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA" pad="PA0"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA_DUAL" pad="PC2"/>
                     </signals>
                 </instance>
             </module>
             <module id="uart_autobd_v4" name="USART">
                 <instance name="USART0">
-                    <register-group address-space="data"
-                                    name="USART0"
-                                    name-in-module="USART"
-                                    offset="0x0800"/>
+                    <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="RXD"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="TXD"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="XCK"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="XDIR"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="RXD"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="TXD"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="XCK"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="XDIR"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT2"
-                                group="RXD"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT2"
-                                group="TXD"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="RXD"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="TXD"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XDIR"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="RXD"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="TXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="XCK"
-                                pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="RXD" pad="PA5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="TXD" pad="PA4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="XCK" pad="PA6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="XDIR" pad="PA7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT2" group="RXD" pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT2" group="TXD" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="RXD" pad="PD5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="TXD" pad="PD4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XCK" pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XDIR" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="RXD" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="TXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="XCK" pad="PC3"/>
                     </signals>
                 </instance>
                 <instance name="USART1">
-                    <register-group address-space="data"
-                                    name="USART1"
-                                    name-in-module="USART"
-                                    offset="0x0820"/>
+                    <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="RXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XDIR"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="RXD"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="TXD"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="RXD" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="TXD" pad="PD6"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="USERROW">
                 <instance name="USERROW">
-                    <register-group address-space="data"
-                                    name="USERROW"
-                                    name-in-module="USERROW"
-                                    offset="0x1080"/>
+                    <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1080"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_vport" name="VPORT">
                 <instance name="VPORTA">
-                    <register-group address-space="data"
-                                    name="VPORTA"
-                                    name-in-module="VPORT"
-                                    offset="0x0000"/>
+                    <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
                 </instance>
                 <instance name="VPORTC">
-                    <register-group address-space="data"
-                                    name="VPORTC"
-                                    name-in-module="VPORT"
-                                    offset="0x0008"/>
+                    <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
                 </instance>
                 <instance name="VPORTD">
-                    <register-group address-space="data"
-                                    name="VPORTD"
-                                    name-in-module="VPORT"
-                                    offset="0x000C"/>
+                    <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
                 </instance>
                 <instance name="VPORTF">
-                    <register-group address-space="data"
-                                    name="VPORTF"
-                                    name-in-module="VPORT"
-                                    offset="0x0014"/>
+                    <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
                 </instance>
             </module>
             <module id="avrdd" name="VREF">
                 <instance name="VREF">
-                    <register-group address-space="data"
-                                    name="VREF"
-                                    name-in-module="VREF"
-                                    offset="0x00B0"/>
+                    <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00B0"/>
                 </instance>
             </module>
             <module id="wdt_windowed_v2" name="WDT">
                 <instance name="WDT">
-                    <register-group address-space="data"
-                                    name="WDT"
-                                    name-in-module="WDT"
-                                    offset="0x0100"/>
+                    <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
                 </instance>
             </module>
             <module id="cmp_zxover_ctrl_v3" name="ZCD">
                 <instance name="ZCD3">
-                    <register-group address-space="data"
-                                    name="ZCD3"
-                                    name-in-module="ZCD"
-                                    offset="0x06D8"/>
+                    <register-group address-space="data" name="ZCD3" name-in-module="ZCD" offset="0x06D8"/>
                     <signals>
-                        <signal field="PORTMUX.ZCDROUTEA.ZCD3"
-                                function="ZCD3"
-                                group="IN"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.ZCDROUTEA.ZCD3"
-                                function="ZCD3"
-                                group="OUT"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ZCDROUTEA.ZCD3" function="ZCD3" group="IN" pad="PC2"/>
+                        <signal field="PORTMUX.ZCDROUTEA.ZCD3" function="ZCD3" group="OUT" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
@@ -984,90 +461,31 @@
     <modules>
         <module caption="Analog Comparator" id="cmp_control_v8" name="AC">
             <register-group caption="Analog Comparator" name="AC" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Hysteresis Mode"
-                              mask="0x06"
-                              name="HYSMODE"
-                              rw="RW"
-                              values="AC_HYSMODE"/>
-                    <bitfield caption="Power profile"
-                              mask="0x18"
-                              name="POWER"
-                              rw="RW"
-                              values="AC_POWER"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Power profile" mask="0x18" name="POWER" rw="RW" values="AC_POWER"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Mux Control A"
-                          initval="0x00"
-                          name="MUXCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input MUX Selection"
-                              mask="0x07"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection"
-                              mask="0x38"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="AC_MUXPOS"/>
-                    <bitfield caption="AC Output Initial Value"
-                              mask="0x40"
-                              name="INITVAL"
-                              rw="RW"
-                              values="AC_INITVAL"/>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Negative Input MUX Selection" mask="0x07" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+                    <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
                 </register>
-                <register caption="DAC Voltage Reference"
-                          initval="0xFF"
-                          name="DACREF"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="DAC Voltage Reference" initval="0xFF" name="DACREF" offset="0x5" rw="RW" size="1">
                     <bitfield caption="DACREF" mask="0xFF" name="DACREF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="WINSEL" value="0x00"/>
                     <mode name="WINDOW" qualifier="WINSEL" value="0x01 0x02"/>
                     <bitfield caption="Interrupt Enable" mask="0x01" name="CMP" rw="RW"/>
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="INTMODE"
-                              rw="RW"
-                              values="AC_NORMAL_INTMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" modes="NORMAL" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Comparator Interrupt Flag"
-                              mask="0x01"
-                              name="CMPIF"
-                              rw="RW"/>
-                    <bitfield caption="Analog Comparator State"
-                              mask="0x10"
-                              name="CMPSTATE"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x01" name="CMPIF" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -1077,23 +495,15 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption"
-                       name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
                 <value caption="Power profile 3" name="PROFILE3" value="0x3"/>
             </value-group>
             <value-group caption="Interrupt Mode select" name="AC_NORMAL_INTMODE">
-                <value caption="Positive and negative inputs crosses"
-                       name="BOTHEDGE"
-                       value="0x0"/>
-                <value caption="Positive input goes below negative input"
-                       name="NEGEDGE"
-                       value="0x2"/>
-                <value caption="Positive input goes above negative input"
-                       name="POSEDGE"
-                       value="0x3"/>
+                <value caption="Positive and negative inputs crosses" name="BOTHEDGE" value="0x0"/>
+                <value caption="Positive input goes below negative input" name="NEGEDGE" value="0x2"/>
+                <value caption="Positive input goes above negative input" name="POSEDGE" value="0x3"/>
             </value-group>
             <value-group caption="AC Output Initial Value select" name="AC_INITVAL">
                 <value caption="Output initialized to 0" name="LOW" value="0x0"/>
@@ -1111,194 +521,62 @@
                 <value caption="Positive Pin 4" name="AINP4" value="0x04"/>
             </value-group>
         </module>
-        <module caption="Analog to Digital Converter"
-                id="adc_12b_diff_ctrl_v1"
-                name="ADC">
+        <module caption="Analog to Digital Converter" id="adc_12b_diff_ctrl_v1" name="ADC">
             <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="ADC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Free running mode" mask="0x02" name="FREERUN" rw="RW"/>
-                    <bitfield caption="Resolution selection"
-                              mask="0x0C"
-                              name="RESSEL"
-                              rw="RW"
-                              values="ADC_RESSEL"/>
+                    <bitfield caption="Resolution selection" mask="0x0C" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
                     <bitfield caption="Left adjust result" mask="0x10" name="LEFTADJ" rw="RW"/>
-                    <bitfield caption="Conversion mode"
-                              mask="0x20"
-                              name="CONVMODE"
-                              rw="RW"
-                              values="ADC_CONVMODE"/>
+                    <bitfield caption="Conversion mode" mask="0x20" name="CONVMODE" rw="RW" values="ADC_CONVMODE"/>
                     <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Accumulation Samples"
-                              mask="0x07"
-                              name="SAMPNUM"
-                              rw="RW"
-                              values="ADC_SAMPNUM"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x07" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Pre-scaler"
-                              mask="0x0F"
-                              name="PRESC"
-                              rw="RW"
-                              values="ADC_PRESC"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x0F" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sampling Delay Selection"
-                              mask="0x0F"
-                              name="SAMPDLY"
-                              rw="RW"
-                              values="ADC_SAMPDLY"/>
-                    <bitfield caption="Initial Delay Selection"
-                              mask="0xE0"
-                              name="INITDLY"
-                              rw="RW"
-                              values="ADC_INITDLY"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Sampling Delay Selection" mask="0x0F" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xE0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Window Comparator Mode"
-                              mask="0x07"
-                              name="WINCM"
-                              rw="RW"
-                              values="ADC_WINCM"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x07" name="WINCM" rw="RW" values="ADC_WINCM"/>
                 </register>
-                <register caption="Sample Control"
-                          initval="0x00"
-                          name="SAMPCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Sample lenght" mask="0xFF" name="SAMPLEN" rw="RW"/>
                 </register>
-                <register caption="Positive mux input"
-                          initval="0x00"
-                          name="MUXPOS"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="ADC_MUXPOS"/>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
-                <register caption="Negative mux input"
-                          initval="0x00"
-                          name="MUXNEG"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="ADC_MUXNEG"/>
+                <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
-                <register caption="Command"
-                          initval="0x00"
-                          name="COMMAND"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Start Conversion" mask="0x01" name="STCONV" rw="RW"/>
                     <bitfield caption="Stop Conversion" mask="0x02" name="SPCONV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Start Event Input Enable"
-                              mask="0x01"
-                              name="STARTEI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x01" name="STARTEI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Result Ready Interrupt Enable"
-                              mask="0x01"
-                              name="RESRDY"
-                              rw="RW"/>
-                    <bitfield caption="Window Comparator Interrupt Enable"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x01" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
                     <bitfield caption="Result Ready Flag" mask="0x01" name="RESRDY" rw="RW"/>
-                    <bitfield caption="Window Comparator Flag"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Data"
-                          initval="0x00"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Temporary" mask="0xFF" name="TEMP" rw="RW"/>
                 </register>
-                <register caption="ADC Accumulator Result"
-                          name="RES"
-                          offset="0x10"
-                          rw="R"
-                          size="2"/>
-                <register caption="Window comparator low threshold"
-                          name="WINLT"
-                          offset="0x12"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Window comparator high threshold"
-                          name="WINHT"
-                          offset="0x14"
-                          rw="RW"
-                          size="2"/>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Conversion mode select" name="ADC_CONVMODE">
                 <value caption="Single-Ended mode" name="SINGLEENDED" value="0x0"/>
@@ -1428,99 +706,33 @@
         </module>
         <module caption="Bod interface" id="bor_lvd_ctrl_v1" name="BOD">
             <register-group caption="Bod interface" name="BOD" size="0x10">
-                <register caption="Control A"
-                          initval="0x01"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Operation in sleep mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="BOD_SLEEP"/>
-                    <bitfield caption="Operation in active mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="R"
-                              values="BOD_ACTIVE"/>
-                    <bitfield caption="Sample frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="R"
-                              values="BOD_SAMPFREQ"/>
+                <register caption="Control A" initval="0x01" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in sleep mode" mask="0x03" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                    <bitfield caption="Operation in active mode" mask="0x0C" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bod level"
-                              mask="0x07"
-                              name="LVL"
-                              rw="R"
-                              values="BOD_LVL"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x07" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor Control"
-                          initval="0x00"
-                          name="VLMCTRLA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level"
-                              mask="0x03"
-                              name="VLMLVL"
-                              rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x03" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor interrrupt enable"
-                              mask="0x01"
-                              name="VLMIE"
-                              rw="RW"/>
-                    <bitfield caption="Configuration"
-                              mask="0x06"
-                              name="VLMCFG"
-                              rw="RW"
-                              values="BOD_VLMCFG"/>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x01" name="VLMIE" rw="RW"/>
+                    <bitfield caption="Configuration" mask="0x06" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor interrupt flag"
-                              mask="0x01"
-                              name="VLMIF"
-                              rw="RW"/>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x01" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor status"
-                              mask="0x01"
-                              name="VLMS"
-                              rw="R"
-                              values="BOD_VLMS"/>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x01" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
                 <value caption="Disabled" name="DIS" value="0x00"/>
                 <value caption="Enabled" name="ENABLED" value="0x01"/>
                 <value caption="Sampled" name="SAMPLED" value="0x02"/>
-                <value caption="Enabled with wake-up halted until BOD is ready"
-                       name="ENWAKE"
-                       value="0x03"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
             </value-group>
             <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
                 <value caption="128Hz sampling frequency" name="128HZ" value="0x0"/>
@@ -1543,338 +755,103 @@
                 <value caption="VDD crosses VLM threshold" name="BOTH" value="0x02"/>
             </value-group>
             <value-group caption="Voltage level monitor status select" name="BOD_VLMS">
-                <value caption="The voltage is above the VLM threshold level"
-                       name="ABOVE"
-                       value="0x0"/>
-                <value caption="The voltage is below the VLM threshold level"
-                       name="BELOW"
-                       value="0x1"/>
+                <value caption="The voltage is above the VLM threshold level" name="ABOVE" value="0x0"/>
+                <value caption="The voltage is below the VLM threshold level" name="BELOW" value="0x1"/>
             </value-group>
             <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
                 <value caption="VLM Disabled" name="OFF" value="0x0"/>
-                <value caption="VLM threshold 5% above BOD level"
-                       name="5ABOVE"
-                       value="0x1"/>
-                <value caption="VLM threshold 15% above BOD level"
-                       name="15ABOVE"
-                       value="0x2"/>
-                <value caption="VLM threshold 25% above BOD level"
-                       name="25ABOVE"
-                       value="0x3"/>
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x1"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x2"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x3"/>
             </value-group>
         </module>
         <module caption="Configurable Custom Logic" id="cla_ccl_v1" name="CCL">
             <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Sequential Control 0"
-                          initval="0x00"
-                          name="SEQCTRL0"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Sequential Control 1"
-                          initval="0x00"
-                          name="SEQCTRL1"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Interrupt Control 0"
-                          initval="0x00"
-                          name="INTCTRL0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode for LUT0"
-                              mask="0x03"
-                              name="INTMODE0"
-                              rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1"
-                              mask="0x0C"
-                              name="INTMODE1"
-                              rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2"
-                              mask="0x30"
-                              name="INTMODE2"
-                              rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3"
-                              mask="0xC0"
-                              name="INTMODE3"
-                              rw="RW"
-                              values="CCL_INTMODE3"/>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x03" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0x0C" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xC0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x0F" name="INT" rw="RW"/>
                 </register>
-                <register caption="LUT 0 Control A"
-                          initval="0x00"
-                          name="LUT0CTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 0 Control A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 0 Control B"
-                          initval="0x00"
-                          name="LUT0CTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 0 Control C"
-                          initval="0x00"
-                          name="LUT0CTRLC"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 0"
-                          initval="0x00"
-                          name="TRUTH0"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 1 Control A"
-                          initval="0x00"
-                          name="LUT1CTRLA"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 1 Control A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 1 Control B"
-                          initval="0x00"
-                          name="LUT1CTRLB"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 1 Control C"
-                          initval="0x00"
-                          name="LUT1CTRLC"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 1"
-                          initval="0x00"
-                          name="TRUTH1"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 2 Control A"
-                          initval="0x00"
-                          name="LUT2CTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 2 Control A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 2 Control B"
-                          initval="0x00"
-                          name="LUT2CTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 2 Control C"
-                          initval="0x00"
-                          name="LUT2CTRLC"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 2"
-                          initval="0x00"
-                          name="TRUTH2"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 3 Control A"
-                          initval="0x00"
-                          name="LUT3CTRLA"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 3 Control A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 3 Control B"
-                          initval="0x00"
-                          name="LUT3CTRLB"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 3 Control C"
-                          initval="0x00"
-                          name="LUT3CTRLC"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 3"
-                          initval="0x00"
-                          name="TRUTH3"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
             </register-group>
@@ -1905,13 +882,9 @@
             <value-group caption="Clock Source Selection" name="CCL_CLKSRC">
                 <value caption="Peripheral Clock" name="CLKPER" value="0x0"/>
                 <value caption="Selection by INSEL2" name="IN2" value="0x1"/>
-                <value caption="Internal High-Frequency Oscillator"
-                       name="OSCHF"
-                       value="0x4"/>
+                <value caption="Internal High-Frequency Oscillator" name="OSCHF" value="0x4"/>
                 <value caption="32.768 kHz oscillator" name="OSC32K" value="0x5"/>
-                <value caption="32.768 kHz oscillator divided by 32"
-                       name="OSC1K"
-                       value="0x6"/>
+                <value caption="32.768 kHz oscillator divided by 32" name="OSC1K" value="0x6"/>
             </value-group>
             <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
                 <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
@@ -1977,195 +950,67 @@
         </module>
         <module caption="Clock controller" id="avrdd" name="CLKCTRL">
             <register-group caption="Clock controller" name="CLKCTRL" size="0x40">
-                <register caption="MCLK Control A"
-                          initval="0x00"
-                          name="MCLKCTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="CLKCTRL_CLKSEL"/>
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock select" mask="0x07" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
                     <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
                 </register>
-                <register caption="MCLK Control B"
-                          initval="0x00"
-                          name="MCLKCTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Prescaler enable" mask="0x01" name="PEN" rw="RW"/>
-                    <bitfield caption="Prescaler division"
-                              mask="0x1E"
-                              name="PDIV"
-                              rw="RW"
-                              values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler division" mask="0x1E" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
                 </register>
-                <register caption="MCLK Control C"
-                          initval="0x00"
-                          name="MCLKCTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Enable"
-                              mask="0x01"
-                              name="CFDEN"
-                              rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Test"
-                              mask="0x02"
-                              name="CFDTST"
-                              rw="W"/>
-                    <bitfield caption="Clock Failure Detect Source"
-                              mask="0x0C"
-                              name="CFDSRC"
-                              rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Enable" mask="0x01" name="CFDEN" rw="RW"/>
+                    <bitfield caption="Clock Failure Detect Test" mask="0x02" name="CFDTST" rw="W"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0x0C" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                 </register>
-                <register caption="MCLK Interrupt Control"
-                          initval="0x00"
-                          name="MCLKINTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Enable"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt type"
-                              mask="0x80"
-                              name="INTTYPE"
-                              rw="RW"
-                              values="CLKCTRL_INTTYPE"/>
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x01" name="CFD" rw="RW"/>
+                    <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags"
-                          initval="0x00"
-                          name="MCLKINTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Flag"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x01" name="CFD" rw="RW"/>
                 </register>
-                <register caption="MCLK Status"
-                          initval="0x00"
-                          name="MCLKSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="System Oscillator changing"
-                              mask="0x01"
-                              name="SOSC"
-                              rw="RW"/>
-                    <bitfield caption="High frequency oscillator status"
-                              mask="0x02"
-                              name="OSCHFS"
-                              rw="RW"/>
-                    <bitfield caption="32KHz oscillator status"
-                              mask="0x04"
-                              name="OSC32KS"
-                              rw="RW"/>
-                    <bitfield caption="32.768 kHz Crystal Oscillator status"
-                              mask="0x08"
-                              name="XOSC32KS"
-                              rw="RW"/>
+                <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="System Oscillator changing" mask="0x01" name="SOSC" rw="RW"/>
+                    <bitfield caption="High frequency oscillator status" mask="0x02" name="OSCHFS" rw="RW"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x04" name="OSC32KS" rw="RW"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x08" name="XOSC32KS" rw="RW"/>
                     <bitfield caption="External Clock status" mask="0x10" name="EXTS" rw="RW"/>
                     <bitfield caption="PLL oscillator status" mask="0x20" name="PLLS" rw="RW"/>
                 </register>
-                <register caption="OSCHF Control A"
-                          initval="0x0C"
-                          name="OSCHFCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Control A" initval="0x0C" name="OSCHFCTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="Autotune" mask="0x01" name="AUTOTUNE" rw="RW"/>
-                    <bitfield caption="Frequency select"
-                              mask="0x3C"
-                              name="FRQSEL"
-                              rw="RW"
-                              values="CLKCTRL_FRQSEL"/>
+                    <bitfield caption="Frequency select" mask="0x3C" name="FRQSEL" rw="RW" values="CLKCTRL_FRQSEL"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSCHF Tune"
-                          name="OSCHFTUNE"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Tune" name="OSCHFTUNE" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Tune" mask="0xFF" name="TUNE" rw="RW"/>
                 </register>
-                <register caption="PLL Control A"
-                          name="PLLCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multiplication factor"
-                              mask="0x03"
-                              name="MULFAC"
-                              rw="RW"
-                              values="CLKCTRL_MULFAC"/>
-                    <bitfield caption="Source"
-                              mask="0x40"
-                              name="SOURCE"
-                              rw="RW"
-                              values="CLKCTRL_SOURCE"/>
+                <register caption="PLL Control A" name="PLLCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Multiplication factor" mask="0x03" name="MULFAC" rw="RW" values="CLKCTRL_MULFAC"/>
+                    <bitfield caption="Source" mask="0x40" name="SOURCE" rw="RW" values="CLKCTRL_SOURCE"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSC32K Control A"
-                          initval="0x00"
-                          name="OSC32KCTRLA"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC32K Control A"
-                          initval="0x00"
-                          name="XOSC32KCTRLA"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Low power mode" mask="0x02" name="LPMODE" rw="RW"/>
                     <bitfield caption="Select" mask="0x04" name="SEL" rw="RW"/>
-                    <bitfield caption="Crystal startup time"
-                              mask="0x30"
-                              name="CSUT"
-                              rw="RW"
-                              values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC HF Control A"
-                          initval="0x00"
-                          name="XOSCHFCTRLA"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC HF Control A" initval="0x00" name="XOSCHFCTRLA" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="External Source Select"
-                              mask="0x02"
-                              name="SELHF"
-                              rw="RW"
-                              values="CLKCTRL_SELHF"/>
-                    <bitfield caption="Frequency Range"
-                              mask="0x0C"
-                              name="FRQRANGE"
-                              rw="RW"
-                              values="CLKCTRL_FRQRANGE"/>
-                    <bitfield caption="Start-up Time Select"
-                              mask="0x30"
-                              name="CSUTHF"
-                              rw="RW"
-                              values="CLKCTRL_CSUTHF"/>
+                    <bitfield caption="External Source Select" mask="0x02" name="SELHF" rw="RW" values="CLKCTRL_SELHF"/>
+                    <bitfield caption="Frequency Range" mask="0x0C" name="FRQRANGE" rw="RW" values="CLKCTRL_FRQRANGE"/>
+                    <bitfield caption="Start-up Time Select" mask="0x30" name="CSUTHF" rw="RW" values="CLKCTRL_CSUTHF"/>
                     <bitfield caption="Run Standby" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Clock select" name="CLKCTRL_CLKSEL">
-                <value caption="Internal high-frequency oscillator"
-                       name="OSCHF"
-                       value="0x0"/>
+                <value caption="Internal high-frequency oscillator" name="OSCHF" value="0x0"/>
                 <value caption="Internal 32.768 kHz oscillator" name="OSC32K" value="0x1"/>
                 <value caption="32.768 kHz crystal oscillator" name="XOSC32K" value="0x2"/>
                 <value caption="External clock" name="EXTCLK" value="0x3"/>
@@ -2209,12 +1054,8 @@
                 <value caption="3 x multiplication factor" name="3x" value="0x2"/>
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
-                <value caption="High frequency internal oscillator as PLL source"
-                       name="OSCHF"
-                       value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF"
-                       value="0x1"/>
+                <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -2240,44 +1081,19 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection"
-                          initval="0x00"
-                          name="CCP"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCP signature"
-                              mask="0xFF"
-                              name="CCP"
-                              rw="RW"
-                              values="CPU_CCP"/>
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Stack Pointer"
-                          initval="0x7FFF"
-                          name="SP"
-                          offset="0xD"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Status Register"
-                          initval="0x00"
-                          name="SREG"
-                          offset="0xF"
-                          rw="RW"
-                          size="1">
+                <register caption="Stack Pointer" initval="0x7FFF" name="SP" offset="0xD" rw="RW" size="2"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
                     <bitfield caption="Carry Flag" mask="0x01" name="C" rw="RW"/>
                     <bitfield caption="Zero Flag" mask="0x02" name="Z" rw="RW"/>
                     <bitfield caption="Negative Flag" mask="0x04" name="N" rw="RW"/>
-                    <bitfield caption="Two's Complement Overflow Flag"
-                              mask="0x08"
-                              name="V"
-                              rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V" rw="RW"/>
                     <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
                     <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
                     <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
-                    <bitfield caption="Global Interrupt Enable Flag"
-                              mask="0x80"
-                              name="I"
-                              rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="CCP signature select" name="CPU_CCP">
@@ -2287,530 +1103,157 @@
         </module>
         <module caption="Interrupt Controller" id="int_8bit_v3" name="CPUINT">
             <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Round-robin Scheduling Enable"
-                              mask="0x01"
-                              name="LVL0RR"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x01" name="LVL0RR" rw="RW"/>
                     <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
-                    <bitfield caption="Interrupt Vector Select"
-                              mask="0x40"
-                              name="IVSEL"
-                              rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Level 0 Interrupt Executing"
-                              mask="0x01"
-                              name="LVL0EX"
-                              rw="R"/>
-                    <bitfield caption="Level 1 Interrupt Executing"
-                              mask="0x02"
-                              name="LVL1EX"
-                              rw="R"/>
-                    <bitfield caption="Non-maskable Interrupt Executing"
-                              mask="0x80"
-                              name="NMIEX"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x01" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x02" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority"
-                          initval="0x00"
-                          name="LVL0PRI"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Level Priority"
-                              mask="0xFF"
-                              name="LVL0PRI"
-                              rw="RW"/>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xFF" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector"
-                          initval="0x00"
-                          name="LVL1VEC"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Vector with High Priority"
-                              mask="0xFF"
-                              name="LVL1VEC"
-                              rw="RW"/>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xFF" name="LVL1VEC" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="CRCSCAN" id="math_pdi_crc_v1" name="CRCSCAN">
             <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable CRC scan" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Enable NMI Trigger" mask="0x02" name="NMIEN" rw="RW"/>
                     <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CRC Source"
-                              mask="0x03"
-                              name="SRC"
-                              rw="RW"
-                              values="CRCSCAN_SRC"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x03" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
                 </register>
-                <register caption="Status"
-                          initval="0x02"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="CRC Busy" mask="0x01" name="BUSY" rw="R"/>
                     <bitfield caption="CRC Ok" mask="0x02" name="OK" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="CRC Source select" name="CRCSCAN_SRC">
                 <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
-                <value caption="CRC on boot and appl section of flash"
-                       name="APPLICATION"
-                       value="0x1"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
                 <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
             </value-group>
         </module>
-        <module caption="Digital to Analog Converter"
-                id="dac_nbit_ctrl_v5"
-                name="DAC">
+        <module caption="Digital to Analog Converter" id="dac_nbit_ctrl_v5" name="DAC">
             <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="DAC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="DATA Register"
-                          name="DATA"
-                          offset="0x2"
-                          rw="RW"
-                          size="2">
+                <register caption="DATA Register" name="DATA" offset="0x2" rw="RW" size="2">
                     <bitfield caption="Data" mask="0xFFC0" name="DATA" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Event System" id="avrdd" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Software Event A"
-                          initval="0x00"
-                          name="SWEVENTA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0xFF"
-                              name="SWEVENTA"
-                              rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0xFF" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
-                <register caption="Software Event B"
-                          initval="0x00"
-                          name="SWEVENTB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0x03"
-                              name="SWEVENTB"
-                              rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0x03" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
-                <register caption="Multiplexer Channel 0"
-                          initval="0x00"
-                          name="CHANNEL0"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 0 generator select"
-                              mask="0xFF"
-                              name="CHANNEL0"
-                              rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Channel 0 generator select" mask="0xFF" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
-                <register caption="Multiplexer Channel 1"
-                          initval="0x00"
-                          name="CHANNEL1"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 1 generator select"
-                              mask="0xFF"
-                              name="CHANNEL1"
-                              rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Channel 1 generator select" mask="0xFF" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
-                <register caption="Multiplexer Channel 2"
-                          initval="0x00"
-                          name="CHANNEL2"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 2 generator select"
-                              mask="0xFF"
-                              name="CHANNEL2"
-                              rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Channel 2 generator select" mask="0xFF" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
-                <register caption="Multiplexer Channel 3"
-                          initval="0x00"
-                          name="CHANNEL3"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 3 generator select"
-                              mask="0xFF"
-                              name="CHANNEL3"
-                              rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Channel 3 generator select" mask="0xFF" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
-                <register caption="Multiplexer Channel 4"
-                          initval="0x00"
-                          name="CHANNEL4"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 4 generator select"
-                              mask="0xFF"
-                              name="CHANNEL4"
-                              rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Channel 4 generator select" mask="0xFF" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
-                <register caption="Multiplexer Channel 5"
-                          initval="0x00"
-                          name="CHANNEL5"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 5 generator select"
-                              mask="0xFF"
-                              name="CHANNEL5"
-                              rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Channel 5 generator select" mask="0xFF" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT0A"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT0B"
-                          offset="0x21"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT1A"
-                          offset="0x22"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT1B"
-                          offset="0x23"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT2A"
-                          offset="0x24"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT2B"
-                          offset="0x25"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT3A"
-                          offset="0x26"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT3B"
-                          offset="0x27"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 12 - ADC0"
-                          initval="0x00"
-                          name="USERADC0START"
-                          offset="0x28"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTA"
-                          offset="0x29"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTC"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTD"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTF"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0"
-                          initval="0x00"
-                          name="USERUSART0IRDA"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1"
-                          initval="0x00"
-                          name="USERUSART1IRDA"
-                          offset="0x2E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A"
-                          initval="0x00"
-                          name="USERTCA0CNTA"
-                          offset="0x2F"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B"
-                          initval="0x00"
-                          name="USERTCA0CNTB"
-                          offset="0x30"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A"
-                          initval="0x00"
-                          name="USERTCB0CAPT"
-                          offset="0x31"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B"
-                          initval="0x00"
-                          name="USERTCB0COUNT"
-                          offset="0x32"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A"
-                          initval="0x00"
-                          name="USERTCB1CAPT"
-                          offset="0x33"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B"
-                          initval="0x00"
-                          name="USERTCB1COUNT"
-                          offset="0x34"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A"
-                          initval="0x00"
-                          name="USERTCB2CAPT"
-                          offset="0x35"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B"
-                          initval="0x00"
-                          name="USERTCB2COUNT"
-                          offset="0x36"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A"
-                          initval="0x00"
-                          name="USERTCD0INPUTA"
-                          offset="0x37"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B"
-                          initval="0x00"
-                          name="USERTCD0INPUTB"
-                          offset="0x38"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
             <value-group caption="Channel 0 generator select" name="EVSYS_CHANNEL0">
@@ -2819,30 +1262,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2857,21 +1284,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2889,30 +1306,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2927,21 +1328,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2959,30 +1350,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2996,21 +1371,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3028,30 +1393,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3065,21 +1414,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3097,30 +1436,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3129,21 +1452,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3161,30 +1474,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3193,21 +1490,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3235,149 +1522,48 @@
             </value-group>
             <value-group caption="User channel select" name="EVSYS_USER">
                 <value caption="Off" name="OFF" value="0x0"/>
-                <value caption="Connect user to event channel 0"
-                       name="CHANNEL0"
-                       value="0x1"/>
-                <value caption="Connect user to event channel 1"
-                       name="CHANNEL1"
-                       value="0x2"/>
-                <value caption="Connect user to event channel 2"
-                       name="CHANNEL2"
-                       value="0x3"/>
-                <value caption="Connect user to event channel 3"
-                       name="CHANNEL3"
-                       value="0x4"/>
-                <value caption="Connect user to event channel 4"
-                       name="CHANNEL4"
-                       value="0x5"/>
-                <value caption="Connect user to event channel 5"
-                       name="CHANNEL5"
-                       value="0x6"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
             </value-group>
         </module>
         <module caption="Fuses" id="avrdd" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Watchdog Configuration"
-                          initval="0x00"
-                          name="WDTCFG"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Watchdog Timeout Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="FUSE_WINDOW"/>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
-                <register caption="BOD Configuration"
-                          initval="0x00"
-                          name="BODCFG"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="BOD Operation in Sleep Mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="FUSE_SLEEP"/>
-                    <bitfield caption="BOD Operation in Active Mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="RW"
-                              values="FUSE_ACTIVE"/>
-                    <bitfield caption="BOD Sample Frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Level"
-                              mask="0xE0"
-                              name="LVL"
-                              rw="RW"
-                              values="FUSE_LVL"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x03" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x0C" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Level" mask="0xE0" name="LVL" rw="RW" values="FUSE_LVL"/>
                 </register>
-                <register caption="Oscillator Configuration"
-                          initval="0x00"
-                          name="OSCCFG"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Frequency Select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="FUSE_CLKSEL"/>
+                <register caption="Oscillator Configuration" initval="0x00" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x07" name="CLKSEL" rw="RW" values="FUSE_CLKSEL"/>
                 </register>
-                <register caption="System Configuration 0"
-                          initval="0xD0"
-                          name="SYSCFG0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="System Configuration 0" initval="0xD0" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="EEPROM Save" mask="0x01" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration"
-                              mask="0x08"
-                              name="RSTPINCFG"
-                              rw="RW"
-                              values="FUSE_RSTPINCFG"/>
-                    <bitfield caption="UPDI Pin Configuration"
-                              mask="0x10"
-                              name="UPDIPINCFG"
-                              rw="RW"
-                              values="FUSE_UPDIPINCFG"/>
-                    <bitfield caption="CRC Select"
-                              mask="0x20"
-                              name="CRCSEL"
-                              rw="RW"
-                              values="FUSE_CRCSEL"/>
-                    <bitfield caption="CRC Source"
-                              mask="0xC0"
-                              name="CRCSRC"
-                              rw="RW"
-                              values="FUSE_CRCSRC"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x08" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW" values="FUSE_UPDIPINCFG"/>
+                    <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
+                    <bitfield caption="CRC Source" mask="0xC0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                 </register>
-                <register caption="System Configuration 1"
-                          initval="0x08"
-                          name="SYSCFG1"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Startup Time"
-                              mask="0x07"
-                              name="SUT"
-                              rw="RW"
-                              values="FUSE_SUT"/>
-                    <bitfield caption="MVIO System Configuration"
-                              mask="0x18"
-                              name="MVSYSCFG"
-                              rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x07" name="SUT" rw="RW" values="FUSE_SUT"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                 </register>
-                <register caption="Code Section Size"
-                          initval="0x00"
-                          name="CODESIZE"
-                          offset="0x7"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Boot Section Size"
-                          initval="0x00"
-                          name="BOOTSIZE"
-                          offset="0x8"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
+                <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT"
-                       value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -3403,13 +1589,9 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)"
-                       name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
-                <value caption="CRC of application code and boot sections"
-                       name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -3421,12 +1603,8 @@
                 <value caption="UPDI Mode" name="UPDI" value="0x1"/>
             </value-group>
             <value-group caption="MVIO System Configuration select" name="FUSE_MVSYSCFG">
-                <value caption="Device used in a dual supply configuration"
-                       name="DUAL"
-                       value="0x1"/>
-                <value caption="Device used in a single supply configuration"
-                       name="SINGLE"
-                       value="0x2"/>
+                <value caption="Device used in a dual supply configuration" name="DUAL" value="0x1"/>
+                <value caption="Device used in a single supply configuration" name="SINGLE" value="0x2"/>
             </value-group>
             <value-group caption="Startup Time select" name="FUSE_SUT">
                 <value caption="0 ms" name="0MS" value="0x00"/>
@@ -3469,41 +1647,16 @@
         </module>
         <module caption="General Purpose Registers" id="avrdd" name="GPR">
             <register-group caption="General Purpose Registers" name="GPR" size="0x4">
-                <register caption="General Purpose Register 0"
-                          name="GPR0"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 1"
-                          name="GPR1"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 2"
-                          name="GPR2"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 3"
-                          name="GPR3"
-                          offset="0x3"
-                          rw="RW"
-                          size="1"/>
+                <register caption="General Purpose Register 0" name="GPR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose Register 1" name="GPR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose Register 2" name="GPR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose Register 3" name="GPR3" offset="0x3" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Lockbits" id="avrdd" name="LOCK">
             <register-group caption="Lockbits" name="LOCK" size="0x4">
-                <register caption="Lock Key Bits"
-                          initval="0x5CC5C55C"
-                          name="KEY"
-                          offset="0x0"
-                          rw="RW"
-                          size="4">
-                    <bitfield caption="Lock Key"
-                              mask="0xFFFFFFFF"
-                              name="KEY"
-                              rw="RW"
-                              values="LOCK_KEY"/>
+                <register caption="Lock Key Bits" initval="0x5CC5C55C" name="KEY" offset="0x0" rw="RW" size="4">
+                    <bitfield caption="Lock Key" mask="0xFFFFFFFF" name="KEY" rw="RW" values="LOCK_KEY"/>
                 </register>
             </register-group>
             <value-group caption="Lock Key select" name="LOCK_KEY">
@@ -3513,154 +1666,61 @@
         </module>
         <module caption="Multi-Voltage I/O" id="io_multiv_ctrl_avr_v1" name="MVIO">
             <register-group caption="Multi-Voltage I/O" name="MVIO" size="0x4">
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Enable"
-                              mask="0x01"
-                              name="VDDIO2IE"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Enable" mask="0x01" name="VDDIO2IE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Flag"
-                              mask="0x01"
-                              name="VDDIO2IF"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Flag" mask="0x01" name="VDDIO2IF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="VDDIO2 Status" mask="0x01" name="VDDIO2S" rw="R"/>
                 </register>
             </register-group>
         </module>
-        <module caption="Non-volatile Memory Controller"
-                id="nvm_ctrl_avr_v1"
-                name="NVMCTRL">
+        <module caption="Non-volatile Memory Controller" id="nvm_ctrl_avr_v1" name="NVMCTRL">
             <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x7F"
-                              name="CMD"
-                              rw="RW"
-                              values="NVMCTRL_CMD"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x30"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Application Code Write Protect"
-                              mask="0x01"
-                              name="APPCODEWP"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x30" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Application Code Write Protect" mask="0x01" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x02" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Application Data Write Protect"
-                              mask="0x04"
-                              name="APPDATAWP"
-                              rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space"
-                              mask="0x30"
-                              name="FLMAP"
-                              rw="RW"
-                              values="NVMCTRL_FLMAP"/>
-                    <bitfield caption="Flash Mapping Lock"
-                              mask="0x80"
-                              name="FLMAPLOCK"
-                              rw="RW"/>
+                    <bitfield caption="Application Data Write Protect" mask="0x04" name="APPDATAWP" rw="RW"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x02"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x02" rw="R" size="1">
                     <bitfield caption="Flash busy" mask="0x01" name="FBUSY" rw="R"/>
                     <bitfield caption="EEPROM busy" mask="0x02" name="EEBUSY" rw="R"/>
-                    <bitfield caption="Write error"
-                              mask="0x70"
-                              name="ERROR"
-                              rw="R"
-                              values="NVMCTRL_ERROR"/>
+                    <bitfield caption="Write error" mask="0x70" name="ERROR" rw="R" values="NVMCTRL_ERROR"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
-                <register caption="Address"
-                          name="ADDR"
-                          offset="0x08"
-                          rw="RW"
-                          size="4"/>
+                <register caption="Address" name="ADDR" offset="0x08" rw="RW" size="4"/>
             </register-group>
             <value-group caption="Command select" name="NVMCTRL_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
                 <value caption="No Operation" name="NOOP" value="0x01"/>
                 <value caption="Flash Write" name="FLWR" value="0x02"/>
                 <value caption="Flash Page Erase" name="FLPER" value="0x08"/>
-                <value caption="Flash Multi-Page Erase 2 pages"
-                       name="FLMPER2"
-                       value="0x09"/>
-                <value caption="Flash Multi-Page Erase 4 pages"
-                       name="FLMPER4"
-                       value="0x0A"/>
-                <value caption="Flash Multi-Page Erase 8 pages"
-                       name="FLMPER8"
-                       value="0x0B"/>
-                <value caption="Flash Multi-Page Erase 16 pages"
-                       name="FLMPER16"
-                       value="0x0C"/>
-                <value caption="Flash Multi-Page Erase 32 pages"
-                       name="FLMPER32"
-                       value="0x0D"/>
+                <value caption="Flash Multi-Page Erase 2 pages" name="FLMPER2" value="0x09"/>
+                <value caption="Flash Multi-Page Erase 4 pages" name="FLMPER4" value="0x0A"/>
+                <value caption="Flash Multi-Page Erase 8 pages" name="FLMPER8" value="0x0B"/>
+                <value caption="Flash Multi-Page Erase 16 pages" name="FLMPER16" value="0x0C"/>
+                <value caption="Flash Multi-Page Erase 32 pages" name="FLMPER32" value="0x0D"/>
                 <value caption="EEPROM Write" name="EEWR" value="0x12"/>
                 <value caption="EEPROM Erase and Write" name="EEERWR" value="0x13"/>
                 <value caption="EEPROM Byte Erase" name="EEBER" value="0x18"/>
-                <value caption="EEPROM Multi-Byte Erase 2 bytes"
-                       name="EEMBER2"
-                       value="0x19"/>
-                <value caption="EEPROM Multi-Byte Erase 4 bytes"
-                       name="EEMBER4"
-                       value="0x1A"/>
-                <value caption="EEPROM Multi-Byte Erase 8 bytes"
-                       name="EEMBER8"
-                       value="0x1B"/>
-                <value caption="EEPROM Multi-Byte Erase 16 bytes"
-                       name="EEMBER16"
-                       value="0x1C"/>
-                <value caption="EEPROM Multi-Byte Erase 32 bytes"
-                       name="EEMBER32"
-                       value="0x1D"/>
+                <value caption="EEPROM Multi-Byte Erase 2 bytes" name="EEMBER2" value="0x19"/>
+                <value caption="EEPROM Multi-Byte Erase 4 bytes" name="EEMBER4" value="0x1A"/>
+                <value caption="EEPROM Multi-Byte Erase 8 bytes" name="EEMBER8" value="0x1B"/>
+                <value caption="EEPROM Multi-Byte Erase 16 bytes" name="EEMBER16" value="0x1C"/>
+                <value caption="EEPROM Multi-Byte Erase 32 bytes" name="EEMBER32" value="0x1D"/>
                 <value caption="Chip Erase Command" name="CHER" value="0x20"/>
                 <value caption="EEPROM Erase Command" name="EECHER" value="0x30"/>
             </value-group>
@@ -3673,399 +1733,134 @@
             <value-group caption="Write error select" name="NVMCTRL_ERROR">
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
-                <value caption="Write to section not allowed"
-                       name="ILLEGALSADDR"
-                       value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted"
-                       name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed"
-                       name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_avr_v2_port" name="PORT">
             <register-group caption="I/O Ports" name="PORT" size="0x20">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Set"
-                          name="DIRSET"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Clear"
-                          name="DIRCLR"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Toggle"
-                          name="DIRTGL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Set"
-                          name="OUTSET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Clear"
-                          name="OUTCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Toggle"
-                          name="OUTTGL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
-                <register caption="Port Control"
-                          initval="0x00"
-                          name="PORTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Slew Rate Limit Enable" mask="0x01" name="SRL" rw="RW"/>
                 </register>
-                <register caption="Pin Control Config"
-                          initval="0x00"
-                          name="PINCONFIG"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin Control Config" initval="0x00" name="PINCONFIG" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin Control Update"
-                          initval="0x00"
-                          name="PINCTRLUPD"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control update mask"
-                              mask="0xFF"
-                              name="PINCTRLUPD"
-                              rw="RW"/>
+                <register caption="Pin Control Update" initval="0x00" name="PINCTRLUPD" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Pin control update mask" mask="0xFF" name="PINCTRLUPD" rw="RW"/>
                 </register>
-                <register caption="Pin Control Set"
-                          initval="0x00"
-                          name="PINCTRLSET"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control set mask"
-                              mask="0xFF"
-                              name="PINCTRLSET"
-                              rw="RW"/>
+                <register caption="Pin Control Set" initval="0x00" name="PINCTRLSET" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Pin control set mask" mask="0xFF" name="PINCTRLSET" rw="RW"/>
                 </register>
-                <register caption="Pin Control Clear"
-                          initval="0x00"
-                          name="PINCTRLCLR"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control clear mask"
-                              mask="0xFF"
-                              name="PINCTRLCLR"
-                              rw="RW"/>
+                <register caption="Pin Control Clear" initval="0x00" name="PINCTRLCLR" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Pin control clear mask" mask="0xFF" name="PINCTRLCLR" rw="RW"/>
                 </register>
-                <register caption="Pin 0 Control"
-                          initval="0x00"
-                          name="PIN0CTRL"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 1 Control"
-                          initval="0x00"
-                          name="PIN1CTRL"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 2 Control"
-                          initval="0x00"
-                          name="PIN2CTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 3 Control"
-                          initval="0x00"
-                          name="PIN3CTRL"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 4 Control"
-                          initval="0x00"
-                          name="PIN4CTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 5 Control"
-                          initval="0x00"
-                          name="PIN5CTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 6 Control"
-                          initval="0x00"
-                          name="PIN6CTRL"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 7 Control"
-                          initval="0x00"
-                          name="PIN7CTRL"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
-                <value caption="Interrupt disabled but input buffer enabled"
-                       name="INTDISABLE"
-                       value="0x0"/>
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
                 <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
                 <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
                 <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
-                <value caption="Digital Input Buffer disabled"
-                       name="INPUT_DISABLE"
-                       value="0x4"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
                 <value caption="Sense low Level" name="LEVEL" value="0x5"/>
             </value-group>
         </module>
         <module caption="Port Multiplexer" id="avrdd" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="EVSYS route A"
-                          initval="0x00"
-                          name="EVSYSROUTEA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Output A"
-                              mask="0x01"
-                              name="EVOUTA"
-                              rw="RW"
-                              values="PORTMUX_EVOUTA"/>
-                    <bitfield caption="Event Output C"
-                              mask="0x04"
-                              name="EVOUTC"
-                              rw="RW"
-                              values="PORTMUX_EVOUTC"/>
-                    <bitfield caption="Event Output D"
-                              mask="0x08"
-                              name="EVOUTD"
-                              rw="RW"
-                              values="PORTMUX_EVOUTD"/>
-                    <bitfield caption="Event Output F"
-                              mask="0x20"
-                              name="EVOUTF"
-                              rw="RW"
-                              values="PORTMUX_EVOUTF"/>
+                <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Event Output A" mask="0x01" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output C" mask="0x04" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x08" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
                 </register>
-                <register caption="CCL route A"
-                          initval="0x00"
-                          name="CCLROUTEA"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals"
-                              mask="0x01"
-                              name="LUT0"
-                              rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals"
-                              mask="0x02"
-                              name="LUT1"
-                              rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals"
-                              mask="0x04"
-                              name="LUT2"
-                              rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals"
-                              mask="0x08"
-                              name="LUT3"
-                              rw="RW"
-                              values="PORTMUX_LUT3"/>
+                <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x01" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x02" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x04" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x08" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
-                <register caption="USART route A"
-                          initval="0x00"
-                          name="USARTROUTEA"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="USART0 Signals"
-                              mask="0x07"
-                              name="USART0"
-                              rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="USART1 Signals"
-                              mask="0x18"
-                              name="USART1"
-                              rw="RW"
-                              values="PORTMUX_USART1"/>
+                <register caption="USART route A" initval="0x00" name="USARTROUTEA" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="USART0 Signals" mask="0x07" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="USART1 Signals" mask="0x18" name="USART1" rw="RW" values="PORTMUX_USART1"/>
                 </register>
-                <register caption="SPI route A"
-                          initval="0x00"
-                          name="SPIROUTEA"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI0 Signals"
-                              mask="0x07"
-                              name="SPI0"
-                              rw="RW"
-                              values="PORTMUX_SPI0"/>
+                <register caption="SPI route A" initval="0x00" name="SPIROUTEA" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="SPI0 Signals" mask="0x07" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                 </register>
-                <register caption="TWI route A"
-                          initval="0x00"
-                          name="TWIROUTEA"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TWI0 Signals"
-                              mask="0x03"
-                              name="TWI0"
-                              rw="RW"
-                              values="PORTMUX_TWI0"/>
+                <register caption="TWI route A" initval="0x00" name="TWIROUTEA" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="TWI0 Signals" mask="0x03" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="TCA route A"
-                          initval="0x00"
-                          name="TCAROUTEA"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCA0 Signals"
-                              mask="0x07"
-                              name="TCA0"
-                              rw="RW"
-                              values="PORTMUX_TCA0"/>
+                <register caption="TCA route A" initval="0x00" name="TCAROUTEA" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="TCA0 Signals" mask="0x07" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
                 </register>
-                <register caption="TCB route A"
-                          initval="0x00"
-                          name="TCBROUTEA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCB0 Output"
-                              mask="0x01"
-                              name="TCB0"
-                              rw="RW"
-                              values="PORTMUX_TCB0"/>
-                    <bitfield caption="TCB1 Output"
-                              mask="0x02"
-                              name="TCB1"
-                              rw="RW"
-                              values="PORTMUX_TCB1"/>
+                <register caption="TCB route A" initval="0x00" name="TCBROUTEA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="TCB0 Output" mask="0x01" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="TCB1 Output" mask="0x02" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
                 </register>
-                <register caption="TCD route A"
-                          initval="0x00"
-                          name="TCDROUTEA"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCD0 Signals"
-                              mask="0x07"
-                              name="TCD0"
-                              rw="RW"
-                              values="PORTMUX_TCD0"/>
+                <register caption="TCD route A" initval="0x00" name="TCDROUTEA" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="TCD0 Signals" mask="0x07" name="TCD0" rw="RW" values="PORTMUX_TCD0"/>
                 </register>
             </register-group>
             <value-group caption="CCL Look-Up Table 0 Signals select" name="PORTMUX_LUT0">
@@ -4154,199 +1949,69 @@
         </module>
         <module caption="Reset controller" id="rst_integration_v8" name="RSTCTRL">
             <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
-                <register caption="Reset Flags"
-                          initval="0x00"
-                          name="RSTFR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Power on Reset flag" mask="0x01" name="PORF" rw="RW"/>
-                    <bitfield caption="Brown out detector Reset flag"
-                              mask="0x02"
-                              name="BORF"
-                              rw="RW"/>
+                    <bitfield caption="Brown out detector Reset flag" mask="0x02" name="BORF" rw="RW"/>
                     <bitfield caption="External Reset flag" mask="0x04" name="EXTRF" rw="RW"/>
                     <bitfield caption="Watch dog Reset flag" mask="0x08" name="WDRF" rw="RW"/>
                     <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
                     <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
                 </register>
-                <register caption="Software Reset"
-                          initval="0x00"
-                          name="SWRR"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software reset enable"
-                              mask="0x01"
-                              name="SWRST"
-                              rw="RW"/>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x01" name="SWRST" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Real-Time Counter" id="tmr_16b_rtc_v1" name="RTC">
             <register-group caption="Real-Time Counter" name="RTC" size="0x20">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="RTCEN" rw="RW"/>
                     <bitfield caption="Correction enable" mask="0x04" name="CORREN" rw="RW"/>
-                    <bitfield caption="Prescaling Factor"
-                              mask="0x78"
-                              name="PRESCALER"
-                              rw="RW"
-                              values="RTC_PRESCALER"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
                     <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x01"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLABUSY"
-                              rw="R"/>
-                    <bitfield caption="Count Synchronization Busy Flag"
-                              mask="0x02"
-                              name="CNTBUSY"
-                              rw="R"/>
-                    <bitfield caption="Period Synchronization Busy Flag"
-                              mask="0x04"
-                              name="PERBUSY"
-                              rw="R"/>
-                    <bitfield caption="Comparator Synchronization Busy Flag"
-                              mask="0x08"
-                              name="CMPBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x02" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x04" name="PERBUSY" rw="R"/>
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x08" name="CMPBUSY" rw="R"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt enable"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt Flag"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Temporary"
-                          name="TEMP"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Debug control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Calibration"
-                          initval="0x00"
-                          name="CALIB"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Error Correction Value"
-                              mask="0x7F"
-                              name="ERROR"
-                              rw="RW"/>
-                    <bitfield caption="Error Correction Sign Bit"
-                              mask="0x80"
-                              name="SIGN"
-                              rw="RW"/>
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7F" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
                 </register>
-                <register caption="Clock Select"
-                          initval="0x00"
-                          name="CLKSEL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Select"
-                              mask="0x03"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="RTC_CLKSEL"/>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x03" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
                 </register>
                 <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
-                <register caption="Period"
-                          initval="0xFFFF"
-                          name="PER"
-                          offset="0x0A"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
                 <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
-                <register caption="PIT Control A"
-                          initval="0x00"
-                          name="PITCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="PITEN" rw="RW"/>
-                    <bitfield caption="Period"
-                              mask="0x78"
-                              name="PERIOD"
-                              rw="RW"
-                              values="RTC_PERIOD"/>
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
                 </register>
-                <register caption="PIT Status"
-                          initval="0x00"
-                          name="PITSTATUS"
-                          offset="0x11"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLBUSY"
-                              rw="R"/>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLBUSY" rw="R"/>
                 </register>
-                <register caption="PIT Interrupt Control"
-                          initval="0x00"
-                          name="PITINTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags"
-                          initval="0x00"
-                          name="PITINTFLAGS"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Debug control"
-                          initval="0x00"
-                          name="PITDBGCTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
             </register-group>
@@ -4394,156 +2059,42 @@
         </module>
         <module caption="Signature row" id="avrdd" name="SIGROW">
             <register-group caption="Signature row" name="SIGROW" size="0x40">
-                <register caption="Device ID Byte 0"
-                          name="DEVICEID0"
-                          offset="0x00"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 1"
-                          name="DEVICEID1"
-                          offset="0x01"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 2"
-                          name="DEVICEID2"
-                          offset="0x02"
-                          rw="R"
-                          size="1"/>
-                <register caption="Temperature Calibration 0"
-                          name="TEMPSENSE0"
-                          offset="0x04"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 0"
-                              mask="0xFFFF"
-                              name="TEMPSENSE0"
-                              rw="R"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Temperature Calibration 0" name="TEMPSENSE0" offset="0x04" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 0" mask="0xFFFF" name="TEMPSENSE0" rw="R"/>
                 </register>
-                <register caption="Temperature Calibration 1"
-                          name="TEMPSENSE1"
-                          offset="0x06"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 1"
-                              mask="0xFFFF"
-                              name="TEMPSENSE1"
-                              rw="R"/>
+                <register caption="Temperature Calibration 1" name="TEMPSENSE1" offset="0x06" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 1" mask="0xFFFF" name="TEMPSENSE1" rw="R"/>
                 </register>
-                <register caption="LOTNUM0"
-                          name="SERNUM0"
-                          offset="0x10"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM1"
-                          name="SERNUM1"
-                          offset="0x11"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM2"
-                          name="SERNUM2"
-                          offset="0x12"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM3"
-                          name="SERNUM3"
-                          offset="0x13"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM4"
-                          name="SERNUM4"
-                          offset="0x14"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM5"
-                          name="SERNUM5"
-                          offset="0x15"
-                          rw="R"
-                          size="1"/>
-                <register caption="RANDOM"
-                          name="SERNUM6"
-                          offset="0x16"
-                          rw="R"
-                          size="1"/>
-                <register caption="SCRIBE"
-                          name="SERNUM7"
-                          offset="0x17"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS0"
-                          name="SERNUM8"
-                          offset="0x18"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS1"
-                          name="SERNUM9"
-                          offset="0x19"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS0"
-                          name="SERNUM10"
-                          offset="0x1A"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS1"
-                          name="SERNUM11"
-                          offset="0x1B"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES0"
-                          name="SERNUM12"
-                          offset="0x1C"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES1"
-                          name="SERNUM13"
-                          offset="0x1D"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES2"
-                          name="SERNUM14"
-                          offset="0x1E"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES3"
-                          name="SERNUM15"
-                          offset="0x1F"
-                          rw="R"
-                          size="1"/>
+                <register caption="LOTNUM0" name="SERNUM0" offset="0x10" rw="R" size="1"/>
+                <register caption="LOTNUM1" name="SERNUM1" offset="0x11" rw="R" size="1"/>
+                <register caption="LOTNUM2" name="SERNUM2" offset="0x12" rw="R" size="1"/>
+                <register caption="LOTNUM3" name="SERNUM3" offset="0x13" rw="R" size="1"/>
+                <register caption="LOTNUM4" name="SERNUM4" offset="0x14" rw="R" size="1"/>
+                <register caption="LOTNUM5" name="SERNUM5" offset="0x15" rw="R" size="1"/>
+                <register caption="RANDOM" name="SERNUM6" offset="0x16" rw="R" size="1"/>
+                <register caption="SCRIBE" name="SERNUM7" offset="0x17" rw="R" size="1"/>
+                <register caption="XPOS0" name="SERNUM8" offset="0x18" rw="R" size="1"/>
+                <register caption="XPOS1" name="SERNUM9" offset="0x19" rw="R" size="1"/>
+                <register caption="YPOS0" name="SERNUM10" offset="0x1A" rw="R" size="1"/>
+                <register caption="YPOS1" name="SERNUM11" offset="0x1B" rw="R" size="1"/>
+                <register caption="RES0" name="SERNUM12" offset="0x1C" rw="R" size="1"/>
+                <register caption="RES1" name="SERNUM13" offset="0x1D" rw="R" size="1"/>
+                <register caption="RES2" name="SERNUM14" offset="0x1E" rw="R" size="1"/>
+                <register caption="RES3" name="SERNUM15" offset="0x1F" rw="R" size="1"/>
             </register-group>
         </module>
-        <module caption="Sleep Controller"
-                id="clk_sleep_ctrl_avr_v2"
-                name="SLPCTRL">
+        <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
             <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Sleep enable" mask="0x01" name="SEN" rw="RW"/>
-                    <bitfield caption="Sleep mode"
-                              mask="0x06"
-                              name="SMODE"
-                              rw="RW"
-                              values="SLPCTRL_SMODE"/>
+                    <bitfield caption="Sleep mode" mask="0x06" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="VREGCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Performance Mode"
-                              mask="0x07"
-                              name="PMODE"
-                              rw="RW"
-                              values="SLPCTRL_PMODE"/>
-                    <bitfield caption="High Temperature Low Leakage Enable"
-                              mask="0x10"
-                              name="HTLLEN"
-                              rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Performance Mode" mask="0x07" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                 </register>
             </register-group>
             <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
@@ -4551,8 +2102,7 @@
                 <value caption="Standby Mode" name="STDBY" value="0x01"/>
                 <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
             </value-group>
-            <value-group caption="High Temperature Low Leakage Enable select"
-                         name="SLPCTRL_HTLLEN">
+            <value-group caption="High Temperature Low Leakage Enable select" name="SLPCTRL_HTLLEN">
                 <value caption="Disabled" name="OFF" value="0x0"/>
                 <value caption="Enabled" name="ON" value="0x1"/>
             </value-group>
@@ -4563,110 +2113,36 @@
         </module>
         <module caption="Serial Peripheral Interface" id="spi_8bit_v2" name="SPI">
             <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable Module" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Prescaler"
-                              mask="0x06"
-                              name="PRESC"
-                              rw="RW"
-                              values="SPI_PRESC"/>
+                    <bitfield caption="Prescaler" mask="0x06" name="PRESC" rw="RW" values="SPI_PRESC"/>
                     <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
-                    <bitfield caption="Host Operation Enable"
-                              mask="0x20"
-                              name="MASTER"
-                              rw="RW"/>
+                    <bitfield caption="Host Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
                     <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI Mode"
-                              mask="0x03"
-                              name="MODE"
-                              rw="RW"
-                              values="SPI_MODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="SPI Mode" mask="0x03" name="MODE" rw="RW" values="SPI_MODE"/>
                     <bitfield caption="SPI Select Disable" mask="0x04" name="SSD" rw="RW"/>
-                    <bitfield caption="Buffer Mode Wait for Receive"
-                              mask="0x40"
-                              name="BUFWR"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Mode Wait for Receive" mask="0x40" name="BUFWR" rw="RW"/>
                     <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Enable" mask="0x01" name="IE" rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Enable"
-                              mask="0x10"
-                              name="SSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <mode name="DEFAULT" qualifier="SPI.CTRLB.BUFEN" value="0"/>
                     <mode name="BUFFERED" qualifier="SPI.CTRLB.BUFEN" value="1"/>
-                    <bitfield caption="Buffer Overflow"
-                              mask="0x01"
-                              modes="BUFFERED"
-                              name="BUFOVF"
-                              rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Flag"
-                              mask="0x10"
-                              modes="BUFFERED"
-                              name="SSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Flag"
-                              mask="0x20"
-                              modes="BUFFERED"
-                              name="DREIF"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Flag"
-                              mask="0x40"
-                              modes="BUFFERED"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              modes="BUFFERED"
-                              name="RXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Write Collision"
-                              mask="0x40"
-                              modes="DEFAULT"
-                              name="WRCOL"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt Flag"
-                              mask="0x80"
-                              modes="DEFAULT"
-                              name="IF"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Overflow" mask="0x01" modes="BUFFERED" name="BUFOVF" rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Flag" mask="0x10" modes="BUFFERED" name="SSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" modes="BUFFERED" name="DREIF" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" modes="BUFFERED" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" modes="BUFFERED" name="RXCIF" rw="RW"/>
+                    <bitfield caption="Write Collision" mask="0x40" modes="DEFAULT" name="WRCOL" rw="RW"/>
+                    <bitfield caption="Interrupt Flag" mask="0x80" modes="DEFAULT" name="IF" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
             </register-group>
@@ -4685,543 +2161,149 @@
         </module>
         <module caption="System Configuration Registers" id="avrdd" name="SYSCFG">
             <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
-                <register caption="Revision ID"
-                          name="REVID"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Control"
-                          name="OCDMCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Status"
-                          initval="0x00"
-                          name="OCDMSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+                <register caption="OCD Message Control" name="OCDMCTRL" offset="0x04" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMSTATUS" offset="0x05" rw="RW" size="1">
                     <bitfield caption="OCD Message Valid" mask="0x01" name="VALID" rw="RW"/>
                 </register>
             </register-group>
         </module>
-        <module caption="16-bit Timer/Counter Type A"
-                id="tmr_16b_pwm_v1"
-                name="TCA">
+        <module caption="16-bit Timer/Counter Type A" id="tmr_16b_pwm_v1" name="TCA">
             <register-group caption="16-bit Timer/Counter Type A" name="TCA" size="0x40">
-                <mode caption="Single Mode"
-                      name="SINGLE"
-                      qualifier="TCA.SINGLE.CTRLD.SPLITM"
-                      value="0"/>
-                <mode caption="Split Mode"
-                      name="SPLIT"
-                      qualifier="TCA.SPLIT.CTRLD.SPLITM"
-                      value="1"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <mode caption="Single Mode" name="SINGLE" qualifier="TCA.SINGLE.CTRLD.SPLITM" value="0"/>
+                <mode caption="Split Mode" name="SPLIT" qualifier="TCA.SPLIT.CTRLD.SPLITM" value="1"/>
+                <register caption="Control A" initval="0x00" modes="SINGLE" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x07"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                <register caption="Control B" initval="0x00" modes="SINGLE" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                     <bitfield caption="Auto Lock Update" mask="0x08" name="ALUPD" rw="RW"/>
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare 0 Waveform Output Value"
-                              mask="0x01"
-                              name="CMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Waveform Output Value"
-                              mask="0x02"
-                              name="CMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Waveform Output Value"
-                              mask="0x04"
-                              name="CMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SINGLE" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x01" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x02" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x04" name="CMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SINGLE" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Control E Clear" initval="0x00" modes="SINGLE" name="CTRLECLR" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Direction"
-                              mask="0x01"
-                              name="DIR"
-                              rw="RW"
-                              values="TCA_SINGLE_DIR"/>
+                <register caption="Control E Set" initval="0x00" modes="SINGLE" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control F Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Clear" initval="0x00" modes="SINGLE" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Control F Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFSET"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Set" initval="0x00" modes="SINGLE" name="CTRLFSET" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="EVCTRL"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Count on Event Input A"
-                              mask="0x01"
-                              name="CNTAEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action A"
-                              mask="0x0E"
-                              name="EVACTA"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTA"/>
-                    <bitfield caption="Count on Event Input B"
-                              mask="0x10"
-                              name="CNTBEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action B"
-                              mask="0xE0"
-                              name="EVACTB"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTB"/>
+                <register caption="Event Control" initval="0x00" modes="SINGLE" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input A" mask="0x01" name="CNTAEI" rw="RW"/>
+                    <bitfield caption="Event Action A" mask="0x0E" name="EVACTA" rw="RW" values="TCA_SINGLE_EVACTA"/>
+                    <bitfield caption="Count on Event Input B" mask="0x10" name="CNTBEI" rw="RW"/>
+                    <bitfield caption="Event Action B" mask="0xE0" name="EVACTB" rw="RW" values="TCA_SINGLE_EVACTB"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" modes="SINGLE" name="INTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" modes="SINGLE" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SINGLE" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary data for 16-bit Access"
-                          modes="SINGLE"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          modes="SINGLE"
-                          name="CNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period"
-                          modes="SINGLE"
-                          name="PER"
-                          offset="0x26"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0"
-                          modes="SINGLE"
-                          name="CMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1"
-                          modes="SINGLE"
-                          name="CMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2"
-                          modes="SINGLE"
-                          name="CMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period Buffer"
-                          modes="SINGLE"
-                          name="PERBUF"
-                          offset="0x36"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0 Buffer"
-                          modes="SINGLE"
-                          name="CMP0BUF"
-                          offset="0x38"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1 Buffer"
-                          modes="SINGLE"
-                          name="CMP1BUF"
-                          offset="0x3A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2 Buffer"
-                          modes="SINGLE"
-                          name="CMP2BUF"
-                          offset="0x3C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary data for 16-bit Access" modes="SINGLE" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Count" modes="SINGLE" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Period" modes="SINGLE" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Compare 0" modes="SINGLE" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 1" modes="SINGLE" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 2" modes="SINGLE" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Period Buffer" modes="SINGLE" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" modes="SINGLE" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" modes="SINGLE" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" modes="SINGLE" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" modes="SPLIT" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Enable"
-                              mask="0x01"
-                              name="LCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Enable"
-                              mask="0x02"
-                              name="LCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Enable"
-                              mask="0x04"
-                              name="LCMP2EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Enable"
-                              mask="0x10"
-                              name="HCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Enable"
-                              mask="0x20"
-                              name="HCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Enable"
-                              mask="0x40"
-                              name="HCMP2EN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" modes="SPLIT" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Enable" mask="0x01" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x02" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x04" name="LCMP2EN" rw="RW"/>
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Output Value"
-                              mask="0x01"
-                              name="LCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Output Value"
-                              mask="0x02"
-                              name="LCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Output Value"
-                              mask="0x04"
-                              name="LCMP2OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Output Value"
-                              mask="0x10"
-                              name="HCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Output Value"
-                              mask="0x20"
-                              name="HCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Output Value"
-                              mask="0x40"
-                              name="HCMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SPLIT" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x01" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x02" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x04" name="LCMP2OV" rw="RW"/>
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SPLIT" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Clear" initval="0x00" modes="SPLIT" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Set" initval="0x00" modes="SPLIT" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Enable"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Enable"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Enable"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Enable"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Enable"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" modes="SPLIT" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Flag"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Flag"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Flag"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Flag"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Flag"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" modes="SPLIT" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SPLIT" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Low Count"
-                          modes="SPLIT"
-                          name="LCNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Count"
-                          modes="SPLIT"
-                          name="HCNT"
-                          offset="0x21"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Period"
-                          modes="SPLIT"
-                          name="LPER"
-                          offset="0x26"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Period"
-                          modes="SPLIT"
-                          name="HPER"
-                          offset="0x27"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP0"
-                          offset="0x29"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP1"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP2"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Low Count" modes="SPLIT" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="High Count" modes="SPLIT" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="Low Period" modes="SPLIT" name="LPER" offset="0x26" rw="RW" size="1"/>
+                <register caption="High Period" modes="SPLIT" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
             </register-group>
             <value-group caption="Clock Selection" name="TCA_SINGLE_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5238,12 +2320,8 @@
                 <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
                 <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
                 <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
-                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM"
-                       name="DSBOTH"
-                       value="0x06"/>
-                <value caption="Dual Slope PWM, overflow on BOTTOM"
-                       name="DSBOTTOM"
-                       value="0x07"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
             </value-group>
             <value-group caption="Command select" name="TCA_SINGLE_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
@@ -5256,31 +2334,17 @@
                 <value caption="Count down" name="DOWN" value="0x1"/>
             </value-group>
             <value-group caption="Event Action A select" name="TCA_SINGLE_EVACTA">
-                <value caption="Count on positive edge event"
-                       name="CNT_POSEDGE"
-                       value="0x00"/>
+                <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
-                <value caption="Count on prescaled clock while event line is 1."
-                       name="CNT_HIGHLVL"
-                       value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
+                <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
-                <value caption="Restart counter at positive edge event"
-                       name="RESTART_POSEDGE"
-                       value="0x04"/>
-                <value caption="Restart counter on any edge event"
-                       name="RESTART_ANYEDGE"
-                       value="0x05"/>
-                <value caption="Restart counter while event line is 1."
-                       name="RESTART_HIGHLVL"
-                       value="0x06"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+                <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
+                <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
+                <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
             </value-group>
             <value-group caption="Clock Selection" name="TCA_SPLIT_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5300,107 +2364,46 @@
             </value-group>
             <value-group caption="Command Enable select" name="TCA_SPLIT_CMDEN">
                 <value caption="None" name="NONE" value="0x0"/>
-                <value caption="Both low byte and high byte counter"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Both low byte and high byte counter" name="BOTH" value="0x3"/>
             </value-group>
         </module>
         <module caption="16-bit Timer Type B" id="tmr_16b_capture_v1" name="TCB">
             <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Select"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCB_CLKSEL"/>
+                    <bitfield caption="Clock Select" mask="0x0E" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
                     <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
                     <bitfield caption="Cascade two timers" mask="0x20" name="CASCADE" rw="RW"/>
                     <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control Register B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Timer Mode"
-                              mask="0x07"
-                              name="CNTMODE"
-                              rw="RW"
-                              values="TCB_CNTMODE"/>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Timer Mode" mask="0x07" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
                     <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
                     <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
                     <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Event Input Enable" mask="0x01" name="CAPTEI" rw="RW"/>
                     <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
-                    <bitfield caption="Input Capture Noise Cancellation Filter"
-                              mask="0x40"
-                              name="FILTER"
-                              rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
                     <bitfield caption="Run" mask="0x01" name="RUN" rw="R"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Value"
-                          name="TEMP"
-                          offset="0x9"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          initval="0x0000"
-                          name="CNT"
-                          offset="0xA"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare or Capture"
-                          name="CCMP"
-                          offset="0xC"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock Select" name="TCB_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5412,247 +2415,78 @@
                 <value caption="Periodic Interrupt" name="INT" value="0x00"/>
                 <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
                 <value caption="Input Capture Event" name="CAPT" value="0x02"/>
-                <value caption="Input Capture Frequency measurement"
-                       name="FRQ"
-                       value="0x03"/>
-                <value caption="Input Capture Pulse-Width measurement"
-                       name="PW"
-                       value="0x04"/>
-                <value caption="Input Capture Frequency and Pulse-Width measurement"
-                       name="FRQPW"
-                       value="0x05"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
                 <value caption="Single Shot" name="SINGLE" value="0x06"/>
                 <value caption="8-bit PWM" name="PWM8" value="0x07"/>
             </value-group>
         </module>
         <module caption="Timer Counter D" id="tmr_12b_psc_v1" name="TCD">
             <register-group caption="Timer Counter D" name="TCD" size="0x40">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler"
-                              mask="0x06"
-                              name="SYNCPRES"
-                              rw="RW"
-                              values="TCD_SYNCPRES"/>
-                    <bitfield caption="Counter prescaler"
-                              mask="0x18"
-                              name="CNTPRES"
-                              rw="RW"
-                              values="TCD_CNTPRES"/>
-                    <bitfield caption="Clock select"
-                              mask="0x60"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCD_CLKSEL"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x06" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+                    <bitfield caption="Counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+                    <bitfield caption="Clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x03"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCD_WGMODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x03" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare output value override"
-                              mask="0x01"
-                              name="CMPOVR"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare output value override" mask="0x01" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Auto update" mask="0x02" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Fifty percent waveform"
-                              mask="0x08"
-                              name="FIFTY"
-                              rw="RW"/>
-                    <bitfield caption="Compare C output select"
-                              mask="0x40"
-                              name="CMPCSEL"
-                              rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select"
-                              mask="0x80"
-                              name="CMPDSEL"
-                              rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Fifty percent waveform" mask="0x08" name="FIFTY" rw="RW"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x0F" name="CMPAVAL" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0xF0" name="CMPBVAL" rw="RW"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronize end of cycle strobe"
-                              mask="0x01"
-                              name="SYNCEOC"
-                              rw="RW"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Synchronize end of cycle strobe" mask="0x01" name="SYNCEOC" rw="RW"/>
                     <bitfield caption="synchronize strobe" mask="0x02" name="SYNC" rw="RW"/>
                     <bitfield caption="Restart strobe" mask="0x04" name="RESTART" rw="RW"/>
-                    <bitfield caption="Software Capture A Strobe"
-                              mask="0x08"
-                              name="SCAPTUREA"
-                              rw="RW"/>
-                    <bitfield caption="Software Capture B Strobe"
-                              mask="0x10"
-                              name="SCAPTUREB"
-                              rw="RW"/>
-                    <bitfield caption="Disable at end of cycle"
-                              mask="0x80"
-                              name="DISEOC"
-                              rw="RW"/>
+                    <bitfield caption="Software Capture A Strobe" mask="0x08" name="SCAPTUREA" rw="RW"/>
+                    <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+                    <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
                 </register>
-                <register caption="EVCTRLA"
-                          initval="0x00"
-                          name="EVCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="EVCTRLB"
-                          initval="0x00"
-                          name="EVCTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Enable ready" mask="0x01" name="ENRDY" rw="R"/>
                     <bitfield caption="Command ready" mask="0x02" name="CMDRDY" rw="R"/>
                     <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
                     <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
                 </register>
-                <register caption="Input Control A"
-                          initval="0x00"
-                          name="INPUTCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Input Control B"
-                          initval="0x00"
-                          name="INPUTCTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Fault Control"
-                          initval="0x00"
-                          name="FAULTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x01" name="CMPA" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0x02" name="CMPB" rw="RW"/>
                     <bitfield caption="Compare C value" mask="0x04" name="CMPC" rw="RW"/>
@@ -5662,100 +2496,33 @@
                     <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
                     <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
                 </register>
-                <register caption="Delay Control"
-                          initval="0x00"
-                          name="DLYCTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Delay select"
-                              mask="0x03"
-                              name="DLYSEL"
-                              rw="RW"
-                              values="TCD_DLYSEL"/>
-                    <bitfield caption="Delay trigger"
-                              mask="0x0C"
-                              name="DLYTRIG"
-                              rw="RW"
-                              values="TCD_DLYTRIG"/>
-                    <bitfield caption="Delay prescaler"
-                              mask="0x30"
-                              name="DLYPRESC"
-                              rw="RW"
-                              values="TCD_DLYPRESC"/>
+                <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Delay select" mask="0x03" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+                    <bitfield caption="Delay trigger" mask="0x0C" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+                    <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
                 </register>
-                <register caption="Delay value"
-                          initval="0x00"
-                          name="DLYVAL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Delay value" mask="0xFF" name="DLYVAL" rw="RW"/>
                 </register>
-                <register caption="Dither Control A"
-                          initval="0x00"
-                          name="DITCTRL"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Dither select"
-                              mask="0x03"
-                              name="DITHERSEL"
-                              rw="RW"
-                              values="TCD_DITHERSEL"/>
+                <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Dither select" mask="0x03" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
                 </register>
-                <register caption="Dither value"
-                          initval="0x00"
-                          name="DITVAL"
-                          offset="0x19"
-                          rw="RW"
-                          size="1">
+                <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
                     <bitfield caption="Dither value" mask="0x0F" name="DITHER" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                     <bitfield caption="Fault detection" mask="0x04" name="FAULTDET" rw="RW"/>
                 </register>
-                <register caption="Capture A"
-                          name="CAPTUREA"
-                          offset="0x22"
-                          rw="R"
-                          size="2"/>
-                <register caption="Capture B"
-                          name="CAPTUREB"
-                          offset="0x24"
-                          rw="R"
-                          size="2"/>
-                <register caption="Compare A Set"
-                          name="CMPASET"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare A Clear"
-                          name="CMPACLR"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Set"
-                          name="CMPBSET"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Clear"
-                          name="CMPBCLR"
-                          offset="0x2E"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+                <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+                <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock select" name="TCD_CLKSEL">
-                <value caption="Internal High-Frequency oscillator"
-                       name="OSCHF"
-                       value="0x00"/>
+                <value caption="Internal High-Frequency oscillator" name="OSCHF" value="0x00"/>
                 <value caption="PLL" name="PLL" value="0x01"/>
                 <value caption="External Clock" name="EXTCLK" value="0x02"/>
                 <value caption="Peripheral clock" name="CLKPER" value="0x03"/>
@@ -5766,18 +2533,10 @@
                 <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
             </value-group>
             <value-group caption="Synchronization prescaler select" name="TCD_SYNCPRES">
-                <value caption="Selected clock source divided by 1"
-                       name="DIV1"
-                       value="0x00"/>
-                <value caption="Selected clock source divided by 2"
-                       name="DIV2"
-                       value="0x01"/>
-                <value caption="Selected clock source divided by 4"
-                       name="DIV4"
-                       value="0x02"/>
-                <value caption="Selected clock source divided by 8"
-                       name="DIV8"
-                       value="0x03"/>
+                <value caption="Selected clock source divided by 1" name="DIV1" value="0x00"/>
+                <value caption="Selected clock source divided by 2" name="DIV2" value="0x01"/>
+                <value caption="Selected clock source divided by 4" name="DIV4" value="0x02"/>
+                <value caption="Selected clock source divided by 8" name="DIV8" value="0x03"/>
             </value-group>
             <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
                 <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
@@ -5818,176 +2577,63 @@
             </value-group>
             <value-group caption="Event action select" name="TCD_ACTION">
                 <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
-                <value caption="Event trigger a fault and capture"
-                       name="CAPTURE"
-                       value="0x1"/>
+                <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
             </value-group>
             <value-group caption="Event config select" name="TCD_CFG">
-                <value caption="Neither Filter nor Asynchronous Event is enabled"
-                       name="NEITHER"
-                       value="0x0"/>
-                <value caption="Input Capture Noise Cancellation Filter enabled"
-                       name="FILTER"
-                       value="0x1"/>
-                <value caption="Asynchronous Event output qualification enabled"
-                       name="ASYNC"
-                       value="0x2"/>
+                <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+                <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+                <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="Edge select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW"
-                       value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH"
-                       value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
-                <value caption="Stop output, jump to opposite compare cycle and wait"
-                       name="JMPWAIT"
-                       value="0x01"/>
-                <value caption="Stop output, execute opposite compare cycle and wait"
-                       name="EXECWAIT"
-                       value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active"
-                       name="EXECFAULT"
-                       value="0x03"/>
-                <value caption="Stop all outputs, maintain frequency"
-                       name="FREQ"
-                       value="0x04"/>
-                <value caption="Stop all outputs, execute dead time while fault active"
-                       name="EXECDT"
-                       value="0x05"/>
-                <value caption="Stop all outputs, jump to next compare cycle and wait"
-                       name="WAIT"
-                       value="0x06"/>
-                <value caption="Stop all outputs, wait for software action"
-                       name="WAITSW"
-                       value="0x07"/>
-                <value caption="Stop output on edge, jump to next compare cycle"
-                       name="EDGETRIG"
-                       value="0x08"/>
-                <value caption="Stop output on edge, maintain frequency"
-                       name="EDGETRIGFREQ"
-                       value="0x09"/>
-                <value caption="Stop output at level, maintain frequency"
-                       name="LVLTRIGFREQ"
-                       value="0x0A"/>
+                <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
+                <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
+                <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
+                <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
+                <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
+                <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x07"/>
+                <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x08"/>
+                <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x09"/>
+                <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0x0A"/>
             </value-group>
         </module>
         <module caption="Two-Wire Interface" id="i2c_8bit_avr_v3" name="TWI">
             <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="SDA Setup Time"
-                              mask="0x10"
-                              name="SDASETUP"
-                              rw="RW"
-                              values="TWI_SDASETUP"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Dual Mode Control"
-                          initval="0x00"
-                          name="DUALCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
+                <register caption="Dual Mode Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Debug Run"
-                              mask="0x01"
-                              name="DBGRUN"
-                              rw="RW"
-                              values="TWI_DBGRUN"/>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW" values="TWI_DBGRUN"/>
                 </register>
-                <register caption="Host Control A"
-                          initval="0x00"
-                          name="MCTRLA"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Inactive Bus Time-Out"
-                              mask="0x0C"
-                              name="TIMEOUT"
-                              rw="RW"
-                              values="TWI_TIMEOUT"/>
+                    <bitfield caption="Inactive Bus Time-Out" mask="0x0C" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
                     <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
-                    <bitfield caption="Write Interrupt Enable"
-                              mask="0x40"
-                              name="WIEN"
-                              rw="RW"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
                     <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
                 </register>
-                <register caption="Host Control B"
-                          initval="0x00"
-                          name="MCTRLB"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="MCMD"
-                              rw="RW"
-                              values="TWI_MCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Host Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                     <bitfield caption="Flush" mask="0x08" name="FLUSH" rw="RW"/>
                 </register>
-                <register caption="Host STATUS"
-                          initval="0x00"
-                          name="MSTATUS"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bus State"
-                              mask="0x03"
-                              name="BUSSTATE"
-                              rw="RW"
-                              values="TWI_BUSSTATE"/>
+                <register caption="Host STATUS" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
@@ -5995,147 +2641,69 @@
                     <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
                     <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
                 </register>
-                <register caption="Host Baud Rate"
-                          initval="0x00"
-                          name="MBAUD"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Baud Rate" initval="0x00" name="MBAUD" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Baud Rate" mask="0xFF" name="BAUD" rw="RW"/>
                 </register>
-                <register caption="Host Address"
-                          initval="0x00"
-                          name="MADDR"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Address" initval="0x00" name="MADDR" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Host Data"
-                          initval="0x00"
-                          name="MDATA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Data" initval="0x00" name="MDATA" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Control A"
-                          initval="0x00"
-                          name="SCTRLA"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Address Recognition Mode"
-                              mask="0x04"
-                              name="PMEN"
-                              rw="RW"/>
+                    <bitfield caption="Address Recognition Mode" mask="0x04" name="PMEN" rw="RW"/>
                     <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Enable"
-                              mask="0x40"
-                              name="APIEN"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
                     <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
                 </register>
-                <register caption="Client Control B"
-                          initval="0x00"
-                          name="SCTRLB"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="SCMD"
-                              rw="RW"
-                              values="TWI_SCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Client Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                 </register>
-                <register caption="Client Status"
-                          initval="0x00"
-                          name="SSTATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Address or Stop"
-                              mask="0x01"
-                              name="AP"
-                              rw="RW"
-                              values="TWI_AP"/>
+                <register caption="Client Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Address or Stop" mask="0x01" name="AP" rw="RW" values="TWI_AP"/>
                     <bitfield caption="Read/Write Direction" mask="0x02" name="DIR" rw="RW"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Collision" mask="0x08" name="COLL" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
                     <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Flag"
-                              mask="0x40"
-                              name="APIF"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
                     <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
                 </register>
-                <register caption="Client Address"
-                          initval="0x00"
-                          name="SADDR"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address" initval="0x00" name="SADDR" offset="0xC" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Client Data"
-                          initval="0x00"
-                          name="SDATA"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Data" initval="0x00" name="SDATA" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Address Mask"
-                          initval="0x00"
-                          name="SADDRMASK"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address Mask" initval="0x00" name="SADDRMASK" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Address Mask Enable" mask="0x01" name="ADDREN" rw="RW"/>
                     <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Fast-mode Plus Enable select" name="TWI_FMPEN">
-                <value caption="Operating in Standard-mode or Fast-mode"
-                       name="OFF"
-                       value="0x0"/>
+                <value caption="Operating in Standard-mode or Fast-mode" name="OFF" value="0x0"/>
                 <value caption="Operating in Fast-mode Plus" name="ON" value="0x1"/>
             </value-group>
             <value-group caption="Input voltage transition level select" name="TWI_INPUTLVL">
                 <value caption="I2C input voltage transition level" name="I2C" value="0x0"/>
-                <value caption="SMBus 3.0 input voltage transition level"
-                       name="SMBUS"
-                       value="0x1"/>
+                <value caption="SMBus 3.0 input voltage transition level" name="SMBUS" value="0x1"/>
             </value-group>
             <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
                 <value caption="No SDA Hold Delay" name="OFF" value="0x0"/>
                 <value caption="Short SDA hold time" name="50NS" value="0x1"/>
-                <value caption="Meets SMBUS 2.0 specification under typical conditions"
-                       name="300NS"
-                       value="0x2"/>
-                <value caption="Meets SMBUS 2.0 specificaiton across all corners"
-                       name="500NS"
-                       value="0x3"/>
+                <value caption="Meets SMBUS 2.0 specification under typical conditions" name="300NS" value="0x2"/>
+                <value caption="Meets SMBUS 2.0 specificaiton across all corners" name="500NS" value="0x3"/>
             </value-group>
             <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
                 <value caption="SDA setup time is four clock cycles" name="4CYC" value="0"/>
                 <value caption="SDA setup time is eight clock cycle" name="8CYC" value="1"/>
             </value-group>
             <value-group caption="Debug Run select" name="TWI_DBGRUN">
-                <value caption="The peripheral is halted in Break Debug mode and ignores events"
-                       name="HALT"
-                       value="0"/>
-                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted"
-                       name="RUN"
-                       value="1"/>
+                <value caption="The peripheral is halted in Break Debug mode and ignores events" name="HALT" value="0"/>
+                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted" name="RUN" value="1"/>
             </value-group>
             <value-group caption="Inactive Bus Time-Out select" name="TWI_TIMEOUT">
                 <value caption="Bus time-out disabled. I2C." name="DISABLED" value="0"/>
@@ -6149,15 +2717,9 @@
             </value-group>
             <value-group caption="Command select" name="TWI_MCMD">
                 <value caption="No action" name="NOACT" value="0"/>
-                <value caption="Execute Acknowledge Action followed by repeated Start."
-                       name="REPSTART"
-                       value="1"/>
-                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR."
-                       name="RECVTRANS"
-                       value="2"/>
-                <value caption="Execute Acknowledge Action followed by issuing a Stop condition."
-                       name="STOP"
-                       value="3"/>
+                <value caption="Execute Acknowledge Action followed by repeated Start." name="REPSTART" value="1"/>
+                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR." name="RECVTRANS" value="2"/>
+                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP" value="3"/>
             </value-group>
             <value-group caption="Bus State select" name="TWI_BUSSTATE">
                 <value caption="Unknown bus state" name="UNKNOWN" value="0"/>
@@ -6168,254 +2730,81 @@
             <value-group caption="Command select" name="TWI_SCMD">
                 <value caption="No Action" name="NOACT" value="0"/>
                 <value caption="Complete transaction" name="COMPTRANS" value="2"/>
-                <value caption="Used in response to an interrupt"
-                       name="RESPONSE"
-                       value="3"/>
+                <value caption="Used in response to an interrupt" name="RESPONSE" value="3"/>
             </value-group>
             <value-group caption="Address or Stop select" name="TWI_AP">
-                <value caption="A Stop condition generated the interrupt on APIF flag"
-                       name="STOP"
-                       value="0"/>
-                <value caption="Address detection generated the interrupt on APIF flag"
-                       name="ADR"
-                       value="1"/>
+                <value caption="A Stop condition generated the interrupt on APIF flag" name="STOP" value="0"/>
+                <value caption="Address detection generated the interrupt on APIF flag" name="ADR" value="1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                            name="USART"
-                            size="0x10">
-                <register caption="Receive Data Low Byte"
-                          initval="0x00"
-                          name="RXDATAL"
-                          offset="0x0"
-                          rw="R"
-                          size="1">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xFF" name="DATA" rw="R"/>
                 </register>
-                <register caption="Receive Data High Byte"
-                          initval="0x00"
-                          name="RXDATAH"
-                          offset="0x1"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="Receiver Data Register"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="R"/>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Receiver Data Register" mask="0x01" name="DATA8" rw="R"/>
                     <bitfield caption="Parity Error" mask="0x02" name="PERR" rw="R"/>
                     <bitfield caption="Frame Error" mask="0x04" name="FERR" rw="R"/>
                     <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Transmit Data Low Byte"
-                          initval="0x00"
-                          name="TXDATAL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register"
-                              mask="0xFF"
-                              name="DATA"
-                              rw="RW"/>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Transmit Data High Byte"
-                          initval="0x00"
-                          name="TXDATAH"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="RW"/>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x01" name="DATA8" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Wait For Break" mask="0x01" name="WFB" rw="RW"/>
                     <bitfield caption="Break Detected Flag" mask="0x02" name="BDF" rw="RW"/>
-                    <bitfield caption="Inconsistent Sync Field Interrupt Flag"
-                              mask="0x08"
-                              name="ISFIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Start Interrupt"
-                              mask="0x10"
-                              name="RXSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Flag"
-                              mask="0x20"
-                              name="DREIF"
-                              rw="R"/>
-                    <bitfield caption="Transmit Interrupt Flag"
-                              mask="0x40"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x08" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="RS485 Mode internal transmitter"
-                              mask="0x01"
-                              name="RS485"
-                              rw="RW"
-                              values="USART_RS485"/>
-                    <bitfield caption="Auto-baud Error Interrupt Enable"
-                              mask="0x04"
-                              name="ABEIE"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x01" name="RS485" rw="RW" values="USART_RS485"/>
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x04" name="ABEIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x08" name="LBME" rw="RW"/>
-                    <bitfield caption="Receiver Start Frame Interrupt Enable"
-                              mask="0x10"
-                              name="RXSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transmit Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multi-processor Communication Mode"
-                              mask="0x01"
-                              name="MPCM"
-                              rw="RW"/>
-                    <bitfield caption="Receiver Mode"
-                              mask="0x06"
-                              name="RXMODE"
-                              rw="RW"
-                              values="USART_RXMODE"/>
-                    <bitfield caption="Open Drain Mode Enable"
-                              mask="0x08"
-                              name="ODME"
-                              rw="RW"/>
-                    <bitfield caption="Start Frame Detection Enable"
-                              mask="0x10"
-                              name="SFDEN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x06" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x08" name="ODME" rw="RW"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
                     <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
                     <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x03"
-                          name="CTRLC"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="USART.CTRLC.CMODE" value="0x00 0x01 0x02"/>
                     <mode name="MSPI" qualifier="USART.CTRLC.CMODE" value="0x03"/>
-                    <bitfield caption="Communication Mode"
-                              mask="0xC0"
-                              name="CMODE"
-                              rw="RW"
-                              values="USART_CMODE"/>
-                    <bitfield caption="SPI Host Mode, Clock Phase"
-                              mask="0x02"
-                              modes="MSPI"
-                              name="UCPHA"
-                              rw="RW"/>
-                    <bitfield caption="SPI Host Mode, Data Order"
-                              mask="0x04"
-                              modes="MSPI"
-                              name="UDORD"
-                              rw="RW"/>
-                    <bitfield caption="Character Size"
-                              mask="0x07"
-                              modes="NORMAL"
-                              name="CHSIZE"
-                              rw="RW"
-                              values="USART_NORMAL_CHSIZE"/>
-                    <bitfield caption="Stop Bit Mode"
-                              mask="0x08"
-                              modes="NORMAL"
-                              name="SBMODE"
-                              rw="RW"
-                              values="USART_NORMAL_SBMODE"/>
-                    <bitfield caption="Parity Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="PMODE"
-                              rw="RW"
-                              values="USART_NORMAL_PMODE"/>
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" rw="RW" values="USART_CMODE"/>
+                    <bitfield caption="SPI Host Mode, Clock Phase" mask="0x02" modes="MSPI" name="UCPHA" rw="RW"/>
+                    <bitfield caption="SPI Host Mode, Data Order" mask="0x04" modes="MSPI" name="UDORD" rw="RW"/>
+                    <bitfield caption="Character Size" mask="0x07" modes="NORMAL" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" modes="NORMAL" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" modes="NORMAL" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
                 </register>
-                <register caption="Baud Rate"
-                          initval="0x0000"
-                          name="BAUD"
-                          offset="0x8"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Auto Baud Window"
-                              mask="0xC0"
-                              name="ABW"
-                              rw="RW"
-                              values="USART_ABW"/>
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xC0" name="ABW" rw="RW" values="USART_ABW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="IrDA Event Input Enable"
-                              mask="0x01"
-                              name="IREI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x01" name="IREI" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control"
-                          initval="0x00"
-                          name="TXPLCTRL"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xFF" name="TXPL" rw="RW"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control"
-                          initval="0x00"
-                          name="RXPLCTRL"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7F" name="RXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -6440,12 +2829,8 @@
                 <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
                 <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
                 <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
-                <value caption="Character size: 9 bit read low byte first"
-                       name="9BITL"
-                       value="0x06"/>
-                <value caption="Character size: 9 bit read high byte first"
-                       name="9BITH"
-                       value="0x07"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
             </value-group>
             <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
                 <value caption="No Parity" name="DISABLED" value="0x00"/>
@@ -6465,234 +2850,62 @@
         </module>
         <module caption="User Row" id="avrdd" name="USERROW">
             <register-group caption="User Row" name="USERROW" size="0x20">
-                <register caption="User Row Byte 0"
-                          name="USERROW0"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 1"
-                          name="USERROW1"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 2"
-                          name="USERROW2"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 3"
-                          name="USERROW3"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 4"
-                          name="USERROW4"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 5"
-                          name="USERROW5"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 6"
-                          name="USERROW6"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 7"
-                          name="USERROW7"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 8"
-                          name="USERROW8"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 9"
-                          name="USERROW9"
-                          offset="0x09"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 10"
-                          name="USERROW10"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 11"
-                          name="USERROW11"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 12"
-                          name="USERROW12"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 13"
-                          name="USERROW13"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 14"
-                          name="USERROW14"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 15"
-                          name="USERROW15"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 16"
-                          name="USERROW16"
-                          offset="0x10"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 17"
-                          name="USERROW17"
-                          offset="0x11"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 18"
-                          name="USERROW18"
-                          offset="0x12"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 19"
-                          name="USERROW19"
-                          offset="0x13"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 20"
-                          name="USERROW20"
-                          offset="0x14"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 21"
-                          name="USERROW21"
-                          offset="0x15"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 22"
-                          name="USERROW22"
-                          offset="0x16"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 23"
-                          name="USERROW23"
-                          offset="0x17"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 24"
-                          name="USERROW24"
-                          offset="0x18"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 25"
-                          name="USERROW25"
-                          offset="0x19"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 26"
-                          name="USERROW26"
-                          offset="0x1A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 27"
-                          name="USERROW27"
-                          offset="0x1B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 28"
-                          name="USERROW28"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 29"
-                          name="USERROW29"
-                          offset="0x1D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 30"
-                          name="USERROW30"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 31"
-                          name="USERROW31"
-                          offset="0x1F"
-                          rw="RW"
-                          size="1"/>
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Virtual Ports" id="gpio_ports_avr_v2_vport" name="VPORT">
             <register-group caption="Virtual Ports" name="VPORT" size="0x4">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Voltage reference" id="avrdd" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
-                <register caption="ADC0 Reference"
-                          initval="0x00"
-                          name="ADC0REF"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="ADC0 Reference" initval="0x00" name="ADC0REF" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="DAC0 Reference"
-                          initval="0x00"
-                          name="DAC0REF"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="DAC0 Reference" initval="0x00" name="DAC0REF" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="AC Reference"
-                          initval="0x00"
-                          name="ACREF"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="AC Reference" initval="0x00" name="ACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
             </register-group>
@@ -6707,33 +2920,12 @@
         </module>
         <module caption="Watch-Dog Timer" id="wdt_windowed_v2" name="WDT">
             <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="WDT_PERIOD"/>
-                    <bitfield caption="Window"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="WDT_WINDOW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x0F" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xF0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Syncronization busy"
-                              mask="0x01"
-                              name="SYNCBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY" rw="R"/>
                     <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
                 </register>
             </register-group>
@@ -6768,60 +2960,25 @@
         </module>
         <module caption="Zero Cross Detect" id="cmp_zxover_ctrl_v3" name="ZCD">
             <register-group caption="Zero Cross Detect" name="ZCD" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Invert signal from pin"
-                              mask="0x08"
-                              name="INVERT"
-                              rw="RW"/>
+                    <bitfield caption="Invert signal from pin" mask="0x08" name="INVERT" rw="RW"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x03"
-                              name="INTMODE"
-                              rw="RW"
-                              values="ZCD_INTMODE"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x03" name="INTMODE" rw="RW" values="ZCD_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="ZCD Interrupt Flag" mask="0x01" name="CROSSIF" rw="RW"/>
-                    <bitfield caption="ZCD State"
-                              mask="0x10"
-                              name="STATE"
-                              rw="R"
-                              values="ZCD_STATE"/>
+                    <bitfield caption="ZCD State" mask="0x10" name="STATE" rw="R" values="ZCD_STATE"/>
                 </register>
             </register-group>
             <value-group caption="Interrupt Mode select" name="ZCD_INTMODE">
                 <value caption="No interrupt" name="NONE" value="0x0"/>
-                <value caption="Interrupt on rising input signal"
-                       name="RISING"
-                       value="0x1"/>
-                <value caption="Interrupt on falling input signal"
-                       name="FALLING"
-                       value="0x2"/>
-                <value caption="Interrupt on both rising and falling input signal"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Interrupt on rising input signal" name="RISING" value="0x1"/>
+                <value caption="Interrupt on falling input signal" name="FALLING" value="0x2"/>
+                <value caption="Interrupt on both rising and falling input signal" name="BOTH" value="0x3"/>
             </value-group>
             <value-group caption="ZCD State select" name="ZCD_STATE">
                 <value caption="Output is 0" name="LOW" value="0x0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD28.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD28.xml
index e20e3fb6..f973935a 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD28.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD28.xml
@@ -1,105 +1,29 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR16DD28"
-                 package="SOIC28"
-                 pinout="SOIC28MVIO"
-                 speedmax="32000000"
-                 tempmax="125"
-                 tempmin="-40"
-                 vccmax="5.5"
-                 vccmin="1.8"/>
+        <variant ordercode="AVR16DD28" package="SOIC28" pinout="SOIC28MVIO" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR16DD28" family="AVR8" architecture="AVR8X" avr-family="AVR DD">
         <address-spaces>
-            <address-space endianness="little"
-                           id="data"
-                           name="data"
-                           size="0x10000"
-                           start="0x0000">
-                <memory-segment exec="0"
-                                name="IO"
-                                rw="RW"
-                                size="0x103F"
-                                start="0x00"
-                                type="io"/>
-                <memory-segment exec="0"
-                                name="LOCKBITS"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x04"
-                                start="0x1040"
-                                type="lockbits"/>
-                <memory-segment exec="0"
-                                name="FUSES"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x10"
-                                start="0x1050"
-                                type="fuses"/>
-                <memory-segment exec="0"
-                                name="USER_SIGNATURES"
-                                pagesize="0x20"
-                                rw="RW"
-                                size="0x20"
-                                start="0x1080"
-                                type="user_signatures"/>
-                <memory-segment exec="0"
-                                name="SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x03"
-                                start="0x1100"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="PROD_SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x7D"
-                                start="0x1103"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="EEPROM"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x100"
-                                start="0x1400"
-                                type="eeprom"/>
-                <memory-segment exec="0"
-                                name="INTERNAL_SRAM"
-                                rw="RW"
-                                size="0x800"
-                                start="0x7800"
-                                type="ram"/>
-                <memory-segment exec="0"
-                                name="MAPPED_PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x4000"
-                                start="0x8000"
-                                type="other"/>
+            <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+                <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00" type="io"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x04" start="0x1040" type="lockbits"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x1050" type="fuses"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x1080" type="user_signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x03" start="0x1100" type="signatures"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x1103" type="signatures"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x100" start="0x1400" type="eeprom"/>
+                <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x800" start="0x7800" type="ram"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x4000" start="0x8000" type="other"/>
             </address-space>
-            <address-space endianness="little"
-                           id="prog"
-                           name="prog"
-                           size="0x4000"
-                           start="0x0000">
-                <memory-segment exec="1"
-                                name="PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x4000"
-                                start="0x00"
-                                type="flash"/>
+            <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x4000" start="0x00" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
             <module id="cmp_control_v8" name="AC">
                 <instance name="AC0">
-                    <register-group address-space="data"
-                                    name="AC0"
-                                    name-in-module="AC"
-                                    offset="0x0680"/>
+                    <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
                     <signals>
                         <signal function="AC0" group="N" index="0" pad="PD3"/>
                         <signal function="AC0" group="N" index="2" pad="PD7"/>
@@ -107,20 +31,13 @@
                         <signal function="AC0" group="P" index="0" pad="PD2"/>
                         <signal function="AC0" group="P" index="3" pad="PD6"/>
                         <signal function="AC0" group="P" index="4" pad="PC3"/>
-                        <signal field="PORTMUX.ACROUTEA.AC0"
-                                function="AC0"
-                                group="OUT"
-                                index="0"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ACROUTEA.AC0" function="AC0" group="OUT" index="0" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
             <module id="adc_12b_diff_ctrl_v1" name="ADC">
                 <instance name="ADC0">
-                    <register-group address-space="data"
-                                    name="ADC0"
-                                    name-in-module="ADC"
-                                    offset="0x0600"/>
+                    <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
                     <signals>
                         <signal function="AIN0" group="AIN" index="1" pad="PD1"/>
                         <signal function="AIN0" group="AIN" index="2" pad="PD2"/>
@@ -146,143 +63,42 @@
             </module>
             <module id="bor_lvd_ctrl_v1" name="BOD">
                 <instance name="BOD">
-                    <register-group address-space="data"
-                                    name="BOD"
-                                    name-in-module="BOD"
-                                    offset="0x00A0"/>
+                    <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x00A0"/>
                 </instance>
             </module>
             <module id="cla_ccl_v1" name="CCL">
                 <instance name="CCL">
-                    <register-group address-space="data"
-                                    name="CCL"
-                                    name-in-module="CCL"
-                                    offset="0x01C0"/>
+                    <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
                     <signals>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_OUT"
-                                index="0"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_OUT"
-                                index="0"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="0"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_OUT"
-                                index="0"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="0"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL"
-                                group="LUT2_IN"
-                                index="1"
-                                pad="PD1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL"
-                                group="LUT2_IN"
-                                index="2"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL"
-                                group="LUT2_OUT"
-                                index="0"
-                                pad="PD3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_IN"
-                                index="1"
-                                pad="PD1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_IN"
-                                index="2"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_OUT"
-                                index="0"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3"
-                                function="CCL"
-                                group="LUT3_IN"
-                                index="0"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3"
-                                function="CCL"
-                                group="LUT3_IN"
-                                index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_OUT" index="0" pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="0" pad="PC0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="1" pad="PD1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="2" pad="PD2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0" pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="CLKCTRL">
                 <instance name="CLKCTRL">
-                    <register-group address-space="data"
-                                    name="CLKCTRL"
-                                    name-in-module="CLKCTRL"
-                                    offset="0x0060"/>
+                    <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
                     <signals>
                         <signal function="CLKCTRL" group="CLKOUT" pad="PA7"/>
                         <signal function="CLKCTRL" group="EXTCLK" pad="PA0"/>
@@ -297,10 +113,7 @@
             </module>
             <module id="cpu_avr_xt_v1" name="CPU">
                 <instance name="CPU">
-                    <register-group address-space="data"
-                                    name="CPU"
-                                    name-in-module="CPU"
-                                    offset="0x0030"/>
+                    <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V4S"/>
                     </parameters>
@@ -308,26 +121,17 @@
             </module>
             <module id="int_8bit_v3" name="CPUINT">
                 <instance name="CPUINT">
-                    <register-group address-space="data"
-                                    name="CPUINT"
-                                    name-in-module="CPUINT"
-                                    offset="0x0110"/>
+                    <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
                 </instance>
             </module>
             <module id="math_pdi_crc_v1" name="CRCSCAN">
                 <instance name="CRCSCAN">
-                    <register-group address-space="data"
-                                    name="CRCSCAN"
-                                    name-in-module="CRCSCAN"
-                                    offset="0x0120"/>
+                    <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
                 </instance>
             </module>
             <module id="dac_nbit_ctrl_v5" name="DAC">
                 <instance name="DAC0">
-                    <register-group address-space="data"
-                                    name="DAC0"
-                                    name-in-module="DAC"
-                                    offset="0x06A0"/>
+                    <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
                     <signals>
                         <signal function="DAC0" group="OUT" index="0" pad="PD6"/>
                     </signals>
@@ -335,90 +139,45 @@
             </module>
             <module id="avrdd" name="EVSYS">
                 <instance name="EVSYS">
-                    <register-group address-space="data"
-                                    name="EVSYS"
-                                    name-in-module="EVSYS"
-                                    offset="0x0200"/>
+                    <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="5"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT1" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="FUSE">
                 <instance name="FUSE">
-                    <register-group address-space="data"
-                                    name="FUSE"
-                                    name-in-module="FUSE"
-                                    offset="0x1050"/>
+                    <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1050"/>
                 </instance>
             </module>
             <module id="avrdd" name="GPR">
                 <instance name="GPR">
-                    <register-group address-space="data"
-                                    name="GPR"
-                                    name-in-module="GPR"
-                                    offset="0x001C"/>
+                    <register-group address-space="data" name="GPR" name-in-module="GPR" offset="0x001C"/>
                 </instance>
             </module>
             <module id="avrdd" name="LOCK">
                 <instance name="LOCK">
-                    <register-group address-space="data"
-                                    name="LOCK"
-                                    name-in-module="LOCK"
-                                    offset="0x1040"/>
+                    <register-group address-space="data" name="LOCK" name-in-module="LOCK" offset="0x1040"/>
                 </instance>
             </module>
             <module id="io_multiv_ctrl_avr_v1" name="MVIO">
                 <instance name="MVIO">
-                    <register-group address-space="data"
-                                    name="MVIO"
-                                    name-in-module="MVIO"
-                                    offset="0x00C0"/>
+                    <register-group address-space="data" name="MVIO" name-in-module="MVIO" offset="0x00C0"/>
                 </instance>
             </module>
             <module id="nvm_ctrl_avr_v1" name="NVMCTRL">
                 <instance name="NVMCTRL">
-                    <register-group address-space="data"
-                                    name="NVMCTRL"
-                                    name-in-module="NVMCTRL"
-                                    offset="0x1000"/>
+                    <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_port" name="PORT">
                 <instance name="PORTA">
-                    <register-group address-space="data"
-                                    name="PORTA"
-                                    name-in-module="PORT"
-                                    offset="0x0400"/>
+                    <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
@@ -431,10 +190,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC">
-                    <register-group address-space="data"
-                                    name="PORTC"
-                                    name-in-module="PORT"
-                                    offset="0x0440"/>
+                    <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
@@ -443,10 +199,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD">
-                    <register-group address-space="data"
-                                    name="PORTD"
-                                    name-in-module="PORT"
-                                    offset="0x0460"/>
+                    <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
                         <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
@@ -458,10 +211,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF">
-                    <register-group address-space="data"
-                                    name="PORTF"
-                                    name-in-module="PORT"
-                                    offset="0x04A0"/>
+                    <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PF0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PF1"/>
@@ -472,18 +222,12 @@
             </module>
             <module id="avrdd" name="PORTMUX">
                 <instance name="PORTMUX">
-                    <register-group address-space="data"
-                                    name="PORTMUX"
-                                    name-in-module="PORTMUX"
-                                    offset="0x05E0"/>
+                    <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
                 </instance>
             </module>
             <module id="rst_integration_v8" name="RSTCTRL">
                 <instance name="RSTCTRL">
-                    <register-group address-space="data"
-                                    name="RSTCTRL"
-                                    name-in-module="RSTCTRL"
-                                    offset="0x0040"/>
+                    <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
                     <signals>
                         <signal function="OTHER" group="RESET" pad="PF6"/>
                     </signals>
@@ -491,552 +235,201 @@
             </module>
             <module id="tmr_16b_rtc_v1" name="RTC">
                 <instance name="RTC">
-                    <register-group address-space="data"
-                                    name="RTC"
-                                    name-in-module="RTC"
-                                    offset="0x0140"/>
+                    <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
                 </instance>
             </module>
             <module id="avrdd" name="SIGROW">
                 <instance name="SIGROW">
-                    <register-group address-space="data"
-                                    name="SIGROW"
-                                    name-in-module="SIGROW"
-                                    offset="0x1100"/>
+                    <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
                 </instance>
             </module>
             <module id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
                 <instance name="SLPCTRL">
-                    <register-group address-space="data"
-                                    name="SLPCTRL"
-                                    name-in-module="SLPCTRL"
-                                    offset="0x0050"/>
+                    <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
                 </instance>
             </module>
             <module id="spi_8bit_v2" name="SPI">
                 <instance name="SPI0">
-                    <register-group address-space="data"
-                                    name="SPI0"
-                                    name-in-module="SPI"
-                                    offset="0x0940"/>
+                    <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0940"/>
                     <signals>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="MISO"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="MOSI"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="SCK"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="SS"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MISO"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MOSI"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="SCK"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="SS"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MISO"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MOSI"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SS"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="MISO"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="MOSI"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SS"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MISO"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MOSI"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SCK"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SS"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="MISO" pad="PA5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="MOSI" pad="PA4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="SCK" pad="PA6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="SS" pad="PA7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MISO" pad="PA1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MOSI" pad="PA0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="SCK" pad="PC0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="SS" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MISO" pad="PD5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MOSI" pad="PD4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SCK" pad="PD6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SS" pad="PD7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="MISO" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="MOSI" pad="PC0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SCK" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SS" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MISO" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MOSI" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SCK" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SS" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="SYSCFG">
                 <instance name="SYSCFG">
-                    <register-group address-space="data"
-                                    name="SYSCFG"
-                                    name-in-module="SYSCFG"
-                                    offset="0x0F00"/>
+                    <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
                 </instance>
             </module>
             <module id="tmr_16b_pwm_v1" name="TCA">
                 <instance name="TCA0">
-                    <register-group address-space="data"
-                                    name="TCA0"
-                                    name-in-module="TCA"
-                                    offset="0x0A00"/>
+                    <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
                     <signals>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="3"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="4"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="5"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="0"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="3"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="1"
-                                pad="PD1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="2"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="3"
-                                pad="PD3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="4"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="5"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="0"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="3" pad="PA3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="4" pad="PA4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="5" pad="PA5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="0" pad="PC0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="3" pad="PC3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="1" pad="PD1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="2" pad="PD2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="3" pad="PD3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="4" pad="PD4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="5" pad="PD5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="0" pad="PF0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="1" pad="PF1"/>
                     </signals>
                 </instance>
             </module>
             <module id="tmr_16b_capture_v1" name="TCB">
                 <instance name="TCB0">
-                    <register-group address-space="data"
-                                    name="TCB0"
-                                    name-in-module="TCB"
-                                    offset="0x0B00"/>
+                    <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0B00"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB0"
-                                function="TCB0"
-                                group="WO"
-                                index="0"
-                                pad="PA2"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA2"/>
                     </signals>
                 </instance>
                 <instance name="TCB1">
-                    <register-group address-space="data"
-                                    name="TCB1"
-                                    name-in-module="TCB"
-                                    offset="0x0B10"/>
+                    <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0B10"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB1"
-                                function="TCB1"
-                                group="WO"
-                                index="0"
-                                pad="PA3"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
                     </signals>
                 </instance>
                 <instance name="TCB2">
-                    <register-group address-space="data"
-                                    name="TCB2"
-                                    name-in-module="TCB"
-                                    offset="0x0B20"/>
+                    <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0B20"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB2"
-                                function="TCB2"
-                                group="WO"
-                                index="0"
-                                pad="PC0"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2" group="WO" index="0" pad="PC0"/>
                     </signals>
                 </instance>
             </module>
             <module id="tmr_12b_psc_v1" name="TCD">
                 <instance name="TCD0">
-                    <register-group address-space="data"
-                                    name="TCD0"
-                                    name-in-module="TCD"
-                                    offset="0x0B80"/>
+                    <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0B80"/>
                     <signals>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOA"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOB"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOC"
-                                index="2"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOD"
-                                index="3"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT2"
-                                group="WOA"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT2"
-                                group="WOB"
-                                index="1"
-                                pad="PF1"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOA"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOB"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOC"
-                                index="2"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOD"
-                                index="3"
-                                pad="PD5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOA" pad="PA4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOB" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2" pad="PD4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3" pad="PD5"/>
                     </signals>
                 </instance>
             </module>
             <module id="i2c_8bit_avr_v3" name="TWI">
                 <instance name="TWI0">
-                    <register-group address-space="data"
-                                    name="TWI0"
-                                    name-in-module="TWI"
-                                    offset="0x0900"/>
+                    <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0900"/>
                     <signals>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT1"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT1"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SCL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SDA"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SDA_DUAL" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT1" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT1" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SCL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SDA" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL" pad="PA1"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA" pad="PA0"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA_DUAL" pad="PC2"/>
                     </signals>
                 </instance>
             </module>
             <module id="uart_autobd_v4" name="USART">
                 <instance name="USART0">
-                    <register-group address-space="data"
-                                    name="USART0"
-                                    name-in-module="USART"
-                                    offset="0x0800"/>
+                    <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="RXD"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="TXD"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="XCK"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="XDIR"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="RXD"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="TXD"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="XCK"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="XDIR"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT2"
-                                group="RXD"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT2"
-                                group="TXD"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="RXD"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="TXD"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XDIR"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="RXD"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="TXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="XCK"
-                                pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="RXD" pad="PA5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="TXD" pad="PA4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="XCK" pad="PA6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="XDIR" pad="PA7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT2" group="RXD" pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT2" group="TXD" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="RXD" pad="PD5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="TXD" pad="PD4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XCK" pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XDIR" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="RXD" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="TXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="XCK" pad="PC3"/>
                     </signals>
                 </instance>
                 <instance name="USART1">
-                    <register-group address-space="data"
-                                    name="USART1"
-                                    name-in-module="USART"
-                                    offset="0x0820"/>
+                    <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="RXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="TXD"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XDIR"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="RXD"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="TXD"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="TXD" pad="PC0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="RXD" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="TXD" pad="PD6"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="USERROW">
                 <instance name="USERROW">
-                    <register-group address-space="data"
-                                    name="USERROW"
-                                    name-in-module="USERROW"
-                                    offset="0x1080"/>
+                    <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1080"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_vport" name="VPORT">
                 <instance name="VPORTA">
-                    <register-group address-space="data"
-                                    name="VPORTA"
-                                    name-in-module="VPORT"
-                                    offset="0x0000"/>
+                    <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
                 </instance>
                 <instance name="VPORTC">
-                    <register-group address-space="data"
-                                    name="VPORTC"
-                                    name-in-module="VPORT"
-                                    offset="0x0008"/>
+                    <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
                 </instance>
                 <instance name="VPORTD">
-                    <register-group address-space="data"
-                                    name="VPORTD"
-                                    name-in-module="VPORT"
-                                    offset="0x000C"/>
+                    <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
                 </instance>
                 <instance name="VPORTF">
-                    <register-group address-space="data"
-                                    name="VPORTF"
-                                    name-in-module="VPORT"
-                                    offset="0x0014"/>
+                    <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
                 </instance>
             </module>
             <module id="avrdd" name="VREF">
                 <instance name="VREF">
-                    <register-group address-space="data"
-                                    name="VREF"
-                                    name-in-module="VREF"
-                                    offset="0x00B0"/>
+                    <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00B0"/>
                 </instance>
             </module>
             <module id="wdt_windowed_v2" name="WDT">
                 <instance name="WDT">
-                    <register-group address-space="data"
-                                    name="WDT"
-                                    name-in-module="WDT"
-                                    offset="0x0100"/>
+                    <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
                 </instance>
             </module>
             <module id="cmp_zxover_ctrl_v3" name="ZCD">
                 <instance name="ZCD3">
-                    <register-group address-space="data"
-                                    name="ZCD3"
-                                    name-in-module="ZCD"
-                                    offset="0x06D8"/>
+                    <register-group address-space="data" name="ZCD3" name-in-module="ZCD" offset="0x06D8"/>
                     <signals>
-                        <signal field="PORTMUX.ZCDROUTEA.ZCD3"
-                                function="ZCD3"
-                                group="IN"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.ZCDROUTEA.ZCD3"
-                                function="ZCD3"
-                                group="OUT"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ZCDROUTEA.ZCD3" function="ZCD3" group="IN" pad="PC2"/>
+                        <signal field="PORTMUX.ZCDROUTEA.ZCD3" function="ZCD3" group="OUT" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
@@ -1108,90 +501,31 @@
     <modules>
         <module caption="Analog Comparator" id="cmp_control_v8" name="AC">
             <register-group caption="Analog Comparator" name="AC" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Hysteresis Mode"
-                              mask="0x06"
-                              name="HYSMODE"
-                              rw="RW"
-                              values="AC_HYSMODE"/>
-                    <bitfield caption="Power profile"
-                              mask="0x18"
-                              name="POWER"
-                              rw="RW"
-                              values="AC_POWER"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Power profile" mask="0x18" name="POWER" rw="RW" values="AC_POWER"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Mux Control A"
-                          initval="0x00"
-                          name="MUXCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input MUX Selection"
-                              mask="0x07"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection"
-                              mask="0x38"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="AC_MUXPOS"/>
-                    <bitfield caption="AC Output Initial Value"
-                              mask="0x40"
-                              name="INITVAL"
-                              rw="RW"
-                              values="AC_INITVAL"/>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Negative Input MUX Selection" mask="0x07" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+                    <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
                 </register>
-                <register caption="DAC Voltage Reference"
-                          initval="0xFF"
-                          name="DACREF"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="DAC Voltage Reference" initval="0xFF" name="DACREF" offset="0x5" rw="RW" size="1">
                     <bitfield caption="DACREF" mask="0xFF" name="DACREF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="WINSEL" value="0x00"/>
                     <mode name="WINDOW" qualifier="WINSEL" value="0x01 0x02"/>
                     <bitfield caption="Interrupt Enable" mask="0x01" name="CMP" rw="RW"/>
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="INTMODE"
-                              rw="RW"
-                              values="AC_NORMAL_INTMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" modes="NORMAL" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Comparator Interrupt Flag"
-                              mask="0x01"
-                              name="CMPIF"
-                              rw="RW"/>
-                    <bitfield caption="Analog Comparator State"
-                              mask="0x10"
-                              name="CMPSTATE"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x01" name="CMPIF" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -1201,23 +535,15 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption"
-                       name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
                 <value caption="Power profile 3" name="PROFILE3" value="0x3"/>
             </value-group>
             <value-group caption="Interrupt Mode select" name="AC_NORMAL_INTMODE">
-                <value caption="Positive and negative inputs crosses"
-                       name="BOTHEDGE"
-                       value="0x0"/>
-                <value caption="Positive input goes below negative input"
-                       name="NEGEDGE"
-                       value="0x2"/>
-                <value caption="Positive input goes above negative input"
-                       name="POSEDGE"
-                       value="0x3"/>
+                <value caption="Positive and negative inputs crosses" name="BOTHEDGE" value="0x0"/>
+                <value caption="Positive input goes below negative input" name="NEGEDGE" value="0x2"/>
+                <value caption="Positive input goes above negative input" name="POSEDGE" value="0x3"/>
             </value-group>
             <value-group caption="AC Output Initial Value select" name="AC_INITVAL">
                 <value caption="Output initialized to 0" name="LOW" value="0x0"/>
@@ -1235,194 +561,62 @@
                 <value caption="Positive Pin 4" name="AINP4" value="0x04"/>
             </value-group>
         </module>
-        <module caption="Analog to Digital Converter"
-                id="adc_12b_diff_ctrl_v1"
-                name="ADC">
+        <module caption="Analog to Digital Converter" id="adc_12b_diff_ctrl_v1" name="ADC">
             <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="ADC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Free running mode" mask="0x02" name="FREERUN" rw="RW"/>
-                    <bitfield caption="Resolution selection"
-                              mask="0x0C"
-                              name="RESSEL"
-                              rw="RW"
-                              values="ADC_RESSEL"/>
+                    <bitfield caption="Resolution selection" mask="0x0C" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
                     <bitfield caption="Left adjust result" mask="0x10" name="LEFTADJ" rw="RW"/>
-                    <bitfield caption="Conversion mode"
-                              mask="0x20"
-                              name="CONVMODE"
-                              rw="RW"
-                              values="ADC_CONVMODE"/>
+                    <bitfield caption="Conversion mode" mask="0x20" name="CONVMODE" rw="RW" values="ADC_CONVMODE"/>
                     <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Accumulation Samples"
-                              mask="0x07"
-                              name="SAMPNUM"
-                              rw="RW"
-                              values="ADC_SAMPNUM"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x07" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Pre-scaler"
-                              mask="0x0F"
-                              name="PRESC"
-                              rw="RW"
-                              values="ADC_PRESC"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x0F" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sampling Delay Selection"
-                              mask="0x0F"
-                              name="SAMPDLY"
-                              rw="RW"
-                              values="ADC_SAMPDLY"/>
-                    <bitfield caption="Initial Delay Selection"
-                              mask="0xE0"
-                              name="INITDLY"
-                              rw="RW"
-                              values="ADC_INITDLY"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Sampling Delay Selection" mask="0x0F" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xE0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Window Comparator Mode"
-                              mask="0x07"
-                              name="WINCM"
-                              rw="RW"
-                              values="ADC_WINCM"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x07" name="WINCM" rw="RW" values="ADC_WINCM"/>
                 </register>
-                <register caption="Sample Control"
-                          initval="0x00"
-                          name="SAMPCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Sample lenght" mask="0xFF" name="SAMPLEN" rw="RW"/>
                 </register>
-                <register caption="Positive mux input"
-                          initval="0x00"
-                          name="MUXPOS"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="ADC_MUXPOS"/>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
-                <register caption="Negative mux input"
-                          initval="0x00"
-                          name="MUXNEG"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="ADC_MUXNEG"/>
+                <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
-                <register caption="Command"
-                          initval="0x00"
-                          name="COMMAND"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Start Conversion" mask="0x01" name="STCONV" rw="RW"/>
                     <bitfield caption="Stop Conversion" mask="0x02" name="SPCONV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Start Event Input Enable"
-                              mask="0x01"
-                              name="STARTEI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x01" name="STARTEI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Result Ready Interrupt Enable"
-                              mask="0x01"
-                              name="RESRDY"
-                              rw="RW"/>
-                    <bitfield caption="Window Comparator Interrupt Enable"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x01" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
                     <bitfield caption="Result Ready Flag" mask="0x01" name="RESRDY" rw="RW"/>
-                    <bitfield caption="Window Comparator Flag"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Data"
-                          initval="0x00"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Temporary" mask="0xFF" name="TEMP" rw="RW"/>
                 </register>
-                <register caption="ADC Accumulator Result"
-                          name="RES"
-                          offset="0x10"
-                          rw="R"
-                          size="2"/>
-                <register caption="Window comparator low threshold"
-                          name="WINLT"
-                          offset="0x12"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Window comparator high threshold"
-                          name="WINHT"
-                          offset="0x14"
-                          rw="RW"
-                          size="2"/>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Conversion mode select" name="ADC_CONVMODE">
                 <value caption="Single-Ended mode" name="SINGLEENDED" value="0x0"/>
@@ -1552,99 +746,33 @@
         </module>
         <module caption="Bod interface" id="bor_lvd_ctrl_v1" name="BOD">
             <register-group caption="Bod interface" name="BOD" size="0x10">
-                <register caption="Control A"
-                          initval="0x01"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Operation in sleep mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="BOD_SLEEP"/>
-                    <bitfield caption="Operation in active mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="R"
-                              values="BOD_ACTIVE"/>
-                    <bitfield caption="Sample frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="R"
-                              values="BOD_SAMPFREQ"/>
+                <register caption="Control A" initval="0x01" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in sleep mode" mask="0x03" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                    <bitfield caption="Operation in active mode" mask="0x0C" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bod level"
-                              mask="0x07"
-                              name="LVL"
-                              rw="R"
-                              values="BOD_LVL"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x07" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor Control"
-                          initval="0x00"
-                          name="VLMCTRLA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level"
-                              mask="0x03"
-                              name="VLMLVL"
-                              rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x03" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor interrrupt enable"
-                              mask="0x01"
-                              name="VLMIE"
-                              rw="RW"/>
-                    <bitfield caption="Configuration"
-                              mask="0x06"
-                              name="VLMCFG"
-                              rw="RW"
-                              values="BOD_VLMCFG"/>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x01" name="VLMIE" rw="RW"/>
+                    <bitfield caption="Configuration" mask="0x06" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor interrupt flag"
-                              mask="0x01"
-                              name="VLMIF"
-                              rw="RW"/>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x01" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor status"
-                              mask="0x01"
-                              name="VLMS"
-                              rw="R"
-                              values="BOD_VLMS"/>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x01" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
                 <value caption="Disabled" name="DIS" value="0x00"/>
                 <value caption="Enabled" name="ENABLED" value="0x01"/>
                 <value caption="Sampled" name="SAMPLED" value="0x02"/>
-                <value caption="Enabled with wake-up halted until BOD is ready"
-                       name="ENWAKE"
-                       value="0x03"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
             </value-group>
             <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
                 <value caption="128Hz sampling frequency" name="128HZ" value="0x0"/>
@@ -1667,338 +795,103 @@
                 <value caption="VDD crosses VLM threshold" name="BOTH" value="0x02"/>
             </value-group>
             <value-group caption="Voltage level monitor status select" name="BOD_VLMS">
-                <value caption="The voltage is above the VLM threshold level"
-                       name="ABOVE"
-                       value="0x0"/>
-                <value caption="The voltage is below the VLM threshold level"
-                       name="BELOW"
-                       value="0x1"/>
+                <value caption="The voltage is above the VLM threshold level" name="ABOVE" value="0x0"/>
+                <value caption="The voltage is below the VLM threshold level" name="BELOW" value="0x1"/>
             </value-group>
             <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
                 <value caption="VLM Disabled" name="OFF" value="0x0"/>
-                <value caption="VLM threshold 5% above BOD level"
-                       name="5ABOVE"
-                       value="0x1"/>
-                <value caption="VLM threshold 15% above BOD level"
-                       name="15ABOVE"
-                       value="0x2"/>
-                <value caption="VLM threshold 25% above BOD level"
-                       name="25ABOVE"
-                       value="0x3"/>
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x1"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x2"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x3"/>
             </value-group>
         </module>
         <module caption="Configurable Custom Logic" id="cla_ccl_v1" name="CCL">
             <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Sequential Control 0"
-                          initval="0x00"
-                          name="SEQCTRL0"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Sequential Control 1"
-                          initval="0x00"
-                          name="SEQCTRL1"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Interrupt Control 0"
-                          initval="0x00"
-                          name="INTCTRL0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode for LUT0"
-                              mask="0x03"
-                              name="INTMODE0"
-                              rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1"
-                              mask="0x0C"
-                              name="INTMODE1"
-                              rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2"
-                              mask="0x30"
-                              name="INTMODE2"
-                              rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3"
-                              mask="0xC0"
-                              name="INTMODE3"
-                              rw="RW"
-                              values="CCL_INTMODE3"/>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x03" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0x0C" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xC0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x0F" name="INT" rw="RW"/>
                 </register>
-                <register caption="LUT 0 Control A"
-                          initval="0x00"
-                          name="LUT0CTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 0 Control A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 0 Control B"
-                          initval="0x00"
-                          name="LUT0CTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 0 Control C"
-                          initval="0x00"
-                          name="LUT0CTRLC"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 0"
-                          initval="0x00"
-                          name="TRUTH0"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 1 Control A"
-                          initval="0x00"
-                          name="LUT1CTRLA"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 1 Control A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 1 Control B"
-                          initval="0x00"
-                          name="LUT1CTRLB"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 1 Control C"
-                          initval="0x00"
-                          name="LUT1CTRLC"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 1"
-                          initval="0x00"
-                          name="TRUTH1"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 2 Control A"
-                          initval="0x00"
-                          name="LUT2CTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 2 Control A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 2 Control B"
-                          initval="0x00"
-                          name="LUT2CTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 2 Control C"
-                          initval="0x00"
-                          name="LUT2CTRLC"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 2"
-                          initval="0x00"
-                          name="TRUTH2"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 3 Control A"
-                          initval="0x00"
-                          name="LUT3CTRLA"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 3 Control A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 3 Control B"
-                          initval="0x00"
-                          name="LUT3CTRLB"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 3 Control C"
-                          initval="0x00"
-                          name="LUT3CTRLC"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 3"
-                          initval="0x00"
-                          name="TRUTH3"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
             </register-group>
@@ -2029,13 +922,9 @@
             <value-group caption="Clock Source Selection" name="CCL_CLKSRC">
                 <value caption="Peripheral Clock" name="CLKPER" value="0x0"/>
                 <value caption="Selection by INSEL2" name="IN2" value="0x1"/>
-                <value caption="Internal High-Frequency Oscillator"
-                       name="OSCHF"
-                       value="0x4"/>
+                <value caption="Internal High-Frequency Oscillator" name="OSCHF" value="0x4"/>
                 <value caption="32.768 kHz oscillator" name="OSC32K" value="0x5"/>
-                <value caption="32.768 kHz oscillator divided by 32"
-                       name="OSC1K"
-                       value="0x6"/>
+                <value caption="32.768 kHz oscillator divided by 32" name="OSC1K" value="0x6"/>
             </value-group>
             <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
                 <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
@@ -2101,195 +990,67 @@
         </module>
         <module caption="Clock controller" id="avrdd" name="CLKCTRL">
             <register-group caption="Clock controller" name="CLKCTRL" size="0x40">
-                <register caption="MCLK Control A"
-                          initval="0x00"
-                          name="MCLKCTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="CLKCTRL_CLKSEL"/>
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock select" mask="0x07" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
                     <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
                 </register>
-                <register caption="MCLK Control B"
-                          initval="0x00"
-                          name="MCLKCTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Prescaler enable" mask="0x01" name="PEN" rw="RW"/>
-                    <bitfield caption="Prescaler division"
-                              mask="0x1E"
-                              name="PDIV"
-                              rw="RW"
-                              values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler division" mask="0x1E" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
                 </register>
-                <register caption="MCLK Control C"
-                          initval="0x00"
-                          name="MCLKCTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Enable"
-                              mask="0x01"
-                              name="CFDEN"
-                              rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Test"
-                              mask="0x02"
-                              name="CFDTST"
-                              rw="W"/>
-                    <bitfield caption="Clock Failure Detect Source"
-                              mask="0x0C"
-                              name="CFDSRC"
-                              rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Enable" mask="0x01" name="CFDEN" rw="RW"/>
+                    <bitfield caption="Clock Failure Detect Test" mask="0x02" name="CFDTST" rw="W"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0x0C" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                 </register>
-                <register caption="MCLK Interrupt Control"
-                          initval="0x00"
-                          name="MCLKINTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Enable"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt type"
-                              mask="0x80"
-                              name="INTTYPE"
-                              rw="RW"
-                              values="CLKCTRL_INTTYPE"/>
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x01" name="CFD" rw="RW"/>
+                    <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags"
-                          initval="0x00"
-                          name="MCLKINTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Flag"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x01" name="CFD" rw="RW"/>
                 </register>
-                <register caption="MCLK Status"
-                          initval="0x00"
-                          name="MCLKSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="System Oscillator changing"
-                              mask="0x01"
-                              name="SOSC"
-                              rw="RW"/>
-                    <bitfield caption="High frequency oscillator status"
-                              mask="0x02"
-                              name="OSCHFS"
-                              rw="RW"/>
-                    <bitfield caption="32KHz oscillator status"
-                              mask="0x04"
-                              name="OSC32KS"
-                              rw="RW"/>
-                    <bitfield caption="32.768 kHz Crystal Oscillator status"
-                              mask="0x08"
-                              name="XOSC32KS"
-                              rw="RW"/>
+                <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="System Oscillator changing" mask="0x01" name="SOSC" rw="RW"/>
+                    <bitfield caption="High frequency oscillator status" mask="0x02" name="OSCHFS" rw="RW"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x04" name="OSC32KS" rw="RW"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x08" name="XOSC32KS" rw="RW"/>
                     <bitfield caption="External Clock status" mask="0x10" name="EXTS" rw="RW"/>
                     <bitfield caption="PLL oscillator status" mask="0x20" name="PLLS" rw="RW"/>
                 </register>
-                <register caption="OSCHF Control A"
-                          initval="0x0C"
-                          name="OSCHFCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Control A" initval="0x0C" name="OSCHFCTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="Autotune" mask="0x01" name="AUTOTUNE" rw="RW"/>
-                    <bitfield caption="Frequency select"
-                              mask="0x3C"
-                              name="FRQSEL"
-                              rw="RW"
-                              values="CLKCTRL_FRQSEL"/>
+                    <bitfield caption="Frequency select" mask="0x3C" name="FRQSEL" rw="RW" values="CLKCTRL_FRQSEL"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSCHF Tune"
-                          name="OSCHFTUNE"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Tune" name="OSCHFTUNE" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Tune" mask="0xFF" name="TUNE" rw="RW"/>
                 </register>
-                <register caption="PLL Control A"
-                          name="PLLCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multiplication factor"
-                              mask="0x03"
-                              name="MULFAC"
-                              rw="RW"
-                              values="CLKCTRL_MULFAC"/>
-                    <bitfield caption="Source"
-                              mask="0x40"
-                              name="SOURCE"
-                              rw="RW"
-                              values="CLKCTRL_SOURCE"/>
+                <register caption="PLL Control A" name="PLLCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Multiplication factor" mask="0x03" name="MULFAC" rw="RW" values="CLKCTRL_MULFAC"/>
+                    <bitfield caption="Source" mask="0x40" name="SOURCE" rw="RW" values="CLKCTRL_SOURCE"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSC32K Control A"
-                          initval="0x00"
-                          name="OSC32KCTRLA"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC32K Control A"
-                          initval="0x00"
-                          name="XOSC32KCTRLA"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Low power mode" mask="0x02" name="LPMODE" rw="RW"/>
                     <bitfield caption="Select" mask="0x04" name="SEL" rw="RW"/>
-                    <bitfield caption="Crystal startup time"
-                              mask="0x30"
-                              name="CSUT"
-                              rw="RW"
-                              values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC HF Control A"
-                          initval="0x00"
-                          name="XOSCHFCTRLA"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC HF Control A" initval="0x00" name="XOSCHFCTRLA" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="External Source Select"
-                              mask="0x02"
-                              name="SELHF"
-                              rw="RW"
-                              values="CLKCTRL_SELHF"/>
-                    <bitfield caption="Frequency Range"
-                              mask="0x0C"
-                              name="FRQRANGE"
-                              rw="RW"
-                              values="CLKCTRL_FRQRANGE"/>
-                    <bitfield caption="Start-up Time Select"
-                              mask="0x30"
-                              name="CSUTHF"
-                              rw="RW"
-                              values="CLKCTRL_CSUTHF"/>
+                    <bitfield caption="External Source Select" mask="0x02" name="SELHF" rw="RW" values="CLKCTRL_SELHF"/>
+                    <bitfield caption="Frequency Range" mask="0x0C" name="FRQRANGE" rw="RW" values="CLKCTRL_FRQRANGE"/>
+                    <bitfield caption="Start-up Time Select" mask="0x30" name="CSUTHF" rw="RW" values="CLKCTRL_CSUTHF"/>
                     <bitfield caption="Run Standby" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Clock select" name="CLKCTRL_CLKSEL">
-                <value caption="Internal high-frequency oscillator"
-                       name="OSCHF"
-                       value="0x0"/>
+                <value caption="Internal high-frequency oscillator" name="OSCHF" value="0x0"/>
                 <value caption="Internal 32.768 kHz oscillator" name="OSC32K" value="0x1"/>
                 <value caption="32.768 kHz crystal oscillator" name="XOSC32K" value="0x2"/>
                 <value caption="External clock" name="EXTCLK" value="0x3"/>
@@ -2333,12 +1094,8 @@
                 <value caption="3 x multiplication factor" name="3x" value="0x2"/>
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
-                <value caption="High frequency internal oscillator as PLL source"
-                       name="OSCHF"
-                       value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF"
-                       value="0x1"/>
+                <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -2364,44 +1121,19 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection"
-                          initval="0x00"
-                          name="CCP"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCP signature"
-                              mask="0xFF"
-                              name="CCP"
-                              rw="RW"
-                              values="CPU_CCP"/>
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Stack Pointer"
-                          initval="0x7FFF"
-                          name="SP"
-                          offset="0xD"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Status Register"
-                          initval="0x00"
-                          name="SREG"
-                          offset="0xF"
-                          rw="RW"
-                          size="1">
+                <register caption="Stack Pointer" initval="0x7FFF" name="SP" offset="0xD" rw="RW" size="2"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
                     <bitfield caption="Carry Flag" mask="0x01" name="C" rw="RW"/>
                     <bitfield caption="Zero Flag" mask="0x02" name="Z" rw="RW"/>
                     <bitfield caption="Negative Flag" mask="0x04" name="N" rw="RW"/>
-                    <bitfield caption="Two's Complement Overflow Flag"
-                              mask="0x08"
-                              name="V"
-                              rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V" rw="RW"/>
                     <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
                     <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
                     <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
-                    <bitfield caption="Global Interrupt Enable Flag"
-                              mask="0x80"
-                              name="I"
-                              rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="CCP signature select" name="CPU_CCP">
@@ -2411,530 +1143,157 @@
         </module>
         <module caption="Interrupt Controller" id="int_8bit_v3" name="CPUINT">
             <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Round-robin Scheduling Enable"
-                              mask="0x01"
-                              name="LVL0RR"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x01" name="LVL0RR" rw="RW"/>
                     <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
-                    <bitfield caption="Interrupt Vector Select"
-                              mask="0x40"
-                              name="IVSEL"
-                              rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Level 0 Interrupt Executing"
-                              mask="0x01"
-                              name="LVL0EX"
-                              rw="R"/>
-                    <bitfield caption="Level 1 Interrupt Executing"
-                              mask="0x02"
-                              name="LVL1EX"
-                              rw="R"/>
-                    <bitfield caption="Non-maskable Interrupt Executing"
-                              mask="0x80"
-                              name="NMIEX"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x01" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x02" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority"
-                          initval="0x00"
-                          name="LVL0PRI"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Level Priority"
-                              mask="0xFF"
-                              name="LVL0PRI"
-                              rw="RW"/>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xFF" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector"
-                          initval="0x00"
-                          name="LVL1VEC"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Vector with High Priority"
-                              mask="0xFF"
-                              name="LVL1VEC"
-                              rw="RW"/>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xFF" name="LVL1VEC" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="CRCSCAN" id="math_pdi_crc_v1" name="CRCSCAN">
             <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable CRC scan" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Enable NMI Trigger" mask="0x02" name="NMIEN" rw="RW"/>
                     <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CRC Source"
-                              mask="0x03"
-                              name="SRC"
-                              rw="RW"
-                              values="CRCSCAN_SRC"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x03" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
                 </register>
-                <register caption="Status"
-                          initval="0x02"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="CRC Busy" mask="0x01" name="BUSY" rw="R"/>
                     <bitfield caption="CRC Ok" mask="0x02" name="OK" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="CRC Source select" name="CRCSCAN_SRC">
                 <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
-                <value caption="CRC on boot and appl section of flash"
-                       name="APPLICATION"
-                       value="0x1"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
                 <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
             </value-group>
         </module>
-        <module caption="Digital to Analog Converter"
-                id="dac_nbit_ctrl_v5"
-                name="DAC">
+        <module caption="Digital to Analog Converter" id="dac_nbit_ctrl_v5" name="DAC">
             <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="DAC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="DATA Register"
-                          name="DATA"
-                          offset="0x2"
-                          rw="RW"
-                          size="2">
+                <register caption="DATA Register" name="DATA" offset="0x2" rw="RW" size="2">
                     <bitfield caption="Data" mask="0xFFC0" name="DATA" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Event System" id="avrdd" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Software Event A"
-                          initval="0x00"
-                          name="SWEVENTA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0xFF"
-                              name="SWEVENTA"
-                              rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0xFF" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
-                <register caption="Software Event B"
-                          initval="0x00"
-                          name="SWEVENTB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0x03"
-                              name="SWEVENTB"
-                              rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0x03" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
-                <register caption="Multiplexer Channel 0"
-                          initval="0x00"
-                          name="CHANNEL0"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 0 generator select"
-                              mask="0xFF"
-                              name="CHANNEL0"
-                              rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Channel 0 generator select" mask="0xFF" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
-                <register caption="Multiplexer Channel 1"
-                          initval="0x00"
-                          name="CHANNEL1"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 1 generator select"
-                              mask="0xFF"
-                              name="CHANNEL1"
-                              rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Channel 1 generator select" mask="0xFF" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
-                <register caption="Multiplexer Channel 2"
-                          initval="0x00"
-                          name="CHANNEL2"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 2 generator select"
-                              mask="0xFF"
-                              name="CHANNEL2"
-                              rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Channel 2 generator select" mask="0xFF" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
-                <register caption="Multiplexer Channel 3"
-                          initval="0x00"
-                          name="CHANNEL3"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 3 generator select"
-                              mask="0xFF"
-                              name="CHANNEL3"
-                              rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Channel 3 generator select" mask="0xFF" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
-                <register caption="Multiplexer Channel 4"
-                          initval="0x00"
-                          name="CHANNEL4"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 4 generator select"
-                              mask="0xFF"
-                              name="CHANNEL4"
-                              rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Channel 4 generator select" mask="0xFF" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
-                <register caption="Multiplexer Channel 5"
-                          initval="0x00"
-                          name="CHANNEL5"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 5 generator select"
-                              mask="0xFF"
-                              name="CHANNEL5"
-                              rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Channel 5 generator select" mask="0xFF" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT0A"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT0B"
-                          offset="0x21"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT1A"
-                          offset="0x22"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT1B"
-                          offset="0x23"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT2A"
-                          offset="0x24"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT2B"
-                          offset="0x25"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT3A"
-                          offset="0x26"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT3B"
-                          offset="0x27"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 12 - ADC0"
-                          initval="0x00"
-                          name="USERADC0START"
-                          offset="0x28"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTA"
-                          offset="0x29"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTC"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTD"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTF"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0"
-                          initval="0x00"
-                          name="USERUSART0IRDA"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1"
-                          initval="0x00"
-                          name="USERUSART1IRDA"
-                          offset="0x2E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A"
-                          initval="0x00"
-                          name="USERTCA0CNTA"
-                          offset="0x2F"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B"
-                          initval="0x00"
-                          name="USERTCA0CNTB"
-                          offset="0x30"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A"
-                          initval="0x00"
-                          name="USERTCB0CAPT"
-                          offset="0x31"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B"
-                          initval="0x00"
-                          name="USERTCB0COUNT"
-                          offset="0x32"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A"
-                          initval="0x00"
-                          name="USERTCB1CAPT"
-                          offset="0x33"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B"
-                          initval="0x00"
-                          name="USERTCB1COUNT"
-                          offset="0x34"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A"
-                          initval="0x00"
-                          name="USERTCB2CAPT"
-                          offset="0x35"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B"
-                          initval="0x00"
-                          name="USERTCB2COUNT"
-                          offset="0x36"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A"
-                          initval="0x00"
-                          name="USERTCD0INPUTA"
-                          offset="0x37"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B"
-                          initval="0x00"
-                          name="USERTCD0INPUTB"
-                          offset="0x38"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
             <value-group caption="Channel 0 generator select" name="EVSYS_CHANNEL0">
@@ -2943,30 +1302,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2981,21 +1324,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3013,30 +1346,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3051,21 +1368,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3083,30 +1390,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3124,21 +1415,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3156,30 +1437,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3197,21 +1462,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3229,30 +1484,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3263,21 +1502,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3295,30 +1524,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3329,21 +1542,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3371,149 +1574,48 @@
             </value-group>
             <value-group caption="User channel select" name="EVSYS_USER">
                 <value caption="Off" name="OFF" value="0x0"/>
-                <value caption="Connect user to event channel 0"
-                       name="CHANNEL0"
-                       value="0x1"/>
-                <value caption="Connect user to event channel 1"
-                       name="CHANNEL1"
-                       value="0x2"/>
-                <value caption="Connect user to event channel 2"
-                       name="CHANNEL2"
-                       value="0x3"/>
-                <value caption="Connect user to event channel 3"
-                       name="CHANNEL3"
-                       value="0x4"/>
-                <value caption="Connect user to event channel 4"
-                       name="CHANNEL4"
-                       value="0x5"/>
-                <value caption="Connect user to event channel 5"
-                       name="CHANNEL5"
-                       value="0x6"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
             </value-group>
         </module>
         <module caption="Fuses" id="avrdd" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Watchdog Configuration"
-                          initval="0x00"
-                          name="WDTCFG"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Watchdog Timeout Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="FUSE_WINDOW"/>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
-                <register caption="BOD Configuration"
-                          initval="0x00"
-                          name="BODCFG"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="BOD Operation in Sleep Mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="FUSE_SLEEP"/>
-                    <bitfield caption="BOD Operation in Active Mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="RW"
-                              values="FUSE_ACTIVE"/>
-                    <bitfield caption="BOD Sample Frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Level"
-                              mask="0xE0"
-                              name="LVL"
-                              rw="RW"
-                              values="FUSE_LVL"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x03" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x0C" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Level" mask="0xE0" name="LVL" rw="RW" values="FUSE_LVL"/>
                 </register>
-                <register caption="Oscillator Configuration"
-                          initval="0x00"
-                          name="OSCCFG"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Frequency Select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="FUSE_CLKSEL"/>
+                <register caption="Oscillator Configuration" initval="0x00" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x07" name="CLKSEL" rw="RW" values="FUSE_CLKSEL"/>
                 </register>
-                <register caption="System Configuration 0"
-                          initval="0xD0"
-                          name="SYSCFG0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="System Configuration 0" initval="0xD0" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="EEPROM Save" mask="0x01" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration"
-                              mask="0x08"
-                              name="RSTPINCFG"
-                              rw="RW"
-                              values="FUSE_RSTPINCFG"/>
-                    <bitfield caption="UPDI Pin Configuration"
-                              mask="0x10"
-                              name="UPDIPINCFG"
-                              rw="RW"
-                              values="FUSE_UPDIPINCFG"/>
-                    <bitfield caption="CRC Select"
-                              mask="0x20"
-                              name="CRCSEL"
-                              rw="RW"
-                              values="FUSE_CRCSEL"/>
-                    <bitfield caption="CRC Source"
-                              mask="0xC0"
-                              name="CRCSRC"
-                              rw="RW"
-                              values="FUSE_CRCSRC"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x08" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW" values="FUSE_UPDIPINCFG"/>
+                    <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
+                    <bitfield caption="CRC Source" mask="0xC0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                 </register>
-                <register caption="System Configuration 1"
-                          initval="0x08"
-                          name="SYSCFG1"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Startup Time"
-                              mask="0x07"
-                              name="SUT"
-                              rw="RW"
-                              values="FUSE_SUT"/>
-                    <bitfield caption="MVIO System Configuration"
-                              mask="0x18"
-                              name="MVSYSCFG"
-                              rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x07" name="SUT" rw="RW" values="FUSE_SUT"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                 </register>
-                <register caption="Code Section Size"
-                          initval="0x00"
-                          name="CODESIZE"
-                          offset="0x7"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Boot Section Size"
-                          initval="0x00"
-                          name="BOOTSIZE"
-                          offset="0x8"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
+                <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT"
-                       value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -3539,13 +1641,9 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)"
-                       name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
-                <value caption="CRC of application code and boot sections"
-                       name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -3557,12 +1655,8 @@
                 <value caption="UPDI Mode" name="UPDI" value="0x1"/>
             </value-group>
             <value-group caption="MVIO System Configuration select" name="FUSE_MVSYSCFG">
-                <value caption="Device used in a dual supply configuration"
-                       name="DUAL"
-                       value="0x1"/>
-                <value caption="Device used in a single supply configuration"
-                       name="SINGLE"
-                       value="0x2"/>
+                <value caption="Device used in a dual supply configuration" name="DUAL" value="0x1"/>
+                <value caption="Device used in a single supply configuration" name="SINGLE" value="0x2"/>
             </value-group>
             <value-group caption="Startup Time select" name="FUSE_SUT">
                 <value caption="0 ms" name="0MS" value="0x00"/>
@@ -3605,41 +1699,16 @@
         </module>
         <module caption="General Purpose Registers" id="avrdd" name="GPR">
             <register-group caption="General Purpose Registers" name="GPR" size="0x4">
-                <register caption="General Purpose Register 0"
-                          name="GPR0"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 1"
-                          name="GPR1"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 2"
-                          name="GPR2"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 3"
-                          name="GPR3"
-                          offset="0x3"
-                          rw="RW"
-                          size="1"/>
+                <register caption="General Purpose Register 0" name="GPR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose Register 1" name="GPR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose Register 2" name="GPR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose Register 3" name="GPR3" offset="0x3" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Lockbits" id="avrdd" name="LOCK">
             <register-group caption="Lockbits" name="LOCK" size="0x4">
-                <register caption="Lock Key Bits"
-                          initval="0x5CC5C55C"
-                          name="KEY"
-                          offset="0x0"
-                          rw="RW"
-                          size="4">
-                    <bitfield caption="Lock Key"
-                              mask="0xFFFFFFFF"
-                              name="KEY"
-                              rw="RW"
-                              values="LOCK_KEY"/>
+                <register caption="Lock Key Bits" initval="0x5CC5C55C" name="KEY" offset="0x0" rw="RW" size="4">
+                    <bitfield caption="Lock Key" mask="0xFFFFFFFF" name="KEY" rw="RW" values="LOCK_KEY"/>
                 </register>
             </register-group>
             <value-group caption="Lock Key select" name="LOCK_KEY">
@@ -3649,154 +1718,61 @@
         </module>
         <module caption="Multi-Voltage I/O" id="io_multiv_ctrl_avr_v1" name="MVIO">
             <register-group caption="Multi-Voltage I/O" name="MVIO" size="0x4">
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Enable"
-                              mask="0x01"
-                              name="VDDIO2IE"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Enable" mask="0x01" name="VDDIO2IE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Flag"
-                              mask="0x01"
-                              name="VDDIO2IF"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Flag" mask="0x01" name="VDDIO2IF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="VDDIO2 Status" mask="0x01" name="VDDIO2S" rw="R"/>
                 </register>
             </register-group>
         </module>
-        <module caption="Non-volatile Memory Controller"
-                id="nvm_ctrl_avr_v1"
-                name="NVMCTRL">
+        <module caption="Non-volatile Memory Controller" id="nvm_ctrl_avr_v1" name="NVMCTRL">
             <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x7F"
-                              name="CMD"
-                              rw="RW"
-                              values="NVMCTRL_CMD"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x30"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Application Code Write Protect"
-                              mask="0x01"
-                              name="APPCODEWP"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x30" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Application Code Write Protect" mask="0x01" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x02" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Application Data Write Protect"
-                              mask="0x04"
-                              name="APPDATAWP"
-                              rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space"
-                              mask="0x30"
-                              name="FLMAP"
-                              rw="RW"
-                              values="NVMCTRL_FLMAP"/>
-                    <bitfield caption="Flash Mapping Lock"
-                              mask="0x80"
-                              name="FLMAPLOCK"
-                              rw="RW"/>
+                    <bitfield caption="Application Data Write Protect" mask="0x04" name="APPDATAWP" rw="RW"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x02"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x02" rw="R" size="1">
                     <bitfield caption="Flash busy" mask="0x01" name="FBUSY" rw="R"/>
                     <bitfield caption="EEPROM busy" mask="0x02" name="EEBUSY" rw="R"/>
-                    <bitfield caption="Write error"
-                              mask="0x70"
-                              name="ERROR"
-                              rw="R"
-                              values="NVMCTRL_ERROR"/>
+                    <bitfield caption="Write error" mask="0x70" name="ERROR" rw="R" values="NVMCTRL_ERROR"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
-                <register caption="Address"
-                          name="ADDR"
-                          offset="0x08"
-                          rw="RW"
-                          size="4"/>
+                <register caption="Address" name="ADDR" offset="0x08" rw="RW" size="4"/>
             </register-group>
             <value-group caption="Command select" name="NVMCTRL_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
                 <value caption="No Operation" name="NOOP" value="0x01"/>
                 <value caption="Flash Write" name="FLWR" value="0x02"/>
                 <value caption="Flash Page Erase" name="FLPER" value="0x08"/>
-                <value caption="Flash Multi-Page Erase 2 pages"
-                       name="FLMPER2"
-                       value="0x09"/>
-                <value caption="Flash Multi-Page Erase 4 pages"
-                       name="FLMPER4"
-                       value="0x0A"/>
-                <value caption="Flash Multi-Page Erase 8 pages"
-                       name="FLMPER8"
-                       value="0x0B"/>
-                <value caption="Flash Multi-Page Erase 16 pages"
-                       name="FLMPER16"
-                       value="0x0C"/>
-                <value caption="Flash Multi-Page Erase 32 pages"
-                       name="FLMPER32"
-                       value="0x0D"/>
+                <value caption="Flash Multi-Page Erase 2 pages" name="FLMPER2" value="0x09"/>
+                <value caption="Flash Multi-Page Erase 4 pages" name="FLMPER4" value="0x0A"/>
+                <value caption="Flash Multi-Page Erase 8 pages" name="FLMPER8" value="0x0B"/>
+                <value caption="Flash Multi-Page Erase 16 pages" name="FLMPER16" value="0x0C"/>
+                <value caption="Flash Multi-Page Erase 32 pages" name="FLMPER32" value="0x0D"/>
                 <value caption="EEPROM Write" name="EEWR" value="0x12"/>
                 <value caption="EEPROM Erase and Write" name="EEERWR" value="0x13"/>
                 <value caption="EEPROM Byte Erase" name="EEBER" value="0x18"/>
-                <value caption="EEPROM Multi-Byte Erase 2 bytes"
-                       name="EEMBER2"
-                       value="0x19"/>
-                <value caption="EEPROM Multi-Byte Erase 4 bytes"
-                       name="EEMBER4"
-                       value="0x1A"/>
-                <value caption="EEPROM Multi-Byte Erase 8 bytes"
-                       name="EEMBER8"
-                       value="0x1B"/>
-                <value caption="EEPROM Multi-Byte Erase 16 bytes"
-                       name="EEMBER16"
-                       value="0x1C"/>
-                <value caption="EEPROM Multi-Byte Erase 32 bytes"
-                       name="EEMBER32"
-                       value="0x1D"/>
+                <value caption="EEPROM Multi-Byte Erase 2 bytes" name="EEMBER2" value="0x19"/>
+                <value caption="EEPROM Multi-Byte Erase 4 bytes" name="EEMBER4" value="0x1A"/>
+                <value caption="EEPROM Multi-Byte Erase 8 bytes" name="EEMBER8" value="0x1B"/>
+                <value caption="EEPROM Multi-Byte Erase 16 bytes" name="EEMBER16" value="0x1C"/>
+                <value caption="EEPROM Multi-Byte Erase 32 bytes" name="EEMBER32" value="0x1D"/>
                 <value caption="Chip Erase Command" name="CHER" value="0x20"/>
                 <value caption="EEPROM Erase Command" name="EECHER" value="0x30"/>
             </value-group>
@@ -3809,404 +1785,135 @@
             <value-group caption="Write error select" name="NVMCTRL_ERROR">
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
-                <value caption="Write to section not allowed"
-                       name="ILLEGALSADDR"
-                       value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted"
-                       name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed"
-                       name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_avr_v2_port" name="PORT">
             <register-group caption="I/O Ports" name="PORT" size="0x20">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Set"
-                          name="DIRSET"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Clear"
-                          name="DIRCLR"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Toggle"
-                          name="DIRTGL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Set"
-                          name="OUTSET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Clear"
-                          name="OUTCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Toggle"
-                          name="OUTTGL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
-                <register caption="Port Control"
-                          initval="0x00"
-                          name="PORTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Slew Rate Limit Enable" mask="0x01" name="SRL" rw="RW"/>
                 </register>
-                <register caption="Pin Control Config"
-                          initval="0x00"
-                          name="PINCONFIG"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin Control Config" initval="0x00" name="PINCONFIG" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin Control Update"
-                          initval="0x00"
-                          name="PINCTRLUPD"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control update mask"
-                              mask="0xFF"
-                              name="PINCTRLUPD"
-                              rw="RW"/>
+                <register caption="Pin Control Update" initval="0x00" name="PINCTRLUPD" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Pin control update mask" mask="0xFF" name="PINCTRLUPD" rw="RW"/>
                 </register>
-                <register caption="Pin Control Set"
-                          initval="0x00"
-                          name="PINCTRLSET"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control set mask"
-                              mask="0xFF"
-                              name="PINCTRLSET"
-                              rw="RW"/>
+                <register caption="Pin Control Set" initval="0x00" name="PINCTRLSET" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Pin control set mask" mask="0xFF" name="PINCTRLSET" rw="RW"/>
                 </register>
-                <register caption="Pin Control Clear"
-                          initval="0x00"
-                          name="PINCTRLCLR"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control clear mask"
-                              mask="0xFF"
-                              name="PINCTRLCLR"
-                              rw="RW"/>
+                <register caption="Pin Control Clear" initval="0x00" name="PINCTRLCLR" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Pin control clear mask" mask="0xFF" name="PINCTRLCLR" rw="RW"/>
                 </register>
-                <register caption="Pin 0 Control"
-                          initval="0x00"
-                          name="PIN0CTRL"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 1 Control"
-                          initval="0x00"
-                          name="PIN1CTRL"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 2 Control"
-                          initval="0x00"
-                          name="PIN2CTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 3 Control"
-                          initval="0x00"
-                          name="PIN3CTRL"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 4 Control"
-                          initval="0x00"
-                          name="PIN4CTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 5 Control"
-                          initval="0x00"
-                          name="PIN5CTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 6 Control"
-                          initval="0x00"
-                          name="PIN6CTRL"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 7 Control"
-                          initval="0x00"
-                          name="PIN7CTRL"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
-                <value caption="Interrupt disabled but input buffer enabled"
-                       name="INTDISABLE"
-                       value="0x0"/>
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
                 <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
                 <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
                 <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
-                <value caption="Digital Input Buffer disabled"
-                       name="INPUT_DISABLE"
-                       value="0x4"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
                 <value caption="Sense low Level" name="LEVEL" value="0x5"/>
             </value-group>
         </module>
         <module caption="Port Multiplexer" id="avrdd" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="EVSYS route A"
-                          initval="0x00"
-                          name="EVSYSROUTEA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Output A"
-                              mask="0x01"
-                              name="EVOUTA"
-                              rw="RW"
-                              values="PORTMUX_EVOUTA"/>
-                    <bitfield caption="Event Output C"
-                              mask="0x04"
-                              name="EVOUTC"
-                              rw="RW"
-                              values="PORTMUX_EVOUTC"/>
-                    <bitfield caption="Event Output D"
-                              mask="0x08"
-                              name="EVOUTD"
-                              rw="RW"
-                              values="PORTMUX_EVOUTD"/>
-                    <bitfield caption="Event Output F"
-                              mask="0x20"
-                              name="EVOUTF"
-                              rw="RW"
-                              values="PORTMUX_EVOUTF"/>
+                <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Event Output A" mask="0x01" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output C" mask="0x04" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x08" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
                 </register>
-                <register caption="CCL route A"
-                          initval="0x00"
-                          name="CCLROUTEA"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals"
-                              mask="0x01"
-                              name="LUT0"
-                              rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals"
-                              mask="0x02"
-                              name="LUT1"
-                              rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals"
-                              mask="0x04"
-                              name="LUT2"
-                              rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals"
-                              mask="0x08"
-                              name="LUT3"
-                              rw="RW"
-                              values="PORTMUX_LUT3"/>
+                <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x01" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x02" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x04" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x08" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
-                <register caption="USART route A"
-                          initval="0x00"
-                          name="USARTROUTEA"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="USART0 Signals"
-                              mask="0x07"
-                              name="USART0"
-                              rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="USART1 Signals"
-                              mask="0x18"
-                              name="USART1"
-                              rw="RW"
-                              values="PORTMUX_USART1"/>
+                <register caption="USART route A" initval="0x00" name="USARTROUTEA" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="USART0 Signals" mask="0x07" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="USART1 Signals" mask="0x18" name="USART1" rw="RW" values="PORTMUX_USART1"/>
                 </register>
-                <register caption="SPI route A"
-                          initval="0x00"
-                          name="SPIROUTEA"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI0 Signals"
-                              mask="0x07"
-                              name="SPI0"
-                              rw="RW"
-                              values="PORTMUX_SPI0"/>
+                <register caption="SPI route A" initval="0x00" name="SPIROUTEA" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="SPI0 Signals" mask="0x07" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                 </register>
-                <register caption="TWI route A"
-                          initval="0x00"
-                          name="TWIROUTEA"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TWI0 Signals"
-                              mask="0x03"
-                              name="TWI0"
-                              rw="RW"
-                              values="PORTMUX_TWI0"/>
+                <register caption="TWI route A" initval="0x00" name="TWIROUTEA" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="TWI0 Signals" mask="0x03" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="TCA route A"
-                          initval="0x00"
-                          name="TCAROUTEA"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCA0 Signals"
-                              mask="0x07"
-                              name="TCA0"
-                              rw="RW"
-                              values="PORTMUX_TCA0"/>
+                <register caption="TCA route A" initval="0x00" name="TCAROUTEA" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="TCA0 Signals" mask="0x07" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
                 </register>
-                <register caption="TCB route A"
-                          initval="0x00"
-                          name="TCBROUTEA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCB0 Output"
-                              mask="0x01"
-                              name="TCB0"
-                              rw="RW"
-                              values="PORTMUX_TCB0"/>
-                    <bitfield caption="TCB1 Output"
-                              mask="0x02"
-                              name="TCB1"
-                              rw="RW"
-                              values="PORTMUX_TCB1"/>
-                    <bitfield caption="TCB2 Output"
-                              mask="0x04"
-                              name="TCB2"
-                              rw="RW"
-                              values="PORTMUX_TCB2"/>
+                <register caption="TCB route A" initval="0x00" name="TCBROUTEA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="TCB0 Output" mask="0x01" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="TCB1 Output" mask="0x02" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+                    <bitfield caption="TCB2 Output" mask="0x04" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
                 </register>
-                <register caption="TCD route A"
-                          initval="0x00"
-                          name="TCDROUTEA"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCD0 Signals"
-                              mask="0x07"
-                              name="TCD0"
-                              rw="RW"
-                              values="PORTMUX_TCD0"/>
+                <register caption="TCD route A" initval="0x00" name="TCDROUTEA" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="TCD0 Signals" mask="0x07" name="TCD0" rw="RW" values="PORTMUX_TCD0"/>
                 </register>
             </register-group>
             <value-group caption="CCL Look-Up Table 0 Signals select" name="PORTMUX_LUT0">
@@ -4299,199 +2006,69 @@
         </module>
         <module caption="Reset controller" id="rst_integration_v8" name="RSTCTRL">
             <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
-                <register caption="Reset Flags"
-                          initval="0x00"
-                          name="RSTFR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Power on Reset flag" mask="0x01" name="PORF" rw="RW"/>
-                    <bitfield caption="Brown out detector Reset flag"
-                              mask="0x02"
-                              name="BORF"
-                              rw="RW"/>
+                    <bitfield caption="Brown out detector Reset flag" mask="0x02" name="BORF" rw="RW"/>
                     <bitfield caption="External Reset flag" mask="0x04" name="EXTRF" rw="RW"/>
                     <bitfield caption="Watch dog Reset flag" mask="0x08" name="WDRF" rw="RW"/>
                     <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
                     <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
                 </register>
-                <register caption="Software Reset"
-                          initval="0x00"
-                          name="SWRR"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software reset enable"
-                              mask="0x01"
-                              name="SWRST"
-                              rw="RW"/>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x01" name="SWRST" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Real-Time Counter" id="tmr_16b_rtc_v1" name="RTC">
             <register-group caption="Real-Time Counter" name="RTC" size="0x20">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="RTCEN" rw="RW"/>
                     <bitfield caption="Correction enable" mask="0x04" name="CORREN" rw="RW"/>
-                    <bitfield caption="Prescaling Factor"
-                              mask="0x78"
-                              name="PRESCALER"
-                              rw="RW"
-                              values="RTC_PRESCALER"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
                     <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x01"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLABUSY"
-                              rw="R"/>
-                    <bitfield caption="Count Synchronization Busy Flag"
-                              mask="0x02"
-                              name="CNTBUSY"
-                              rw="R"/>
-                    <bitfield caption="Period Synchronization Busy Flag"
-                              mask="0x04"
-                              name="PERBUSY"
-                              rw="R"/>
-                    <bitfield caption="Comparator Synchronization Busy Flag"
-                              mask="0x08"
-                              name="CMPBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x02" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x04" name="PERBUSY" rw="R"/>
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x08" name="CMPBUSY" rw="R"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt enable"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt Flag"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Temporary"
-                          name="TEMP"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Debug control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Calibration"
-                          initval="0x00"
-                          name="CALIB"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Error Correction Value"
-                              mask="0x7F"
-                              name="ERROR"
-                              rw="RW"/>
-                    <bitfield caption="Error Correction Sign Bit"
-                              mask="0x80"
-                              name="SIGN"
-                              rw="RW"/>
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7F" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
                 </register>
-                <register caption="Clock Select"
-                          initval="0x00"
-                          name="CLKSEL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Select"
-                              mask="0x03"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="RTC_CLKSEL"/>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x03" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
                 </register>
                 <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
-                <register caption="Period"
-                          initval="0xFFFF"
-                          name="PER"
-                          offset="0x0A"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
                 <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
-                <register caption="PIT Control A"
-                          initval="0x00"
-                          name="PITCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="PITEN" rw="RW"/>
-                    <bitfield caption="Period"
-                              mask="0x78"
-                              name="PERIOD"
-                              rw="RW"
-                              values="RTC_PERIOD"/>
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
                 </register>
-                <register caption="PIT Status"
-                          initval="0x00"
-                          name="PITSTATUS"
-                          offset="0x11"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLBUSY"
-                              rw="R"/>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLBUSY" rw="R"/>
                 </register>
-                <register caption="PIT Interrupt Control"
-                          initval="0x00"
-                          name="PITINTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags"
-                          initval="0x00"
-                          name="PITINTFLAGS"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Debug control"
-                          initval="0x00"
-                          name="PITDBGCTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
             </register-group>
@@ -4539,156 +2116,42 @@
         </module>
         <module caption="Signature row" id="avrdd" name="SIGROW">
             <register-group caption="Signature row" name="SIGROW" size="0x40">
-                <register caption="Device ID Byte 0"
-                          name="DEVICEID0"
-                          offset="0x00"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 1"
-                          name="DEVICEID1"
-                          offset="0x01"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 2"
-                          name="DEVICEID2"
-                          offset="0x02"
-                          rw="R"
-                          size="1"/>
-                <register caption="Temperature Calibration 0"
-                          name="TEMPSENSE0"
-                          offset="0x04"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 0"
-                              mask="0xFFFF"
-                              name="TEMPSENSE0"
-                              rw="R"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Temperature Calibration 0" name="TEMPSENSE0" offset="0x04" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 0" mask="0xFFFF" name="TEMPSENSE0" rw="R"/>
                 </register>
-                <register caption="Temperature Calibration 1"
-                          name="TEMPSENSE1"
-                          offset="0x06"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 1"
-                              mask="0xFFFF"
-                              name="TEMPSENSE1"
-                              rw="R"/>
+                <register caption="Temperature Calibration 1" name="TEMPSENSE1" offset="0x06" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 1" mask="0xFFFF" name="TEMPSENSE1" rw="R"/>
                 </register>
-                <register caption="LOTNUM0"
-                          name="SERNUM0"
-                          offset="0x10"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM1"
-                          name="SERNUM1"
-                          offset="0x11"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM2"
-                          name="SERNUM2"
-                          offset="0x12"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM3"
-                          name="SERNUM3"
-                          offset="0x13"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM4"
-                          name="SERNUM4"
-                          offset="0x14"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM5"
-                          name="SERNUM5"
-                          offset="0x15"
-                          rw="R"
-                          size="1"/>
-                <register caption="RANDOM"
-                          name="SERNUM6"
-                          offset="0x16"
-                          rw="R"
-                          size="1"/>
-                <register caption="SCRIBE"
-                          name="SERNUM7"
-                          offset="0x17"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS0"
-                          name="SERNUM8"
-                          offset="0x18"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS1"
-                          name="SERNUM9"
-                          offset="0x19"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS0"
-                          name="SERNUM10"
-                          offset="0x1A"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS1"
-                          name="SERNUM11"
-                          offset="0x1B"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES0"
-                          name="SERNUM12"
-                          offset="0x1C"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES1"
-                          name="SERNUM13"
-                          offset="0x1D"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES2"
-                          name="SERNUM14"
-                          offset="0x1E"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES3"
-                          name="SERNUM15"
-                          offset="0x1F"
-                          rw="R"
-                          size="1"/>
+                <register caption="LOTNUM0" name="SERNUM0" offset="0x10" rw="R" size="1"/>
+                <register caption="LOTNUM1" name="SERNUM1" offset="0x11" rw="R" size="1"/>
+                <register caption="LOTNUM2" name="SERNUM2" offset="0x12" rw="R" size="1"/>
+                <register caption="LOTNUM3" name="SERNUM3" offset="0x13" rw="R" size="1"/>
+                <register caption="LOTNUM4" name="SERNUM4" offset="0x14" rw="R" size="1"/>
+                <register caption="LOTNUM5" name="SERNUM5" offset="0x15" rw="R" size="1"/>
+                <register caption="RANDOM" name="SERNUM6" offset="0x16" rw="R" size="1"/>
+                <register caption="SCRIBE" name="SERNUM7" offset="0x17" rw="R" size="1"/>
+                <register caption="XPOS0" name="SERNUM8" offset="0x18" rw="R" size="1"/>
+                <register caption="XPOS1" name="SERNUM9" offset="0x19" rw="R" size="1"/>
+                <register caption="YPOS0" name="SERNUM10" offset="0x1A" rw="R" size="1"/>
+                <register caption="YPOS1" name="SERNUM11" offset="0x1B" rw="R" size="1"/>
+                <register caption="RES0" name="SERNUM12" offset="0x1C" rw="R" size="1"/>
+                <register caption="RES1" name="SERNUM13" offset="0x1D" rw="R" size="1"/>
+                <register caption="RES2" name="SERNUM14" offset="0x1E" rw="R" size="1"/>
+                <register caption="RES3" name="SERNUM15" offset="0x1F" rw="R" size="1"/>
             </register-group>
         </module>
-        <module caption="Sleep Controller"
-                id="clk_sleep_ctrl_avr_v2"
-                name="SLPCTRL">
+        <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
             <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Sleep enable" mask="0x01" name="SEN" rw="RW"/>
-                    <bitfield caption="Sleep mode"
-                              mask="0x06"
-                              name="SMODE"
-                              rw="RW"
-                              values="SLPCTRL_SMODE"/>
+                    <bitfield caption="Sleep mode" mask="0x06" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="VREGCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Performance Mode"
-                              mask="0x07"
-                              name="PMODE"
-                              rw="RW"
-                              values="SLPCTRL_PMODE"/>
-                    <bitfield caption="High Temperature Low Leakage Enable"
-                              mask="0x10"
-                              name="HTLLEN"
-                              rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Performance Mode" mask="0x07" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                 </register>
             </register-group>
             <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
@@ -4696,8 +2159,7 @@
                 <value caption="Standby Mode" name="STDBY" value="0x01"/>
                 <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
             </value-group>
-            <value-group caption="High Temperature Low Leakage Enable select"
-                         name="SLPCTRL_HTLLEN">
+            <value-group caption="High Temperature Low Leakage Enable select" name="SLPCTRL_HTLLEN">
                 <value caption="Disabled" name="OFF" value="0x0"/>
                 <value caption="Enabled" name="ON" value="0x1"/>
             </value-group>
@@ -4708,110 +2170,36 @@
         </module>
         <module caption="Serial Peripheral Interface" id="spi_8bit_v2" name="SPI">
             <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable Module" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Prescaler"
-                              mask="0x06"
-                              name="PRESC"
-                              rw="RW"
-                              values="SPI_PRESC"/>
+                    <bitfield caption="Prescaler" mask="0x06" name="PRESC" rw="RW" values="SPI_PRESC"/>
                     <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
-                    <bitfield caption="Host Operation Enable"
-                              mask="0x20"
-                              name="MASTER"
-                              rw="RW"/>
+                    <bitfield caption="Host Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
                     <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI Mode"
-                              mask="0x03"
-                              name="MODE"
-                              rw="RW"
-                              values="SPI_MODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="SPI Mode" mask="0x03" name="MODE" rw="RW" values="SPI_MODE"/>
                     <bitfield caption="SPI Select Disable" mask="0x04" name="SSD" rw="RW"/>
-                    <bitfield caption="Buffer Mode Wait for Receive"
-                              mask="0x40"
-                              name="BUFWR"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Mode Wait for Receive" mask="0x40" name="BUFWR" rw="RW"/>
                     <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Enable" mask="0x01" name="IE" rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Enable"
-                              mask="0x10"
-                              name="SSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <mode name="DEFAULT" qualifier="SPI.CTRLB.BUFEN" value="0"/>
                     <mode name="BUFFERED" qualifier="SPI.CTRLB.BUFEN" value="1"/>
-                    <bitfield caption="Buffer Overflow"
-                              mask="0x01"
-                              modes="BUFFERED"
-                              name="BUFOVF"
-                              rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Flag"
-                              mask="0x10"
-                              modes="BUFFERED"
-                              name="SSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Flag"
-                              mask="0x20"
-                              modes="BUFFERED"
-                              name="DREIF"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Flag"
-                              mask="0x40"
-                              modes="BUFFERED"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              modes="BUFFERED"
-                              name="RXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Write Collision"
-                              mask="0x40"
-                              modes="DEFAULT"
-                              name="WRCOL"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt Flag"
-                              mask="0x80"
-                              modes="DEFAULT"
-                              name="IF"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Overflow" mask="0x01" modes="BUFFERED" name="BUFOVF" rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Flag" mask="0x10" modes="BUFFERED" name="SSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" modes="BUFFERED" name="DREIF" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" modes="BUFFERED" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" modes="BUFFERED" name="RXCIF" rw="RW"/>
+                    <bitfield caption="Write Collision" mask="0x40" modes="DEFAULT" name="WRCOL" rw="RW"/>
+                    <bitfield caption="Interrupt Flag" mask="0x80" modes="DEFAULT" name="IF" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
             </register-group>
@@ -4830,543 +2218,149 @@
         </module>
         <module caption="System Configuration Registers" id="avrdd" name="SYSCFG">
             <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
-                <register caption="Revision ID"
-                          name="REVID"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Control"
-                          name="OCDMCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Status"
-                          initval="0x00"
-                          name="OCDMSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+                <register caption="OCD Message Control" name="OCDMCTRL" offset="0x04" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMSTATUS" offset="0x05" rw="RW" size="1">
                     <bitfield caption="OCD Message Valid" mask="0x01" name="VALID" rw="RW"/>
                 </register>
             </register-group>
         </module>
-        <module caption="16-bit Timer/Counter Type A"
-                id="tmr_16b_pwm_v1"
-                name="TCA">
+        <module caption="16-bit Timer/Counter Type A" id="tmr_16b_pwm_v1" name="TCA">
             <register-group caption="16-bit Timer/Counter Type A" name="TCA" size="0x40">
-                <mode caption="Single Mode"
-                      name="SINGLE"
-                      qualifier="TCA.SINGLE.CTRLD.SPLITM"
-                      value="0"/>
-                <mode caption="Split Mode"
-                      name="SPLIT"
-                      qualifier="TCA.SPLIT.CTRLD.SPLITM"
-                      value="1"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <mode caption="Single Mode" name="SINGLE" qualifier="TCA.SINGLE.CTRLD.SPLITM" value="0"/>
+                <mode caption="Split Mode" name="SPLIT" qualifier="TCA.SPLIT.CTRLD.SPLITM" value="1"/>
+                <register caption="Control A" initval="0x00" modes="SINGLE" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x07"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                <register caption="Control B" initval="0x00" modes="SINGLE" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                     <bitfield caption="Auto Lock Update" mask="0x08" name="ALUPD" rw="RW"/>
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare 0 Waveform Output Value"
-                              mask="0x01"
-                              name="CMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Waveform Output Value"
-                              mask="0x02"
-                              name="CMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Waveform Output Value"
-                              mask="0x04"
-                              name="CMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SINGLE" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x01" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x02" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x04" name="CMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SINGLE" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Control E Clear" initval="0x00" modes="SINGLE" name="CTRLECLR" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Direction"
-                              mask="0x01"
-                              name="DIR"
-                              rw="RW"
-                              values="TCA_SINGLE_DIR"/>
+                <register caption="Control E Set" initval="0x00" modes="SINGLE" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control F Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Clear" initval="0x00" modes="SINGLE" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Control F Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFSET"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Set" initval="0x00" modes="SINGLE" name="CTRLFSET" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="EVCTRL"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Count on Event Input A"
-                              mask="0x01"
-                              name="CNTAEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action A"
-                              mask="0x0E"
-                              name="EVACTA"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTA"/>
-                    <bitfield caption="Count on Event Input B"
-                              mask="0x10"
-                              name="CNTBEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action B"
-                              mask="0xE0"
-                              name="EVACTB"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTB"/>
+                <register caption="Event Control" initval="0x00" modes="SINGLE" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input A" mask="0x01" name="CNTAEI" rw="RW"/>
+                    <bitfield caption="Event Action A" mask="0x0E" name="EVACTA" rw="RW" values="TCA_SINGLE_EVACTA"/>
+                    <bitfield caption="Count on Event Input B" mask="0x10" name="CNTBEI" rw="RW"/>
+                    <bitfield caption="Event Action B" mask="0xE0" name="EVACTB" rw="RW" values="TCA_SINGLE_EVACTB"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" modes="SINGLE" name="INTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" modes="SINGLE" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SINGLE" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary data for 16-bit Access"
-                          modes="SINGLE"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          modes="SINGLE"
-                          name="CNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period"
-                          modes="SINGLE"
-                          name="PER"
-                          offset="0x26"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0"
-                          modes="SINGLE"
-                          name="CMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1"
-                          modes="SINGLE"
-                          name="CMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2"
-                          modes="SINGLE"
-                          name="CMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period Buffer"
-                          modes="SINGLE"
-                          name="PERBUF"
-                          offset="0x36"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0 Buffer"
-                          modes="SINGLE"
-                          name="CMP0BUF"
-                          offset="0x38"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1 Buffer"
-                          modes="SINGLE"
-                          name="CMP1BUF"
-                          offset="0x3A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2 Buffer"
-                          modes="SINGLE"
-                          name="CMP2BUF"
-                          offset="0x3C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary data for 16-bit Access" modes="SINGLE" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Count" modes="SINGLE" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Period" modes="SINGLE" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Compare 0" modes="SINGLE" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 1" modes="SINGLE" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 2" modes="SINGLE" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Period Buffer" modes="SINGLE" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" modes="SINGLE" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" modes="SINGLE" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" modes="SINGLE" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" modes="SPLIT" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Enable"
-                              mask="0x01"
-                              name="LCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Enable"
-                              mask="0x02"
-                              name="LCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Enable"
-                              mask="0x04"
-                              name="LCMP2EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Enable"
-                              mask="0x10"
-                              name="HCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Enable"
-                              mask="0x20"
-                              name="HCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Enable"
-                              mask="0x40"
-                              name="HCMP2EN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" modes="SPLIT" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Enable" mask="0x01" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x02" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x04" name="LCMP2EN" rw="RW"/>
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Output Value"
-                              mask="0x01"
-                              name="LCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Output Value"
-                              mask="0x02"
-                              name="LCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Output Value"
-                              mask="0x04"
-                              name="LCMP2OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Output Value"
-                              mask="0x10"
-                              name="HCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Output Value"
-                              mask="0x20"
-                              name="HCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Output Value"
-                              mask="0x40"
-                              name="HCMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SPLIT" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x01" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x02" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x04" name="LCMP2OV" rw="RW"/>
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SPLIT" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Clear" initval="0x00" modes="SPLIT" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Set" initval="0x00" modes="SPLIT" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Enable"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Enable"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Enable"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Enable"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Enable"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" modes="SPLIT" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Flag"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Flag"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Flag"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Flag"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Flag"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" modes="SPLIT" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SPLIT" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Low Count"
-                          modes="SPLIT"
-                          name="LCNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Count"
-                          modes="SPLIT"
-                          name="HCNT"
-                          offset="0x21"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Period"
-                          modes="SPLIT"
-                          name="LPER"
-                          offset="0x26"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Period"
-                          modes="SPLIT"
-                          name="HPER"
-                          offset="0x27"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP0"
-                          offset="0x29"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP1"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP2"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Low Count" modes="SPLIT" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="High Count" modes="SPLIT" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="Low Period" modes="SPLIT" name="LPER" offset="0x26" rw="RW" size="1"/>
+                <register caption="High Period" modes="SPLIT" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
             </register-group>
             <value-group caption="Clock Selection" name="TCA_SINGLE_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5383,12 +2377,8 @@
                 <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
                 <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
                 <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
-                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM"
-                       name="DSBOTH"
-                       value="0x06"/>
-                <value caption="Dual Slope PWM, overflow on BOTTOM"
-                       name="DSBOTTOM"
-                       value="0x07"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
             </value-group>
             <value-group caption="Command select" name="TCA_SINGLE_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
@@ -5401,31 +2391,17 @@
                 <value caption="Count down" name="DOWN" value="0x1"/>
             </value-group>
             <value-group caption="Event Action A select" name="TCA_SINGLE_EVACTA">
-                <value caption="Count on positive edge event"
-                       name="CNT_POSEDGE"
-                       value="0x00"/>
+                <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
-                <value caption="Count on prescaled clock while event line is 1."
-                       name="CNT_HIGHLVL"
-                       value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
+                <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
-                <value caption="Restart counter at positive edge event"
-                       name="RESTART_POSEDGE"
-                       value="0x04"/>
-                <value caption="Restart counter on any edge event"
-                       name="RESTART_ANYEDGE"
-                       value="0x05"/>
-                <value caption="Restart counter while event line is 1."
-                       name="RESTART_HIGHLVL"
-                       value="0x06"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+                <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
+                <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
+                <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
             </value-group>
             <value-group caption="Clock Selection" name="TCA_SPLIT_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5445,107 +2421,46 @@
             </value-group>
             <value-group caption="Command Enable select" name="TCA_SPLIT_CMDEN">
                 <value caption="None" name="NONE" value="0x0"/>
-                <value caption="Both low byte and high byte counter"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Both low byte and high byte counter" name="BOTH" value="0x3"/>
             </value-group>
         </module>
         <module caption="16-bit Timer Type B" id="tmr_16b_capture_v1" name="TCB">
             <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Select"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCB_CLKSEL"/>
+                    <bitfield caption="Clock Select" mask="0x0E" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
                     <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
                     <bitfield caption="Cascade two timers" mask="0x20" name="CASCADE" rw="RW"/>
                     <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control Register B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Timer Mode"
-                              mask="0x07"
-                              name="CNTMODE"
-                              rw="RW"
-                              values="TCB_CNTMODE"/>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Timer Mode" mask="0x07" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
                     <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
                     <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
                     <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Event Input Enable" mask="0x01" name="CAPTEI" rw="RW"/>
                     <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
-                    <bitfield caption="Input Capture Noise Cancellation Filter"
-                              mask="0x40"
-                              name="FILTER"
-                              rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
                     <bitfield caption="Run" mask="0x01" name="RUN" rw="R"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Value"
-                          name="TEMP"
-                          offset="0x9"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          initval="0x0000"
-                          name="CNT"
-                          offset="0xA"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare or Capture"
-                          name="CCMP"
-                          offset="0xC"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock Select" name="TCB_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5557,247 +2472,78 @@
                 <value caption="Periodic Interrupt" name="INT" value="0x00"/>
                 <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
                 <value caption="Input Capture Event" name="CAPT" value="0x02"/>
-                <value caption="Input Capture Frequency measurement"
-                       name="FRQ"
-                       value="0x03"/>
-                <value caption="Input Capture Pulse-Width measurement"
-                       name="PW"
-                       value="0x04"/>
-                <value caption="Input Capture Frequency and Pulse-Width measurement"
-                       name="FRQPW"
-                       value="0x05"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
                 <value caption="Single Shot" name="SINGLE" value="0x06"/>
                 <value caption="8-bit PWM" name="PWM8" value="0x07"/>
             </value-group>
         </module>
         <module caption="Timer Counter D" id="tmr_12b_psc_v1" name="TCD">
             <register-group caption="Timer Counter D" name="TCD" size="0x40">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler"
-                              mask="0x06"
-                              name="SYNCPRES"
-                              rw="RW"
-                              values="TCD_SYNCPRES"/>
-                    <bitfield caption="Counter prescaler"
-                              mask="0x18"
-                              name="CNTPRES"
-                              rw="RW"
-                              values="TCD_CNTPRES"/>
-                    <bitfield caption="Clock select"
-                              mask="0x60"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCD_CLKSEL"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x06" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+                    <bitfield caption="Counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+                    <bitfield caption="Clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x03"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCD_WGMODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x03" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare output value override"
-                              mask="0x01"
-                              name="CMPOVR"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare output value override" mask="0x01" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Auto update" mask="0x02" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Fifty percent waveform"
-                              mask="0x08"
-                              name="FIFTY"
-                              rw="RW"/>
-                    <bitfield caption="Compare C output select"
-                              mask="0x40"
-                              name="CMPCSEL"
-                              rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select"
-                              mask="0x80"
-                              name="CMPDSEL"
-                              rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Fifty percent waveform" mask="0x08" name="FIFTY" rw="RW"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x0F" name="CMPAVAL" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0xF0" name="CMPBVAL" rw="RW"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronize end of cycle strobe"
-                              mask="0x01"
-                              name="SYNCEOC"
-                              rw="RW"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Synchronize end of cycle strobe" mask="0x01" name="SYNCEOC" rw="RW"/>
                     <bitfield caption="synchronize strobe" mask="0x02" name="SYNC" rw="RW"/>
                     <bitfield caption="Restart strobe" mask="0x04" name="RESTART" rw="RW"/>
-                    <bitfield caption="Software Capture A Strobe"
-                              mask="0x08"
-                              name="SCAPTUREA"
-                              rw="RW"/>
-                    <bitfield caption="Software Capture B Strobe"
-                              mask="0x10"
-                              name="SCAPTUREB"
-                              rw="RW"/>
-                    <bitfield caption="Disable at end of cycle"
-                              mask="0x80"
-                              name="DISEOC"
-                              rw="RW"/>
+                    <bitfield caption="Software Capture A Strobe" mask="0x08" name="SCAPTUREA" rw="RW"/>
+                    <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+                    <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
                 </register>
-                <register caption="EVCTRLA"
-                          initval="0x00"
-                          name="EVCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="EVCTRLB"
-                          initval="0x00"
-                          name="EVCTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Enable ready" mask="0x01" name="ENRDY" rw="R"/>
                     <bitfield caption="Command ready" mask="0x02" name="CMDRDY" rw="R"/>
                     <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
                     <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
                 </register>
-                <register caption="Input Control A"
-                          initval="0x00"
-                          name="INPUTCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Input Control B"
-                          initval="0x00"
-                          name="INPUTCTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Fault Control"
-                          initval="0x00"
-                          name="FAULTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x01" name="CMPA" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0x02" name="CMPB" rw="RW"/>
                     <bitfield caption="Compare C value" mask="0x04" name="CMPC" rw="RW"/>
@@ -5807,100 +2553,33 @@
                     <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
                     <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
                 </register>
-                <register caption="Delay Control"
-                          initval="0x00"
-                          name="DLYCTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Delay select"
-                              mask="0x03"
-                              name="DLYSEL"
-                              rw="RW"
-                              values="TCD_DLYSEL"/>
-                    <bitfield caption="Delay trigger"
-                              mask="0x0C"
-                              name="DLYTRIG"
-                              rw="RW"
-                              values="TCD_DLYTRIG"/>
-                    <bitfield caption="Delay prescaler"
-                              mask="0x30"
-                              name="DLYPRESC"
-                              rw="RW"
-                              values="TCD_DLYPRESC"/>
+                <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Delay select" mask="0x03" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+                    <bitfield caption="Delay trigger" mask="0x0C" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+                    <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
                 </register>
-                <register caption="Delay value"
-                          initval="0x00"
-                          name="DLYVAL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Delay value" mask="0xFF" name="DLYVAL" rw="RW"/>
                 </register>
-                <register caption="Dither Control A"
-                          initval="0x00"
-                          name="DITCTRL"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Dither select"
-                              mask="0x03"
-                              name="DITHERSEL"
-                              rw="RW"
-                              values="TCD_DITHERSEL"/>
+                <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Dither select" mask="0x03" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
                 </register>
-                <register caption="Dither value"
-                          initval="0x00"
-                          name="DITVAL"
-                          offset="0x19"
-                          rw="RW"
-                          size="1">
+                <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
                     <bitfield caption="Dither value" mask="0x0F" name="DITHER" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                     <bitfield caption="Fault detection" mask="0x04" name="FAULTDET" rw="RW"/>
                 </register>
-                <register caption="Capture A"
-                          name="CAPTUREA"
-                          offset="0x22"
-                          rw="R"
-                          size="2"/>
-                <register caption="Capture B"
-                          name="CAPTUREB"
-                          offset="0x24"
-                          rw="R"
-                          size="2"/>
-                <register caption="Compare A Set"
-                          name="CMPASET"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare A Clear"
-                          name="CMPACLR"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Set"
-                          name="CMPBSET"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Clear"
-                          name="CMPBCLR"
-                          offset="0x2E"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+                <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+                <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock select" name="TCD_CLKSEL">
-                <value caption="Internal High-Frequency oscillator"
-                       name="OSCHF"
-                       value="0x00"/>
+                <value caption="Internal High-Frequency oscillator" name="OSCHF" value="0x00"/>
                 <value caption="PLL" name="PLL" value="0x01"/>
                 <value caption="External Clock" name="EXTCLK" value="0x02"/>
                 <value caption="Peripheral clock" name="CLKPER" value="0x03"/>
@@ -5911,18 +2590,10 @@
                 <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
             </value-group>
             <value-group caption="Synchronization prescaler select" name="TCD_SYNCPRES">
-                <value caption="Selected clock source divided by 1"
-                       name="DIV1"
-                       value="0x00"/>
-                <value caption="Selected clock source divided by 2"
-                       name="DIV2"
-                       value="0x01"/>
-                <value caption="Selected clock source divided by 4"
-                       name="DIV4"
-                       value="0x02"/>
-                <value caption="Selected clock source divided by 8"
-                       name="DIV8"
-                       value="0x03"/>
+                <value caption="Selected clock source divided by 1" name="DIV1" value="0x00"/>
+                <value caption="Selected clock source divided by 2" name="DIV2" value="0x01"/>
+                <value caption="Selected clock source divided by 4" name="DIV4" value="0x02"/>
+                <value caption="Selected clock source divided by 8" name="DIV8" value="0x03"/>
             </value-group>
             <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
                 <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
@@ -5963,176 +2634,63 @@
             </value-group>
             <value-group caption="Event action select" name="TCD_ACTION">
                 <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
-                <value caption="Event trigger a fault and capture"
-                       name="CAPTURE"
-                       value="0x1"/>
+                <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
             </value-group>
             <value-group caption="Event config select" name="TCD_CFG">
-                <value caption="Neither Filter nor Asynchronous Event is enabled"
-                       name="NEITHER"
-                       value="0x0"/>
-                <value caption="Input Capture Noise Cancellation Filter enabled"
-                       name="FILTER"
-                       value="0x1"/>
-                <value caption="Asynchronous Event output qualification enabled"
-                       name="ASYNC"
-                       value="0x2"/>
+                <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+                <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+                <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="Edge select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW"
-                       value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH"
-                       value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
-                <value caption="Stop output, jump to opposite compare cycle and wait"
-                       name="JMPWAIT"
-                       value="0x01"/>
-                <value caption="Stop output, execute opposite compare cycle and wait"
-                       name="EXECWAIT"
-                       value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active"
-                       name="EXECFAULT"
-                       value="0x03"/>
-                <value caption="Stop all outputs, maintain frequency"
-                       name="FREQ"
-                       value="0x04"/>
-                <value caption="Stop all outputs, execute dead time while fault active"
-                       name="EXECDT"
-                       value="0x05"/>
-                <value caption="Stop all outputs, jump to next compare cycle and wait"
-                       name="WAIT"
-                       value="0x06"/>
-                <value caption="Stop all outputs, wait for software action"
-                       name="WAITSW"
-                       value="0x07"/>
-                <value caption="Stop output on edge, jump to next compare cycle"
-                       name="EDGETRIG"
-                       value="0x08"/>
-                <value caption="Stop output on edge, maintain frequency"
-                       name="EDGETRIGFREQ"
-                       value="0x09"/>
-                <value caption="Stop output at level, maintain frequency"
-                       name="LVLTRIGFREQ"
-                       value="0x0A"/>
+                <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
+                <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
+                <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
+                <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
+                <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
+                <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x07"/>
+                <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x08"/>
+                <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x09"/>
+                <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0x0A"/>
             </value-group>
         </module>
         <module caption="Two-Wire Interface" id="i2c_8bit_avr_v3" name="TWI">
             <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="SDA Setup Time"
-                              mask="0x10"
-                              name="SDASETUP"
-                              rw="RW"
-                              values="TWI_SDASETUP"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Dual Mode Control"
-                          initval="0x00"
-                          name="DUALCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
+                <register caption="Dual Mode Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Debug Run"
-                              mask="0x01"
-                              name="DBGRUN"
-                              rw="RW"
-                              values="TWI_DBGRUN"/>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW" values="TWI_DBGRUN"/>
                 </register>
-                <register caption="Host Control A"
-                          initval="0x00"
-                          name="MCTRLA"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Inactive Bus Time-Out"
-                              mask="0x0C"
-                              name="TIMEOUT"
-                              rw="RW"
-                              values="TWI_TIMEOUT"/>
+                    <bitfield caption="Inactive Bus Time-Out" mask="0x0C" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
                     <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
-                    <bitfield caption="Write Interrupt Enable"
-                              mask="0x40"
-                              name="WIEN"
-                              rw="RW"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
                     <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
                 </register>
-                <register caption="Host Control B"
-                          initval="0x00"
-                          name="MCTRLB"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="MCMD"
-                              rw="RW"
-                              values="TWI_MCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Host Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                     <bitfield caption="Flush" mask="0x08" name="FLUSH" rw="RW"/>
                 </register>
-                <register caption="Host STATUS"
-                          initval="0x00"
-                          name="MSTATUS"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bus State"
-                              mask="0x03"
-                              name="BUSSTATE"
-                              rw="RW"
-                              values="TWI_BUSSTATE"/>
+                <register caption="Host STATUS" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
@@ -6140,147 +2698,69 @@
                     <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
                     <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
                 </register>
-                <register caption="Host Baud Rate"
-                          initval="0x00"
-                          name="MBAUD"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Baud Rate" initval="0x00" name="MBAUD" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Baud Rate" mask="0xFF" name="BAUD" rw="RW"/>
                 </register>
-                <register caption="Host Address"
-                          initval="0x00"
-                          name="MADDR"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Address" initval="0x00" name="MADDR" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Host Data"
-                          initval="0x00"
-                          name="MDATA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Data" initval="0x00" name="MDATA" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Control A"
-                          initval="0x00"
-                          name="SCTRLA"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Address Recognition Mode"
-                              mask="0x04"
-                              name="PMEN"
-                              rw="RW"/>
+                    <bitfield caption="Address Recognition Mode" mask="0x04" name="PMEN" rw="RW"/>
                     <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Enable"
-                              mask="0x40"
-                              name="APIEN"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
                     <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
                 </register>
-                <register caption="Client Control B"
-                          initval="0x00"
-                          name="SCTRLB"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="SCMD"
-                              rw="RW"
-                              values="TWI_SCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Client Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                 </register>
-                <register caption="Client Status"
-                          initval="0x00"
-                          name="SSTATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Address or Stop"
-                              mask="0x01"
-                              name="AP"
-                              rw="RW"
-                              values="TWI_AP"/>
+                <register caption="Client Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Address or Stop" mask="0x01" name="AP" rw="RW" values="TWI_AP"/>
                     <bitfield caption="Read/Write Direction" mask="0x02" name="DIR" rw="RW"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Collision" mask="0x08" name="COLL" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
                     <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Flag"
-                              mask="0x40"
-                              name="APIF"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
                     <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
                 </register>
-                <register caption="Client Address"
-                          initval="0x00"
-                          name="SADDR"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address" initval="0x00" name="SADDR" offset="0xC" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Client Data"
-                          initval="0x00"
-                          name="SDATA"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Data" initval="0x00" name="SDATA" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Address Mask"
-                          initval="0x00"
-                          name="SADDRMASK"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address Mask" initval="0x00" name="SADDRMASK" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Address Mask Enable" mask="0x01" name="ADDREN" rw="RW"/>
                     <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Fast-mode Plus Enable select" name="TWI_FMPEN">
-                <value caption="Operating in Standard-mode or Fast-mode"
-                       name="OFF"
-                       value="0x0"/>
+                <value caption="Operating in Standard-mode or Fast-mode" name="OFF" value="0x0"/>
                 <value caption="Operating in Fast-mode Plus" name="ON" value="0x1"/>
             </value-group>
             <value-group caption="Input voltage transition level select" name="TWI_INPUTLVL">
                 <value caption="I2C input voltage transition level" name="I2C" value="0x0"/>
-                <value caption="SMBus 3.0 input voltage transition level"
-                       name="SMBUS"
-                       value="0x1"/>
+                <value caption="SMBus 3.0 input voltage transition level" name="SMBUS" value="0x1"/>
             </value-group>
             <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
                 <value caption="No SDA Hold Delay" name="OFF" value="0x0"/>
                 <value caption="Short SDA hold time" name="50NS" value="0x1"/>
-                <value caption="Meets SMBUS 2.0 specification under typical conditions"
-                       name="300NS"
-                       value="0x2"/>
-                <value caption="Meets SMBUS 2.0 specificaiton across all corners"
-                       name="500NS"
-                       value="0x3"/>
+                <value caption="Meets SMBUS 2.0 specification under typical conditions" name="300NS" value="0x2"/>
+                <value caption="Meets SMBUS 2.0 specificaiton across all corners" name="500NS" value="0x3"/>
             </value-group>
             <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
                 <value caption="SDA setup time is four clock cycles" name="4CYC" value="0"/>
                 <value caption="SDA setup time is eight clock cycle" name="8CYC" value="1"/>
             </value-group>
             <value-group caption="Debug Run select" name="TWI_DBGRUN">
-                <value caption="The peripheral is halted in Break Debug mode and ignores events"
-                       name="HALT"
-                       value="0"/>
-                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted"
-                       name="RUN"
-                       value="1"/>
+                <value caption="The peripheral is halted in Break Debug mode and ignores events" name="HALT" value="0"/>
+                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted" name="RUN" value="1"/>
             </value-group>
             <value-group caption="Inactive Bus Time-Out select" name="TWI_TIMEOUT">
                 <value caption="Bus time-out disabled. I2C." name="DISABLED" value="0"/>
@@ -6294,15 +2774,9 @@
             </value-group>
             <value-group caption="Command select" name="TWI_MCMD">
                 <value caption="No action" name="NOACT" value="0"/>
-                <value caption="Execute Acknowledge Action followed by repeated Start."
-                       name="REPSTART"
-                       value="1"/>
-                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR."
-                       name="RECVTRANS"
-                       value="2"/>
-                <value caption="Execute Acknowledge Action followed by issuing a Stop condition."
-                       name="STOP"
-                       value="3"/>
+                <value caption="Execute Acknowledge Action followed by repeated Start." name="REPSTART" value="1"/>
+                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR." name="RECVTRANS" value="2"/>
+                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP" value="3"/>
             </value-group>
             <value-group caption="Bus State select" name="TWI_BUSSTATE">
                 <value caption="Unknown bus state" name="UNKNOWN" value="0"/>
@@ -6313,254 +2787,81 @@
             <value-group caption="Command select" name="TWI_SCMD">
                 <value caption="No Action" name="NOACT" value="0"/>
                 <value caption="Complete transaction" name="COMPTRANS" value="2"/>
-                <value caption="Used in response to an interrupt"
-                       name="RESPONSE"
-                       value="3"/>
+                <value caption="Used in response to an interrupt" name="RESPONSE" value="3"/>
             </value-group>
             <value-group caption="Address or Stop select" name="TWI_AP">
-                <value caption="A Stop condition generated the interrupt on APIF flag"
-                       name="STOP"
-                       value="0"/>
-                <value caption="Address detection generated the interrupt on APIF flag"
-                       name="ADR"
-                       value="1"/>
+                <value caption="A Stop condition generated the interrupt on APIF flag" name="STOP" value="0"/>
+                <value caption="Address detection generated the interrupt on APIF flag" name="ADR" value="1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                            name="USART"
-                            size="0x10">
-                <register caption="Receive Data Low Byte"
-                          initval="0x00"
-                          name="RXDATAL"
-                          offset="0x0"
-                          rw="R"
-                          size="1">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xFF" name="DATA" rw="R"/>
                 </register>
-                <register caption="Receive Data High Byte"
-                          initval="0x00"
-                          name="RXDATAH"
-                          offset="0x1"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="Receiver Data Register"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="R"/>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Receiver Data Register" mask="0x01" name="DATA8" rw="R"/>
                     <bitfield caption="Parity Error" mask="0x02" name="PERR" rw="R"/>
                     <bitfield caption="Frame Error" mask="0x04" name="FERR" rw="R"/>
                     <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Transmit Data Low Byte"
-                          initval="0x00"
-                          name="TXDATAL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register"
-                              mask="0xFF"
-                              name="DATA"
-                              rw="RW"/>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Transmit Data High Byte"
-                          initval="0x00"
-                          name="TXDATAH"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="RW"/>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x01" name="DATA8" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Wait For Break" mask="0x01" name="WFB" rw="RW"/>
                     <bitfield caption="Break Detected Flag" mask="0x02" name="BDF" rw="RW"/>
-                    <bitfield caption="Inconsistent Sync Field Interrupt Flag"
-                              mask="0x08"
-                              name="ISFIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Start Interrupt"
-                              mask="0x10"
-                              name="RXSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Flag"
-                              mask="0x20"
-                              name="DREIF"
-                              rw="R"/>
-                    <bitfield caption="Transmit Interrupt Flag"
-                              mask="0x40"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x08" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="RS485 Mode internal transmitter"
-                              mask="0x01"
-                              name="RS485"
-                              rw="RW"
-                              values="USART_RS485"/>
-                    <bitfield caption="Auto-baud Error Interrupt Enable"
-                              mask="0x04"
-                              name="ABEIE"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x01" name="RS485" rw="RW" values="USART_RS485"/>
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x04" name="ABEIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x08" name="LBME" rw="RW"/>
-                    <bitfield caption="Receiver Start Frame Interrupt Enable"
-                              mask="0x10"
-                              name="RXSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transmit Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multi-processor Communication Mode"
-                              mask="0x01"
-                              name="MPCM"
-                              rw="RW"/>
-                    <bitfield caption="Receiver Mode"
-                              mask="0x06"
-                              name="RXMODE"
-                              rw="RW"
-                              values="USART_RXMODE"/>
-                    <bitfield caption="Open Drain Mode Enable"
-                              mask="0x08"
-                              name="ODME"
-                              rw="RW"/>
-                    <bitfield caption="Start Frame Detection Enable"
-                              mask="0x10"
-                              name="SFDEN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x06" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x08" name="ODME" rw="RW"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
                     <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
                     <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x03"
-                          name="CTRLC"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="USART.CTRLC.CMODE" value="0x00 0x01 0x02"/>
                     <mode name="MSPI" qualifier="USART.CTRLC.CMODE" value="0x03"/>
-                    <bitfield caption="Communication Mode"
-                              mask="0xC0"
-                              name="CMODE"
-                              rw="RW"
-                              values="USART_CMODE"/>
-                    <bitfield caption="SPI Host Mode, Clock Phase"
-                              mask="0x02"
-                              modes="MSPI"
-                              name="UCPHA"
-                              rw="RW"/>
-                    <bitfield caption="SPI Host Mode, Data Order"
-                              mask="0x04"
-                              modes="MSPI"
-                              name="UDORD"
-                              rw="RW"/>
-                    <bitfield caption="Character Size"
-                              mask="0x07"
-                              modes="NORMAL"
-                              name="CHSIZE"
-                              rw="RW"
-                              values="USART_NORMAL_CHSIZE"/>
-                    <bitfield caption="Stop Bit Mode"
-                              mask="0x08"
-                              modes="NORMAL"
-                              name="SBMODE"
-                              rw="RW"
-                              values="USART_NORMAL_SBMODE"/>
-                    <bitfield caption="Parity Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="PMODE"
-                              rw="RW"
-                              values="USART_NORMAL_PMODE"/>
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" rw="RW" values="USART_CMODE"/>
+                    <bitfield caption="SPI Host Mode, Clock Phase" mask="0x02" modes="MSPI" name="UCPHA" rw="RW"/>
+                    <bitfield caption="SPI Host Mode, Data Order" mask="0x04" modes="MSPI" name="UDORD" rw="RW"/>
+                    <bitfield caption="Character Size" mask="0x07" modes="NORMAL" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" modes="NORMAL" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" modes="NORMAL" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
                 </register>
-                <register caption="Baud Rate"
-                          initval="0x0000"
-                          name="BAUD"
-                          offset="0x8"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Auto Baud Window"
-                              mask="0xC0"
-                              name="ABW"
-                              rw="RW"
-                              values="USART_ABW"/>
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xC0" name="ABW" rw="RW" values="USART_ABW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="IrDA Event Input Enable"
-                              mask="0x01"
-                              name="IREI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x01" name="IREI" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control"
-                          initval="0x00"
-                          name="TXPLCTRL"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xFF" name="TXPL" rw="RW"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control"
-                          initval="0x00"
-                          name="RXPLCTRL"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7F" name="RXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -6585,12 +2886,8 @@
                 <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
                 <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
                 <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
-                <value caption="Character size: 9 bit read low byte first"
-                       name="9BITL"
-                       value="0x06"/>
-                <value caption="Character size: 9 bit read high byte first"
-                       name="9BITH"
-                       value="0x07"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
             </value-group>
             <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
                 <value caption="No Parity" name="DISABLED" value="0x00"/>
@@ -6610,234 +2907,62 @@
         </module>
         <module caption="User Row" id="avrdd" name="USERROW">
             <register-group caption="User Row" name="USERROW" size="0x20">
-                <register caption="User Row Byte 0"
-                          name="USERROW0"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 1"
-                          name="USERROW1"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 2"
-                          name="USERROW2"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 3"
-                          name="USERROW3"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 4"
-                          name="USERROW4"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 5"
-                          name="USERROW5"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 6"
-                          name="USERROW6"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 7"
-                          name="USERROW7"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 8"
-                          name="USERROW8"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 9"
-                          name="USERROW9"
-                          offset="0x09"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 10"
-                          name="USERROW10"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 11"
-                          name="USERROW11"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 12"
-                          name="USERROW12"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 13"
-                          name="USERROW13"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 14"
-                          name="USERROW14"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 15"
-                          name="USERROW15"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 16"
-                          name="USERROW16"
-                          offset="0x10"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 17"
-                          name="USERROW17"
-                          offset="0x11"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 18"
-                          name="USERROW18"
-                          offset="0x12"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 19"
-                          name="USERROW19"
-                          offset="0x13"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 20"
-                          name="USERROW20"
-                          offset="0x14"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 21"
-                          name="USERROW21"
-                          offset="0x15"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 22"
-                          name="USERROW22"
-                          offset="0x16"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 23"
-                          name="USERROW23"
-                          offset="0x17"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 24"
-                          name="USERROW24"
-                          offset="0x18"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 25"
-                          name="USERROW25"
-                          offset="0x19"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 26"
-                          name="USERROW26"
-                          offset="0x1A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 27"
-                          name="USERROW27"
-                          offset="0x1B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 28"
-                          name="USERROW28"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 29"
-                          name="USERROW29"
-                          offset="0x1D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 30"
-                          name="USERROW30"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 31"
-                          name="USERROW31"
-                          offset="0x1F"
-                          rw="RW"
-                          size="1"/>
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Virtual Ports" id="gpio_ports_avr_v2_vport" name="VPORT">
             <register-group caption="Virtual Ports" name="VPORT" size="0x4">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Voltage reference" id="avrdd" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
-                <register caption="ADC0 Reference"
-                          initval="0x00"
-                          name="ADC0REF"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="ADC0 Reference" initval="0x00" name="ADC0REF" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="DAC0 Reference"
-                          initval="0x00"
-                          name="DAC0REF"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="DAC0 Reference" initval="0x00" name="DAC0REF" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="AC Reference"
-                          initval="0x00"
-                          name="ACREF"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="AC Reference" initval="0x00" name="ACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
             </register-group>
@@ -6852,33 +2977,12 @@
         </module>
         <module caption="Watch-Dog Timer" id="wdt_windowed_v2" name="WDT">
             <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="WDT_PERIOD"/>
-                    <bitfield caption="Window"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="WDT_WINDOW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x0F" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xF0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Syncronization busy"
-                              mask="0x01"
-                              name="SYNCBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY" rw="R"/>
                     <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
                 </register>
             </register-group>
@@ -6913,60 +3017,25 @@
         </module>
         <module caption="Zero Cross Detect" id="cmp_zxover_ctrl_v3" name="ZCD">
             <register-group caption="Zero Cross Detect" name="ZCD" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Invert signal from pin"
-                              mask="0x08"
-                              name="INVERT"
-                              rw="RW"/>
+                    <bitfield caption="Invert signal from pin" mask="0x08" name="INVERT" rw="RW"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x03"
-                              name="INTMODE"
-                              rw="RW"
-                              values="ZCD_INTMODE"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x03" name="INTMODE" rw="RW" values="ZCD_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="ZCD Interrupt Flag" mask="0x01" name="CROSSIF" rw="RW"/>
-                    <bitfield caption="ZCD State"
-                              mask="0x10"
-                              name="STATE"
-                              rw="R"
-                              values="ZCD_STATE"/>
+                    <bitfield caption="ZCD State" mask="0x10" name="STATE" rw="R" values="ZCD_STATE"/>
                 </register>
             </register-group>
             <value-group caption="Interrupt Mode select" name="ZCD_INTMODE">
                 <value caption="No interrupt" name="NONE" value="0x0"/>
-                <value caption="Interrupt on rising input signal"
-                       name="RISING"
-                       value="0x1"/>
-                <value caption="Interrupt on falling input signal"
-                       name="FALLING"
-                       value="0x2"/>
-                <value caption="Interrupt on both rising and falling input signal"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Interrupt on rising input signal" name="RISING" value="0x1"/>
+                <value caption="Interrupt on falling input signal" name="FALLING" value="0x2"/>
+                <value caption="Interrupt on both rising and falling input signal" name="BOTH" value="0x3"/>
             </value-group>
             <value-group caption="ZCD State select" name="ZCD_STATE">
                 <value caption="Output is 0" name="LOW" value="0x0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD32.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD32.xml
index 0a8c832f..cbeb225b 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD32.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR16DD32.xml
@@ -1,105 +1,29 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR16DD32"
-                 package="QFN32"
-                 pinout="QFN32MVIO"
-                 speedmax="32000000"
-                 tempmax="125"
-                 tempmin="-40"
-                 vccmax="5.5"
-                 vccmin="1.8"/>
+        <variant ordercode="AVR16DD32" package="QFN32" pinout="QFN32MVIO" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR16DD32" family="AVR8" architecture="AVR8X" avr-family="AVR DD">
         <address-spaces>
-            <address-space endianness="little"
-                           id="data"
-                           name="data"
-                           size="0x10000"
-                           start="0x0000">
-                <memory-segment exec="0"
-                                name="IO"
-                                rw="RW"
-                                size="0x103F"
-                                start="0x00"
-                                type="io"/>
-                <memory-segment exec="0"
-                                name="LOCKBITS"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x04"
-                                start="0x1040"
-                                type="lockbits"/>
-                <memory-segment exec="0"
-                                name="FUSES"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x10"
-                                start="0x1050"
-                                type="fuses"/>
-                <memory-segment exec="0"
-                                name="USER_SIGNATURES"
-                                pagesize="0x20"
-                                rw="RW"
-                                size="0x20"
-                                start="0x1080"
-                                type="user_signatures"/>
-                <memory-segment exec="0"
-                                name="SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x03"
-                                start="0x1100"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="PROD_SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x7D"
-                                start="0x1103"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="EEPROM"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x100"
-                                start="0x1400"
-                                type="eeprom"/>
-                <memory-segment exec="0"
-                                name="INTERNAL_SRAM"
-                                rw="RW"
-                                size="0x800"
-                                start="0x7800"
-                                type="ram"/>
-                <memory-segment exec="0"
-                                name="MAPPED_PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x4000"
-                                start="0x8000"
-                                type="other"/>
+            <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+                <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00" type="io"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x04" start="0x1040" type="lockbits"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x1050" type="fuses"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x1080" type="user_signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x03" start="0x1100" type="signatures"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x1103" type="signatures"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x100" start="0x1400" type="eeprom"/>
+                <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x800" start="0x7800" type="ram"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x4000" start="0x8000" type="other"/>
             </address-space>
-            <address-space endianness="little"
-                           id="prog"
-                           name="prog"
-                           size="0x4000"
-                           start="0x0000">
-                <memory-segment exec="1"
-                                name="PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x4000"
-                                start="0x00"
-                                type="flash"/>
+            <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x4000" start="0x00" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
             <module id="cmp_control_v8" name="AC">
                 <instance name="AC0">
-                    <register-group address-space="data"
-                                    name="AC0"
-                                    name-in-module="AC"
-                                    offset="0x0680"/>
+                    <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
                     <signals>
                         <signal function="AC0" group="N" index="0" pad="PD3"/>
                         <signal function="AC0" group="N" index="2" pad="PD7"/>
@@ -107,20 +31,13 @@
                         <signal function="AC0" group="P" index="0" pad="PD2"/>
                         <signal function="AC0" group="P" index="3" pad="PD6"/>
                         <signal function="AC0" group="P" index="4" pad="PC3"/>
-                        <signal field="PORTMUX.ACROUTEA.AC0"
-                                function="AC0"
-                                group="OUT"
-                                index="0"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ACROUTEA.AC0" function="AC0" group="OUT" index="0" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
             <module id="adc_12b_diff_ctrl_v1" name="ADC">
                 <instance name="ADC0">
-                    <register-group address-space="data"
-                                    name="ADC0"
-                                    name-in-module="ADC"
-                                    offset="0x0600"/>
+                    <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
                     <signals>
                         <signal function="AIN0" group="AIN" index="1" pad="PD1"/>
                         <signal function="AIN0" group="AIN" index="2" pad="PD2"/>
@@ -150,153 +67,44 @@
             </module>
             <module id="bor_lvd_ctrl_v1" name="BOD">
                 <instance name="BOD">
-                    <register-group address-space="data"
-                                    name="BOD"
-                                    name-in-module="BOD"
-                                    offset="0x00A0"/>
+                    <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x00A0"/>
                 </instance>
             </module>
             <module id="cla_ccl_v1" name="CCL">
                 <instance name="CCL">
-                    <register-group address-space="data"
-                                    name="CCL"
-                                    name-in-module="CCL"
-                                    offset="0x01C0"/>
+                    <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
                     <signals>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_OUT"
-                                index="0"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_OUT"
-                                index="0"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="0"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_OUT"
-                                index="0"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="0"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL"
-                                group="LUT2_IN"
-                                index="1"
-                                pad="PD1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL"
-                                group="LUT2_IN"
-                                index="2"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL"
-                                group="LUT2_OUT"
-                                index="0"
-                                pad="PD3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_IN"
-                                index="1"
-                                pad="PD1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_IN"
-                                index="2"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_OUT"
-                                index="0"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3"
-                                function="CCL"
-                                group="LUT3_IN"
-                                index="0"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3"
-                                function="CCL"
-                                group="LUT3_IN"
-                                index="1"
-                                pad="PF1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3"
-                                function="CCL"
-                                group="LUT3_IN"
-                                index="2"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3"
-                                function="CCL"
-                                group="LUT3_OUT"
-                                index="0"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_OUT" index="0" pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="0" pad="PC0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="1" pad="PD1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="2" pad="PD2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0" pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="0" pad="PF3"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="CLKCTRL">
                 <instance name="CLKCTRL">
-                    <register-group address-space="data"
-                                    name="CLKCTRL"
-                                    name-in-module="CLKCTRL"
-                                    offset="0x0060"/>
+                    <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
                     <signals>
                         <signal function="CLKCTRL" group="CLKOUT" pad="PA7"/>
                         <signal function="CLKCTRL" group="EXTCLK" pad="PA0"/>
@@ -311,10 +119,7 @@
             </module>
             <module id="cpu_avr_xt_v1" name="CPU">
                 <instance name="CPU">
-                    <register-group address-space="data"
-                                    name="CPU"
-                                    name-in-module="CPU"
-                                    offset="0x0030"/>
+                    <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V4S"/>
                     </parameters>
@@ -322,26 +127,17 @@
             </module>
             <module id="int_8bit_v3" name="CPUINT">
                 <instance name="CPUINT">
-                    <register-group address-space="data"
-                                    name="CPUINT"
-                                    name-in-module="CPUINT"
-                                    offset="0x0110"/>
+                    <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
                 </instance>
             </module>
             <module id="math_pdi_crc_v1" name="CRCSCAN">
                 <instance name="CRCSCAN">
-                    <register-group address-space="data"
-                                    name="CRCSCAN"
-                                    name-in-module="CRCSCAN"
-                                    offset="0x0120"/>
+                    <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
                 </instance>
             </module>
             <module id="dac_nbit_ctrl_v5" name="DAC">
                 <instance name="DAC0">
-                    <register-group address-space="data"
-                                    name="DAC0"
-                                    name-in-module="DAC"
-                                    offset="0x06A0"/>
+                    <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
                     <signals>
                         <signal function="DAC0" group="OUT" index="0" pad="PD6"/>
                     </signals>
@@ -349,95 +145,46 @@
             </module>
             <module id="avrdd" name="EVSYS">
                 <instance name="EVSYS">
-                    <register-group address-space="data"
-                                    name="EVSYS"
-                                    name-in-module="EVSYS"
-                                    offset="0x0200"/>
+                    <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="5"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="5"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT1" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="FUSE">
                 <instance name="FUSE">
-                    <register-group address-space="data"
-                                    name="FUSE"
-                                    name-in-module="FUSE"
-                                    offset="0x1050"/>
+                    <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1050"/>
                 </instance>
             </module>
             <module id="avrdd" name="GPR">
                 <instance name="GPR">
-                    <register-group address-space="data"
-                                    name="GPR"
-                                    name-in-module="GPR"
-                                    offset="0x001C"/>
+                    <register-group address-space="data" name="GPR" name-in-module="GPR" offset="0x001C"/>
                 </instance>
             </module>
             <module id="avrdd" name="LOCK">
                 <instance name="LOCK">
-                    <register-group address-space="data"
-                                    name="LOCK"
-                                    name-in-module="LOCK"
-                                    offset="0x1040"/>
+                    <register-group address-space="data" name="LOCK" name-in-module="LOCK" offset="0x1040"/>
                 </instance>
             </module>
             <module id="io_multiv_ctrl_avr_v1" name="MVIO">
                 <instance name="MVIO">
-                    <register-group address-space="data"
-                                    name="MVIO"
-                                    name-in-module="MVIO"
-                                    offset="0x00C0"/>
+                    <register-group address-space="data" name="MVIO" name-in-module="MVIO" offset="0x00C0"/>
                 </instance>
             </module>
             <module id="nvm_ctrl_avr_v1" name="NVMCTRL">
                 <instance name="NVMCTRL">
-                    <register-group address-space="data"
-                                    name="NVMCTRL"
-                                    name-in-module="NVMCTRL"
-                                    offset="0x1000"/>
+                    <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_port" name="PORT">
                 <instance name="PORTA">
-                    <register-group address-space="data"
-                                    name="PORTA"
-                                    name-in-module="PORT"
-                                    offset="0x0400"/>
+                    <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
@@ -450,10 +197,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC">
-                    <register-group address-space="data"
-                                    name="PORTC"
-                                    name-in-module="PORT"
-                                    offset="0x0440"/>
+                    <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
@@ -462,10 +206,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD">
-                    <register-group address-space="data"
-                                    name="PORTD"
-                                    name-in-module="PORT"
-                                    offset="0x0460"/>
+                    <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
                         <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
@@ -477,10 +218,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF">
-                    <register-group address-space="data"
-                                    name="PORTF"
-                                    name-in-module="PORT"
-                                    offset="0x04A0"/>
+                    <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PF0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PF1"/>
@@ -495,18 +233,12 @@
             </module>
             <module id="avrdd" name="PORTMUX">
                 <instance name="PORTMUX">
-                    <register-group address-space="data"
-                                    name="PORTMUX"
-                                    name-in-module="PORTMUX"
-                                    offset="0x05E0"/>
+                    <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
                 </instance>
             </module>
             <module id="rst_integration_v8" name="RSTCTRL">
                 <instance name="RSTCTRL">
-                    <register-group address-space="data"
-                                    name="RSTCTRL"
-                                    name-in-module="RSTCTRL"
-                                    offset="0x0040"/>
+                    <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
                     <signals>
                         <signal function="OTHER" group="RESET" pad="PF6"/>
                     </signals>
@@ -514,592 +246,209 @@
             </module>
             <module id="tmr_16b_rtc_v1" name="RTC">
                 <instance name="RTC">
-                    <register-group address-space="data"
-                                    name="RTC"
-                                    name-in-module="RTC"
-                                    offset="0x0140"/>
+                    <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
                 </instance>
             </module>
             <module id="avrdd" name="SIGROW">
                 <instance name="SIGROW">
-                    <register-group address-space="data"
-                                    name="SIGROW"
-                                    name-in-module="SIGROW"
-                                    offset="0x1100"/>
+                    <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
                 </instance>
             </module>
             <module id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
                 <instance name="SLPCTRL">
-                    <register-group address-space="data"
-                                    name="SLPCTRL"
-                                    name-in-module="SLPCTRL"
-                                    offset="0x0050"/>
+                    <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
                 </instance>
             </module>
             <module id="spi_8bit_v2" name="SPI">
                 <instance name="SPI0">
-                    <register-group address-space="data"
-                                    name="SPI0"
-                                    name-in-module="SPI"
-                                    offset="0x0940"/>
+                    <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0940"/>
                     <signals>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="MISO"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="MOSI"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="SCK"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="SS"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MISO"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MOSI"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="SCK"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="SS"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MISO"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MOSI"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SS"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="MISO"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="MOSI"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SS"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MISO"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MOSI"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SCK"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SS"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="MISO" pad="PA5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="MOSI" pad="PA4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="SCK" pad="PA6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="SS" pad="PA7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MISO" pad="PA1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MOSI" pad="PA0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="SCK" pad="PC0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="SS" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MISO" pad="PD5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MOSI" pad="PD4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SCK" pad="PD6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SS" pad="PD7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="MISO" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="MOSI" pad="PC0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SCK" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SS" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MISO" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MOSI" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SCK" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SS" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="SYSCFG">
                 <instance name="SYSCFG">
-                    <register-group address-space="data"
-                                    name="SYSCFG"
-                                    name-in-module="SYSCFG"
-                                    offset="0x0F00"/>
+                    <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
                 </instance>
             </module>
             <module id="tmr_16b_pwm_v1" name="TCA">
                 <instance name="TCA0">
-                    <register-group address-space="data"
-                                    name="TCA0"
-                                    name-in-module="TCA"
-                                    offset="0x0A00"/>
+                    <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
                     <signals>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="3"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="4"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="5"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="0"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="3"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="1"
-                                pad="PD1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="2"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="3"
-                                pad="PD3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="4"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="5"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="0"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="1"
-                                pad="PF1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="2"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="3"
-                                pad="PF3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="4"
-                                pad="PF4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="5"
-                                pad="PF5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="3" pad="PA3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="4" pad="PA4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="5" pad="PA5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="0" pad="PC0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="3" pad="PC3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="1" pad="PD1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="2" pad="PD2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="3" pad="PD3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="4" pad="PD4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="5" pad="PD5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="0" pad="PF0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="1" pad="PF1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="2" pad="PF2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="3" pad="PF3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="4" pad="PF4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="5" pad="PF5"/>
                     </signals>
                 </instance>
             </module>
             <module id="tmr_16b_capture_v1" name="TCB">
                 <instance name="TCB0">
-                    <register-group address-space="data"
-                                    name="TCB0"
-                                    name-in-module="TCB"
-                                    offset="0x0B00"/>
+                    <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0B00"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB0"
-                                function="TCB0"
-                                group="WO"
-                                index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TCBROUTEA.TCB0"
-                                function="TCB0_ALT1"
-                                group="WO"
-                                index="0"
-                                pad="PF4"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0_ALT1" group="WO" index="0" pad="PF4"/>
                     </signals>
                 </instance>
                 <instance name="TCB1">
-                    <register-group address-space="data"
-                                    name="TCB1"
-                                    name-in-module="TCB"
-                                    offset="0x0B10"/>
+                    <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0B10"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB1"
-                                function="TCB1"
-                                group="WO"
-                                index="0"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TCBROUTEA.TCB1"
-                                function="TCB1_ALT1"
-                                group="WO"
-                                index="0"
-                                pad="PF5"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1_ALT1" group="WO" index="0" pad="PF5"/>
                     </signals>
                 </instance>
                 <instance name="TCB2">
-                    <register-group address-space="data"
-                                    name="TCB2"
-                                    name-in-module="TCB"
-                                    offset="0x0B20"/>
+                    <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0B20"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB2"
-                                function="TCB2"
-                                group="WO"
-                                index="0"
-                                pad="PC0"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2" group="WO" index="0" pad="PC0"/>
                     </signals>
                 </instance>
             </module>
             <module id="tmr_12b_psc_v1" name="TCD">
                 <instance name="TCD0">
-                    <register-group address-space="data"
-                                    name="TCD0"
-                                    name-in-module="TCD"
-                                    offset="0x0B80"/>
+                    <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0B80"/>
                     <signals>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOA"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOB"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOC"
-                                index="2"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOD"
-                                index="3"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT2"
-                                group="WOA"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT2"
-                                group="WOB"
-                                index="1"
-                                pad="PF1"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT2"
-                                group="WOC"
-                                index="2"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT2"
-                                group="WOD"
-                                index="3"
-                                pad="PF3"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOA"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOB"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOC"
-                                index="2"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOD"
-                                index="3"
-                                pad="PD5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOA" pad="PA4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOB" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2" pad="PD4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3" pad="PD5"/>
                     </signals>
                 </instance>
             </module>
             <module id="i2c_8bit_avr_v3" name="TWI">
                 <instance name="TWI0">
-                    <register-group address-space="data"
-                                    name="TWI0"
-                                    name-in-module="TWI"
-                                    offset="0x0900"/>
+                    <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0900"/>
                     <signals>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT1"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT1"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SCL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SDA"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SDA_DUAL" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT1" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT1" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SCL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SDA" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL" pad="PA1"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA" pad="PA0"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA_DUAL" pad="PC2"/>
                     </signals>
                 </instance>
             </module>
             <module id="uart_autobd_v4" name="USART">
                 <instance name="USART0">
-                    <register-group address-space="data"
-                                    name="USART0"
-                                    name-in-module="USART"
-                                    offset="0x0800"/>
+                    <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="RXD"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="TXD"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="XCK"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="XDIR"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="RXD"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="TXD"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="XCK"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="XDIR"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT2"
-                                group="RXD"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT2"
-                                group="TXD"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="RXD"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="TXD"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XDIR"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="RXD"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="TXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="XCK"
-                                pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="RXD" pad="PA5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="TXD" pad="PA4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="XCK" pad="PA6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="XDIR" pad="PA7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT2" group="RXD" pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT2" group="TXD" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="RXD" pad="PD5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="TXD" pad="PD4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XCK" pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XDIR" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="RXD" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="TXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="XCK" pad="PC3"/>
                     </signals>
                 </instance>
                 <instance name="USART1">
-                    <register-group address-space="data"
-                                    name="USART1"
-                                    name-in-module="USART"
-                                    offset="0x0820"/>
+                    <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="RXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="TXD"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XDIR"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="RXD"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="TXD"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="TXD" pad="PC0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="RXD" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="TXD" pad="PD6"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="USERROW">
                 <instance name="USERROW">
-                    <register-group address-space="data"
-                                    name="USERROW"
-                                    name-in-module="USERROW"
-                                    offset="0x1080"/>
+                    <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1080"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_vport" name="VPORT">
                 <instance name="VPORTA">
-                    <register-group address-space="data"
-                                    name="VPORTA"
-                                    name-in-module="VPORT"
-                                    offset="0x0000"/>
+                    <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
                 </instance>
                 <instance name="VPORTC">
-                    <register-group address-space="data"
-                                    name="VPORTC"
-                                    name-in-module="VPORT"
-                                    offset="0x0008"/>
+                    <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
                 </instance>
                 <instance name="VPORTD">
-                    <register-group address-space="data"
-                                    name="VPORTD"
-                                    name-in-module="VPORT"
-                                    offset="0x000C"/>
+                    <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
                 </instance>
                 <instance name="VPORTF">
-                    <register-group address-space="data"
-                                    name="VPORTF"
-                                    name-in-module="VPORT"
-                                    offset="0x0014"/>
+                    <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
                 </instance>
             </module>
             <module id="avrdd" name="VREF">
                 <instance name="VREF">
-                    <register-group address-space="data"
-                                    name="VREF"
-                                    name-in-module="VREF"
-                                    offset="0x00B0"/>
+                    <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00B0"/>
                 </instance>
             </module>
             <module id="wdt_windowed_v2" name="WDT">
                 <instance name="WDT">
-                    <register-group address-space="data"
-                                    name="WDT"
-                                    name-in-module="WDT"
-                                    offset="0x0100"/>
+                    <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
                 </instance>
             </module>
             <module id="cmp_zxover_ctrl_v3" name="ZCD">
                 <instance name="ZCD3">
-                    <register-group address-space="data"
-                                    name="ZCD3"
-                                    name-in-module="ZCD"
-                                    offset="0x06D8"/>
+                    <register-group address-space="data" name="ZCD3" name-in-module="ZCD" offset="0x06D8"/>
                     <signals>
-                        <signal field="PORTMUX.ZCDROUTEA.ZCD3"
-                                function="ZCD3"
-                                group="IN"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.ZCDROUTEA.ZCD3"
-                                function="ZCD3"
-                                group="OUT"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ZCDROUTEA.ZCD3" function="ZCD3" group="IN" pad="PC2"/>
+                        <signal field="PORTMUX.ZCDROUTEA.ZCD3" function="ZCD3" group="OUT" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
@@ -1171,90 +520,31 @@
     <modules>
         <module caption="Analog Comparator" id="cmp_control_v8" name="AC">
             <register-group caption="Analog Comparator" name="AC" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Hysteresis Mode"
-                              mask="0x06"
-                              name="HYSMODE"
-                              rw="RW"
-                              values="AC_HYSMODE"/>
-                    <bitfield caption="Power profile"
-                              mask="0x18"
-                              name="POWER"
-                              rw="RW"
-                              values="AC_POWER"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Power profile" mask="0x18" name="POWER" rw="RW" values="AC_POWER"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Mux Control A"
-                          initval="0x00"
-                          name="MUXCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input MUX Selection"
-                              mask="0x07"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection"
-                              mask="0x38"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="AC_MUXPOS"/>
-                    <bitfield caption="AC Output Initial Value"
-                              mask="0x40"
-                              name="INITVAL"
-                              rw="RW"
-                              values="AC_INITVAL"/>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Negative Input MUX Selection" mask="0x07" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+                    <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
                 </register>
-                <register caption="DAC Voltage Reference"
-                          initval="0xFF"
-                          name="DACREF"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="DAC Voltage Reference" initval="0xFF" name="DACREF" offset="0x5" rw="RW" size="1">
                     <bitfield caption="DACREF" mask="0xFF" name="DACREF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="WINSEL" value="0x00"/>
                     <mode name="WINDOW" qualifier="WINSEL" value="0x01 0x02"/>
                     <bitfield caption="Interrupt Enable" mask="0x01" name="CMP" rw="RW"/>
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="INTMODE"
-                              rw="RW"
-                              values="AC_NORMAL_INTMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" modes="NORMAL" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Comparator Interrupt Flag"
-                              mask="0x01"
-                              name="CMPIF"
-                              rw="RW"/>
-                    <bitfield caption="Analog Comparator State"
-                              mask="0x10"
-                              name="CMPSTATE"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x01" name="CMPIF" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -1264,23 +554,15 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption"
-                       name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
                 <value caption="Power profile 3" name="PROFILE3" value="0x3"/>
             </value-group>
             <value-group caption="Interrupt Mode select" name="AC_NORMAL_INTMODE">
-                <value caption="Positive and negative inputs crosses"
-                       name="BOTHEDGE"
-                       value="0x0"/>
-                <value caption="Positive input goes below negative input"
-                       name="NEGEDGE"
-                       value="0x2"/>
-                <value caption="Positive input goes above negative input"
-                       name="POSEDGE"
-                       value="0x3"/>
+                <value caption="Positive and negative inputs crosses" name="BOTHEDGE" value="0x0"/>
+                <value caption="Positive input goes below negative input" name="NEGEDGE" value="0x2"/>
+                <value caption="Positive input goes above negative input" name="POSEDGE" value="0x3"/>
             </value-group>
             <value-group caption="AC Output Initial Value select" name="AC_INITVAL">
                 <value caption="Output initialized to 0" name="LOW" value="0x0"/>
@@ -1298,194 +580,62 @@
                 <value caption="Positive Pin 4" name="AINP4" value="0x04"/>
             </value-group>
         </module>
-        <module caption="Analog to Digital Converter"
-                id="adc_12b_diff_ctrl_v1"
-                name="ADC">
+        <module caption="Analog to Digital Converter" id="adc_12b_diff_ctrl_v1" name="ADC">
             <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="ADC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Free running mode" mask="0x02" name="FREERUN" rw="RW"/>
-                    <bitfield caption="Resolution selection"
-                              mask="0x0C"
-                              name="RESSEL"
-                              rw="RW"
-                              values="ADC_RESSEL"/>
+                    <bitfield caption="Resolution selection" mask="0x0C" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
                     <bitfield caption="Left adjust result" mask="0x10" name="LEFTADJ" rw="RW"/>
-                    <bitfield caption="Conversion mode"
-                              mask="0x20"
-                              name="CONVMODE"
-                              rw="RW"
-                              values="ADC_CONVMODE"/>
+                    <bitfield caption="Conversion mode" mask="0x20" name="CONVMODE" rw="RW" values="ADC_CONVMODE"/>
                     <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Accumulation Samples"
-                              mask="0x07"
-                              name="SAMPNUM"
-                              rw="RW"
-                              values="ADC_SAMPNUM"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x07" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Pre-scaler"
-                              mask="0x0F"
-                              name="PRESC"
-                              rw="RW"
-                              values="ADC_PRESC"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x0F" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sampling Delay Selection"
-                              mask="0x0F"
-                              name="SAMPDLY"
-                              rw="RW"
-                              values="ADC_SAMPDLY"/>
-                    <bitfield caption="Initial Delay Selection"
-                              mask="0xE0"
-                              name="INITDLY"
-                              rw="RW"
-                              values="ADC_INITDLY"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Sampling Delay Selection" mask="0x0F" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xE0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Window Comparator Mode"
-                              mask="0x07"
-                              name="WINCM"
-                              rw="RW"
-                              values="ADC_WINCM"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x07" name="WINCM" rw="RW" values="ADC_WINCM"/>
                 </register>
-                <register caption="Sample Control"
-                          initval="0x00"
-                          name="SAMPCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Sample lenght" mask="0xFF" name="SAMPLEN" rw="RW"/>
                 </register>
-                <register caption="Positive mux input"
-                          initval="0x00"
-                          name="MUXPOS"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="ADC_MUXPOS"/>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
-                <register caption="Negative mux input"
-                          initval="0x00"
-                          name="MUXNEG"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="ADC_MUXNEG"/>
+                <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
-                <register caption="Command"
-                          initval="0x00"
-                          name="COMMAND"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Start Conversion" mask="0x01" name="STCONV" rw="RW"/>
                     <bitfield caption="Stop Conversion" mask="0x02" name="SPCONV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Start Event Input Enable"
-                              mask="0x01"
-                              name="STARTEI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x01" name="STARTEI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Result Ready Interrupt Enable"
-                              mask="0x01"
-                              name="RESRDY"
-                              rw="RW"/>
-                    <bitfield caption="Window Comparator Interrupt Enable"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x01" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
                     <bitfield caption="Result Ready Flag" mask="0x01" name="RESRDY" rw="RW"/>
-                    <bitfield caption="Window Comparator Flag"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Data"
-                          initval="0x00"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Temporary" mask="0xFF" name="TEMP" rw="RW"/>
                 </register>
-                <register caption="ADC Accumulator Result"
-                          name="RES"
-                          offset="0x10"
-                          rw="R"
-                          size="2"/>
-                <register caption="Window comparator low threshold"
-                          name="WINLT"
-                          offset="0x12"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Window comparator high threshold"
-                          name="WINHT"
-                          offset="0x14"
-                          rw="RW"
-                          size="2"/>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Conversion mode select" name="ADC_CONVMODE">
                 <value caption="Single-Ended mode" name="SINGLEENDED" value="0x0"/>
@@ -1615,99 +765,33 @@
         </module>
         <module caption="Bod interface" id="bor_lvd_ctrl_v1" name="BOD">
             <register-group caption="Bod interface" name="BOD" size="0x10">
-                <register caption="Control A"
-                          initval="0x01"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Operation in sleep mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="BOD_SLEEP"/>
-                    <bitfield caption="Operation in active mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="R"
-                              values="BOD_ACTIVE"/>
-                    <bitfield caption="Sample frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="R"
-                              values="BOD_SAMPFREQ"/>
+                <register caption="Control A" initval="0x01" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in sleep mode" mask="0x03" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                    <bitfield caption="Operation in active mode" mask="0x0C" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bod level"
-                              mask="0x07"
-                              name="LVL"
-                              rw="R"
-                              values="BOD_LVL"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x07" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor Control"
-                          initval="0x00"
-                          name="VLMCTRLA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level"
-                              mask="0x03"
-                              name="VLMLVL"
-                              rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x03" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor interrrupt enable"
-                              mask="0x01"
-                              name="VLMIE"
-                              rw="RW"/>
-                    <bitfield caption="Configuration"
-                              mask="0x06"
-                              name="VLMCFG"
-                              rw="RW"
-                              values="BOD_VLMCFG"/>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x01" name="VLMIE" rw="RW"/>
+                    <bitfield caption="Configuration" mask="0x06" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor interrupt flag"
-                              mask="0x01"
-                              name="VLMIF"
-                              rw="RW"/>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x01" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor status"
-                              mask="0x01"
-                              name="VLMS"
-                              rw="R"
-                              values="BOD_VLMS"/>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x01" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
                 <value caption="Disabled" name="DIS" value="0x00"/>
                 <value caption="Enabled" name="ENABLED" value="0x01"/>
                 <value caption="Sampled" name="SAMPLED" value="0x02"/>
-                <value caption="Enabled with wake-up halted until BOD is ready"
-                       name="ENWAKE"
-                       value="0x03"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
             </value-group>
             <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
                 <value caption="128Hz sampling frequency" name="128HZ" value="0x0"/>
@@ -1730,338 +814,103 @@
                 <value caption="VDD crosses VLM threshold" name="BOTH" value="0x02"/>
             </value-group>
             <value-group caption="Voltage level monitor status select" name="BOD_VLMS">
-                <value caption="The voltage is above the VLM threshold level"
-                       name="ABOVE"
-                       value="0x0"/>
-                <value caption="The voltage is below the VLM threshold level"
-                       name="BELOW"
-                       value="0x1"/>
+                <value caption="The voltage is above the VLM threshold level" name="ABOVE" value="0x0"/>
+                <value caption="The voltage is below the VLM threshold level" name="BELOW" value="0x1"/>
             </value-group>
             <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
                 <value caption="VLM Disabled" name="OFF" value="0x0"/>
-                <value caption="VLM threshold 5% above BOD level"
-                       name="5ABOVE"
-                       value="0x1"/>
-                <value caption="VLM threshold 15% above BOD level"
-                       name="15ABOVE"
-                       value="0x2"/>
-                <value caption="VLM threshold 25% above BOD level"
-                       name="25ABOVE"
-                       value="0x3"/>
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x1"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x2"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x3"/>
             </value-group>
         </module>
         <module caption="Configurable Custom Logic" id="cla_ccl_v1" name="CCL">
             <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Sequential Control 0"
-                          initval="0x00"
-                          name="SEQCTRL0"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Sequential Control 1"
-                          initval="0x00"
-                          name="SEQCTRL1"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Interrupt Control 0"
-                          initval="0x00"
-                          name="INTCTRL0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode for LUT0"
-                              mask="0x03"
-                              name="INTMODE0"
-                              rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1"
-                              mask="0x0C"
-                              name="INTMODE1"
-                              rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2"
-                              mask="0x30"
-                              name="INTMODE2"
-                              rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3"
-                              mask="0xC0"
-                              name="INTMODE3"
-                              rw="RW"
-                              values="CCL_INTMODE3"/>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x03" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0x0C" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xC0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x0F" name="INT" rw="RW"/>
                 </register>
-                <register caption="LUT 0 Control A"
-                          initval="0x00"
-                          name="LUT0CTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 0 Control A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 0 Control B"
-                          initval="0x00"
-                          name="LUT0CTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 0 Control C"
-                          initval="0x00"
-                          name="LUT0CTRLC"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 0"
-                          initval="0x00"
-                          name="TRUTH0"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 1 Control A"
-                          initval="0x00"
-                          name="LUT1CTRLA"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 1 Control A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 1 Control B"
-                          initval="0x00"
-                          name="LUT1CTRLB"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 1 Control C"
-                          initval="0x00"
-                          name="LUT1CTRLC"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 1"
-                          initval="0x00"
-                          name="TRUTH1"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 2 Control A"
-                          initval="0x00"
-                          name="LUT2CTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 2 Control A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 2 Control B"
-                          initval="0x00"
-                          name="LUT2CTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 2 Control C"
-                          initval="0x00"
-                          name="LUT2CTRLC"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 2"
-                          initval="0x00"
-                          name="TRUTH2"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 3 Control A"
-                          initval="0x00"
-                          name="LUT3CTRLA"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 3 Control A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 3 Control B"
-                          initval="0x00"
-                          name="LUT3CTRLB"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 3 Control C"
-                          initval="0x00"
-                          name="LUT3CTRLC"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 3"
-                          initval="0x00"
-                          name="TRUTH3"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
             </register-group>
@@ -2092,13 +941,9 @@
             <value-group caption="Clock Source Selection" name="CCL_CLKSRC">
                 <value caption="Peripheral Clock" name="CLKPER" value="0x0"/>
                 <value caption="Selection by INSEL2" name="IN2" value="0x1"/>
-                <value caption="Internal High-Frequency Oscillator"
-                       name="OSCHF"
-                       value="0x4"/>
+                <value caption="Internal High-Frequency Oscillator" name="OSCHF" value="0x4"/>
                 <value caption="32.768 kHz oscillator" name="OSC32K" value="0x5"/>
-                <value caption="32.768 kHz oscillator divided by 32"
-                       name="OSC1K"
-                       value="0x6"/>
+                <value caption="32.768 kHz oscillator divided by 32" name="OSC1K" value="0x6"/>
             </value-group>
             <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
                 <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
@@ -2164,195 +1009,67 @@
         </module>
         <module caption="Clock controller" id="avrdd" name="CLKCTRL">
             <register-group caption="Clock controller" name="CLKCTRL" size="0x40">
-                <register caption="MCLK Control A"
-                          initval="0x00"
-                          name="MCLKCTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="CLKCTRL_CLKSEL"/>
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock select" mask="0x07" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
                     <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
                 </register>
-                <register caption="MCLK Control B"
-                          initval="0x00"
-                          name="MCLKCTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Prescaler enable" mask="0x01" name="PEN" rw="RW"/>
-                    <bitfield caption="Prescaler division"
-                              mask="0x1E"
-                              name="PDIV"
-                              rw="RW"
-                              values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler division" mask="0x1E" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
                 </register>
-                <register caption="MCLK Control C"
-                          initval="0x00"
-                          name="MCLKCTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Enable"
-                              mask="0x01"
-                              name="CFDEN"
-                              rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Test"
-                              mask="0x02"
-                              name="CFDTST"
-                              rw="W"/>
-                    <bitfield caption="Clock Failure Detect Source"
-                              mask="0x0C"
-                              name="CFDSRC"
-                              rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Enable" mask="0x01" name="CFDEN" rw="RW"/>
+                    <bitfield caption="Clock Failure Detect Test" mask="0x02" name="CFDTST" rw="W"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0x0C" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                 </register>
-                <register caption="MCLK Interrupt Control"
-                          initval="0x00"
-                          name="MCLKINTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Enable"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt type"
-                              mask="0x80"
-                              name="INTTYPE"
-                              rw="RW"
-                              values="CLKCTRL_INTTYPE"/>
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x01" name="CFD" rw="RW"/>
+                    <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags"
-                          initval="0x00"
-                          name="MCLKINTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Flag"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x01" name="CFD" rw="RW"/>
                 </register>
-                <register caption="MCLK Status"
-                          initval="0x00"
-                          name="MCLKSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="System Oscillator changing"
-                              mask="0x01"
-                              name="SOSC"
-                              rw="RW"/>
-                    <bitfield caption="High frequency oscillator status"
-                              mask="0x02"
-                              name="OSCHFS"
-                              rw="RW"/>
-                    <bitfield caption="32KHz oscillator status"
-                              mask="0x04"
-                              name="OSC32KS"
-                              rw="RW"/>
-                    <bitfield caption="32.768 kHz Crystal Oscillator status"
-                              mask="0x08"
-                              name="XOSC32KS"
-                              rw="RW"/>
+                <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="System Oscillator changing" mask="0x01" name="SOSC" rw="RW"/>
+                    <bitfield caption="High frequency oscillator status" mask="0x02" name="OSCHFS" rw="RW"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x04" name="OSC32KS" rw="RW"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x08" name="XOSC32KS" rw="RW"/>
                     <bitfield caption="External Clock status" mask="0x10" name="EXTS" rw="RW"/>
                     <bitfield caption="PLL oscillator status" mask="0x20" name="PLLS" rw="RW"/>
                 </register>
-                <register caption="OSCHF Control A"
-                          initval="0x0C"
-                          name="OSCHFCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Control A" initval="0x0C" name="OSCHFCTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="Autotune" mask="0x01" name="AUTOTUNE" rw="RW"/>
-                    <bitfield caption="Frequency select"
-                              mask="0x3C"
-                              name="FRQSEL"
-                              rw="RW"
-                              values="CLKCTRL_FRQSEL"/>
+                    <bitfield caption="Frequency select" mask="0x3C" name="FRQSEL" rw="RW" values="CLKCTRL_FRQSEL"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSCHF Tune"
-                          name="OSCHFTUNE"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Tune" name="OSCHFTUNE" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Tune" mask="0xFF" name="TUNE" rw="RW"/>
                 </register>
-                <register caption="PLL Control A"
-                          name="PLLCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multiplication factor"
-                              mask="0x03"
-                              name="MULFAC"
-                              rw="RW"
-                              values="CLKCTRL_MULFAC"/>
-                    <bitfield caption="Source"
-                              mask="0x40"
-                              name="SOURCE"
-                              rw="RW"
-                              values="CLKCTRL_SOURCE"/>
+                <register caption="PLL Control A" name="PLLCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Multiplication factor" mask="0x03" name="MULFAC" rw="RW" values="CLKCTRL_MULFAC"/>
+                    <bitfield caption="Source" mask="0x40" name="SOURCE" rw="RW" values="CLKCTRL_SOURCE"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSC32K Control A"
-                          initval="0x00"
-                          name="OSC32KCTRLA"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC32K Control A"
-                          initval="0x00"
-                          name="XOSC32KCTRLA"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Low power mode" mask="0x02" name="LPMODE" rw="RW"/>
                     <bitfield caption="Select" mask="0x04" name="SEL" rw="RW"/>
-                    <bitfield caption="Crystal startup time"
-                              mask="0x30"
-                              name="CSUT"
-                              rw="RW"
-                              values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC HF Control A"
-                          initval="0x00"
-                          name="XOSCHFCTRLA"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC HF Control A" initval="0x00" name="XOSCHFCTRLA" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="External Source Select"
-                              mask="0x02"
-                              name="SELHF"
-                              rw="RW"
-                              values="CLKCTRL_SELHF"/>
-                    <bitfield caption="Frequency Range"
-                              mask="0x0C"
-                              name="FRQRANGE"
-                              rw="RW"
-                              values="CLKCTRL_FRQRANGE"/>
-                    <bitfield caption="Start-up Time Select"
-                              mask="0x30"
-                              name="CSUTHF"
-                              rw="RW"
-                              values="CLKCTRL_CSUTHF"/>
+                    <bitfield caption="External Source Select" mask="0x02" name="SELHF" rw="RW" values="CLKCTRL_SELHF"/>
+                    <bitfield caption="Frequency Range" mask="0x0C" name="FRQRANGE" rw="RW" values="CLKCTRL_FRQRANGE"/>
+                    <bitfield caption="Start-up Time Select" mask="0x30" name="CSUTHF" rw="RW" values="CLKCTRL_CSUTHF"/>
                     <bitfield caption="Run Standby" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Clock select" name="CLKCTRL_CLKSEL">
-                <value caption="Internal high-frequency oscillator"
-                       name="OSCHF"
-                       value="0x0"/>
+                <value caption="Internal high-frequency oscillator" name="OSCHF" value="0x0"/>
                 <value caption="Internal 32.768 kHz oscillator" name="OSC32K" value="0x1"/>
                 <value caption="32.768 kHz crystal oscillator" name="XOSC32K" value="0x2"/>
                 <value caption="External clock" name="EXTCLK" value="0x3"/>
@@ -2396,12 +1113,8 @@
                 <value caption="3 x multiplication factor" name="3x" value="0x2"/>
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
-                <value caption="High frequency internal oscillator as PLL source"
-                       name="OSCHF"
-                       value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF"
-                       value="0x1"/>
+                <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -2427,44 +1140,19 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection"
-                          initval="0x00"
-                          name="CCP"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCP signature"
-                              mask="0xFF"
-                              name="CCP"
-                              rw="RW"
-                              values="CPU_CCP"/>
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Stack Pointer"
-                          initval="0x7FFF"
-                          name="SP"
-                          offset="0xD"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Status Register"
-                          initval="0x00"
-                          name="SREG"
-                          offset="0xF"
-                          rw="RW"
-                          size="1">
+                <register caption="Stack Pointer" initval="0x7FFF" name="SP" offset="0xD" rw="RW" size="2"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
                     <bitfield caption="Carry Flag" mask="0x01" name="C" rw="RW"/>
                     <bitfield caption="Zero Flag" mask="0x02" name="Z" rw="RW"/>
                     <bitfield caption="Negative Flag" mask="0x04" name="N" rw="RW"/>
-                    <bitfield caption="Two's Complement Overflow Flag"
-                              mask="0x08"
-                              name="V"
-                              rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V" rw="RW"/>
                     <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
                     <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
                     <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
-                    <bitfield caption="Global Interrupt Enable Flag"
-                              mask="0x80"
-                              name="I"
-                              rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="CCP signature select" name="CPU_CCP">
@@ -2474,530 +1162,157 @@
         </module>
         <module caption="Interrupt Controller" id="int_8bit_v3" name="CPUINT">
             <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Round-robin Scheduling Enable"
-                              mask="0x01"
-                              name="LVL0RR"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x01" name="LVL0RR" rw="RW"/>
                     <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
-                    <bitfield caption="Interrupt Vector Select"
-                              mask="0x40"
-                              name="IVSEL"
-                              rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Level 0 Interrupt Executing"
-                              mask="0x01"
-                              name="LVL0EX"
-                              rw="R"/>
-                    <bitfield caption="Level 1 Interrupt Executing"
-                              mask="0x02"
-                              name="LVL1EX"
-                              rw="R"/>
-                    <bitfield caption="Non-maskable Interrupt Executing"
-                              mask="0x80"
-                              name="NMIEX"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x01" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x02" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority"
-                          initval="0x00"
-                          name="LVL0PRI"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Level Priority"
-                              mask="0xFF"
-                              name="LVL0PRI"
-                              rw="RW"/>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xFF" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector"
-                          initval="0x00"
-                          name="LVL1VEC"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Vector with High Priority"
-                              mask="0xFF"
-                              name="LVL1VEC"
-                              rw="RW"/>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xFF" name="LVL1VEC" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="CRCSCAN" id="math_pdi_crc_v1" name="CRCSCAN">
             <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable CRC scan" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Enable NMI Trigger" mask="0x02" name="NMIEN" rw="RW"/>
                     <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CRC Source"
-                              mask="0x03"
-                              name="SRC"
-                              rw="RW"
-                              values="CRCSCAN_SRC"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x03" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
                 </register>
-                <register caption="Status"
-                          initval="0x02"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="CRC Busy" mask="0x01" name="BUSY" rw="R"/>
                     <bitfield caption="CRC Ok" mask="0x02" name="OK" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="CRC Source select" name="CRCSCAN_SRC">
                 <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
-                <value caption="CRC on boot and appl section of flash"
-                       name="APPLICATION"
-                       value="0x1"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
                 <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
             </value-group>
         </module>
-        <module caption="Digital to Analog Converter"
-                id="dac_nbit_ctrl_v5"
-                name="DAC">
+        <module caption="Digital to Analog Converter" id="dac_nbit_ctrl_v5" name="DAC">
             <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="DAC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="DATA Register"
-                          name="DATA"
-                          offset="0x2"
-                          rw="RW"
-                          size="2">
+                <register caption="DATA Register" name="DATA" offset="0x2" rw="RW" size="2">
                     <bitfield caption="Data" mask="0xFFC0" name="DATA" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Event System" id="avrdd" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Software Event A"
-                          initval="0x00"
-                          name="SWEVENTA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0xFF"
-                              name="SWEVENTA"
-                              rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0xFF" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
-                <register caption="Software Event B"
-                          initval="0x00"
-                          name="SWEVENTB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0x03"
-                              name="SWEVENTB"
-                              rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0x03" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
-                <register caption="Multiplexer Channel 0"
-                          initval="0x00"
-                          name="CHANNEL0"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 0 generator select"
-                              mask="0xFF"
-                              name="CHANNEL0"
-                              rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Channel 0 generator select" mask="0xFF" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
-                <register caption="Multiplexer Channel 1"
-                          initval="0x00"
-                          name="CHANNEL1"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 1 generator select"
-                              mask="0xFF"
-                              name="CHANNEL1"
-                              rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Channel 1 generator select" mask="0xFF" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
-                <register caption="Multiplexer Channel 2"
-                          initval="0x00"
-                          name="CHANNEL2"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 2 generator select"
-                              mask="0xFF"
-                              name="CHANNEL2"
-                              rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Channel 2 generator select" mask="0xFF" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
-                <register caption="Multiplexer Channel 3"
-                          initval="0x00"
-                          name="CHANNEL3"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 3 generator select"
-                              mask="0xFF"
-                              name="CHANNEL3"
-                              rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Channel 3 generator select" mask="0xFF" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
-                <register caption="Multiplexer Channel 4"
-                          initval="0x00"
-                          name="CHANNEL4"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 4 generator select"
-                              mask="0xFF"
-                              name="CHANNEL4"
-                              rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Channel 4 generator select" mask="0xFF" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
-                <register caption="Multiplexer Channel 5"
-                          initval="0x00"
-                          name="CHANNEL5"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 5 generator select"
-                              mask="0xFF"
-                              name="CHANNEL5"
-                              rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Channel 5 generator select" mask="0xFF" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT0A"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT0B"
-                          offset="0x21"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT1A"
-                          offset="0x22"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT1B"
-                          offset="0x23"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT2A"
-                          offset="0x24"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT2B"
-                          offset="0x25"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT3A"
-                          offset="0x26"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT3B"
-                          offset="0x27"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 12 - ADC0"
-                          initval="0x00"
-                          name="USERADC0START"
-                          offset="0x28"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTA"
-                          offset="0x29"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTC"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTD"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTF"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0"
-                          initval="0x00"
-                          name="USERUSART0IRDA"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1"
-                          initval="0x00"
-                          name="USERUSART1IRDA"
-                          offset="0x2E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A"
-                          initval="0x00"
-                          name="USERTCA0CNTA"
-                          offset="0x2F"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B"
-                          initval="0x00"
-                          name="USERTCA0CNTB"
-                          offset="0x30"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A"
-                          initval="0x00"
-                          name="USERTCB0CAPT"
-                          offset="0x31"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B"
-                          initval="0x00"
-                          name="USERTCB0COUNT"
-                          offset="0x32"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A"
-                          initval="0x00"
-                          name="USERTCB1CAPT"
-                          offset="0x33"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B"
-                          initval="0x00"
-                          name="USERTCB1COUNT"
-                          offset="0x34"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A"
-                          initval="0x00"
-                          name="USERTCB2CAPT"
-                          offset="0x35"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B"
-                          initval="0x00"
-                          name="USERTCB2COUNT"
-                          offset="0x36"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A"
-                          initval="0x00"
-                          name="USERTCD0INPUTA"
-                          offset="0x37"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B"
-                          initval="0x00"
-                          name="USERTCD0INPUTB"
-                          offset="0x38"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
             <value-group caption="Channel 0 generator select" name="EVSYS_CHANNEL0">
@@ -3006,30 +1321,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3044,21 +1343,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3076,30 +1365,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3114,21 +1387,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3146,30 +1409,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3187,21 +1434,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3219,30 +1456,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3260,21 +1481,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3292,30 +1503,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3330,21 +1525,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3362,30 +1547,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3400,21 +1569,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3442,149 +1601,48 @@
             </value-group>
             <value-group caption="User channel select" name="EVSYS_USER">
                 <value caption="Off" name="OFF" value="0x0"/>
-                <value caption="Connect user to event channel 0"
-                       name="CHANNEL0"
-                       value="0x1"/>
-                <value caption="Connect user to event channel 1"
-                       name="CHANNEL1"
-                       value="0x2"/>
-                <value caption="Connect user to event channel 2"
-                       name="CHANNEL2"
-                       value="0x3"/>
-                <value caption="Connect user to event channel 3"
-                       name="CHANNEL3"
-                       value="0x4"/>
-                <value caption="Connect user to event channel 4"
-                       name="CHANNEL4"
-                       value="0x5"/>
-                <value caption="Connect user to event channel 5"
-                       name="CHANNEL5"
-                       value="0x6"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
             </value-group>
         </module>
         <module caption="Fuses" id="avrdd" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Watchdog Configuration"
-                          initval="0x00"
-                          name="WDTCFG"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Watchdog Timeout Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="FUSE_WINDOW"/>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
-                <register caption="BOD Configuration"
-                          initval="0x00"
-                          name="BODCFG"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="BOD Operation in Sleep Mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="FUSE_SLEEP"/>
-                    <bitfield caption="BOD Operation in Active Mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="RW"
-                              values="FUSE_ACTIVE"/>
-                    <bitfield caption="BOD Sample Frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Level"
-                              mask="0xE0"
-                              name="LVL"
-                              rw="RW"
-                              values="FUSE_LVL"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x03" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x0C" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Level" mask="0xE0" name="LVL" rw="RW" values="FUSE_LVL"/>
                 </register>
-                <register caption="Oscillator Configuration"
-                          initval="0x00"
-                          name="OSCCFG"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Frequency Select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="FUSE_CLKSEL"/>
+                <register caption="Oscillator Configuration" initval="0x00" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x07" name="CLKSEL" rw="RW" values="FUSE_CLKSEL"/>
                 </register>
-                <register caption="System Configuration 0"
-                          initval="0xD0"
-                          name="SYSCFG0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="System Configuration 0" initval="0xD0" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="EEPROM Save" mask="0x01" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration"
-                              mask="0x08"
-                              name="RSTPINCFG"
-                              rw="RW"
-                              values="FUSE_RSTPINCFG"/>
-                    <bitfield caption="UPDI Pin Configuration"
-                              mask="0x10"
-                              name="UPDIPINCFG"
-                              rw="RW"
-                              values="FUSE_UPDIPINCFG"/>
-                    <bitfield caption="CRC Select"
-                              mask="0x20"
-                              name="CRCSEL"
-                              rw="RW"
-                              values="FUSE_CRCSEL"/>
-                    <bitfield caption="CRC Source"
-                              mask="0xC0"
-                              name="CRCSRC"
-                              rw="RW"
-                              values="FUSE_CRCSRC"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x08" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW" values="FUSE_UPDIPINCFG"/>
+                    <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
+                    <bitfield caption="CRC Source" mask="0xC0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                 </register>
-                <register caption="System Configuration 1"
-                          initval="0x08"
-                          name="SYSCFG1"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Startup Time"
-                              mask="0x07"
-                              name="SUT"
-                              rw="RW"
-                              values="FUSE_SUT"/>
-                    <bitfield caption="MVIO System Configuration"
-                              mask="0x18"
-                              name="MVSYSCFG"
-                              rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x07" name="SUT" rw="RW" values="FUSE_SUT"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                 </register>
-                <register caption="Code Section Size"
-                          initval="0x00"
-                          name="CODESIZE"
-                          offset="0x7"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Boot Section Size"
-                          initval="0x00"
-                          name="BOOTSIZE"
-                          offset="0x8"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
+                <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT"
-                       value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -3610,13 +1668,9 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)"
-                       name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
-                <value caption="CRC of application code and boot sections"
-                       name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -3628,12 +1682,8 @@
                 <value caption="UPDI Mode" name="UPDI" value="0x1"/>
             </value-group>
             <value-group caption="MVIO System Configuration select" name="FUSE_MVSYSCFG">
-                <value caption="Device used in a dual supply configuration"
-                       name="DUAL"
-                       value="0x1"/>
-                <value caption="Device used in a single supply configuration"
-                       name="SINGLE"
-                       value="0x2"/>
+                <value caption="Device used in a dual supply configuration" name="DUAL" value="0x1"/>
+                <value caption="Device used in a single supply configuration" name="SINGLE" value="0x2"/>
             </value-group>
             <value-group caption="Startup Time select" name="FUSE_SUT">
                 <value caption="0 ms" name="0MS" value="0x00"/>
@@ -3676,41 +1726,16 @@
         </module>
         <module caption="General Purpose Registers" id="avrdd" name="GPR">
             <register-group caption="General Purpose Registers" name="GPR" size="0x4">
-                <register caption="General Purpose Register 0"
-                          name="GPR0"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 1"
-                          name="GPR1"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 2"
-                          name="GPR2"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 3"
-                          name="GPR3"
-                          offset="0x3"
-                          rw="RW"
-                          size="1"/>
+                <register caption="General Purpose Register 0" name="GPR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose Register 1" name="GPR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose Register 2" name="GPR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose Register 3" name="GPR3" offset="0x3" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Lockbits" id="avrdd" name="LOCK">
             <register-group caption="Lockbits" name="LOCK" size="0x4">
-                <register caption="Lock Key Bits"
-                          initval="0x5CC5C55C"
-                          name="KEY"
-                          offset="0x0"
-                          rw="RW"
-                          size="4">
-                    <bitfield caption="Lock Key"
-                              mask="0xFFFFFFFF"
-                              name="KEY"
-                              rw="RW"
-                              values="LOCK_KEY"/>
+                <register caption="Lock Key Bits" initval="0x5CC5C55C" name="KEY" offset="0x0" rw="RW" size="4">
+                    <bitfield caption="Lock Key" mask="0xFFFFFFFF" name="KEY" rw="RW" values="LOCK_KEY"/>
                 </register>
             </register-group>
             <value-group caption="Lock Key select" name="LOCK_KEY">
@@ -3720,154 +1745,61 @@
         </module>
         <module caption="Multi-Voltage I/O" id="io_multiv_ctrl_avr_v1" name="MVIO">
             <register-group caption="Multi-Voltage I/O" name="MVIO" size="0x4">
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Enable"
-                              mask="0x01"
-                              name="VDDIO2IE"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Enable" mask="0x01" name="VDDIO2IE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Flag"
-                              mask="0x01"
-                              name="VDDIO2IF"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Flag" mask="0x01" name="VDDIO2IF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="VDDIO2 Status" mask="0x01" name="VDDIO2S" rw="R"/>
                 </register>
             </register-group>
         </module>
-        <module caption="Non-volatile Memory Controller"
-                id="nvm_ctrl_avr_v1"
-                name="NVMCTRL">
+        <module caption="Non-volatile Memory Controller" id="nvm_ctrl_avr_v1" name="NVMCTRL">
             <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x7F"
-                              name="CMD"
-                              rw="RW"
-                              values="NVMCTRL_CMD"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x30"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Application Code Write Protect"
-                              mask="0x01"
-                              name="APPCODEWP"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x30" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Application Code Write Protect" mask="0x01" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x02" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Application Data Write Protect"
-                              mask="0x04"
-                              name="APPDATAWP"
-                              rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space"
-                              mask="0x30"
-                              name="FLMAP"
-                              rw="RW"
-                              values="NVMCTRL_FLMAP"/>
-                    <bitfield caption="Flash Mapping Lock"
-                              mask="0x80"
-                              name="FLMAPLOCK"
-                              rw="RW"/>
+                    <bitfield caption="Application Data Write Protect" mask="0x04" name="APPDATAWP" rw="RW"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x02"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x02" rw="R" size="1">
                     <bitfield caption="Flash busy" mask="0x01" name="FBUSY" rw="R"/>
                     <bitfield caption="EEPROM busy" mask="0x02" name="EEBUSY" rw="R"/>
-                    <bitfield caption="Write error"
-                              mask="0x70"
-                              name="ERROR"
-                              rw="R"
-                              values="NVMCTRL_ERROR"/>
+                    <bitfield caption="Write error" mask="0x70" name="ERROR" rw="R" values="NVMCTRL_ERROR"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
-                <register caption="Address"
-                          name="ADDR"
-                          offset="0x08"
-                          rw="RW"
-                          size="4"/>
+                <register caption="Address" name="ADDR" offset="0x08" rw="RW" size="4"/>
             </register-group>
             <value-group caption="Command select" name="NVMCTRL_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
                 <value caption="No Operation" name="NOOP" value="0x01"/>
                 <value caption="Flash Write" name="FLWR" value="0x02"/>
                 <value caption="Flash Page Erase" name="FLPER" value="0x08"/>
-                <value caption="Flash Multi-Page Erase 2 pages"
-                       name="FLMPER2"
-                       value="0x09"/>
-                <value caption="Flash Multi-Page Erase 4 pages"
-                       name="FLMPER4"
-                       value="0x0A"/>
-                <value caption="Flash Multi-Page Erase 8 pages"
-                       name="FLMPER8"
-                       value="0x0B"/>
-                <value caption="Flash Multi-Page Erase 16 pages"
-                       name="FLMPER16"
-                       value="0x0C"/>
-                <value caption="Flash Multi-Page Erase 32 pages"
-                       name="FLMPER32"
-                       value="0x0D"/>
+                <value caption="Flash Multi-Page Erase 2 pages" name="FLMPER2" value="0x09"/>
+                <value caption="Flash Multi-Page Erase 4 pages" name="FLMPER4" value="0x0A"/>
+                <value caption="Flash Multi-Page Erase 8 pages" name="FLMPER8" value="0x0B"/>
+                <value caption="Flash Multi-Page Erase 16 pages" name="FLMPER16" value="0x0C"/>
+                <value caption="Flash Multi-Page Erase 32 pages" name="FLMPER32" value="0x0D"/>
                 <value caption="EEPROM Write" name="EEWR" value="0x12"/>
                 <value caption="EEPROM Erase and Write" name="EEERWR" value="0x13"/>
                 <value caption="EEPROM Byte Erase" name="EEBER" value="0x18"/>
-                <value caption="EEPROM Multi-Byte Erase 2 bytes"
-                       name="EEMBER2"
-                       value="0x19"/>
-                <value caption="EEPROM Multi-Byte Erase 4 bytes"
-                       name="EEMBER4"
-                       value="0x1A"/>
-                <value caption="EEPROM Multi-Byte Erase 8 bytes"
-                       name="EEMBER8"
-                       value="0x1B"/>
-                <value caption="EEPROM Multi-Byte Erase 16 bytes"
-                       name="EEMBER16"
-                       value="0x1C"/>
-                <value caption="EEPROM Multi-Byte Erase 32 bytes"
-                       name="EEMBER32"
-                       value="0x1D"/>
+                <value caption="EEPROM Multi-Byte Erase 2 bytes" name="EEMBER2" value="0x19"/>
+                <value caption="EEPROM Multi-Byte Erase 4 bytes" name="EEMBER4" value="0x1A"/>
+                <value caption="EEPROM Multi-Byte Erase 8 bytes" name="EEMBER8" value="0x1B"/>
+                <value caption="EEPROM Multi-Byte Erase 16 bytes" name="EEMBER16" value="0x1C"/>
+                <value caption="EEPROM Multi-Byte Erase 32 bytes" name="EEMBER32" value="0x1D"/>
                 <value caption="Chip Erase Command" name="CHER" value="0x20"/>
                 <value caption="EEPROM Erase Command" name="EECHER" value="0x30"/>
             </value-group>
@@ -3880,404 +1812,135 @@
             <value-group caption="Write error select" name="NVMCTRL_ERROR">
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
-                <value caption="Write to section not allowed"
-                       name="ILLEGALSADDR"
-                       value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted"
-                       name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed"
-                       name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_avr_v2_port" name="PORT">
             <register-group caption="I/O Ports" name="PORT" size="0x20">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Set"
-                          name="DIRSET"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Clear"
-                          name="DIRCLR"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Toggle"
-                          name="DIRTGL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Set"
-                          name="OUTSET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Clear"
-                          name="OUTCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Toggle"
-                          name="OUTTGL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
-                <register caption="Port Control"
-                          initval="0x00"
-                          name="PORTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Slew Rate Limit Enable" mask="0x01" name="SRL" rw="RW"/>
                 </register>
-                <register caption="Pin Control Config"
-                          initval="0x00"
-                          name="PINCONFIG"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin Control Config" initval="0x00" name="PINCONFIG" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin Control Update"
-                          initval="0x00"
-                          name="PINCTRLUPD"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control update mask"
-                              mask="0xFF"
-                              name="PINCTRLUPD"
-                              rw="RW"/>
+                <register caption="Pin Control Update" initval="0x00" name="PINCTRLUPD" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Pin control update mask" mask="0xFF" name="PINCTRLUPD" rw="RW"/>
                 </register>
-                <register caption="Pin Control Set"
-                          initval="0x00"
-                          name="PINCTRLSET"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control set mask"
-                              mask="0xFF"
-                              name="PINCTRLSET"
-                              rw="RW"/>
+                <register caption="Pin Control Set" initval="0x00" name="PINCTRLSET" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Pin control set mask" mask="0xFF" name="PINCTRLSET" rw="RW"/>
                 </register>
-                <register caption="Pin Control Clear"
-                          initval="0x00"
-                          name="PINCTRLCLR"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control clear mask"
-                              mask="0xFF"
-                              name="PINCTRLCLR"
-                              rw="RW"/>
+                <register caption="Pin Control Clear" initval="0x00" name="PINCTRLCLR" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Pin control clear mask" mask="0xFF" name="PINCTRLCLR" rw="RW"/>
                 </register>
-                <register caption="Pin 0 Control"
-                          initval="0x00"
-                          name="PIN0CTRL"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 1 Control"
-                          initval="0x00"
-                          name="PIN1CTRL"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 2 Control"
-                          initval="0x00"
-                          name="PIN2CTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 3 Control"
-                          initval="0x00"
-                          name="PIN3CTRL"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 4 Control"
-                          initval="0x00"
-                          name="PIN4CTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 5 Control"
-                          initval="0x00"
-                          name="PIN5CTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 6 Control"
-                          initval="0x00"
-                          name="PIN6CTRL"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 7 Control"
-                          initval="0x00"
-                          name="PIN7CTRL"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
-                <value caption="Interrupt disabled but input buffer enabled"
-                       name="INTDISABLE"
-                       value="0x0"/>
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
                 <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
                 <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
                 <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
-                <value caption="Digital Input Buffer disabled"
-                       name="INPUT_DISABLE"
-                       value="0x4"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
                 <value caption="Sense low Level" name="LEVEL" value="0x5"/>
             </value-group>
         </module>
         <module caption="Port Multiplexer" id="avrdd" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="EVSYS route A"
-                          initval="0x00"
-                          name="EVSYSROUTEA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Output A"
-                              mask="0x01"
-                              name="EVOUTA"
-                              rw="RW"
-                              values="PORTMUX_EVOUTA"/>
-                    <bitfield caption="Event Output C"
-                              mask="0x04"
-                              name="EVOUTC"
-                              rw="RW"
-                              values="PORTMUX_EVOUTC"/>
-                    <bitfield caption="Event Output D"
-                              mask="0x08"
-                              name="EVOUTD"
-                              rw="RW"
-                              values="PORTMUX_EVOUTD"/>
-                    <bitfield caption="Event Output F"
-                              mask="0x20"
-                              name="EVOUTF"
-                              rw="RW"
-                              values="PORTMUX_EVOUTF"/>
+                <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Event Output A" mask="0x01" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output C" mask="0x04" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x08" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
                 </register>
-                <register caption="CCL route A"
-                          initval="0x00"
-                          name="CCLROUTEA"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals"
-                              mask="0x01"
-                              name="LUT0"
-                              rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals"
-                              mask="0x02"
-                              name="LUT1"
-                              rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals"
-                              mask="0x04"
-                              name="LUT2"
-                              rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals"
-                              mask="0x08"
-                              name="LUT3"
-                              rw="RW"
-                              values="PORTMUX_LUT3"/>
+                <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x01" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x02" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x04" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x08" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
-                <register caption="USART route A"
-                          initval="0x00"
-                          name="USARTROUTEA"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="USART0 Signals"
-                              mask="0x07"
-                              name="USART0"
-                              rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="USART1 Signals"
-                              mask="0x18"
-                              name="USART1"
-                              rw="RW"
-                              values="PORTMUX_USART1"/>
+                <register caption="USART route A" initval="0x00" name="USARTROUTEA" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="USART0 Signals" mask="0x07" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="USART1 Signals" mask="0x18" name="USART1" rw="RW" values="PORTMUX_USART1"/>
                 </register>
-                <register caption="SPI route A"
-                          initval="0x00"
-                          name="SPIROUTEA"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI0 Signals"
-                              mask="0x07"
-                              name="SPI0"
-                              rw="RW"
-                              values="PORTMUX_SPI0"/>
+                <register caption="SPI route A" initval="0x00" name="SPIROUTEA" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="SPI0 Signals" mask="0x07" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                 </register>
-                <register caption="TWI route A"
-                          initval="0x00"
-                          name="TWIROUTEA"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TWI0 Signals"
-                              mask="0x03"
-                              name="TWI0"
-                              rw="RW"
-                              values="PORTMUX_TWI0"/>
+                <register caption="TWI route A" initval="0x00" name="TWIROUTEA" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="TWI0 Signals" mask="0x03" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="TCA route A"
-                          initval="0x00"
-                          name="TCAROUTEA"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCA0 Signals"
-                              mask="0x07"
-                              name="TCA0"
-                              rw="RW"
-                              values="PORTMUX_TCA0"/>
+                <register caption="TCA route A" initval="0x00" name="TCAROUTEA" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="TCA0 Signals" mask="0x07" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
                 </register>
-                <register caption="TCB route A"
-                          initval="0x00"
-                          name="TCBROUTEA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCB0 Output"
-                              mask="0x01"
-                              name="TCB0"
-                              rw="RW"
-                              values="PORTMUX_TCB0"/>
-                    <bitfield caption="TCB1 Output"
-                              mask="0x02"
-                              name="TCB1"
-                              rw="RW"
-                              values="PORTMUX_TCB1"/>
-                    <bitfield caption="TCB2 Output"
-                              mask="0x04"
-                              name="TCB2"
-                              rw="RW"
-                              values="PORTMUX_TCB2"/>
+                <register caption="TCB route A" initval="0x00" name="TCBROUTEA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="TCB0 Output" mask="0x01" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="TCB1 Output" mask="0x02" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+                    <bitfield caption="TCB2 Output" mask="0x04" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
                 </register>
-                <register caption="TCD route A"
-                          initval="0x00"
-                          name="TCDROUTEA"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCD0 Signals"
-                              mask="0x07"
-                              name="TCD0"
-                              rw="RW"
-                              values="PORTMUX_TCD0"/>
+                <register caption="TCD route A" initval="0x00" name="TCDROUTEA" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="TCD0 Signals" mask="0x07" name="TCD0" rw="RW" values="PORTMUX_TCD0"/>
                 </register>
             </register-group>
             <value-group caption="CCL Look-Up Table 0 Signals select" name="PORTMUX_LUT0">
@@ -4370,199 +2033,69 @@
         </module>
         <module caption="Reset controller" id="rst_integration_v8" name="RSTCTRL">
             <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
-                <register caption="Reset Flags"
-                          initval="0x00"
-                          name="RSTFR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Power on Reset flag" mask="0x01" name="PORF" rw="RW"/>
-                    <bitfield caption="Brown out detector Reset flag"
-                              mask="0x02"
-                              name="BORF"
-                              rw="RW"/>
+                    <bitfield caption="Brown out detector Reset flag" mask="0x02" name="BORF" rw="RW"/>
                     <bitfield caption="External Reset flag" mask="0x04" name="EXTRF" rw="RW"/>
                     <bitfield caption="Watch dog Reset flag" mask="0x08" name="WDRF" rw="RW"/>
                     <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
                     <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
                 </register>
-                <register caption="Software Reset"
-                          initval="0x00"
-                          name="SWRR"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software reset enable"
-                              mask="0x01"
-                              name="SWRST"
-                              rw="RW"/>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x01" name="SWRST" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Real-Time Counter" id="tmr_16b_rtc_v1" name="RTC">
             <register-group caption="Real-Time Counter" name="RTC" size="0x20">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="RTCEN" rw="RW"/>
                     <bitfield caption="Correction enable" mask="0x04" name="CORREN" rw="RW"/>
-                    <bitfield caption="Prescaling Factor"
-                              mask="0x78"
-                              name="PRESCALER"
-                              rw="RW"
-                              values="RTC_PRESCALER"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
                     <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x01"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLABUSY"
-                              rw="R"/>
-                    <bitfield caption="Count Synchronization Busy Flag"
-                              mask="0x02"
-                              name="CNTBUSY"
-                              rw="R"/>
-                    <bitfield caption="Period Synchronization Busy Flag"
-                              mask="0x04"
-                              name="PERBUSY"
-                              rw="R"/>
-                    <bitfield caption="Comparator Synchronization Busy Flag"
-                              mask="0x08"
-                              name="CMPBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x02" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x04" name="PERBUSY" rw="R"/>
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x08" name="CMPBUSY" rw="R"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt enable"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt Flag"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Temporary"
-                          name="TEMP"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Debug control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Calibration"
-                          initval="0x00"
-                          name="CALIB"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Error Correction Value"
-                              mask="0x7F"
-                              name="ERROR"
-                              rw="RW"/>
-                    <bitfield caption="Error Correction Sign Bit"
-                              mask="0x80"
-                              name="SIGN"
-                              rw="RW"/>
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7F" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
                 </register>
-                <register caption="Clock Select"
-                          initval="0x00"
-                          name="CLKSEL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Select"
-                              mask="0x03"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="RTC_CLKSEL"/>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x03" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
                 </register>
                 <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
-                <register caption="Period"
-                          initval="0xFFFF"
-                          name="PER"
-                          offset="0x0A"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
                 <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
-                <register caption="PIT Control A"
-                          initval="0x00"
-                          name="PITCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="PITEN" rw="RW"/>
-                    <bitfield caption="Period"
-                              mask="0x78"
-                              name="PERIOD"
-                              rw="RW"
-                              values="RTC_PERIOD"/>
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
                 </register>
-                <register caption="PIT Status"
-                          initval="0x00"
-                          name="PITSTATUS"
-                          offset="0x11"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLBUSY"
-                              rw="R"/>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLBUSY" rw="R"/>
                 </register>
-                <register caption="PIT Interrupt Control"
-                          initval="0x00"
-                          name="PITINTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags"
-                          initval="0x00"
-                          name="PITINTFLAGS"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Debug control"
-                          initval="0x00"
-                          name="PITDBGCTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
             </register-group>
@@ -4610,156 +2143,42 @@
         </module>
         <module caption="Signature row" id="avrdd" name="SIGROW">
             <register-group caption="Signature row" name="SIGROW" size="0x40">
-                <register caption="Device ID Byte 0"
-                          name="DEVICEID0"
-                          offset="0x00"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 1"
-                          name="DEVICEID1"
-                          offset="0x01"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 2"
-                          name="DEVICEID2"
-                          offset="0x02"
-                          rw="R"
-                          size="1"/>
-                <register caption="Temperature Calibration 0"
-                          name="TEMPSENSE0"
-                          offset="0x04"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 0"
-                              mask="0xFFFF"
-                              name="TEMPSENSE0"
-                              rw="R"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Temperature Calibration 0" name="TEMPSENSE0" offset="0x04" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 0" mask="0xFFFF" name="TEMPSENSE0" rw="R"/>
                 </register>
-                <register caption="Temperature Calibration 1"
-                          name="TEMPSENSE1"
-                          offset="0x06"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 1"
-                              mask="0xFFFF"
-                              name="TEMPSENSE1"
-                              rw="R"/>
+                <register caption="Temperature Calibration 1" name="TEMPSENSE1" offset="0x06" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 1" mask="0xFFFF" name="TEMPSENSE1" rw="R"/>
                 </register>
-                <register caption="LOTNUM0"
-                          name="SERNUM0"
-                          offset="0x10"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM1"
-                          name="SERNUM1"
-                          offset="0x11"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM2"
-                          name="SERNUM2"
-                          offset="0x12"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM3"
-                          name="SERNUM3"
-                          offset="0x13"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM4"
-                          name="SERNUM4"
-                          offset="0x14"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM5"
-                          name="SERNUM5"
-                          offset="0x15"
-                          rw="R"
-                          size="1"/>
-                <register caption="RANDOM"
-                          name="SERNUM6"
-                          offset="0x16"
-                          rw="R"
-                          size="1"/>
-                <register caption="SCRIBE"
-                          name="SERNUM7"
-                          offset="0x17"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS0"
-                          name="SERNUM8"
-                          offset="0x18"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS1"
-                          name="SERNUM9"
-                          offset="0x19"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS0"
-                          name="SERNUM10"
-                          offset="0x1A"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS1"
-                          name="SERNUM11"
-                          offset="0x1B"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES0"
-                          name="SERNUM12"
-                          offset="0x1C"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES1"
-                          name="SERNUM13"
-                          offset="0x1D"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES2"
-                          name="SERNUM14"
-                          offset="0x1E"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES3"
-                          name="SERNUM15"
-                          offset="0x1F"
-                          rw="R"
-                          size="1"/>
+                <register caption="LOTNUM0" name="SERNUM0" offset="0x10" rw="R" size="1"/>
+                <register caption="LOTNUM1" name="SERNUM1" offset="0x11" rw="R" size="1"/>
+                <register caption="LOTNUM2" name="SERNUM2" offset="0x12" rw="R" size="1"/>
+                <register caption="LOTNUM3" name="SERNUM3" offset="0x13" rw="R" size="1"/>
+                <register caption="LOTNUM4" name="SERNUM4" offset="0x14" rw="R" size="1"/>
+                <register caption="LOTNUM5" name="SERNUM5" offset="0x15" rw="R" size="1"/>
+                <register caption="RANDOM" name="SERNUM6" offset="0x16" rw="R" size="1"/>
+                <register caption="SCRIBE" name="SERNUM7" offset="0x17" rw="R" size="1"/>
+                <register caption="XPOS0" name="SERNUM8" offset="0x18" rw="R" size="1"/>
+                <register caption="XPOS1" name="SERNUM9" offset="0x19" rw="R" size="1"/>
+                <register caption="YPOS0" name="SERNUM10" offset="0x1A" rw="R" size="1"/>
+                <register caption="YPOS1" name="SERNUM11" offset="0x1B" rw="R" size="1"/>
+                <register caption="RES0" name="SERNUM12" offset="0x1C" rw="R" size="1"/>
+                <register caption="RES1" name="SERNUM13" offset="0x1D" rw="R" size="1"/>
+                <register caption="RES2" name="SERNUM14" offset="0x1E" rw="R" size="1"/>
+                <register caption="RES3" name="SERNUM15" offset="0x1F" rw="R" size="1"/>
             </register-group>
         </module>
-        <module caption="Sleep Controller"
-                id="clk_sleep_ctrl_avr_v2"
-                name="SLPCTRL">
+        <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
             <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Sleep enable" mask="0x01" name="SEN" rw="RW"/>
-                    <bitfield caption="Sleep mode"
-                              mask="0x06"
-                              name="SMODE"
-                              rw="RW"
-                              values="SLPCTRL_SMODE"/>
+                    <bitfield caption="Sleep mode" mask="0x06" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="VREGCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Performance Mode"
-                              mask="0x07"
-                              name="PMODE"
-                              rw="RW"
-                              values="SLPCTRL_PMODE"/>
-                    <bitfield caption="High Temperature Low Leakage Enable"
-                              mask="0x10"
-                              name="HTLLEN"
-                              rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Performance Mode" mask="0x07" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                 </register>
             </register-group>
             <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
@@ -4767,8 +2186,7 @@
                 <value caption="Standby Mode" name="STDBY" value="0x01"/>
                 <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
             </value-group>
-            <value-group caption="High Temperature Low Leakage Enable select"
-                         name="SLPCTRL_HTLLEN">
+            <value-group caption="High Temperature Low Leakage Enable select" name="SLPCTRL_HTLLEN">
                 <value caption="Disabled" name="OFF" value="0x0"/>
                 <value caption="Enabled" name="ON" value="0x1"/>
             </value-group>
@@ -4779,110 +2197,36 @@
         </module>
         <module caption="Serial Peripheral Interface" id="spi_8bit_v2" name="SPI">
             <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable Module" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Prescaler"
-                              mask="0x06"
-                              name="PRESC"
-                              rw="RW"
-                              values="SPI_PRESC"/>
+                    <bitfield caption="Prescaler" mask="0x06" name="PRESC" rw="RW" values="SPI_PRESC"/>
                     <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
-                    <bitfield caption="Host Operation Enable"
-                              mask="0x20"
-                              name="MASTER"
-                              rw="RW"/>
+                    <bitfield caption="Host Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
                     <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI Mode"
-                              mask="0x03"
-                              name="MODE"
-                              rw="RW"
-                              values="SPI_MODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="SPI Mode" mask="0x03" name="MODE" rw="RW" values="SPI_MODE"/>
                     <bitfield caption="SPI Select Disable" mask="0x04" name="SSD" rw="RW"/>
-                    <bitfield caption="Buffer Mode Wait for Receive"
-                              mask="0x40"
-                              name="BUFWR"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Mode Wait for Receive" mask="0x40" name="BUFWR" rw="RW"/>
                     <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Enable" mask="0x01" name="IE" rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Enable"
-                              mask="0x10"
-                              name="SSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <mode name="DEFAULT" qualifier="SPI.CTRLB.BUFEN" value="0"/>
                     <mode name="BUFFERED" qualifier="SPI.CTRLB.BUFEN" value="1"/>
-                    <bitfield caption="Buffer Overflow"
-                              mask="0x01"
-                              modes="BUFFERED"
-                              name="BUFOVF"
-                              rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Flag"
-                              mask="0x10"
-                              modes="BUFFERED"
-                              name="SSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Flag"
-                              mask="0x20"
-                              modes="BUFFERED"
-                              name="DREIF"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Flag"
-                              mask="0x40"
-                              modes="BUFFERED"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              modes="BUFFERED"
-                              name="RXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Write Collision"
-                              mask="0x40"
-                              modes="DEFAULT"
-                              name="WRCOL"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt Flag"
-                              mask="0x80"
-                              modes="DEFAULT"
-                              name="IF"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Overflow" mask="0x01" modes="BUFFERED" name="BUFOVF" rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Flag" mask="0x10" modes="BUFFERED" name="SSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" modes="BUFFERED" name="DREIF" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" modes="BUFFERED" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" modes="BUFFERED" name="RXCIF" rw="RW"/>
+                    <bitfield caption="Write Collision" mask="0x40" modes="DEFAULT" name="WRCOL" rw="RW"/>
+                    <bitfield caption="Interrupt Flag" mask="0x80" modes="DEFAULT" name="IF" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
             </register-group>
@@ -4901,543 +2245,149 @@
         </module>
         <module caption="System Configuration Registers" id="avrdd" name="SYSCFG">
             <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
-                <register caption="Revision ID"
-                          name="REVID"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Control"
-                          name="OCDMCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Status"
-                          initval="0x00"
-                          name="OCDMSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+                <register caption="OCD Message Control" name="OCDMCTRL" offset="0x04" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMSTATUS" offset="0x05" rw="RW" size="1">
                     <bitfield caption="OCD Message Valid" mask="0x01" name="VALID" rw="RW"/>
                 </register>
             </register-group>
         </module>
-        <module caption="16-bit Timer/Counter Type A"
-                id="tmr_16b_pwm_v1"
-                name="TCA">
+        <module caption="16-bit Timer/Counter Type A" id="tmr_16b_pwm_v1" name="TCA">
             <register-group caption="16-bit Timer/Counter Type A" name="TCA" size="0x40">
-                <mode caption="Single Mode"
-                      name="SINGLE"
-                      qualifier="TCA.SINGLE.CTRLD.SPLITM"
-                      value="0"/>
-                <mode caption="Split Mode"
-                      name="SPLIT"
-                      qualifier="TCA.SPLIT.CTRLD.SPLITM"
-                      value="1"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <mode caption="Single Mode" name="SINGLE" qualifier="TCA.SINGLE.CTRLD.SPLITM" value="0"/>
+                <mode caption="Split Mode" name="SPLIT" qualifier="TCA.SPLIT.CTRLD.SPLITM" value="1"/>
+                <register caption="Control A" initval="0x00" modes="SINGLE" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x07"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                <register caption="Control B" initval="0x00" modes="SINGLE" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                     <bitfield caption="Auto Lock Update" mask="0x08" name="ALUPD" rw="RW"/>
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare 0 Waveform Output Value"
-                              mask="0x01"
-                              name="CMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Waveform Output Value"
-                              mask="0x02"
-                              name="CMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Waveform Output Value"
-                              mask="0x04"
-                              name="CMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SINGLE" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x01" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x02" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x04" name="CMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SINGLE" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Control E Clear" initval="0x00" modes="SINGLE" name="CTRLECLR" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Direction"
-                              mask="0x01"
-                              name="DIR"
-                              rw="RW"
-                              values="TCA_SINGLE_DIR"/>
+                <register caption="Control E Set" initval="0x00" modes="SINGLE" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control F Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Clear" initval="0x00" modes="SINGLE" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Control F Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFSET"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Set" initval="0x00" modes="SINGLE" name="CTRLFSET" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="EVCTRL"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Count on Event Input A"
-                              mask="0x01"
-                              name="CNTAEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action A"
-                              mask="0x0E"
-                              name="EVACTA"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTA"/>
-                    <bitfield caption="Count on Event Input B"
-                              mask="0x10"
-                              name="CNTBEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action B"
-                              mask="0xE0"
-                              name="EVACTB"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTB"/>
+                <register caption="Event Control" initval="0x00" modes="SINGLE" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input A" mask="0x01" name="CNTAEI" rw="RW"/>
+                    <bitfield caption="Event Action A" mask="0x0E" name="EVACTA" rw="RW" values="TCA_SINGLE_EVACTA"/>
+                    <bitfield caption="Count on Event Input B" mask="0x10" name="CNTBEI" rw="RW"/>
+                    <bitfield caption="Event Action B" mask="0xE0" name="EVACTB" rw="RW" values="TCA_SINGLE_EVACTB"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" modes="SINGLE" name="INTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" modes="SINGLE" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SINGLE" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary data for 16-bit Access"
-                          modes="SINGLE"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          modes="SINGLE"
-                          name="CNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period"
-                          modes="SINGLE"
-                          name="PER"
-                          offset="0x26"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0"
-                          modes="SINGLE"
-                          name="CMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1"
-                          modes="SINGLE"
-                          name="CMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2"
-                          modes="SINGLE"
-                          name="CMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period Buffer"
-                          modes="SINGLE"
-                          name="PERBUF"
-                          offset="0x36"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0 Buffer"
-                          modes="SINGLE"
-                          name="CMP0BUF"
-                          offset="0x38"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1 Buffer"
-                          modes="SINGLE"
-                          name="CMP1BUF"
-                          offset="0x3A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2 Buffer"
-                          modes="SINGLE"
-                          name="CMP2BUF"
-                          offset="0x3C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary data for 16-bit Access" modes="SINGLE" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Count" modes="SINGLE" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Period" modes="SINGLE" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Compare 0" modes="SINGLE" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 1" modes="SINGLE" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 2" modes="SINGLE" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Period Buffer" modes="SINGLE" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" modes="SINGLE" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" modes="SINGLE" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" modes="SINGLE" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" modes="SPLIT" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Enable"
-                              mask="0x01"
-                              name="LCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Enable"
-                              mask="0x02"
-                              name="LCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Enable"
-                              mask="0x04"
-                              name="LCMP2EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Enable"
-                              mask="0x10"
-                              name="HCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Enable"
-                              mask="0x20"
-                              name="HCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Enable"
-                              mask="0x40"
-                              name="HCMP2EN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" modes="SPLIT" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Enable" mask="0x01" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x02" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x04" name="LCMP2EN" rw="RW"/>
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Output Value"
-                              mask="0x01"
-                              name="LCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Output Value"
-                              mask="0x02"
-                              name="LCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Output Value"
-                              mask="0x04"
-                              name="LCMP2OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Output Value"
-                              mask="0x10"
-                              name="HCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Output Value"
-                              mask="0x20"
-                              name="HCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Output Value"
-                              mask="0x40"
-                              name="HCMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SPLIT" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x01" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x02" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x04" name="LCMP2OV" rw="RW"/>
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SPLIT" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Clear" initval="0x00" modes="SPLIT" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Set" initval="0x00" modes="SPLIT" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Enable"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Enable"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Enable"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Enable"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Enable"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" modes="SPLIT" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Flag"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Flag"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Flag"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Flag"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Flag"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" modes="SPLIT" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SPLIT" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Low Count"
-                          modes="SPLIT"
-                          name="LCNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Count"
-                          modes="SPLIT"
-                          name="HCNT"
-                          offset="0x21"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Period"
-                          modes="SPLIT"
-                          name="LPER"
-                          offset="0x26"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Period"
-                          modes="SPLIT"
-                          name="HPER"
-                          offset="0x27"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP0"
-                          offset="0x29"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP1"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP2"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Low Count" modes="SPLIT" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="High Count" modes="SPLIT" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="Low Period" modes="SPLIT" name="LPER" offset="0x26" rw="RW" size="1"/>
+                <register caption="High Period" modes="SPLIT" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
             </register-group>
             <value-group caption="Clock Selection" name="TCA_SINGLE_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5454,12 +2404,8 @@
                 <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
                 <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
                 <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
-                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM"
-                       name="DSBOTH"
-                       value="0x06"/>
-                <value caption="Dual Slope PWM, overflow on BOTTOM"
-                       name="DSBOTTOM"
-                       value="0x07"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
             </value-group>
             <value-group caption="Command select" name="TCA_SINGLE_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
@@ -5472,31 +2418,17 @@
                 <value caption="Count down" name="DOWN" value="0x1"/>
             </value-group>
             <value-group caption="Event Action A select" name="TCA_SINGLE_EVACTA">
-                <value caption="Count on positive edge event"
-                       name="CNT_POSEDGE"
-                       value="0x00"/>
+                <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
-                <value caption="Count on prescaled clock while event line is 1."
-                       name="CNT_HIGHLVL"
-                       value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
+                <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
-                <value caption="Restart counter at positive edge event"
-                       name="RESTART_POSEDGE"
-                       value="0x04"/>
-                <value caption="Restart counter on any edge event"
-                       name="RESTART_ANYEDGE"
-                       value="0x05"/>
-                <value caption="Restart counter while event line is 1."
-                       name="RESTART_HIGHLVL"
-                       value="0x06"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+                <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
+                <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
+                <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
             </value-group>
             <value-group caption="Clock Selection" name="TCA_SPLIT_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5516,107 +2448,46 @@
             </value-group>
             <value-group caption="Command Enable select" name="TCA_SPLIT_CMDEN">
                 <value caption="None" name="NONE" value="0x0"/>
-                <value caption="Both low byte and high byte counter"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Both low byte and high byte counter" name="BOTH" value="0x3"/>
             </value-group>
         </module>
         <module caption="16-bit Timer Type B" id="tmr_16b_capture_v1" name="TCB">
             <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Select"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCB_CLKSEL"/>
+                    <bitfield caption="Clock Select" mask="0x0E" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
                     <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
                     <bitfield caption="Cascade two timers" mask="0x20" name="CASCADE" rw="RW"/>
                     <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control Register B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Timer Mode"
-                              mask="0x07"
-                              name="CNTMODE"
-                              rw="RW"
-                              values="TCB_CNTMODE"/>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Timer Mode" mask="0x07" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
                     <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
                     <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
                     <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Event Input Enable" mask="0x01" name="CAPTEI" rw="RW"/>
                     <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
-                    <bitfield caption="Input Capture Noise Cancellation Filter"
-                              mask="0x40"
-                              name="FILTER"
-                              rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
                     <bitfield caption="Run" mask="0x01" name="RUN" rw="R"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Value"
-                          name="TEMP"
-                          offset="0x9"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          initval="0x0000"
-                          name="CNT"
-                          offset="0xA"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare or Capture"
-                          name="CCMP"
-                          offset="0xC"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock Select" name="TCB_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5628,247 +2499,78 @@
                 <value caption="Periodic Interrupt" name="INT" value="0x00"/>
                 <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
                 <value caption="Input Capture Event" name="CAPT" value="0x02"/>
-                <value caption="Input Capture Frequency measurement"
-                       name="FRQ"
-                       value="0x03"/>
-                <value caption="Input Capture Pulse-Width measurement"
-                       name="PW"
-                       value="0x04"/>
-                <value caption="Input Capture Frequency and Pulse-Width measurement"
-                       name="FRQPW"
-                       value="0x05"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
                 <value caption="Single Shot" name="SINGLE" value="0x06"/>
                 <value caption="8-bit PWM" name="PWM8" value="0x07"/>
             </value-group>
         </module>
         <module caption="Timer Counter D" id="tmr_12b_psc_v1" name="TCD">
             <register-group caption="Timer Counter D" name="TCD" size="0x40">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler"
-                              mask="0x06"
-                              name="SYNCPRES"
-                              rw="RW"
-                              values="TCD_SYNCPRES"/>
-                    <bitfield caption="Counter prescaler"
-                              mask="0x18"
-                              name="CNTPRES"
-                              rw="RW"
-                              values="TCD_CNTPRES"/>
-                    <bitfield caption="Clock select"
-                              mask="0x60"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCD_CLKSEL"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x06" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+                    <bitfield caption="Counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+                    <bitfield caption="Clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x03"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCD_WGMODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x03" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare output value override"
-                              mask="0x01"
-                              name="CMPOVR"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare output value override" mask="0x01" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Auto update" mask="0x02" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Fifty percent waveform"
-                              mask="0x08"
-                              name="FIFTY"
-                              rw="RW"/>
-                    <bitfield caption="Compare C output select"
-                              mask="0x40"
-                              name="CMPCSEL"
-                              rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select"
-                              mask="0x80"
-                              name="CMPDSEL"
-                              rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Fifty percent waveform" mask="0x08" name="FIFTY" rw="RW"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x0F" name="CMPAVAL" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0xF0" name="CMPBVAL" rw="RW"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronize end of cycle strobe"
-                              mask="0x01"
-                              name="SYNCEOC"
-                              rw="RW"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Synchronize end of cycle strobe" mask="0x01" name="SYNCEOC" rw="RW"/>
                     <bitfield caption="synchronize strobe" mask="0x02" name="SYNC" rw="RW"/>
                     <bitfield caption="Restart strobe" mask="0x04" name="RESTART" rw="RW"/>
-                    <bitfield caption="Software Capture A Strobe"
-                              mask="0x08"
-                              name="SCAPTUREA"
-                              rw="RW"/>
-                    <bitfield caption="Software Capture B Strobe"
-                              mask="0x10"
-                              name="SCAPTUREB"
-                              rw="RW"/>
-                    <bitfield caption="Disable at end of cycle"
-                              mask="0x80"
-                              name="DISEOC"
-                              rw="RW"/>
+                    <bitfield caption="Software Capture A Strobe" mask="0x08" name="SCAPTUREA" rw="RW"/>
+                    <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+                    <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
                 </register>
-                <register caption="EVCTRLA"
-                          initval="0x00"
-                          name="EVCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="EVCTRLB"
-                          initval="0x00"
-                          name="EVCTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Enable ready" mask="0x01" name="ENRDY" rw="R"/>
                     <bitfield caption="Command ready" mask="0x02" name="CMDRDY" rw="R"/>
                     <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
                     <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
                 </register>
-                <register caption="Input Control A"
-                          initval="0x00"
-                          name="INPUTCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Input Control B"
-                          initval="0x00"
-                          name="INPUTCTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Fault Control"
-                          initval="0x00"
-                          name="FAULTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x01" name="CMPA" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0x02" name="CMPB" rw="RW"/>
                     <bitfield caption="Compare C value" mask="0x04" name="CMPC" rw="RW"/>
@@ -5878,100 +2580,33 @@
                     <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
                     <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
                 </register>
-                <register caption="Delay Control"
-                          initval="0x00"
-                          name="DLYCTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Delay select"
-                              mask="0x03"
-                              name="DLYSEL"
-                              rw="RW"
-                              values="TCD_DLYSEL"/>
-                    <bitfield caption="Delay trigger"
-                              mask="0x0C"
-                              name="DLYTRIG"
-                              rw="RW"
-                              values="TCD_DLYTRIG"/>
-                    <bitfield caption="Delay prescaler"
-                              mask="0x30"
-                              name="DLYPRESC"
-                              rw="RW"
-                              values="TCD_DLYPRESC"/>
+                <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Delay select" mask="0x03" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+                    <bitfield caption="Delay trigger" mask="0x0C" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+                    <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
                 </register>
-                <register caption="Delay value"
-                          initval="0x00"
-                          name="DLYVAL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Delay value" mask="0xFF" name="DLYVAL" rw="RW"/>
                 </register>
-                <register caption="Dither Control A"
-                          initval="0x00"
-                          name="DITCTRL"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Dither select"
-                              mask="0x03"
-                              name="DITHERSEL"
-                              rw="RW"
-                              values="TCD_DITHERSEL"/>
+                <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Dither select" mask="0x03" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
                 </register>
-                <register caption="Dither value"
-                          initval="0x00"
-                          name="DITVAL"
-                          offset="0x19"
-                          rw="RW"
-                          size="1">
+                <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
                     <bitfield caption="Dither value" mask="0x0F" name="DITHER" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                     <bitfield caption="Fault detection" mask="0x04" name="FAULTDET" rw="RW"/>
                 </register>
-                <register caption="Capture A"
-                          name="CAPTUREA"
-                          offset="0x22"
-                          rw="R"
-                          size="2"/>
-                <register caption="Capture B"
-                          name="CAPTUREB"
-                          offset="0x24"
-                          rw="R"
-                          size="2"/>
-                <register caption="Compare A Set"
-                          name="CMPASET"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare A Clear"
-                          name="CMPACLR"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Set"
-                          name="CMPBSET"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Clear"
-                          name="CMPBCLR"
-                          offset="0x2E"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+                <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+                <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock select" name="TCD_CLKSEL">
-                <value caption="Internal High-Frequency oscillator"
-                       name="OSCHF"
-                       value="0x00"/>
+                <value caption="Internal High-Frequency oscillator" name="OSCHF" value="0x00"/>
                 <value caption="PLL" name="PLL" value="0x01"/>
                 <value caption="External Clock" name="EXTCLK" value="0x02"/>
                 <value caption="Peripheral clock" name="CLKPER" value="0x03"/>
@@ -5982,18 +2617,10 @@
                 <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
             </value-group>
             <value-group caption="Synchronization prescaler select" name="TCD_SYNCPRES">
-                <value caption="Selected clock source divided by 1"
-                       name="DIV1"
-                       value="0x00"/>
-                <value caption="Selected clock source divided by 2"
-                       name="DIV2"
-                       value="0x01"/>
-                <value caption="Selected clock source divided by 4"
-                       name="DIV4"
-                       value="0x02"/>
-                <value caption="Selected clock source divided by 8"
-                       name="DIV8"
-                       value="0x03"/>
+                <value caption="Selected clock source divided by 1" name="DIV1" value="0x00"/>
+                <value caption="Selected clock source divided by 2" name="DIV2" value="0x01"/>
+                <value caption="Selected clock source divided by 4" name="DIV4" value="0x02"/>
+                <value caption="Selected clock source divided by 8" name="DIV8" value="0x03"/>
             </value-group>
             <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
                 <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
@@ -6034,176 +2661,63 @@
             </value-group>
             <value-group caption="Event action select" name="TCD_ACTION">
                 <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
-                <value caption="Event trigger a fault and capture"
-                       name="CAPTURE"
-                       value="0x1"/>
+                <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
             </value-group>
             <value-group caption="Event config select" name="TCD_CFG">
-                <value caption="Neither Filter nor Asynchronous Event is enabled"
-                       name="NEITHER"
-                       value="0x0"/>
-                <value caption="Input Capture Noise Cancellation Filter enabled"
-                       name="FILTER"
-                       value="0x1"/>
-                <value caption="Asynchronous Event output qualification enabled"
-                       name="ASYNC"
-                       value="0x2"/>
+                <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+                <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+                <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="Edge select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW"
-                       value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH"
-                       value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
-                <value caption="Stop output, jump to opposite compare cycle and wait"
-                       name="JMPWAIT"
-                       value="0x01"/>
-                <value caption="Stop output, execute opposite compare cycle and wait"
-                       name="EXECWAIT"
-                       value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active"
-                       name="EXECFAULT"
-                       value="0x03"/>
-                <value caption="Stop all outputs, maintain frequency"
-                       name="FREQ"
-                       value="0x04"/>
-                <value caption="Stop all outputs, execute dead time while fault active"
-                       name="EXECDT"
-                       value="0x05"/>
-                <value caption="Stop all outputs, jump to next compare cycle and wait"
-                       name="WAIT"
-                       value="0x06"/>
-                <value caption="Stop all outputs, wait for software action"
-                       name="WAITSW"
-                       value="0x07"/>
-                <value caption="Stop output on edge, jump to next compare cycle"
-                       name="EDGETRIG"
-                       value="0x08"/>
-                <value caption="Stop output on edge, maintain frequency"
-                       name="EDGETRIGFREQ"
-                       value="0x09"/>
-                <value caption="Stop output at level, maintain frequency"
-                       name="LVLTRIGFREQ"
-                       value="0x0A"/>
+                <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
+                <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
+                <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
+                <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
+                <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
+                <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x07"/>
+                <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x08"/>
+                <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x09"/>
+                <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0x0A"/>
             </value-group>
         </module>
         <module caption="Two-Wire Interface" id="i2c_8bit_avr_v3" name="TWI">
             <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="SDA Setup Time"
-                              mask="0x10"
-                              name="SDASETUP"
-                              rw="RW"
-                              values="TWI_SDASETUP"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Dual Mode Control"
-                          initval="0x00"
-                          name="DUALCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
+                <register caption="Dual Mode Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Debug Run"
-                              mask="0x01"
-                              name="DBGRUN"
-                              rw="RW"
-                              values="TWI_DBGRUN"/>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW" values="TWI_DBGRUN"/>
                 </register>
-                <register caption="Host Control A"
-                          initval="0x00"
-                          name="MCTRLA"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Inactive Bus Time-Out"
-                              mask="0x0C"
-                              name="TIMEOUT"
-                              rw="RW"
-                              values="TWI_TIMEOUT"/>
+                    <bitfield caption="Inactive Bus Time-Out" mask="0x0C" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
                     <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
-                    <bitfield caption="Write Interrupt Enable"
-                              mask="0x40"
-                              name="WIEN"
-                              rw="RW"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
                     <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
                 </register>
-                <register caption="Host Control B"
-                          initval="0x00"
-                          name="MCTRLB"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="MCMD"
-                              rw="RW"
-                              values="TWI_MCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Host Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                     <bitfield caption="Flush" mask="0x08" name="FLUSH" rw="RW"/>
                 </register>
-                <register caption="Host STATUS"
-                          initval="0x00"
-                          name="MSTATUS"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bus State"
-                              mask="0x03"
-                              name="BUSSTATE"
-                              rw="RW"
-                              values="TWI_BUSSTATE"/>
+                <register caption="Host STATUS" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
@@ -6211,147 +2725,69 @@
                     <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
                     <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
                 </register>
-                <register caption="Host Baud Rate"
-                          initval="0x00"
-                          name="MBAUD"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Baud Rate" initval="0x00" name="MBAUD" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Baud Rate" mask="0xFF" name="BAUD" rw="RW"/>
                 </register>
-                <register caption="Host Address"
-                          initval="0x00"
-                          name="MADDR"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Address" initval="0x00" name="MADDR" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Host Data"
-                          initval="0x00"
-                          name="MDATA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Data" initval="0x00" name="MDATA" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Control A"
-                          initval="0x00"
-                          name="SCTRLA"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Address Recognition Mode"
-                              mask="0x04"
-                              name="PMEN"
-                              rw="RW"/>
+                    <bitfield caption="Address Recognition Mode" mask="0x04" name="PMEN" rw="RW"/>
                     <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Enable"
-                              mask="0x40"
-                              name="APIEN"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
                     <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
                 </register>
-                <register caption="Client Control B"
-                          initval="0x00"
-                          name="SCTRLB"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="SCMD"
-                              rw="RW"
-                              values="TWI_SCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Client Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                 </register>
-                <register caption="Client Status"
-                          initval="0x00"
-                          name="SSTATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Address or Stop"
-                              mask="0x01"
-                              name="AP"
-                              rw="RW"
-                              values="TWI_AP"/>
+                <register caption="Client Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Address or Stop" mask="0x01" name="AP" rw="RW" values="TWI_AP"/>
                     <bitfield caption="Read/Write Direction" mask="0x02" name="DIR" rw="RW"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Collision" mask="0x08" name="COLL" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
                     <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Flag"
-                              mask="0x40"
-                              name="APIF"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
                     <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
                 </register>
-                <register caption="Client Address"
-                          initval="0x00"
-                          name="SADDR"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address" initval="0x00" name="SADDR" offset="0xC" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Client Data"
-                          initval="0x00"
-                          name="SDATA"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Data" initval="0x00" name="SDATA" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Address Mask"
-                          initval="0x00"
-                          name="SADDRMASK"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address Mask" initval="0x00" name="SADDRMASK" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Address Mask Enable" mask="0x01" name="ADDREN" rw="RW"/>
                     <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Fast-mode Plus Enable select" name="TWI_FMPEN">
-                <value caption="Operating in Standard-mode or Fast-mode"
-                       name="OFF"
-                       value="0x0"/>
+                <value caption="Operating in Standard-mode or Fast-mode" name="OFF" value="0x0"/>
                 <value caption="Operating in Fast-mode Plus" name="ON" value="0x1"/>
             </value-group>
             <value-group caption="Input voltage transition level select" name="TWI_INPUTLVL">
                 <value caption="I2C input voltage transition level" name="I2C" value="0x0"/>
-                <value caption="SMBus 3.0 input voltage transition level"
-                       name="SMBUS"
-                       value="0x1"/>
+                <value caption="SMBus 3.0 input voltage transition level" name="SMBUS" value="0x1"/>
             </value-group>
             <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
                 <value caption="No SDA Hold Delay" name="OFF" value="0x0"/>
                 <value caption="Short SDA hold time" name="50NS" value="0x1"/>
-                <value caption="Meets SMBUS 2.0 specification under typical conditions"
-                       name="300NS"
-                       value="0x2"/>
-                <value caption="Meets SMBUS 2.0 specificaiton across all corners"
-                       name="500NS"
-                       value="0x3"/>
+                <value caption="Meets SMBUS 2.0 specification under typical conditions" name="300NS" value="0x2"/>
+                <value caption="Meets SMBUS 2.0 specificaiton across all corners" name="500NS" value="0x3"/>
             </value-group>
             <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
                 <value caption="SDA setup time is four clock cycles" name="4CYC" value="0"/>
                 <value caption="SDA setup time is eight clock cycle" name="8CYC" value="1"/>
             </value-group>
             <value-group caption="Debug Run select" name="TWI_DBGRUN">
-                <value caption="The peripheral is halted in Break Debug mode and ignores events"
-                       name="HALT"
-                       value="0"/>
-                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted"
-                       name="RUN"
-                       value="1"/>
+                <value caption="The peripheral is halted in Break Debug mode and ignores events" name="HALT" value="0"/>
+                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted" name="RUN" value="1"/>
             </value-group>
             <value-group caption="Inactive Bus Time-Out select" name="TWI_TIMEOUT">
                 <value caption="Bus time-out disabled. I2C." name="DISABLED" value="0"/>
@@ -6365,15 +2801,9 @@
             </value-group>
             <value-group caption="Command select" name="TWI_MCMD">
                 <value caption="No action" name="NOACT" value="0"/>
-                <value caption="Execute Acknowledge Action followed by repeated Start."
-                       name="REPSTART"
-                       value="1"/>
-                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR."
-                       name="RECVTRANS"
-                       value="2"/>
-                <value caption="Execute Acknowledge Action followed by issuing a Stop condition."
-                       name="STOP"
-                       value="3"/>
+                <value caption="Execute Acknowledge Action followed by repeated Start." name="REPSTART" value="1"/>
+                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR." name="RECVTRANS" value="2"/>
+                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP" value="3"/>
             </value-group>
             <value-group caption="Bus State select" name="TWI_BUSSTATE">
                 <value caption="Unknown bus state" name="UNKNOWN" value="0"/>
@@ -6384,254 +2814,81 @@
             <value-group caption="Command select" name="TWI_SCMD">
                 <value caption="No Action" name="NOACT" value="0"/>
                 <value caption="Complete transaction" name="COMPTRANS" value="2"/>
-                <value caption="Used in response to an interrupt"
-                       name="RESPONSE"
-                       value="3"/>
+                <value caption="Used in response to an interrupt" name="RESPONSE" value="3"/>
             </value-group>
             <value-group caption="Address or Stop select" name="TWI_AP">
-                <value caption="A Stop condition generated the interrupt on APIF flag"
-                       name="STOP"
-                       value="0"/>
-                <value caption="Address detection generated the interrupt on APIF flag"
-                       name="ADR"
-                       value="1"/>
+                <value caption="A Stop condition generated the interrupt on APIF flag" name="STOP" value="0"/>
+                <value caption="Address detection generated the interrupt on APIF flag" name="ADR" value="1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                            name="USART"
-                            size="0x10">
-                <register caption="Receive Data Low Byte"
-                          initval="0x00"
-                          name="RXDATAL"
-                          offset="0x0"
-                          rw="R"
-                          size="1">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xFF" name="DATA" rw="R"/>
                 </register>
-                <register caption="Receive Data High Byte"
-                          initval="0x00"
-                          name="RXDATAH"
-                          offset="0x1"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="Receiver Data Register"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="R"/>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Receiver Data Register" mask="0x01" name="DATA8" rw="R"/>
                     <bitfield caption="Parity Error" mask="0x02" name="PERR" rw="R"/>
                     <bitfield caption="Frame Error" mask="0x04" name="FERR" rw="R"/>
                     <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Transmit Data Low Byte"
-                          initval="0x00"
-                          name="TXDATAL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register"
-                              mask="0xFF"
-                              name="DATA"
-                              rw="RW"/>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Transmit Data High Byte"
-                          initval="0x00"
-                          name="TXDATAH"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="RW"/>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x01" name="DATA8" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Wait For Break" mask="0x01" name="WFB" rw="RW"/>
                     <bitfield caption="Break Detected Flag" mask="0x02" name="BDF" rw="RW"/>
-                    <bitfield caption="Inconsistent Sync Field Interrupt Flag"
-                              mask="0x08"
-                              name="ISFIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Start Interrupt"
-                              mask="0x10"
-                              name="RXSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Flag"
-                              mask="0x20"
-                              name="DREIF"
-                              rw="R"/>
-                    <bitfield caption="Transmit Interrupt Flag"
-                              mask="0x40"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x08" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="RS485 Mode internal transmitter"
-                              mask="0x01"
-                              name="RS485"
-                              rw="RW"
-                              values="USART_RS485"/>
-                    <bitfield caption="Auto-baud Error Interrupt Enable"
-                              mask="0x04"
-                              name="ABEIE"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x01" name="RS485" rw="RW" values="USART_RS485"/>
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x04" name="ABEIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x08" name="LBME" rw="RW"/>
-                    <bitfield caption="Receiver Start Frame Interrupt Enable"
-                              mask="0x10"
-                              name="RXSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transmit Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multi-processor Communication Mode"
-                              mask="0x01"
-                              name="MPCM"
-                              rw="RW"/>
-                    <bitfield caption="Receiver Mode"
-                              mask="0x06"
-                              name="RXMODE"
-                              rw="RW"
-                              values="USART_RXMODE"/>
-                    <bitfield caption="Open Drain Mode Enable"
-                              mask="0x08"
-                              name="ODME"
-                              rw="RW"/>
-                    <bitfield caption="Start Frame Detection Enable"
-                              mask="0x10"
-                              name="SFDEN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x06" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x08" name="ODME" rw="RW"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
                     <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
                     <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x03"
-                          name="CTRLC"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="USART.CTRLC.CMODE" value="0x00 0x01 0x02"/>
                     <mode name="MSPI" qualifier="USART.CTRLC.CMODE" value="0x03"/>
-                    <bitfield caption="Communication Mode"
-                              mask="0xC0"
-                              name="CMODE"
-                              rw="RW"
-                              values="USART_CMODE"/>
-                    <bitfield caption="SPI Host Mode, Clock Phase"
-                              mask="0x02"
-                              modes="MSPI"
-                              name="UCPHA"
-                              rw="RW"/>
-                    <bitfield caption="SPI Host Mode, Data Order"
-                              mask="0x04"
-                              modes="MSPI"
-                              name="UDORD"
-                              rw="RW"/>
-                    <bitfield caption="Character Size"
-                              mask="0x07"
-                              modes="NORMAL"
-                              name="CHSIZE"
-                              rw="RW"
-                              values="USART_NORMAL_CHSIZE"/>
-                    <bitfield caption="Stop Bit Mode"
-                              mask="0x08"
-                              modes="NORMAL"
-                              name="SBMODE"
-                              rw="RW"
-                              values="USART_NORMAL_SBMODE"/>
-                    <bitfield caption="Parity Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="PMODE"
-                              rw="RW"
-                              values="USART_NORMAL_PMODE"/>
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" rw="RW" values="USART_CMODE"/>
+                    <bitfield caption="SPI Host Mode, Clock Phase" mask="0x02" modes="MSPI" name="UCPHA" rw="RW"/>
+                    <bitfield caption="SPI Host Mode, Data Order" mask="0x04" modes="MSPI" name="UDORD" rw="RW"/>
+                    <bitfield caption="Character Size" mask="0x07" modes="NORMAL" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" modes="NORMAL" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" modes="NORMAL" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
                 </register>
-                <register caption="Baud Rate"
-                          initval="0x0000"
-                          name="BAUD"
-                          offset="0x8"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Auto Baud Window"
-                              mask="0xC0"
-                              name="ABW"
-                              rw="RW"
-                              values="USART_ABW"/>
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xC0" name="ABW" rw="RW" values="USART_ABW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="IrDA Event Input Enable"
-                              mask="0x01"
-                              name="IREI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x01" name="IREI" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control"
-                          initval="0x00"
-                          name="TXPLCTRL"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xFF" name="TXPL" rw="RW"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control"
-                          initval="0x00"
-                          name="RXPLCTRL"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7F" name="RXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -6656,12 +2913,8 @@
                 <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
                 <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
                 <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
-                <value caption="Character size: 9 bit read low byte first"
-                       name="9BITL"
-                       value="0x06"/>
-                <value caption="Character size: 9 bit read high byte first"
-                       name="9BITH"
-                       value="0x07"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
             </value-group>
             <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
                 <value caption="No Parity" name="DISABLED" value="0x00"/>
@@ -6681,234 +2934,62 @@
         </module>
         <module caption="User Row" id="avrdd" name="USERROW">
             <register-group caption="User Row" name="USERROW" size="0x20">
-                <register caption="User Row Byte 0"
-                          name="USERROW0"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 1"
-                          name="USERROW1"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 2"
-                          name="USERROW2"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 3"
-                          name="USERROW3"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 4"
-                          name="USERROW4"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 5"
-                          name="USERROW5"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 6"
-                          name="USERROW6"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 7"
-                          name="USERROW7"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 8"
-                          name="USERROW8"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 9"
-                          name="USERROW9"
-                          offset="0x09"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 10"
-                          name="USERROW10"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 11"
-                          name="USERROW11"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 12"
-                          name="USERROW12"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 13"
-                          name="USERROW13"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 14"
-                          name="USERROW14"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 15"
-                          name="USERROW15"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 16"
-                          name="USERROW16"
-                          offset="0x10"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 17"
-                          name="USERROW17"
-                          offset="0x11"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 18"
-                          name="USERROW18"
-                          offset="0x12"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 19"
-                          name="USERROW19"
-                          offset="0x13"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 20"
-                          name="USERROW20"
-                          offset="0x14"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 21"
-                          name="USERROW21"
-                          offset="0x15"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 22"
-                          name="USERROW22"
-                          offset="0x16"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 23"
-                          name="USERROW23"
-                          offset="0x17"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 24"
-                          name="USERROW24"
-                          offset="0x18"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 25"
-                          name="USERROW25"
-                          offset="0x19"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 26"
-                          name="USERROW26"
-                          offset="0x1A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 27"
-                          name="USERROW27"
-                          offset="0x1B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 28"
-                          name="USERROW28"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 29"
-                          name="USERROW29"
-                          offset="0x1D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 30"
-                          name="USERROW30"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 31"
-                          name="USERROW31"
-                          offset="0x1F"
-                          rw="RW"
-                          size="1"/>
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Virtual Ports" id="gpio_ports_avr_v2_vport" name="VPORT">
             <register-group caption="Virtual Ports" name="VPORT" size="0x4">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Voltage reference" id="avrdd" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
-                <register caption="ADC0 Reference"
-                          initval="0x00"
-                          name="ADC0REF"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="ADC0 Reference" initval="0x00" name="ADC0REF" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="DAC0 Reference"
-                          initval="0x00"
-                          name="DAC0REF"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="DAC0 Reference" initval="0x00" name="DAC0REF" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="AC Reference"
-                          initval="0x00"
-                          name="ACREF"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="AC Reference" initval="0x00" name="ACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
             </register-group>
@@ -6923,33 +3004,12 @@
         </module>
         <module caption="Watch-Dog Timer" id="wdt_windowed_v2" name="WDT">
             <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="WDT_PERIOD"/>
-                    <bitfield caption="Window"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="WDT_WINDOW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x0F" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xF0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Syncronization busy"
-                              mask="0x01"
-                              name="SYNCBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY" rw="R"/>
                     <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
                 </register>
             </register-group>
@@ -6984,60 +3044,25 @@
         </module>
         <module caption="Zero Cross Detect" id="cmp_zxover_ctrl_v3" name="ZCD">
             <register-group caption="Zero Cross Detect" name="ZCD" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Invert signal from pin"
-                              mask="0x08"
-                              name="INVERT"
-                              rw="RW"/>
+                    <bitfield caption="Invert signal from pin" mask="0x08" name="INVERT" rw="RW"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x03"
-                              name="INTMODE"
-                              rw="RW"
-                              values="ZCD_INTMODE"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x03" name="INTMODE" rw="RW" values="ZCD_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="ZCD Interrupt Flag" mask="0x01" name="CROSSIF" rw="RW"/>
-                    <bitfield caption="ZCD State"
-                              mask="0x10"
-                              name="STATE"
-                              rw="R"
-                              values="ZCD_STATE"/>
+                    <bitfield caption="ZCD State" mask="0x10" name="STATE" rw="R" values="ZCD_STATE"/>
                 </register>
             </register-group>
             <value-group caption="Interrupt Mode select" name="ZCD_INTMODE">
                 <value caption="No interrupt" name="NONE" value="0x0"/>
-                <value caption="Interrupt on rising input signal"
-                       name="RISING"
-                       value="0x1"/>
-                <value caption="Interrupt on falling input signal"
-                       name="FALLING"
-                       value="0x2"/>
-                <value caption="Interrupt on both rising and falling input signal"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Interrupt on rising input signal" name="RISING" value="0x1"/>
+                <value caption="Interrupt on falling input signal" name="FALLING" value="0x2"/>
+                <value caption="Interrupt on both rising and falling input signal" name="BOTH" value="0x3"/>
             </value-group>
             <value-group caption="ZCD State select" name="ZCD_STATE">
                 <value caption="Output is 0" name="LOW" value="0x0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DA28.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DA28.xml
index cb4cae8e..4e2409a0 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DA28.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DA28.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR32DA28" package="SOIC28" pinout="SOIC28" speedmax="24000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR32DA28" package="SOIC28" pinout="SOIC28" speedmax="24000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR32DA28" family="AVR8" architecture="AVR8X" avr-family="AVR DA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1000" start="0x7000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -97,8 +88,7 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
@@ -107,8 +97,7 @@
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -156,16 +145,11 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
                     </signals>
                 </instance>
             </module>
@@ -362,8 +346,7 @@
                     <signals>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
@@ -542,28 +525,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -573,8 +551,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -637,10 +614,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -660,12 +635,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -778,23 +751,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -865,44 +833,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -927,14 +883,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -1120,8 +1072,7 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1149,12 +1100,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1200,145 +1149,111 @@
         <module caption="Event System" id="avrda" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
                 <register caption="User 13 - PTC" initval="0x00" name="USERPTCSTART" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1374,17 +1289,12 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1428,15 +1338,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1484,15 +1390,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1540,15 +1442,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1587,15 +1485,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1634,15 +1528,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1678,15 +1568,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1722,15 +1608,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1767,13 +1649,10 @@
         <module caption="Fuses" id="avrda" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1784,24 +1663,21 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x00" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1827,8 +1703,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -1905,8 +1780,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -1953,10 +1827,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_v6_port" name="PORT">
@@ -2048,14 +1920,10 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2086,8 +1954,7 @@
                     <bitfield caption="USART2 Signals" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -2224,12 +2091,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2321,8 +2186,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2418,8 +2282,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2537,8 +2400,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2574,13 +2436,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2673,18 +2533,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2827,17 +2684,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -2852,12 +2706,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2869,10 +2720,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -2975,17 +2824,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3000,19 +2846,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3035,8 +2877,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3054,8 +2895,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DA32.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DA32.xml
index ddfdd4e5..a94f5681 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DA32.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DA32.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR32DA32" package="QFN32" pinout="QFN32" speedmax="24000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR32DA32" package="QFN32" pinout="QFN32" speedmax="24000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR32DA32" family="AVR8" architecture="AVR8X" avr-family="AVR DA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1000" start="0x7000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -101,8 +92,7 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
@@ -111,8 +101,7 @@
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -162,18 +151,12 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -384,14 +367,11 @@
                     <signals>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
                 </instance>
@@ -583,28 +563,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -614,8 +589,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -678,10 +652,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -701,12 +673,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -823,23 +793,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -910,44 +875,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -972,14 +925,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -1165,8 +1114,7 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1194,12 +1142,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1245,145 +1191,111 @@
         <module caption="Event System" id="avrda" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
                 <register caption="User 13 - PTC" initval="0x00" name="USERPTCSTART" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1419,17 +1331,12 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1473,15 +1380,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1529,15 +1432,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1585,15 +1484,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1632,15 +1527,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1683,15 +1574,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1731,15 +1618,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1775,15 +1658,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1820,13 +1699,10 @@
         <module caption="Fuses" id="avrda" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1837,24 +1713,21 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x00" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1880,8 +1753,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -1958,8 +1830,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2006,10 +1877,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_v6_port" name="PORT">
@@ -2101,14 +1970,10 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2141,8 +2006,7 @@
                     <bitfield caption="USART2 Signals" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -2288,12 +2152,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2385,8 +2247,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2482,8 +2343,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2601,8 +2461,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2638,13 +2497,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2737,18 +2594,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2891,17 +2745,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -2916,12 +2767,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2933,10 +2781,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -3039,17 +2885,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3064,19 +2907,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3099,8 +2938,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3118,8 +2956,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DA48.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DA48.xml
index fb3d16d5..7d0bb6d9 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DA48.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DA48.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR32DA48" package="QFN48" pinout="QFN48" speedmax="24000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR32DA48" package="QFN48" pinout="QFN48" speedmax="24000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR32DA48" family="AVR8" architecture="AVR8X" avr-family="AVR DA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1000" start="0x7000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -111,20 +102,17 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="2" pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
-                                pad="PC6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -178,24 +166,15 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2" pad="PC7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4" pad="PE2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -485,15 +464,12 @@
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOA" pad="PB4"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOB" index="1" pad="PB5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
                 </instance>
@@ -751,28 +727,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -782,8 +753,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -846,10 +816,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -869,12 +837,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -999,23 +965,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -1100,64 +1061,46 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 4 Control B" initval="0x00" name="LUT4CTRLB" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 5 Control B" initval="0x00" name="LUT5CTRLB" offset="0x1d" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 4 Control C" initval="0x00" name="LUT4CTRLC" offset="0x1a" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 5 Control C" initval="0x00" name="LUT5CTRLC" offset="0x1e" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -1191,20 +1134,14 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Control 1" initval="0x00" name="INTCTRL1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW"
-                              values="CCL_INTMODE4"/>
-                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW"
-                              values="CCL_INTMODE5"/>
+                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW" values="CCL_INTMODE4"/>
+                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW" values="CCL_INTMODE5"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x3f" name="INT" rw="RW"/>
@@ -1406,8 +1343,7 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1435,12 +1371,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1486,205 +1420,156 @@
         <module caption="Event System" id="avrda" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Multiplexer Channel 8" initval="0x00" name="CHANNEL8" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW"
-                              values="EVSYS_CHANNEL8"/>
+                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW" values="EVSYS_CHANNEL8"/>
                 </register>
                 <register caption="Multiplexer Channel 9" initval="0x00" name="CHANNEL9" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW"
-                              values="EVSYS_CHANNEL9"/>
+                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW" values="EVSYS_CHANNEL9"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW"
-                          size="1">
+                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
                 <register caption="User 13 - PTC" initval="0x00" name="USERPTCSTART" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 29 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3D" rw="RW"
-                          size="1">
+                <register caption="User 29 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 37 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x45" rw="RW"
-                          size="1">
+                <register caption="User 37 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x45" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 38 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x46" rw="RW"
-                          size="1">
+                <register caption="User 38 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x46" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 24 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x38" rw="RW"
-                          size="1">
+                <register caption="User 24 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x38" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 25 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x39" rw="RW"
-                          size="1">
+                <register caption="User 25 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x39" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1720,17 +1605,12 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1743,12 +1623,9 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
@@ -1794,15 +1671,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1814,15 +1687,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
@@ -1872,15 +1741,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1892,15 +1757,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x44"/>
@@ -1948,15 +1809,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1968,15 +1825,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x44"/>
@@ -2015,15 +1868,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2035,15 +1884,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port E Pin 0" name="PORTE_PIN0" value="0x40"/>
@@ -2086,15 +1931,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2106,15 +1947,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port E Pin 0" name="PORTE_PIN0" value="0x40"/>
@@ -2154,15 +1991,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2174,15 +2007,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="USART 3 XCK" name="USART3_XCK" value="0x63"/>
@@ -2214,15 +2043,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2234,15 +2059,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="USART 3 XCK" name="USART3_XCK" value="0x63"/>
@@ -2274,15 +2095,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2294,15 +2111,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="USART 3 XCK" name="USART3_XCK" value="0x63"/>
@@ -2334,15 +2147,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2354,15 +2163,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="USART 3 XCK" name="USART3_XCK" value="0x63"/>
@@ -2401,13 +2206,10 @@
         <module caption="Fuses" id="avrda" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -2418,24 +2220,21 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x00" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -2461,8 +2260,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2539,8 +2337,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2587,10 +2384,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_v6_port" name="PORT">
@@ -2682,16 +2477,11 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
-                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW"
-                              values="PORTMUX_LUT4"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW" values="PORTMUX_LUT4"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2732,10 +2522,8 @@
                     <bitfield caption="USART4 Signals" mask="0x3" name="USART4" rw="RW" values="PORTMUX_USART4"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
-                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW"
-                              values="PORTMUX_ZCD1"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW" values="PORTMUX_ZCD1"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -2926,12 +2714,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -3023,8 +2809,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -3120,8 +2905,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -3239,8 +3023,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -3276,13 +3059,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -3376,18 +3157,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -3530,17 +3308,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -3555,12 +3330,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -3572,10 +3344,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -3678,17 +3448,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3703,19 +3470,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3738,8 +3501,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3757,8 +3519,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB28.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB28.xml
index ca48c228..76527e50 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB28.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB28.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR32DB28" package="SOIC28" pinout="SOIC28" speedmax="32000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR32DB28" package="SOIC28" pinout="SOIC28" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR32DB28" family="AVR8" architecture="AVR8X" avr-family="AVR DB">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1000" start="0x7000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -93,8 +84,7 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
@@ -102,8 +92,7 @@
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -153,16 +142,11 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
                     </signals>
                 </instance>
             </module>
@@ -351,8 +335,7 @@
                     <signals>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
@@ -528,28 +511,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -559,8 +537,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -623,10 +600,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -646,12 +621,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -786,23 +759,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -873,44 +841,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -935,14 +891,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -1051,17 +1003,14 @@
                 </register>
                 <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Enable" mask="0x1" name="CFDEN" rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                     <bitfield caption="Clock Failure Detect Test" mask="0x2" name="CFDTST" rw="W"/>
                 </register>
-                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x1" name="CFD" rw="RW"/>
                     <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x1" name="CFD" rw="RW"/>
                 </register>
                 <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
@@ -1149,8 +1098,7 @@
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
                 <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF" value="0x1"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -1176,12 +1124,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1"/>
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1"/>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
                 <register caption="Stack Pointer Low" initval="0xFF" name="SPL" offset="0xD" rw="RW" size="1"/>
                 <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
@@ -1207,12 +1153,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1258,174 +1202,132 @@
         <module caption="Event System" id="chip" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW"
-                          size="1">
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B"
-                          rw="RW" size="1">
+                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW"
-                          size="1">
+                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW"
-                          size="1">
+                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F"
-                          rw="RW" size="1">
+                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW"
-                          size="1">
+                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW"
-                          size="1">
+                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW"
-                          size="1">
+                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW"
-                          size="1">
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1463,15 +1365,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1517,15 +1415,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1574,15 +1468,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1631,15 +1521,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1680,15 +1566,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1729,15 +1611,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1775,15 +1653,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1821,15 +1695,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1866,13 +1736,10 @@
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1883,26 +1750,22 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1928,8 +1791,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2023,8 +1885,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2071,10 +1932,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="Operational Amplifier System" id="amp_opamp_ctrl_avr_v1" name="OPAMP">
@@ -2094,19 +1953,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP0_MUXPOS"/>
+                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP0_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12"
-                          rw="RW" size="1">
+                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 0 Settle" initval="0x00" name="OP0SETTLE" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2123,19 +1977,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP1_MUXPOS"/>
+                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP1_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A"
-                          rw="RW" size="1">
+                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 1 Settle" initval="0x00" name="OP1SETTLE" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2301,14 +2150,10 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2340,8 +2185,7 @@
                     <bitfield caption="USART2 Signals" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -2501,12 +2345,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2598,8 +2440,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2695,8 +2536,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2814,8 +2654,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2851,13 +2690,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2950,18 +2787,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -3104,17 +2938,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -3129,12 +2960,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -3146,10 +2974,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -3252,17 +3078,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3277,19 +3100,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3312,8 +3131,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3331,8 +3149,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB32.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB32.xml
index 88f383b5..74029219 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB32.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB32.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR32DB32" package="QFN32" pinout="QFN32" speedmax="32000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR32DB32" package="QFN32" pinout="QFN32" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR32DB32" family="AVR8" architecture="AVR8X" avr-family="AVR DB">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1000" start="0x7000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -97,8 +88,7 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
@@ -106,8 +96,7 @@
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -159,18 +148,12 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -369,14 +352,11 @@
                     <signals>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
                 </instance>
@@ -563,28 +543,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -594,8 +569,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -658,10 +632,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -681,12 +653,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -821,23 +791,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -908,44 +873,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -970,14 +923,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -1086,17 +1035,14 @@
                 </register>
                 <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Enable" mask="0x1" name="CFDEN" rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                     <bitfield caption="Clock Failure Detect Test" mask="0x2" name="CFDTST" rw="W"/>
                 </register>
-                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x1" name="CFD" rw="RW"/>
                     <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x1" name="CFD" rw="RW"/>
                 </register>
                 <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
@@ -1184,8 +1130,7 @@
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
                 <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF" value="0x1"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -1211,12 +1156,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1"/>
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1"/>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
                 <register caption="Stack Pointer Low" initval="0xFF" name="SPL" offset="0xD" rw="RW" size="1"/>
                 <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
@@ -1242,12 +1185,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1293,174 +1234,132 @@
         <module caption="Event System" id="chip" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW"
-                          size="1">
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B"
-                          rw="RW" size="1">
+                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW"
-                          size="1">
+                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW"
-                          size="1">
+                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F"
-                          rw="RW" size="1">
+                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW"
-                          size="1">
+                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW"
-                          size="1">
+                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW"
-                          size="1">
+                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW"
-                          size="1">
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1498,15 +1397,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1552,15 +1447,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1609,15 +1500,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1666,15 +1553,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1715,15 +1598,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1768,15 +1647,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1818,15 +1693,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1864,15 +1735,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1909,13 +1776,10 @@
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1926,26 +1790,22 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1971,8 +1831,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2066,8 +1925,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2114,10 +1972,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="Operational Amplifier System" id="amp_opamp_ctrl_avr_v1" name="OPAMP">
@@ -2137,19 +1993,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP0_MUXPOS"/>
+                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP0_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12"
-                          rw="RW" size="1">
+                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 0 Settle" initval="0x00" name="OP0SETTLE" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2166,19 +2017,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP1_MUXPOS"/>
+                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP1_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A"
-                          rw="RW" size="1">
+                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 1 Settle" initval="0x00" name="OP1SETTLE" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2344,14 +2190,10 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2384,8 +2226,7 @@
                     <bitfield caption="USART2 Signals" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -2550,12 +2391,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2647,8 +2486,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2744,8 +2582,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2863,8 +2700,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2900,13 +2736,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2999,18 +2833,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -3153,17 +2984,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -3178,12 +3006,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -3195,10 +3020,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -3301,17 +3124,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3326,19 +3146,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3361,8 +3177,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3380,8 +3195,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB48.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB48.xml
index 61ca123e..aa17b23f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB48.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB48.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR32DB48" package="QFN48" pinout="QFN48" speedmax="32000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR32DB48" package="QFN48" pinout="QFN48" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR32DB48" family="AVR8" architecture="AVR8X" avr-family="AVR DB">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1000" start="0x7000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -111,20 +102,17 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="2" pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
-                                pad="PC6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -180,24 +168,15 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2" pad="PC7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4" pad="PE2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -470,15 +449,12 @@
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOA" pad="PB4"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOB" index="1" pad="PB5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
                 </instance>
@@ -735,28 +711,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -766,8 +737,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -830,10 +800,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -853,12 +821,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -993,23 +959,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -1094,64 +1055,46 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 4 Control B" initval="0x00" name="LUT4CTRLB" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 5 Control B" initval="0x00" name="LUT5CTRLB" offset="0x1d" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 4 Control C" initval="0x00" name="LUT4CTRLC" offset="0x1a" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 5 Control C" initval="0x00" name="LUT5CTRLC" offset="0x1e" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -1185,20 +1128,14 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Control 1" initval="0x00" name="INTCTRL1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW"
-                              values="CCL_INTMODE4"/>
-                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW"
-                              values="CCL_INTMODE5"/>
+                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW" values="CCL_INTMODE4"/>
+                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW" values="CCL_INTMODE5"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x3f" name="INT" rw="RW"/>
@@ -1324,17 +1261,14 @@
                 </register>
                 <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Enable" mask="0x1" name="CFDEN" rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                     <bitfield caption="Clock Failure Detect Test" mask="0x2" name="CFDTST" rw="W"/>
                 </register>
-                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x1" name="CFD" rw="RW"/>
                     <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x1" name="CFD" rw="RW"/>
                 </register>
                 <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
@@ -1422,8 +1356,7 @@
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
                 <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF" value="0x1"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -1449,12 +1382,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1"/>
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1"/>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
                 <register caption="Stack Pointer Low" initval="0xFF" name="SPL" offset="0xD" rw="RW" size="1"/>
                 <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
@@ -1480,12 +1411,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1531,250 +1460,189 @@
         <module caption="Event System" id="chip" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Multiplexer Channel 8" initval="0x00" name="CHANNEL8" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW"
-                              values="EVSYS_CHANNEL8"/>
+                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW" values="EVSYS_CHANNEL8"/>
                 </register>
                 <register caption="Multiplexer Channel 9" initval="0x00" name="CHANNEL9" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW"
-                              values="EVSYS_CHANNEL9"/>
+                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW" values="EVSYS_CHANNEL9"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW"
-                          size="1">
+                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW"
-                          size="1">
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B"
-                          rw="RW" size="1">
+                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW"
-                          size="1">
+                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW"
-                          size="1">
+                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F"
-                          rw="RW" size="1">
+                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW"
-                          size="1">
+                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW"
-                          size="1">
+                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW"
-                          size="1">
+                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 51 - OPAMP2 Disable" initval="0x00" name="USEROPAMP2DISABLE" offset="0x53"
-                          rw="RW" size="1">
+                <register caption="User 51 - OPAMP2 Disable" initval="0x00" name="USEROPAMP2DISABLE" offset="0x53" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 53 - OPAMP2 Drive" initval="0x00" name="USEROPAMP2DRIVE" offset="0x55" rw="RW"
-                          size="1">
+                <register caption="User 53 - OPAMP2 Drive" initval="0x00" name="USEROPAMP2DRIVE" offset="0x55" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 52 - OPAMP2 Dump" initval="0x00" name="USEROPAMP2DUMP" offset="0x54" rw="RW"
-                          size="1">
+                <register caption="User 52 - OPAMP2 Dump" initval="0x00" name="USEROPAMP2DUMP" offset="0x54" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 50 - OPAMP2 Enable" initval="0x00" name="USEROPAMP2ENABLE" offset="0x52" rw="RW"
-                          size="1">
+                <register caption="User 50 - OPAMP2 Enable" initval="0x00" name="USEROPAMP2ENABLE" offset="0x52" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW"
-                          size="1">
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 29 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3D" rw="RW"
-                          size="1">
+                <register caption="User 29 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 37 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x45" rw="RW"
-                          size="1">
+                <register caption="User 37 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x45" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 24 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x38" rw="RW"
-                          size="1">
+                <register caption="User 24 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x38" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1812,15 +1680,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1833,15 +1697,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
@@ -1890,15 +1750,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1911,15 +1767,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
@@ -1971,15 +1823,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1992,15 +1840,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x44"/>
@@ -2051,15 +1895,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2072,15 +1912,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x44"/>
@@ -2123,15 +1959,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2144,15 +1976,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port E Pin 0" name="PORTE_PIN0" value="0x40"/>
@@ -2198,15 +2026,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2219,15 +2043,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port E Pin 0" name="PORTE_PIN0" value="0x40"/>
@@ -2270,15 +2090,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2291,15 +2107,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="OPAMP2 Ready" name="OPAMP2_READY" value="0x36"/>
@@ -2334,15 +2146,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2355,15 +2163,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="OPAMP2 Ready" name="OPAMP2_READY" value="0x36"/>
@@ -2398,15 +2202,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2419,15 +2219,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="OPAMP2 Ready" name="OPAMP2_READY" value="0x36"/>
@@ -2464,15 +2260,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2483,15 +2275,11 @@
                 <value caption="Timer/Counter D0 event 1" name="TCD0_CMPASET" value="0xB1"/>
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="OPAMP2 Ready" name="OPAMP2_READY" value="0x36"/>
@@ -2531,13 +2319,10 @@
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -2548,26 +2333,22 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -2593,8 +2374,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2688,8 +2468,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2736,10 +2515,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="Operational Amplifier System" id="amp_opamp_ctrl_avr_v1" name="OPAMP">
@@ -2759,19 +2536,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP0_MUXPOS"/>
+                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP0_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12"
-                          rw="RW" size="1">
+                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 0 Settle" initval="0x00" name="OP0SETTLE" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2788,19 +2560,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP1_MUXPOS"/>
+                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP1_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A"
-                          rw="RW" size="1">
+                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 1 Settle" initval="0x00" name="OP1SETTLE" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2817,19 +2584,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 2 Input Multiplexer" initval="0x00" name="OP2INMUX" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP2_MUXPOS"/>
+                <register caption="Op Amp 2 Input Multiplexer" initval="0x00" name="OP2INMUX" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP2_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 2 Resistor Ladder Multiplexer" initval="0x00" name="OP2RESMUX" offset="0x22"
-                          rw="RW" size="1">
+                <register caption="Op Amp 2 Resistor Ladder Multiplexer" initval="0x00" name="OP2RESMUX" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 2 Settle" initval="0x00" name="OP2SETTLE" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -3004,18 +2766,12 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
-                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW"
-                              values="PORTMUX_LUT4"/>
-                    <bitfield caption="CCL Look-Up Table 5 Signals" mask="0x20" name="LUT5" rw="RW"
-                              values="PORTMUX_LUT5"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW" values="PORTMUX_LUT4"/>
+                    <bitfield caption="CCL Look-Up Table 5 Signals" mask="0x20" name="LUT5" rw="RW" values="PORTMUX_LUT5"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -3056,12 +2812,9 @@
                     <bitfield caption="USART4 Signals" mask="0x3" name="USART4" rw="RW" values="PORTMUX_USART4"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
-                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW"
-                              values="PORTMUX_ZCD1"/>
-                    <bitfield caption="Zero Cross Detector 2 Output" mask="0x4" name="ZCD2" rw="RW"
-                              values="PORTMUX_ZCD2"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW" values="PORTMUX_ZCD1"/>
+                    <bitfield caption="Zero Cross Detector 2 Output" mask="0x4" name="ZCD2" rw="RW" values="PORTMUX_ZCD2"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -3270,12 +3023,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -3367,8 +3118,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -3464,8 +3214,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -3583,8 +3332,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -3620,13 +3368,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -3720,18 +3466,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -3874,17 +3617,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -3899,12 +3639,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -3916,10 +3653,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -4022,17 +3757,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -4047,19 +3779,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -4082,8 +3810,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -4101,8 +3828,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD14.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD14.xml
index ce13931d..950f062f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD14.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD14.xml
@@ -1,105 +1,29 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR32DD14"
-                 package="SOIC14"
-                 pinout="SOIC14MVIO"
-                 speedmax="32000000"
-                 tempmax="125"
-                 tempmin="-40"
-                 vccmax="5.5"
-                 vccmin="1.8"/>
+        <variant ordercode="AVR32DD14" package="SOIC14" pinout="SOIC14MVIO" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR32DD14" family="AVR8" architecture="AVR8X" avr-family="AVR DD">
         <address-spaces>
-            <address-space endianness="little"
-                           id="data"
-                           name="data"
-                           size="0x10000"
-                           start="0x0000">
-                <memory-segment exec="0"
-                                name="IO"
-                                rw="RW"
-                                size="0x103F"
-                                start="0x00"
-                                type="io"/>
-                <memory-segment exec="0"
-                                name="LOCKBITS"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x04"
-                                start="0x1040"
-                                type="lockbits"/>
-                <memory-segment exec="0"
-                                name="FUSES"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x10"
-                                start="0x1050"
-                                type="fuses"/>
-                <memory-segment exec="0"
-                                name="USER_SIGNATURES"
-                                pagesize="0x20"
-                                rw="RW"
-                                size="0x20"
-                                start="0x1080"
-                                type="user_signatures"/>
-                <memory-segment exec="0"
-                                name="SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x03"
-                                start="0x1100"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="PROD_SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x7D"
-                                start="0x1103"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="EEPROM"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x100"
-                                start="0x1400"
-                                type="eeprom"/>
-                <memory-segment exec="0"
-                                name="INTERNAL_SRAM"
-                                rw="RW"
-                                size="0x1000"
-                                start="0x7000"
-                                type="ram"/>
-                <memory-segment exec="0"
-                                name="MAPPED_PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x8000"
-                                start="0x8000"
-                                type="other"/>
+            <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+                <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00" type="io"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x04" start="0x1040" type="lockbits"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x1050" type="fuses"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x1080" type="user_signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x03" start="0x1100" type="signatures"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x1103" type="signatures"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x100" start="0x1400" type="eeprom"/>
+                <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1000" start="0x7000" type="ram"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x8000" type="other"/>
             </address-space>
-            <address-space endianness="little"
-                           id="prog"
-                           name="prog"
-                           size="0x8000"
-                           start="0x0000">
-                <memory-segment exec="1"
-                                name="PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x8000"
-                                start="0x00"
-                                type="flash"/>
+            <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
             <module id="cmp_control_v8" name="AC">
                 <instance name="AC0">
-                    <register-group address-space="data"
-                                    name="AC0"
-                                    name-in-module="AC"
-                                    offset="0x0680"/>
+                    <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
                     <signals>
                         <signal function="AC0" group="N" index="2" pad="PD7"/>
                         <signal function="AC0" group="N" index="3" pad="PC2"/>
@@ -110,10 +34,7 @@
             </module>
             <module id="adc_12b_diff_ctrl_v1" name="ADC">
                 <instance name="ADC0">
-                    <register-group address-space="data"
-                                    name="ADC0"
-                                    name-in-module="ADC"
-                                    offset="0x0600"/>
+                    <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
                     <signals>
                         <signal function="AIN0" group="AIN" index="4" pad="PD4"/>
                         <signal function="AIN0" group="AIN" index="5" pad="PD5"/>
@@ -127,78 +48,29 @@
             </module>
             <module id="bor_lvd_ctrl_v1" name="BOD">
                 <instance name="BOD">
-                    <register-group address-space="data"
-                                    name="BOD"
-                                    name-in-module="BOD"
-                                    offset="0x00A0"/>
+                    <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x00A0"/>
                 </instance>
             </module>
             <module id="cla_ccl_v1" name="CCL">
                 <instance name="CCL">
-                    <register-group address-space="data"
-                                    name="CCL"
-                                    name-in-module="CCL"
-                                    offset="0x01C0"/>
+                    <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
                     <signals>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_OUT"
-                                index="0"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_OUT"
-                                index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0" pad="PD6"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="CLKCTRL">
                 <instance name="CLKCTRL">
-                    <register-group address-space="data"
-                                    name="CLKCTRL"
-                                    name-in-module="CLKCTRL"
-                                    offset="0x0060"/>
+                    <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
                     <signals>
                         <signal function="CLKCTRL" group="EXTCLK" pad="PA0"/>
                         <signal function="CLKCTRL" group="XTALHF1" pad="PA0"/>
@@ -210,10 +82,7 @@
             </module>
             <module id="cpu_avr_xt_v1" name="CPU">
                 <instance name="CPU">
-                    <register-group address-space="data"
-                                    name="CPU"
-                                    name-in-module="CPU"
-                                    offset="0x0030"/>
+                    <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V4S"/>
                     </parameters>
@@ -221,26 +90,17 @@
             </module>
             <module id="int_8bit_v3" name="CPUINT">
                 <instance name="CPUINT">
-                    <register-group address-space="data"
-                                    name="CPUINT"
-                                    name-in-module="CPUINT"
-                                    offset="0x0110"/>
+                    <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
                 </instance>
             </module>
             <module id="math_pdi_crc_v1" name="CRCSCAN">
                 <instance name="CRCSCAN">
-                    <register-group address-space="data"
-                                    name="CRCSCAN"
-                                    name-in-module="CRCSCAN"
-                                    offset="0x0120"/>
+                    <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
                 </instance>
             </module>
             <module id="dac_nbit_ctrl_v5" name="DAC">
                 <instance name="DAC0">
-                    <register-group address-space="data"
-                                    name="DAC0"
-                                    name-in-module="DAC"
-                                    offset="0x06A0"/>
+                    <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
                     <signals>
                         <signal function="DAC0" group="OUT" index="0" pad="PD6"/>
                     </signals>
@@ -248,85 +108,49 @@
             </module>
             <module id="avrdd" name="EVSYS">
                 <instance name="EVSYS">
-                    <register-group address-space="data"
-                                    name="EVSYS"
-                                    name-in-module="EVSYS"
-                                    offset="0x0200"/>
+                    <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="5"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="FUSE">
                 <instance name="FUSE">
-                    <register-group address-space="data"
-                                    name="FUSE"
-                                    name-in-module="FUSE"
-                                    offset="0x1050"/>
+                    <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1050"/>
                 </instance>
             </module>
             <module id="avrdd" name="GPR">
                 <instance name="GPR">
-                    <register-group address-space="data"
-                                    name="GPR"
-                                    name-in-module="GPR"
-                                    offset="0x001C"/>
+                    <register-group address-space="data" name="GPR" name-in-module="GPR" offset="0x001C"/>
                 </instance>
             </module>
             <module id="avrdd" name="LOCK">
                 <instance name="LOCK">
-                    <register-group address-space="data"
-                                    name="LOCK"
-                                    name-in-module="LOCK"
-                                    offset="0x1040"/>
+                    <register-group address-space="data" name="LOCK" name-in-module="LOCK" offset="0x1040"/>
                 </instance>
             </module>
             <module id="io_multiv_ctrl_avr_v1" name="MVIO">
                 <instance name="MVIO">
-                    <register-group address-space="data"
-                                    name="MVIO"
-                                    name-in-module="MVIO"
-                                    offset="0x00C0"/>
+                    <register-group address-space="data" name="MVIO" name-in-module="MVIO" offset="0x00C0"/>
                 </instance>
             </module>
             <module id="nvm_ctrl_avr_v1" name="NVMCTRL">
                 <instance name="NVMCTRL">
-                    <register-group address-space="data"
-                                    name="NVMCTRL"
-                                    name-in-module="NVMCTRL"
-                                    offset="0x1000"/>
+                    <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_port" name="PORT">
                 <instance name="PORTA">
-                    <register-group address-space="data"
-                                    name="PORTA"
-                                    name-in-module="PORT"
-                                    offset="0x0400"/>
+                    <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
                     </signals>
                 </instance>
                 <instance name="PORTC">
-                    <register-group address-space="data"
-                                    name="PORTC"
-                                    name-in-module="PORT"
-                                    offset="0x0440"/>
+                    <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
                         <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
@@ -334,10 +158,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD">
-                    <register-group address-space="data"
-                                    name="PORTD"
-                                    name-in-module="PORT"
-                                    offset="0x0460"/>
+                    <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
                         <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
@@ -346,10 +167,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF">
-                    <register-group address-space="data"
-                                    name="PORTF"
-                                    name-in-module="PORT"
-                                    offset="0x04A0"/>
+                    <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="6" pad="PF6"/>
                         <signal function="IOPORT" group="PIN" index="7" pad="PF7"/>
@@ -358,18 +176,12 @@
             </module>
             <module id="avrdd" name="PORTMUX">
                 <instance name="PORTMUX">
-                    <register-group address-space="data"
-                                    name="PORTMUX"
-                                    name-in-module="PORTMUX"
-                                    offset="0x05E0"/>
+                    <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
                 </instance>
             </module>
             <module id="rst_integration_v8" name="RSTCTRL">
                 <instance name="RSTCTRL">
-                    <register-group address-space="data"
-                                    name="RSTCTRL"
-                                    name-in-module="RSTCTRL"
-                                    offset="0x0040"/>
+                    <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
                     <signals>
                         <signal function="OTHER" group="RESET" pad="PF6"/>
                     </signals>
@@ -377,364 +189,154 @@
             </module>
             <module id="tmr_16b_rtc_v1" name="RTC">
                 <instance name="RTC">
-                    <register-group address-space="data"
-                                    name="RTC"
-                                    name-in-module="RTC"
-                                    offset="0x0140"/>
+                    <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
                 </instance>
             </module>
             <module id="avrdd" name="SIGROW">
                 <instance name="SIGROW">
-                    <register-group address-space="data"
-                                    name="SIGROW"
-                                    name-in-module="SIGROW"
-                                    offset="0x1100"/>
+                    <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
                 </instance>
             </module>
             <module id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
                 <instance name="SLPCTRL">
-                    <register-group address-space="data"
-                                    name="SLPCTRL"
-                                    name-in-module="SLPCTRL"
-                                    offset="0x0050"/>
+                    <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
                 </instance>
             </module>
             <module id="spi_8bit_v2" name="SPI">
                 <instance name="SPI0">
-                    <register-group address-space="data"
-                                    name="SPI0"
-                                    name-in-module="SPI"
-                                    offset="0x0940"/>
+                    <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0940"/>
                     <signals>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MISO"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MOSI"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="SS"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MISO"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MOSI"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SS"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="MISO"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SS"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MISO"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MOSI"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SCK"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SS"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MISO" pad="PA1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MOSI" pad="PA0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="SS" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MISO" pad="PD5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MOSI" pad="PD4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SCK" pad="PD6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SS" pad="PD7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="MISO" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SCK" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SS" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MISO" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MOSI" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SCK" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SS" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="SYSCFG">
                 <instance name="SYSCFG">
-                    <register-group address-space="data"
-                                    name="SYSCFG"
-                                    name-in-module="SYSCFG"
-                                    offset="0x0F00"/>
+                    <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
                 </instance>
             </module>
             <module id="tmr_16b_pwm_v1" name="TCA">
                 <instance name="TCA0">
-                    <register-group address-space="data"
-                                    name="TCA0"
-                                    name-in-module="TCA"
-                                    offset="0x0A00"/>
+                    <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
                     <signals>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="3"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="4"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="5"
-                                pad="PD5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="3" pad="PC3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="4" pad="PD4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="5" pad="PD5"/>
                     </signals>
                 </instance>
             </module>
             <module id="tmr_16b_capture_v1" name="TCB">
                 <instance name="TCB0">
-                    <register-group address-space="data"
-                                    name="TCB0"
-                                    name-in-module="TCB"
-                                    offset="0x0B00"/>
+                    <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0B00"/>
                 </instance>
                 <instance name="TCB1">
-                    <register-group address-space="data"
-                                    name="TCB1"
-                                    name-in-module="TCB"
-                                    offset="0x0B10"/>
+                    <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0B10"/>
                 </instance>
                 <instance name="TCB2">
-                    <register-group address-space="data"
-                                    name="TCB2"
-                                    name-in-module="TCB"
-                                    offset="0x0B20"/>
+                    <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0B20"/>
                 </instance>
             </module>
             <module id="tmr_12b_psc_v1" name="TCD">
                 <instance name="TCD0">
-                    <register-group address-space="data"
-                                    name="TCD0"
-                                    name-in-module="TCD"
-                                    offset="0x0B80"/>
+                    <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0B80"/>
                     <signals>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOC"
-                                index="2"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOD"
-                                index="3"
-                                pad="PD5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2" pad="PD4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3" pad="PD5"/>
                     </signals>
                 </instance>
             </module>
             <module id="i2c_8bit_avr_v3" name="TWI">
                 <instance name="TWI0">
-                    <register-group address-space="data"
-                                    name="TWI0"
-                                    name-in-module="TWI"
-                                    offset="0x0900"/>
+                    <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0900"/>
                     <signals>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SCL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SDA"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SDA_DUAL" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SCL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SDA" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL" pad="PA1"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA" pad="PA0"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA_DUAL" pad="PC2"/>
                     </signals>
                 </instance>
             </module>
             <module id="uart_autobd_v4" name="USART">
                 <instance name="USART0">
-                    <register-group address-space="data"
-                                    name="USART0"
-                                    name-in-module="USART"
-                                    offset="0x0800"/>
+                    <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="RXD"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="TXD"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="RXD"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="TXD"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XDIR"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="RXD"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="TXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="XCK"
-                                pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="RXD" pad="PD5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="TXD" pad="PD4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XCK" pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XDIR" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="RXD" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="TXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="XCK" pad="PC3"/>
                     </signals>
                 </instance>
                 <instance name="USART1">
-                    <register-group address-space="data"
-                                    name="USART1"
-                                    name-in-module="USART"
-                                    offset="0x0820"/>
+                    <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="RXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XDIR"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="RXD"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="TXD"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="RXD" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="TXD" pad="PD6"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="USERROW">
                 <instance name="USERROW">
-                    <register-group address-space="data"
-                                    name="USERROW"
-                                    name-in-module="USERROW"
-                                    offset="0x1080"/>
+                    <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1080"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_vport" name="VPORT">
                 <instance name="VPORTA">
-                    <register-group address-space="data"
-                                    name="VPORTA"
-                                    name-in-module="VPORT"
-                                    offset="0x0000"/>
+                    <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
                 </instance>
                 <instance name="VPORTC">
-                    <register-group address-space="data"
-                                    name="VPORTC"
-                                    name-in-module="VPORT"
-                                    offset="0x0008"/>
+                    <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
                 </instance>
                 <instance name="VPORTD">
-                    <register-group address-space="data"
-                                    name="VPORTD"
-                                    name-in-module="VPORT"
-                                    offset="0x000C"/>
+                    <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
                 </instance>
                 <instance name="VPORTF">
-                    <register-group address-space="data"
-                                    name="VPORTF"
-                                    name-in-module="VPORT"
-                                    offset="0x0014"/>
+                    <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
                 </instance>
             </module>
             <module id="avrdd" name="VREF">
                 <instance name="VREF">
-                    <register-group address-space="data"
-                                    name="VREF"
-                                    name-in-module="VREF"
-                                    offset="0x00B0"/>
+                    <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00B0"/>
                 </instance>
             </module>
             <module id="wdt_windowed_v2" name="WDT">
                 <instance name="WDT">
-                    <register-group address-space="data"
-                                    name="WDT"
-                                    name-in-module="WDT"
-                                    offset="0x0100"/>
+                    <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
                 </instance>
             </module>
             <module id="cmp_zxover_ctrl_v3" name="ZCD">
                 <instance name="ZCD3">
-                    <register-group address-space="data"
-                                    name="ZCD3"
-                                    name-in-module="ZCD"
-                                    offset="0x06D8"/>
+                    <register-group address-space="data" name="ZCD3" name-in-module="ZCD" offset="0x06D8"/>
                     <signals>
-                        <signal field="PORTMUX.ZCDROUTEA.ZCD3"
-                                function="ZCD3"
-                                group="IN"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.ZCDROUTEA.ZCD3" function="ZCD3" group="IN" pad="PC2"/>
                     </signals>
                 </instance>
             </module>
@@ -806,90 +408,31 @@
     <modules>
         <module caption="Analog Comparator" id="cmp_control_v8" name="AC">
             <register-group caption="Analog Comparator" name="AC" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Hysteresis Mode"
-                              mask="0x06"
-                              name="HYSMODE"
-                              rw="RW"
-                              values="AC_HYSMODE"/>
-                    <bitfield caption="Power profile"
-                              mask="0x18"
-                              name="POWER"
-                              rw="RW"
-                              values="AC_POWER"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Power profile" mask="0x18" name="POWER" rw="RW" values="AC_POWER"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Mux Control A"
-                          initval="0x00"
-                          name="MUXCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input MUX Selection"
-                              mask="0x07"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection"
-                              mask="0x38"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="AC_MUXPOS"/>
-                    <bitfield caption="AC Output Initial Value"
-                              mask="0x40"
-                              name="INITVAL"
-                              rw="RW"
-                              values="AC_INITVAL"/>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Negative Input MUX Selection" mask="0x07" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+                    <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
                 </register>
-                <register caption="DAC Voltage Reference"
-                          initval="0xFF"
-                          name="DACREF"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="DAC Voltage Reference" initval="0xFF" name="DACREF" offset="0x5" rw="RW" size="1">
                     <bitfield caption="DACREF" mask="0xFF" name="DACREF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="WINSEL" value="0x00"/>
                     <mode name="WINDOW" qualifier="WINSEL" value="0x01 0x02"/>
                     <bitfield caption="Interrupt Enable" mask="0x01" name="CMP" rw="RW"/>
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="INTMODE"
-                              rw="RW"
-                              values="AC_NORMAL_INTMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" modes="NORMAL" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Comparator Interrupt Flag"
-                              mask="0x01"
-                              name="CMPIF"
-                              rw="RW"/>
-                    <bitfield caption="Analog Comparator State"
-                              mask="0x10"
-                              name="CMPSTATE"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x01" name="CMPIF" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -899,23 +442,15 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption"
-                       name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
                 <value caption="Power profile 3" name="PROFILE3" value="0x3"/>
             </value-group>
             <value-group caption="Interrupt Mode select" name="AC_NORMAL_INTMODE">
-                <value caption="Positive and negative inputs crosses"
-                       name="BOTHEDGE"
-                       value="0x0"/>
-                <value caption="Positive input goes below negative input"
-                       name="NEGEDGE"
-                       value="0x2"/>
-                <value caption="Positive input goes above negative input"
-                       name="POSEDGE"
-                       value="0x3"/>
+                <value caption="Positive and negative inputs crosses" name="BOTHEDGE" value="0x0"/>
+                <value caption="Positive input goes below negative input" name="NEGEDGE" value="0x2"/>
+                <value caption="Positive input goes above negative input" name="POSEDGE" value="0x3"/>
             </value-group>
             <value-group caption="AC Output Initial Value select" name="AC_INITVAL">
                 <value caption="Output initialized to 0" name="LOW" value="0x0"/>
@@ -933,194 +468,62 @@
                 <value caption="Positive Pin 4" name="AINP4" value="0x04"/>
             </value-group>
         </module>
-        <module caption="Analog to Digital Converter"
-                id="adc_12b_diff_ctrl_v1"
-                name="ADC">
+        <module caption="Analog to Digital Converter" id="adc_12b_diff_ctrl_v1" name="ADC">
             <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="ADC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Free running mode" mask="0x02" name="FREERUN" rw="RW"/>
-                    <bitfield caption="Resolution selection"
-                              mask="0x0C"
-                              name="RESSEL"
-                              rw="RW"
-                              values="ADC_RESSEL"/>
+                    <bitfield caption="Resolution selection" mask="0x0C" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
                     <bitfield caption="Left adjust result" mask="0x10" name="LEFTADJ" rw="RW"/>
-                    <bitfield caption="Conversion mode"
-                              mask="0x20"
-                              name="CONVMODE"
-                              rw="RW"
-                              values="ADC_CONVMODE"/>
+                    <bitfield caption="Conversion mode" mask="0x20" name="CONVMODE" rw="RW" values="ADC_CONVMODE"/>
                     <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Accumulation Samples"
-                              mask="0x07"
-                              name="SAMPNUM"
-                              rw="RW"
-                              values="ADC_SAMPNUM"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x07" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Pre-scaler"
-                              mask="0x0F"
-                              name="PRESC"
-                              rw="RW"
-                              values="ADC_PRESC"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x0F" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sampling Delay Selection"
-                              mask="0x0F"
-                              name="SAMPDLY"
-                              rw="RW"
-                              values="ADC_SAMPDLY"/>
-                    <bitfield caption="Initial Delay Selection"
-                              mask="0xE0"
-                              name="INITDLY"
-                              rw="RW"
-                              values="ADC_INITDLY"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Sampling Delay Selection" mask="0x0F" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xE0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Window Comparator Mode"
-                              mask="0x07"
-                              name="WINCM"
-                              rw="RW"
-                              values="ADC_WINCM"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x07" name="WINCM" rw="RW" values="ADC_WINCM"/>
                 </register>
-                <register caption="Sample Control"
-                          initval="0x00"
-                          name="SAMPCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Sample lenght" mask="0xFF" name="SAMPLEN" rw="RW"/>
                 </register>
-                <register caption="Positive mux input"
-                          initval="0x00"
-                          name="MUXPOS"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="ADC_MUXPOS"/>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
-                <register caption="Negative mux input"
-                          initval="0x00"
-                          name="MUXNEG"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="ADC_MUXNEG"/>
+                <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
-                <register caption="Command"
-                          initval="0x00"
-                          name="COMMAND"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Start Conversion" mask="0x01" name="STCONV" rw="RW"/>
                     <bitfield caption="Stop Conversion" mask="0x02" name="SPCONV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Start Event Input Enable"
-                              mask="0x01"
-                              name="STARTEI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x01" name="STARTEI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Result Ready Interrupt Enable"
-                              mask="0x01"
-                              name="RESRDY"
-                              rw="RW"/>
-                    <bitfield caption="Window Comparator Interrupt Enable"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x01" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
                     <bitfield caption="Result Ready Flag" mask="0x01" name="RESRDY" rw="RW"/>
-                    <bitfield caption="Window Comparator Flag"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Data"
-                          initval="0x00"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Temporary" mask="0xFF" name="TEMP" rw="RW"/>
                 </register>
-                <register caption="ADC Accumulator Result"
-                          name="RES"
-                          offset="0x10"
-                          rw="R"
-                          size="2"/>
-                <register caption="Window comparator low threshold"
-                          name="WINLT"
-                          offset="0x12"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Window comparator high threshold"
-                          name="WINHT"
-                          offset="0x14"
-                          rw="RW"
-                          size="2"/>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Conversion mode select" name="ADC_CONVMODE">
                 <value caption="Single-Ended mode" name="SINGLEENDED" value="0x0"/>
@@ -1250,99 +653,33 @@
         </module>
         <module caption="Bod interface" id="bor_lvd_ctrl_v1" name="BOD">
             <register-group caption="Bod interface" name="BOD" size="0x10">
-                <register caption="Control A"
-                          initval="0x01"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Operation in sleep mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="BOD_SLEEP"/>
-                    <bitfield caption="Operation in active mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="R"
-                              values="BOD_ACTIVE"/>
-                    <bitfield caption="Sample frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="R"
-                              values="BOD_SAMPFREQ"/>
+                <register caption="Control A" initval="0x01" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in sleep mode" mask="0x03" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                    <bitfield caption="Operation in active mode" mask="0x0C" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bod level"
-                              mask="0x07"
-                              name="LVL"
-                              rw="R"
-                              values="BOD_LVL"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x07" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor Control"
-                          initval="0x00"
-                          name="VLMCTRLA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level"
-                              mask="0x03"
-                              name="VLMLVL"
-                              rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x03" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor interrrupt enable"
-                              mask="0x01"
-                              name="VLMIE"
-                              rw="RW"/>
-                    <bitfield caption="Configuration"
-                              mask="0x06"
-                              name="VLMCFG"
-                              rw="RW"
-                              values="BOD_VLMCFG"/>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x01" name="VLMIE" rw="RW"/>
+                    <bitfield caption="Configuration" mask="0x06" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor interrupt flag"
-                              mask="0x01"
-                              name="VLMIF"
-                              rw="RW"/>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x01" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor status"
-                              mask="0x01"
-                              name="VLMS"
-                              rw="R"
-                              values="BOD_VLMS"/>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x01" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
                 <value caption="Disabled" name="DIS" value="0x00"/>
                 <value caption="Enabled" name="ENABLED" value="0x01"/>
                 <value caption="Sampled" name="SAMPLED" value="0x02"/>
-                <value caption="Enabled with wake-up halted until BOD is ready"
-                       name="ENWAKE"
-                       value="0x03"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
             </value-group>
             <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
                 <value caption="128Hz sampling frequency" name="128HZ" value="0x0"/>
@@ -1365,338 +702,103 @@
                 <value caption="VDD crosses VLM threshold" name="BOTH" value="0x02"/>
             </value-group>
             <value-group caption="Voltage level monitor status select" name="BOD_VLMS">
-                <value caption="The voltage is above the VLM threshold level"
-                       name="ABOVE"
-                       value="0x0"/>
-                <value caption="The voltage is below the VLM threshold level"
-                       name="BELOW"
-                       value="0x1"/>
+                <value caption="The voltage is above the VLM threshold level" name="ABOVE" value="0x0"/>
+                <value caption="The voltage is below the VLM threshold level" name="BELOW" value="0x1"/>
             </value-group>
             <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
                 <value caption="VLM Disabled" name="OFF" value="0x0"/>
-                <value caption="VLM threshold 5% above BOD level"
-                       name="5ABOVE"
-                       value="0x1"/>
-                <value caption="VLM threshold 15% above BOD level"
-                       name="15ABOVE"
-                       value="0x2"/>
-                <value caption="VLM threshold 25% above BOD level"
-                       name="25ABOVE"
-                       value="0x3"/>
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x1"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x2"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x3"/>
             </value-group>
         </module>
         <module caption="Configurable Custom Logic" id="cla_ccl_v1" name="CCL">
             <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Sequential Control 0"
-                          initval="0x00"
-                          name="SEQCTRL0"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Sequential Control 1"
-                          initval="0x00"
-                          name="SEQCTRL1"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Interrupt Control 0"
-                          initval="0x00"
-                          name="INTCTRL0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode for LUT0"
-                              mask="0x03"
-                              name="INTMODE0"
-                              rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1"
-                              mask="0x0C"
-                              name="INTMODE1"
-                              rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2"
-                              mask="0x30"
-                              name="INTMODE2"
-                              rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3"
-                              mask="0xC0"
-                              name="INTMODE3"
-                              rw="RW"
-                              values="CCL_INTMODE3"/>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x03" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0x0C" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xC0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x0F" name="INT" rw="RW"/>
                 </register>
-                <register caption="LUT 0 Control A"
-                          initval="0x00"
-                          name="LUT0CTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 0 Control A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 0 Control B"
-                          initval="0x00"
-                          name="LUT0CTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 0 Control C"
-                          initval="0x00"
-                          name="LUT0CTRLC"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 0"
-                          initval="0x00"
-                          name="TRUTH0"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 1 Control A"
-                          initval="0x00"
-                          name="LUT1CTRLA"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 1 Control A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 1 Control B"
-                          initval="0x00"
-                          name="LUT1CTRLB"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 1 Control C"
-                          initval="0x00"
-                          name="LUT1CTRLC"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 1"
-                          initval="0x00"
-                          name="TRUTH1"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 2 Control A"
-                          initval="0x00"
-                          name="LUT2CTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 2 Control A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 2 Control B"
-                          initval="0x00"
-                          name="LUT2CTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 2 Control C"
-                          initval="0x00"
-                          name="LUT2CTRLC"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 2"
-                          initval="0x00"
-                          name="TRUTH2"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 3 Control A"
-                          initval="0x00"
-                          name="LUT3CTRLA"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 3 Control A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 3 Control B"
-                          initval="0x00"
-                          name="LUT3CTRLB"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 3 Control C"
-                          initval="0x00"
-                          name="LUT3CTRLC"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 3"
-                          initval="0x00"
-                          name="TRUTH3"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
             </register-group>
@@ -1727,13 +829,9 @@
             <value-group caption="Clock Source Selection" name="CCL_CLKSRC">
                 <value caption="Peripheral Clock" name="CLKPER" value="0x0"/>
                 <value caption="Selection by INSEL2" name="IN2" value="0x1"/>
-                <value caption="Internal High-Frequency Oscillator"
-                       name="OSCHF"
-                       value="0x4"/>
+                <value caption="Internal High-Frequency Oscillator" name="OSCHF" value="0x4"/>
                 <value caption="32.768 kHz oscillator" name="OSC32K" value="0x5"/>
-                <value caption="32.768 kHz oscillator divided by 32"
-                       name="OSC1K"
-                       value="0x6"/>
+                <value caption="32.768 kHz oscillator divided by 32" name="OSC1K" value="0x6"/>
             </value-group>
             <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
                 <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
@@ -1799,195 +897,67 @@
         </module>
         <module caption="Clock controller" id="avrdd" name="CLKCTRL">
             <register-group caption="Clock controller" name="CLKCTRL" size="0x40">
-                <register caption="MCLK Control A"
-                          initval="0x00"
-                          name="MCLKCTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="CLKCTRL_CLKSEL"/>
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock select" mask="0x07" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
                     <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
                 </register>
-                <register caption="MCLK Control B"
-                          initval="0x00"
-                          name="MCLKCTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Prescaler enable" mask="0x01" name="PEN" rw="RW"/>
-                    <bitfield caption="Prescaler division"
-                              mask="0x1E"
-                              name="PDIV"
-                              rw="RW"
-                              values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler division" mask="0x1E" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
                 </register>
-                <register caption="MCLK Control C"
-                          initval="0x00"
-                          name="MCLKCTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Enable"
-                              mask="0x01"
-                              name="CFDEN"
-                              rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Test"
-                              mask="0x02"
-                              name="CFDTST"
-                              rw="W"/>
-                    <bitfield caption="Clock Failure Detect Source"
-                              mask="0x0C"
-                              name="CFDSRC"
-                              rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Enable" mask="0x01" name="CFDEN" rw="RW"/>
+                    <bitfield caption="Clock Failure Detect Test" mask="0x02" name="CFDTST" rw="W"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0x0C" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                 </register>
-                <register caption="MCLK Interrupt Control"
-                          initval="0x00"
-                          name="MCLKINTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Enable"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt type"
-                              mask="0x80"
-                              name="INTTYPE"
-                              rw="RW"
-                              values="CLKCTRL_INTTYPE"/>
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x01" name="CFD" rw="RW"/>
+                    <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags"
-                          initval="0x00"
-                          name="MCLKINTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Flag"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x01" name="CFD" rw="RW"/>
                 </register>
-                <register caption="MCLK Status"
-                          initval="0x00"
-                          name="MCLKSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="System Oscillator changing"
-                              mask="0x01"
-                              name="SOSC"
-                              rw="RW"/>
-                    <bitfield caption="High frequency oscillator status"
-                              mask="0x02"
-                              name="OSCHFS"
-                              rw="RW"/>
-                    <bitfield caption="32KHz oscillator status"
-                              mask="0x04"
-                              name="OSC32KS"
-                              rw="RW"/>
-                    <bitfield caption="32.768 kHz Crystal Oscillator status"
-                              mask="0x08"
-                              name="XOSC32KS"
-                              rw="RW"/>
+                <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="System Oscillator changing" mask="0x01" name="SOSC" rw="RW"/>
+                    <bitfield caption="High frequency oscillator status" mask="0x02" name="OSCHFS" rw="RW"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x04" name="OSC32KS" rw="RW"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x08" name="XOSC32KS" rw="RW"/>
                     <bitfield caption="External Clock status" mask="0x10" name="EXTS" rw="RW"/>
                     <bitfield caption="PLL oscillator status" mask="0x20" name="PLLS" rw="RW"/>
                 </register>
-                <register caption="OSCHF Control A"
-                          initval="0x0C"
-                          name="OSCHFCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Control A" initval="0x0C" name="OSCHFCTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="Autotune" mask="0x01" name="AUTOTUNE" rw="RW"/>
-                    <bitfield caption="Frequency select"
-                              mask="0x3C"
-                              name="FRQSEL"
-                              rw="RW"
-                              values="CLKCTRL_FRQSEL"/>
+                    <bitfield caption="Frequency select" mask="0x3C" name="FRQSEL" rw="RW" values="CLKCTRL_FRQSEL"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSCHF Tune"
-                          name="OSCHFTUNE"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Tune" name="OSCHFTUNE" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Tune" mask="0xFF" name="TUNE" rw="RW"/>
                 </register>
-                <register caption="PLL Control A"
-                          name="PLLCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multiplication factor"
-                              mask="0x03"
-                              name="MULFAC"
-                              rw="RW"
-                              values="CLKCTRL_MULFAC"/>
-                    <bitfield caption="Source"
-                              mask="0x40"
-                              name="SOURCE"
-                              rw="RW"
-                              values="CLKCTRL_SOURCE"/>
+                <register caption="PLL Control A" name="PLLCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Multiplication factor" mask="0x03" name="MULFAC" rw="RW" values="CLKCTRL_MULFAC"/>
+                    <bitfield caption="Source" mask="0x40" name="SOURCE" rw="RW" values="CLKCTRL_SOURCE"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSC32K Control A"
-                          initval="0x00"
-                          name="OSC32KCTRLA"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC32K Control A"
-                          initval="0x00"
-                          name="XOSC32KCTRLA"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Low power mode" mask="0x02" name="LPMODE" rw="RW"/>
                     <bitfield caption="Select" mask="0x04" name="SEL" rw="RW"/>
-                    <bitfield caption="Crystal startup time"
-                              mask="0x30"
-                              name="CSUT"
-                              rw="RW"
-                              values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC HF Control A"
-                          initval="0x00"
-                          name="XOSCHFCTRLA"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC HF Control A" initval="0x00" name="XOSCHFCTRLA" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="External Source Select"
-                              mask="0x02"
-                              name="SELHF"
-                              rw="RW"
-                              values="CLKCTRL_SELHF"/>
-                    <bitfield caption="Frequency Range"
-                              mask="0x0C"
-                              name="FRQRANGE"
-                              rw="RW"
-                              values="CLKCTRL_FRQRANGE"/>
-                    <bitfield caption="Start-up Time Select"
-                              mask="0x30"
-                              name="CSUTHF"
-                              rw="RW"
-                              values="CLKCTRL_CSUTHF"/>
+                    <bitfield caption="External Source Select" mask="0x02" name="SELHF" rw="RW" values="CLKCTRL_SELHF"/>
+                    <bitfield caption="Frequency Range" mask="0x0C" name="FRQRANGE" rw="RW" values="CLKCTRL_FRQRANGE"/>
+                    <bitfield caption="Start-up Time Select" mask="0x30" name="CSUTHF" rw="RW" values="CLKCTRL_CSUTHF"/>
                     <bitfield caption="Run Standby" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Clock select" name="CLKCTRL_CLKSEL">
-                <value caption="Internal high-frequency oscillator"
-                       name="OSCHF"
-                       value="0x0"/>
+                <value caption="Internal high-frequency oscillator" name="OSCHF" value="0x0"/>
                 <value caption="Internal 32.768 kHz oscillator" name="OSC32K" value="0x1"/>
                 <value caption="32.768 kHz crystal oscillator" name="XOSC32K" value="0x2"/>
                 <value caption="External clock" name="EXTCLK" value="0x3"/>
@@ -2031,12 +1001,8 @@
                 <value caption="3 x multiplication factor" name="3x" value="0x2"/>
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
-                <value caption="High frequency internal oscillator as PLL source"
-                       name="OSCHF"
-                       value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF"
-                       value="0x1"/>
+                <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -2062,44 +1028,19 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection"
-                          initval="0x00"
-                          name="CCP"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCP signature"
-                              mask="0xFF"
-                              name="CCP"
-                              rw="RW"
-                              values="CPU_CCP"/>
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Stack Pointer"
-                          initval="0x7FFF"
-                          name="SP"
-                          offset="0xD"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Status Register"
-                          initval="0x00"
-                          name="SREG"
-                          offset="0xF"
-                          rw="RW"
-                          size="1">
+                <register caption="Stack Pointer" initval="0x7FFF" name="SP" offset="0xD" rw="RW" size="2"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
                     <bitfield caption="Carry Flag" mask="0x01" name="C" rw="RW"/>
                     <bitfield caption="Zero Flag" mask="0x02" name="Z" rw="RW"/>
                     <bitfield caption="Negative Flag" mask="0x04" name="N" rw="RW"/>
-                    <bitfield caption="Two's Complement Overflow Flag"
-                              mask="0x08"
-                              name="V"
-                              rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V" rw="RW"/>
                     <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
                     <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
                     <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
-                    <bitfield caption="Global Interrupt Enable Flag"
-                              mask="0x80"
-                              name="I"
-                              rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="CCP signature select" name="CPU_CCP">
@@ -2109,530 +1050,157 @@
         </module>
         <module caption="Interrupt Controller" id="int_8bit_v3" name="CPUINT">
             <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Round-robin Scheduling Enable"
-                              mask="0x01"
-                              name="LVL0RR"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x01" name="LVL0RR" rw="RW"/>
                     <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
-                    <bitfield caption="Interrupt Vector Select"
-                              mask="0x40"
-                              name="IVSEL"
-                              rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Level 0 Interrupt Executing"
-                              mask="0x01"
-                              name="LVL0EX"
-                              rw="R"/>
-                    <bitfield caption="Level 1 Interrupt Executing"
-                              mask="0x02"
-                              name="LVL1EX"
-                              rw="R"/>
-                    <bitfield caption="Non-maskable Interrupt Executing"
-                              mask="0x80"
-                              name="NMIEX"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x01" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x02" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority"
-                          initval="0x00"
-                          name="LVL0PRI"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Level Priority"
-                              mask="0xFF"
-                              name="LVL0PRI"
-                              rw="RW"/>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xFF" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector"
-                          initval="0x00"
-                          name="LVL1VEC"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Vector with High Priority"
-                              mask="0xFF"
-                              name="LVL1VEC"
-                              rw="RW"/>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xFF" name="LVL1VEC" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="CRCSCAN" id="math_pdi_crc_v1" name="CRCSCAN">
             <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable CRC scan" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Enable NMI Trigger" mask="0x02" name="NMIEN" rw="RW"/>
                     <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CRC Source"
-                              mask="0x03"
-                              name="SRC"
-                              rw="RW"
-                              values="CRCSCAN_SRC"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x03" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
                 </register>
-                <register caption="Status"
-                          initval="0x02"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="CRC Busy" mask="0x01" name="BUSY" rw="R"/>
                     <bitfield caption="CRC Ok" mask="0x02" name="OK" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="CRC Source select" name="CRCSCAN_SRC">
                 <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
-                <value caption="CRC on boot and appl section of flash"
-                       name="APPLICATION"
-                       value="0x1"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
                 <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
             </value-group>
         </module>
-        <module caption="Digital to Analog Converter"
-                id="dac_nbit_ctrl_v5"
-                name="DAC">
+        <module caption="Digital to Analog Converter" id="dac_nbit_ctrl_v5" name="DAC">
             <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="DAC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="DATA Register"
-                          name="DATA"
-                          offset="0x2"
-                          rw="RW"
-                          size="2">
+                <register caption="DATA Register" name="DATA" offset="0x2" rw="RW" size="2">
                     <bitfield caption="Data" mask="0xFFC0" name="DATA" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Event System" id="avrdd" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Software Event A"
-                          initval="0x00"
-                          name="SWEVENTA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0xFF"
-                              name="SWEVENTA"
-                              rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0xFF" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
-                <register caption="Software Event B"
-                          initval="0x00"
-                          name="SWEVENTB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0x03"
-                              name="SWEVENTB"
-                              rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0x03" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
-                <register caption="Multiplexer Channel 0"
-                          initval="0x00"
-                          name="CHANNEL0"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 0 generator select"
-                              mask="0xFF"
-                              name="CHANNEL0"
-                              rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Channel 0 generator select" mask="0xFF" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
-                <register caption="Multiplexer Channel 1"
-                          initval="0x00"
-                          name="CHANNEL1"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 1 generator select"
-                              mask="0xFF"
-                              name="CHANNEL1"
-                              rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Channel 1 generator select" mask="0xFF" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
-                <register caption="Multiplexer Channel 2"
-                          initval="0x00"
-                          name="CHANNEL2"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 2 generator select"
-                              mask="0xFF"
-                              name="CHANNEL2"
-                              rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Channel 2 generator select" mask="0xFF" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
-                <register caption="Multiplexer Channel 3"
-                          initval="0x00"
-                          name="CHANNEL3"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 3 generator select"
-                              mask="0xFF"
-                              name="CHANNEL3"
-                              rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Channel 3 generator select" mask="0xFF" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
-                <register caption="Multiplexer Channel 4"
-                          initval="0x00"
-                          name="CHANNEL4"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 4 generator select"
-                              mask="0xFF"
-                              name="CHANNEL4"
-                              rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Channel 4 generator select" mask="0xFF" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
-                <register caption="Multiplexer Channel 5"
-                          initval="0x00"
-                          name="CHANNEL5"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 5 generator select"
-                              mask="0xFF"
-                              name="CHANNEL5"
-                              rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Channel 5 generator select" mask="0xFF" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT0A"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT0B"
-                          offset="0x21"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT1A"
-                          offset="0x22"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT1B"
-                          offset="0x23"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT2A"
-                          offset="0x24"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT2B"
-                          offset="0x25"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT3A"
-                          offset="0x26"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT3B"
-                          offset="0x27"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 12 - ADC0"
-                          initval="0x00"
-                          name="USERADC0START"
-                          offset="0x28"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTA"
-                          offset="0x29"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTC"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTD"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTF"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0"
-                          initval="0x00"
-                          name="USERUSART0IRDA"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1"
-                          initval="0x00"
-                          name="USERUSART1IRDA"
-                          offset="0x2E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A"
-                          initval="0x00"
-                          name="USERTCA0CNTA"
-                          offset="0x2F"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B"
-                          initval="0x00"
-                          name="USERTCA0CNTB"
-                          offset="0x30"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A"
-                          initval="0x00"
-                          name="USERTCB0CAPT"
-                          offset="0x31"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B"
-                          initval="0x00"
-                          name="USERTCB0COUNT"
-                          offset="0x32"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A"
-                          initval="0x00"
-                          name="USERTCB1CAPT"
-                          offset="0x33"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B"
-                          initval="0x00"
-                          name="USERTCB1COUNT"
-                          offset="0x34"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A"
-                          initval="0x00"
-                          name="USERTCB2CAPT"
-                          offset="0x35"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B"
-                          initval="0x00"
-                          name="USERTCB2COUNT"
-                          offset="0x36"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A"
-                          initval="0x00"
-                          name="USERTCD0INPUTA"
-                          offset="0x37"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B"
-                          initval="0x00"
-                          name="USERTCD0INPUTB"
-                          offset="0x38"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
             <value-group caption="Channel 0 generator select" name="EVSYS_CHANNEL0">
@@ -2641,30 +1209,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2673,21 +1225,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2705,30 +1247,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2737,21 +1263,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2769,30 +1285,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2806,21 +1306,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2838,30 +1328,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2875,21 +1349,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2907,30 +1371,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2939,21 +1387,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2971,30 +1409,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3003,21 +1425,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3045,149 +1457,48 @@
             </value-group>
             <value-group caption="User channel select" name="EVSYS_USER">
                 <value caption="Off" name="OFF" value="0x0"/>
-                <value caption="Connect user to event channel 0"
-                       name="CHANNEL0"
-                       value="0x1"/>
-                <value caption="Connect user to event channel 1"
-                       name="CHANNEL1"
-                       value="0x2"/>
-                <value caption="Connect user to event channel 2"
-                       name="CHANNEL2"
-                       value="0x3"/>
-                <value caption="Connect user to event channel 3"
-                       name="CHANNEL3"
-                       value="0x4"/>
-                <value caption="Connect user to event channel 4"
-                       name="CHANNEL4"
-                       value="0x5"/>
-                <value caption="Connect user to event channel 5"
-                       name="CHANNEL5"
-                       value="0x6"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
             </value-group>
         </module>
         <module caption="Fuses" id="avrdd" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Watchdog Configuration"
-                          initval="0x00"
-                          name="WDTCFG"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Watchdog Timeout Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="FUSE_WINDOW"/>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
-                <register caption="BOD Configuration"
-                          initval="0x00"
-                          name="BODCFG"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="BOD Operation in Sleep Mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="FUSE_SLEEP"/>
-                    <bitfield caption="BOD Operation in Active Mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="RW"
-                              values="FUSE_ACTIVE"/>
-                    <bitfield caption="BOD Sample Frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Level"
-                              mask="0xE0"
-                              name="LVL"
-                              rw="RW"
-                              values="FUSE_LVL"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x03" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x0C" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Level" mask="0xE0" name="LVL" rw="RW" values="FUSE_LVL"/>
                 </register>
-                <register caption="Oscillator Configuration"
-                          initval="0x00"
-                          name="OSCCFG"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Frequency Select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="FUSE_CLKSEL"/>
+                <register caption="Oscillator Configuration" initval="0x00" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x07" name="CLKSEL" rw="RW" values="FUSE_CLKSEL"/>
                 </register>
-                <register caption="System Configuration 0"
-                          initval="0xD0"
-                          name="SYSCFG0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="System Configuration 0" initval="0xD0" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="EEPROM Save" mask="0x01" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration"
-                              mask="0x08"
-                              name="RSTPINCFG"
-                              rw="RW"
-                              values="FUSE_RSTPINCFG"/>
-                    <bitfield caption="UPDI Pin Configuration"
-                              mask="0x10"
-                              name="UPDIPINCFG"
-                              rw="RW"
-                              values="FUSE_UPDIPINCFG"/>
-                    <bitfield caption="CRC Select"
-                              mask="0x20"
-                              name="CRCSEL"
-                              rw="RW"
-                              values="FUSE_CRCSEL"/>
-                    <bitfield caption="CRC Source"
-                              mask="0xC0"
-                              name="CRCSRC"
-                              rw="RW"
-                              values="FUSE_CRCSRC"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x08" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW" values="FUSE_UPDIPINCFG"/>
+                    <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
+                    <bitfield caption="CRC Source" mask="0xC0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                 </register>
-                <register caption="System Configuration 1"
-                          initval="0x08"
-                          name="SYSCFG1"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Startup Time"
-                              mask="0x07"
-                              name="SUT"
-                              rw="RW"
-                              values="FUSE_SUT"/>
-                    <bitfield caption="MVIO System Configuration"
-                              mask="0x18"
-                              name="MVSYSCFG"
-                              rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x07" name="SUT" rw="RW" values="FUSE_SUT"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                 </register>
-                <register caption="Code Section Size"
-                          initval="0x00"
-                          name="CODESIZE"
-                          offset="0x7"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Boot Section Size"
-                          initval="0x00"
-                          name="BOOTSIZE"
-                          offset="0x8"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
+                <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT"
-                       value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -3213,13 +1524,9 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)"
-                       name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
-                <value caption="CRC of application code and boot sections"
-                       name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -3231,12 +1538,8 @@
                 <value caption="UPDI Mode" name="UPDI" value="0x1"/>
             </value-group>
             <value-group caption="MVIO System Configuration select" name="FUSE_MVSYSCFG">
-                <value caption="Device used in a dual supply configuration"
-                       name="DUAL"
-                       value="0x1"/>
-                <value caption="Device used in a single supply configuration"
-                       name="SINGLE"
-                       value="0x2"/>
+                <value caption="Device used in a dual supply configuration" name="DUAL" value="0x1"/>
+                <value caption="Device used in a single supply configuration" name="SINGLE" value="0x2"/>
             </value-group>
             <value-group caption="Startup Time select" name="FUSE_SUT">
                 <value caption="0 ms" name="0MS" value="0x00"/>
@@ -3279,41 +1582,16 @@
         </module>
         <module caption="General Purpose Registers" id="avrdd" name="GPR">
             <register-group caption="General Purpose Registers" name="GPR" size="0x4">
-                <register caption="General Purpose Register 0"
-                          name="GPR0"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 1"
-                          name="GPR1"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 2"
-                          name="GPR2"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 3"
-                          name="GPR3"
-                          offset="0x3"
-                          rw="RW"
-                          size="1"/>
+                <register caption="General Purpose Register 0" name="GPR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose Register 1" name="GPR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose Register 2" name="GPR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose Register 3" name="GPR3" offset="0x3" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Lockbits" id="avrdd" name="LOCK">
             <register-group caption="Lockbits" name="LOCK" size="0x4">
-                <register caption="Lock Key Bits"
-                          initval="0x5CC5C55C"
-                          name="KEY"
-                          offset="0x0"
-                          rw="RW"
-                          size="4">
-                    <bitfield caption="Lock Key"
-                              mask="0xFFFFFFFF"
-                              name="KEY"
-                              rw="RW"
-                              values="LOCK_KEY"/>
+                <register caption="Lock Key Bits" initval="0x5CC5C55C" name="KEY" offset="0x0" rw="RW" size="4">
+                    <bitfield caption="Lock Key" mask="0xFFFFFFFF" name="KEY" rw="RW" values="LOCK_KEY"/>
                 </register>
             </register-group>
             <value-group caption="Lock Key select" name="LOCK_KEY">
@@ -3323,154 +1601,61 @@
         </module>
         <module caption="Multi-Voltage I/O" id="io_multiv_ctrl_avr_v1" name="MVIO">
             <register-group caption="Multi-Voltage I/O" name="MVIO" size="0x4">
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Enable"
-                              mask="0x01"
-                              name="VDDIO2IE"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Enable" mask="0x01" name="VDDIO2IE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Flag"
-                              mask="0x01"
-                              name="VDDIO2IF"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Flag" mask="0x01" name="VDDIO2IF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="VDDIO2 Status" mask="0x01" name="VDDIO2S" rw="R"/>
                 </register>
             </register-group>
         </module>
-        <module caption="Non-volatile Memory Controller"
-                id="nvm_ctrl_avr_v1"
-                name="NVMCTRL">
+        <module caption="Non-volatile Memory Controller" id="nvm_ctrl_avr_v1" name="NVMCTRL">
             <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x7F"
-                              name="CMD"
-                              rw="RW"
-                              values="NVMCTRL_CMD"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x30"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Application Code Write Protect"
-                              mask="0x01"
-                              name="APPCODEWP"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x30" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Application Code Write Protect" mask="0x01" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x02" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Application Data Write Protect"
-                              mask="0x04"
-                              name="APPDATAWP"
-                              rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space"
-                              mask="0x30"
-                              name="FLMAP"
-                              rw="RW"
-                              values="NVMCTRL_FLMAP"/>
-                    <bitfield caption="Flash Mapping Lock"
-                              mask="0x80"
-                              name="FLMAPLOCK"
-                              rw="RW"/>
+                    <bitfield caption="Application Data Write Protect" mask="0x04" name="APPDATAWP" rw="RW"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x02"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x02" rw="R" size="1">
                     <bitfield caption="Flash busy" mask="0x01" name="FBUSY" rw="R"/>
                     <bitfield caption="EEPROM busy" mask="0x02" name="EEBUSY" rw="R"/>
-                    <bitfield caption="Write error"
-                              mask="0x70"
-                              name="ERROR"
-                              rw="R"
-                              values="NVMCTRL_ERROR"/>
+                    <bitfield caption="Write error" mask="0x70" name="ERROR" rw="R" values="NVMCTRL_ERROR"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
-                <register caption="Address"
-                          name="ADDR"
-                          offset="0x08"
-                          rw="RW"
-                          size="4"/>
+                <register caption="Address" name="ADDR" offset="0x08" rw="RW" size="4"/>
             </register-group>
             <value-group caption="Command select" name="NVMCTRL_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
                 <value caption="No Operation" name="NOOP" value="0x01"/>
                 <value caption="Flash Write" name="FLWR" value="0x02"/>
                 <value caption="Flash Page Erase" name="FLPER" value="0x08"/>
-                <value caption="Flash Multi-Page Erase 2 pages"
-                       name="FLMPER2"
-                       value="0x09"/>
-                <value caption="Flash Multi-Page Erase 4 pages"
-                       name="FLMPER4"
-                       value="0x0A"/>
-                <value caption="Flash Multi-Page Erase 8 pages"
-                       name="FLMPER8"
-                       value="0x0B"/>
-                <value caption="Flash Multi-Page Erase 16 pages"
-                       name="FLMPER16"
-                       value="0x0C"/>
-                <value caption="Flash Multi-Page Erase 32 pages"
-                       name="FLMPER32"
-                       value="0x0D"/>
+                <value caption="Flash Multi-Page Erase 2 pages" name="FLMPER2" value="0x09"/>
+                <value caption="Flash Multi-Page Erase 4 pages" name="FLMPER4" value="0x0A"/>
+                <value caption="Flash Multi-Page Erase 8 pages" name="FLMPER8" value="0x0B"/>
+                <value caption="Flash Multi-Page Erase 16 pages" name="FLMPER16" value="0x0C"/>
+                <value caption="Flash Multi-Page Erase 32 pages" name="FLMPER32" value="0x0D"/>
                 <value caption="EEPROM Write" name="EEWR" value="0x12"/>
                 <value caption="EEPROM Erase and Write" name="EEERWR" value="0x13"/>
                 <value caption="EEPROM Byte Erase" name="EEBER" value="0x18"/>
-                <value caption="EEPROM Multi-Byte Erase 2 bytes"
-                       name="EEMBER2"
-                       value="0x19"/>
-                <value caption="EEPROM Multi-Byte Erase 4 bytes"
-                       name="EEMBER4"
-                       value="0x1A"/>
-                <value caption="EEPROM Multi-Byte Erase 8 bytes"
-                       name="EEMBER8"
-                       value="0x1B"/>
-                <value caption="EEPROM Multi-Byte Erase 16 bytes"
-                       name="EEMBER16"
-                       value="0x1C"/>
-                <value caption="EEPROM Multi-Byte Erase 32 bytes"
-                       name="EEMBER32"
-                       value="0x1D"/>
+                <value caption="EEPROM Multi-Byte Erase 2 bytes" name="EEMBER2" value="0x19"/>
+                <value caption="EEPROM Multi-Byte Erase 4 bytes" name="EEMBER4" value="0x1A"/>
+                <value caption="EEPROM Multi-Byte Erase 8 bytes" name="EEMBER8" value="0x1B"/>
+                <value caption="EEPROM Multi-Byte Erase 16 bytes" name="EEMBER16" value="0x1C"/>
+                <value caption="EEPROM Multi-Byte Erase 32 bytes" name="EEMBER32" value="0x1D"/>
                 <value caption="Chip Erase Command" name="CHER" value="0x20"/>
                 <value caption="EEPROM Erase Command" name="EECHER" value="0x30"/>
             </value-group>
@@ -3483,399 +1668,134 @@
             <value-group caption="Write error select" name="NVMCTRL_ERROR">
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
-                <value caption="Write to section not allowed"
-                       name="ILLEGALSADDR"
-                       value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted"
-                       name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed"
-                       name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_avr_v2_port" name="PORT">
             <register-group caption="I/O Ports" name="PORT" size="0x20">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Set"
-                          name="DIRSET"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Clear"
-                          name="DIRCLR"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Toggle"
-                          name="DIRTGL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Set"
-                          name="OUTSET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Clear"
-                          name="OUTCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Toggle"
-                          name="OUTTGL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
-                <register caption="Port Control"
-                          initval="0x00"
-                          name="PORTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Slew Rate Limit Enable" mask="0x01" name="SRL" rw="RW"/>
                 </register>
-                <register caption="Pin Control Config"
-                          initval="0x00"
-                          name="PINCONFIG"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin Control Config" initval="0x00" name="PINCONFIG" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin Control Update"
-                          initval="0x00"
-                          name="PINCTRLUPD"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control update mask"
-                              mask="0xFF"
-                              name="PINCTRLUPD"
-                              rw="RW"/>
+                <register caption="Pin Control Update" initval="0x00" name="PINCTRLUPD" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Pin control update mask" mask="0xFF" name="PINCTRLUPD" rw="RW"/>
                 </register>
-                <register caption="Pin Control Set"
-                          initval="0x00"
-                          name="PINCTRLSET"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control set mask"
-                              mask="0xFF"
-                              name="PINCTRLSET"
-                              rw="RW"/>
+                <register caption="Pin Control Set" initval="0x00" name="PINCTRLSET" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Pin control set mask" mask="0xFF" name="PINCTRLSET" rw="RW"/>
                 </register>
-                <register caption="Pin Control Clear"
-                          initval="0x00"
-                          name="PINCTRLCLR"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control clear mask"
-                              mask="0xFF"
-                              name="PINCTRLCLR"
-                              rw="RW"/>
+                <register caption="Pin Control Clear" initval="0x00" name="PINCTRLCLR" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Pin control clear mask" mask="0xFF" name="PINCTRLCLR" rw="RW"/>
                 </register>
-                <register caption="Pin 0 Control"
-                          initval="0x00"
-                          name="PIN0CTRL"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 1 Control"
-                          initval="0x00"
-                          name="PIN1CTRL"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 2 Control"
-                          initval="0x00"
-                          name="PIN2CTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 3 Control"
-                          initval="0x00"
-                          name="PIN3CTRL"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 4 Control"
-                          initval="0x00"
-                          name="PIN4CTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 5 Control"
-                          initval="0x00"
-                          name="PIN5CTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 6 Control"
-                          initval="0x00"
-                          name="PIN6CTRL"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 7 Control"
-                          initval="0x00"
-                          name="PIN7CTRL"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
-                <value caption="Interrupt disabled but input buffer enabled"
-                       name="INTDISABLE"
-                       value="0x0"/>
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
                 <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
                 <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
                 <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
-                <value caption="Digital Input Buffer disabled"
-                       name="INPUT_DISABLE"
-                       value="0x4"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
                 <value caption="Sense low Level" name="LEVEL" value="0x5"/>
             </value-group>
         </module>
         <module caption="Port Multiplexer" id="avrdd" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="EVSYS route A"
-                          initval="0x00"
-                          name="EVSYSROUTEA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Output A"
-                              mask="0x01"
-                              name="EVOUTA"
-                              rw="RW"
-                              values="PORTMUX_EVOUTA"/>
-                    <bitfield caption="Event Output C"
-                              mask="0x04"
-                              name="EVOUTC"
-                              rw="RW"
-                              values="PORTMUX_EVOUTC"/>
-                    <bitfield caption="Event Output D"
-                              mask="0x08"
-                              name="EVOUTD"
-                              rw="RW"
-                              values="PORTMUX_EVOUTD"/>
-                    <bitfield caption="Event Output F"
-                              mask="0x20"
-                              name="EVOUTF"
-                              rw="RW"
-                              values="PORTMUX_EVOUTF"/>
+                <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Event Output A" mask="0x01" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output C" mask="0x04" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x08" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
                 </register>
-                <register caption="CCL route A"
-                          initval="0x00"
-                          name="CCLROUTEA"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals"
-                              mask="0x01"
-                              name="LUT0"
-                              rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals"
-                              mask="0x02"
-                              name="LUT1"
-                              rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals"
-                              mask="0x04"
-                              name="LUT2"
-                              rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals"
-                              mask="0x08"
-                              name="LUT3"
-                              rw="RW"
-                              values="PORTMUX_LUT3"/>
+                <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x01" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x02" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x04" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x08" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
-                <register caption="USART route A"
-                          initval="0x00"
-                          name="USARTROUTEA"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="USART0 Signals"
-                              mask="0x07"
-                              name="USART0"
-                              rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="USART1 Signals"
-                              mask="0x18"
-                              name="USART1"
-                              rw="RW"
-                              values="PORTMUX_USART1"/>
+                <register caption="USART route A" initval="0x00" name="USARTROUTEA" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="USART0 Signals" mask="0x07" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="USART1 Signals" mask="0x18" name="USART1" rw="RW" values="PORTMUX_USART1"/>
                 </register>
-                <register caption="SPI route A"
-                          initval="0x00"
-                          name="SPIROUTEA"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI0 Signals"
-                              mask="0x07"
-                              name="SPI0"
-                              rw="RW"
-                              values="PORTMUX_SPI0"/>
+                <register caption="SPI route A" initval="0x00" name="SPIROUTEA" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="SPI0 Signals" mask="0x07" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                 </register>
-                <register caption="TWI route A"
-                          initval="0x00"
-                          name="TWIROUTEA"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TWI0 Signals"
-                              mask="0x03"
-                              name="TWI0"
-                              rw="RW"
-                              values="PORTMUX_TWI0"/>
+                <register caption="TWI route A" initval="0x00" name="TWIROUTEA" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="TWI0 Signals" mask="0x03" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="TCA route A"
-                          initval="0x00"
-                          name="TCAROUTEA"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCA0 Signals"
-                              mask="0x07"
-                              name="TCA0"
-                              rw="RW"
-                              values="PORTMUX_TCA0"/>
+                <register caption="TCA route A" initval="0x00" name="TCAROUTEA" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="TCA0 Signals" mask="0x07" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
                 </register>
-                <register caption="TCB route A"
-                          initval="0x00"
-                          name="TCBROUTEA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCB0 Output"
-                              mask="0x01"
-                              name="TCB0"
-                              rw="RW"
-                              values="PORTMUX_TCB0"/>
-                    <bitfield caption="TCB1 Output"
-                              mask="0x02"
-                              name="TCB1"
-                              rw="RW"
-                              values="PORTMUX_TCB1"/>
+                <register caption="TCB route A" initval="0x00" name="TCBROUTEA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="TCB0 Output" mask="0x01" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="TCB1 Output" mask="0x02" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
                 </register>
-                <register caption="TCD route A"
-                          initval="0x00"
-                          name="TCDROUTEA"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCD0 Signals"
-                              mask="0x07"
-                              name="TCD0"
-                              rw="RW"
-                              values="PORTMUX_TCD0"/>
+                <register caption="TCD route A" initval="0x00" name="TCDROUTEA" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="TCD0 Signals" mask="0x07" name="TCD0" rw="RW" values="PORTMUX_TCD0"/>
                 </register>
             </register-group>
             <value-group caption="CCL Look-Up Table 0 Signals select" name="PORTMUX_LUT0">
@@ -3964,199 +1884,69 @@
         </module>
         <module caption="Reset controller" id="rst_integration_v8" name="RSTCTRL">
             <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
-                <register caption="Reset Flags"
-                          initval="0x00"
-                          name="RSTFR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Power on Reset flag" mask="0x01" name="PORF" rw="RW"/>
-                    <bitfield caption="Brown out detector Reset flag"
-                              mask="0x02"
-                              name="BORF"
-                              rw="RW"/>
+                    <bitfield caption="Brown out detector Reset flag" mask="0x02" name="BORF" rw="RW"/>
                     <bitfield caption="External Reset flag" mask="0x04" name="EXTRF" rw="RW"/>
                     <bitfield caption="Watch dog Reset flag" mask="0x08" name="WDRF" rw="RW"/>
                     <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
                     <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
                 </register>
-                <register caption="Software Reset"
-                          initval="0x00"
-                          name="SWRR"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software reset enable"
-                              mask="0x01"
-                              name="SWRST"
-                              rw="RW"/>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x01" name="SWRST" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Real-Time Counter" id="tmr_16b_rtc_v1" name="RTC">
             <register-group caption="Real-Time Counter" name="RTC" size="0x20">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="RTCEN" rw="RW"/>
                     <bitfield caption="Correction enable" mask="0x04" name="CORREN" rw="RW"/>
-                    <bitfield caption="Prescaling Factor"
-                              mask="0x78"
-                              name="PRESCALER"
-                              rw="RW"
-                              values="RTC_PRESCALER"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
                     <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x01"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLABUSY"
-                              rw="R"/>
-                    <bitfield caption="Count Synchronization Busy Flag"
-                              mask="0x02"
-                              name="CNTBUSY"
-                              rw="R"/>
-                    <bitfield caption="Period Synchronization Busy Flag"
-                              mask="0x04"
-                              name="PERBUSY"
-                              rw="R"/>
-                    <bitfield caption="Comparator Synchronization Busy Flag"
-                              mask="0x08"
-                              name="CMPBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x02" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x04" name="PERBUSY" rw="R"/>
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x08" name="CMPBUSY" rw="R"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt enable"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt Flag"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Temporary"
-                          name="TEMP"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Debug control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Calibration"
-                          initval="0x00"
-                          name="CALIB"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Error Correction Value"
-                              mask="0x7F"
-                              name="ERROR"
-                              rw="RW"/>
-                    <bitfield caption="Error Correction Sign Bit"
-                              mask="0x80"
-                              name="SIGN"
-                              rw="RW"/>
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7F" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
                 </register>
-                <register caption="Clock Select"
-                          initval="0x00"
-                          name="CLKSEL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Select"
-                              mask="0x03"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="RTC_CLKSEL"/>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x03" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
                 </register>
                 <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
-                <register caption="Period"
-                          initval="0xFFFF"
-                          name="PER"
-                          offset="0x0A"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
                 <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
-                <register caption="PIT Control A"
-                          initval="0x00"
-                          name="PITCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="PITEN" rw="RW"/>
-                    <bitfield caption="Period"
-                              mask="0x78"
-                              name="PERIOD"
-                              rw="RW"
-                              values="RTC_PERIOD"/>
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
                 </register>
-                <register caption="PIT Status"
-                          initval="0x00"
-                          name="PITSTATUS"
-                          offset="0x11"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLBUSY"
-                              rw="R"/>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLBUSY" rw="R"/>
                 </register>
-                <register caption="PIT Interrupt Control"
-                          initval="0x00"
-                          name="PITINTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags"
-                          initval="0x00"
-                          name="PITINTFLAGS"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Debug control"
-                          initval="0x00"
-                          name="PITDBGCTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
             </register-group>
@@ -4204,156 +1994,42 @@
         </module>
         <module caption="Signature row" id="avrdd" name="SIGROW">
             <register-group caption="Signature row" name="SIGROW" size="0x40">
-                <register caption="Device ID Byte 0"
-                          name="DEVICEID0"
-                          offset="0x00"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 1"
-                          name="DEVICEID1"
-                          offset="0x01"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 2"
-                          name="DEVICEID2"
-                          offset="0x02"
-                          rw="R"
-                          size="1"/>
-                <register caption="Temperature Calibration 0"
-                          name="TEMPSENSE0"
-                          offset="0x04"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 0"
-                              mask="0xFFFF"
-                              name="TEMPSENSE0"
-                              rw="R"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Temperature Calibration 0" name="TEMPSENSE0" offset="0x04" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 0" mask="0xFFFF" name="TEMPSENSE0" rw="R"/>
                 </register>
-                <register caption="Temperature Calibration 1"
-                          name="TEMPSENSE1"
-                          offset="0x06"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 1"
-                              mask="0xFFFF"
-                              name="TEMPSENSE1"
-                              rw="R"/>
+                <register caption="Temperature Calibration 1" name="TEMPSENSE1" offset="0x06" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 1" mask="0xFFFF" name="TEMPSENSE1" rw="R"/>
                 </register>
-                <register caption="LOTNUM0"
-                          name="SERNUM0"
-                          offset="0x10"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM1"
-                          name="SERNUM1"
-                          offset="0x11"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM2"
-                          name="SERNUM2"
-                          offset="0x12"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM3"
-                          name="SERNUM3"
-                          offset="0x13"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM4"
-                          name="SERNUM4"
-                          offset="0x14"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM5"
-                          name="SERNUM5"
-                          offset="0x15"
-                          rw="R"
-                          size="1"/>
-                <register caption="RANDOM"
-                          name="SERNUM6"
-                          offset="0x16"
-                          rw="R"
-                          size="1"/>
-                <register caption="SCRIBE"
-                          name="SERNUM7"
-                          offset="0x17"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS0"
-                          name="SERNUM8"
-                          offset="0x18"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS1"
-                          name="SERNUM9"
-                          offset="0x19"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS0"
-                          name="SERNUM10"
-                          offset="0x1A"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS1"
-                          name="SERNUM11"
-                          offset="0x1B"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES0"
-                          name="SERNUM12"
-                          offset="0x1C"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES1"
-                          name="SERNUM13"
-                          offset="0x1D"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES2"
-                          name="SERNUM14"
-                          offset="0x1E"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES3"
-                          name="SERNUM15"
-                          offset="0x1F"
-                          rw="R"
-                          size="1"/>
+                <register caption="LOTNUM0" name="SERNUM0" offset="0x10" rw="R" size="1"/>
+                <register caption="LOTNUM1" name="SERNUM1" offset="0x11" rw="R" size="1"/>
+                <register caption="LOTNUM2" name="SERNUM2" offset="0x12" rw="R" size="1"/>
+                <register caption="LOTNUM3" name="SERNUM3" offset="0x13" rw="R" size="1"/>
+                <register caption="LOTNUM4" name="SERNUM4" offset="0x14" rw="R" size="1"/>
+                <register caption="LOTNUM5" name="SERNUM5" offset="0x15" rw="R" size="1"/>
+                <register caption="RANDOM" name="SERNUM6" offset="0x16" rw="R" size="1"/>
+                <register caption="SCRIBE" name="SERNUM7" offset="0x17" rw="R" size="1"/>
+                <register caption="XPOS0" name="SERNUM8" offset="0x18" rw="R" size="1"/>
+                <register caption="XPOS1" name="SERNUM9" offset="0x19" rw="R" size="1"/>
+                <register caption="YPOS0" name="SERNUM10" offset="0x1A" rw="R" size="1"/>
+                <register caption="YPOS1" name="SERNUM11" offset="0x1B" rw="R" size="1"/>
+                <register caption="RES0" name="SERNUM12" offset="0x1C" rw="R" size="1"/>
+                <register caption="RES1" name="SERNUM13" offset="0x1D" rw="R" size="1"/>
+                <register caption="RES2" name="SERNUM14" offset="0x1E" rw="R" size="1"/>
+                <register caption="RES3" name="SERNUM15" offset="0x1F" rw="R" size="1"/>
             </register-group>
         </module>
-        <module caption="Sleep Controller"
-                id="clk_sleep_ctrl_avr_v2"
-                name="SLPCTRL">
+        <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
             <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Sleep enable" mask="0x01" name="SEN" rw="RW"/>
-                    <bitfield caption="Sleep mode"
-                              mask="0x06"
-                              name="SMODE"
-                              rw="RW"
-                              values="SLPCTRL_SMODE"/>
+                    <bitfield caption="Sleep mode" mask="0x06" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="VREGCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Performance Mode"
-                              mask="0x07"
-                              name="PMODE"
-                              rw="RW"
-                              values="SLPCTRL_PMODE"/>
-                    <bitfield caption="High Temperature Low Leakage Enable"
-                              mask="0x10"
-                              name="HTLLEN"
-                              rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Performance Mode" mask="0x07" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                 </register>
             </register-group>
             <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
@@ -4361,8 +2037,7 @@
                 <value caption="Standby Mode" name="STDBY" value="0x01"/>
                 <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
             </value-group>
-            <value-group caption="High Temperature Low Leakage Enable select"
-                         name="SLPCTRL_HTLLEN">
+            <value-group caption="High Temperature Low Leakage Enable select" name="SLPCTRL_HTLLEN">
                 <value caption="Disabled" name="OFF" value="0x0"/>
                 <value caption="Enabled" name="ON" value="0x1"/>
             </value-group>
@@ -4373,110 +2048,36 @@
         </module>
         <module caption="Serial Peripheral Interface" id="spi_8bit_v2" name="SPI">
             <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable Module" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Prescaler"
-                              mask="0x06"
-                              name="PRESC"
-                              rw="RW"
-                              values="SPI_PRESC"/>
+                    <bitfield caption="Prescaler" mask="0x06" name="PRESC" rw="RW" values="SPI_PRESC"/>
                     <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
-                    <bitfield caption="Host Operation Enable"
-                              mask="0x20"
-                              name="MASTER"
-                              rw="RW"/>
+                    <bitfield caption="Host Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
                     <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI Mode"
-                              mask="0x03"
-                              name="MODE"
-                              rw="RW"
-                              values="SPI_MODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="SPI Mode" mask="0x03" name="MODE" rw="RW" values="SPI_MODE"/>
                     <bitfield caption="SPI Select Disable" mask="0x04" name="SSD" rw="RW"/>
-                    <bitfield caption="Buffer Mode Wait for Receive"
-                              mask="0x40"
-                              name="BUFWR"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Mode Wait for Receive" mask="0x40" name="BUFWR" rw="RW"/>
                     <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Enable" mask="0x01" name="IE" rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Enable"
-                              mask="0x10"
-                              name="SSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <mode name="DEFAULT" qualifier="SPI.CTRLB.BUFEN" value="0"/>
                     <mode name="BUFFERED" qualifier="SPI.CTRLB.BUFEN" value="1"/>
-                    <bitfield caption="Buffer Overflow"
-                              mask="0x01"
-                              modes="BUFFERED"
-                              name="BUFOVF"
-                              rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Flag"
-                              mask="0x10"
-                              modes="BUFFERED"
-                              name="SSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Flag"
-                              mask="0x20"
-                              modes="BUFFERED"
-                              name="DREIF"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Flag"
-                              mask="0x40"
-                              modes="BUFFERED"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              modes="BUFFERED"
-                              name="RXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Write Collision"
-                              mask="0x40"
-                              modes="DEFAULT"
-                              name="WRCOL"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt Flag"
-                              mask="0x80"
-                              modes="DEFAULT"
-                              name="IF"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Overflow" mask="0x01" modes="BUFFERED" name="BUFOVF" rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Flag" mask="0x10" modes="BUFFERED" name="SSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" modes="BUFFERED" name="DREIF" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" modes="BUFFERED" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" modes="BUFFERED" name="RXCIF" rw="RW"/>
+                    <bitfield caption="Write Collision" mask="0x40" modes="DEFAULT" name="WRCOL" rw="RW"/>
+                    <bitfield caption="Interrupt Flag" mask="0x80" modes="DEFAULT" name="IF" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
             </register-group>
@@ -4495,543 +2096,149 @@
         </module>
         <module caption="System Configuration Registers" id="avrdd" name="SYSCFG">
             <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
-                <register caption="Revision ID"
-                          name="REVID"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Control"
-                          name="OCDMCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Status"
-                          initval="0x00"
-                          name="OCDMSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+                <register caption="OCD Message Control" name="OCDMCTRL" offset="0x04" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMSTATUS" offset="0x05" rw="RW" size="1">
                     <bitfield caption="OCD Message Valid" mask="0x01" name="VALID" rw="RW"/>
                 </register>
             </register-group>
         </module>
-        <module caption="16-bit Timer/Counter Type A"
-                id="tmr_16b_pwm_v1"
-                name="TCA">
+        <module caption="16-bit Timer/Counter Type A" id="tmr_16b_pwm_v1" name="TCA">
             <register-group caption="16-bit Timer/Counter Type A" name="TCA" size="0x40">
-                <mode caption="Single Mode"
-                      name="SINGLE"
-                      qualifier="TCA.SINGLE.CTRLD.SPLITM"
-                      value="0"/>
-                <mode caption="Split Mode"
-                      name="SPLIT"
-                      qualifier="TCA.SPLIT.CTRLD.SPLITM"
-                      value="1"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <mode caption="Single Mode" name="SINGLE" qualifier="TCA.SINGLE.CTRLD.SPLITM" value="0"/>
+                <mode caption="Split Mode" name="SPLIT" qualifier="TCA.SPLIT.CTRLD.SPLITM" value="1"/>
+                <register caption="Control A" initval="0x00" modes="SINGLE" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x07"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                <register caption="Control B" initval="0x00" modes="SINGLE" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                     <bitfield caption="Auto Lock Update" mask="0x08" name="ALUPD" rw="RW"/>
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare 0 Waveform Output Value"
-                              mask="0x01"
-                              name="CMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Waveform Output Value"
-                              mask="0x02"
-                              name="CMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Waveform Output Value"
-                              mask="0x04"
-                              name="CMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SINGLE" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x01" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x02" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x04" name="CMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SINGLE" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Control E Clear" initval="0x00" modes="SINGLE" name="CTRLECLR" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Direction"
-                              mask="0x01"
-                              name="DIR"
-                              rw="RW"
-                              values="TCA_SINGLE_DIR"/>
+                <register caption="Control E Set" initval="0x00" modes="SINGLE" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control F Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Clear" initval="0x00" modes="SINGLE" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Control F Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFSET"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Set" initval="0x00" modes="SINGLE" name="CTRLFSET" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="EVCTRL"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Count on Event Input A"
-                              mask="0x01"
-                              name="CNTAEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action A"
-                              mask="0x0E"
-                              name="EVACTA"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTA"/>
-                    <bitfield caption="Count on Event Input B"
-                              mask="0x10"
-                              name="CNTBEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action B"
-                              mask="0xE0"
-                              name="EVACTB"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTB"/>
+                <register caption="Event Control" initval="0x00" modes="SINGLE" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input A" mask="0x01" name="CNTAEI" rw="RW"/>
+                    <bitfield caption="Event Action A" mask="0x0E" name="EVACTA" rw="RW" values="TCA_SINGLE_EVACTA"/>
+                    <bitfield caption="Count on Event Input B" mask="0x10" name="CNTBEI" rw="RW"/>
+                    <bitfield caption="Event Action B" mask="0xE0" name="EVACTB" rw="RW" values="TCA_SINGLE_EVACTB"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" modes="SINGLE" name="INTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" modes="SINGLE" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SINGLE" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary data for 16-bit Access"
-                          modes="SINGLE"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          modes="SINGLE"
-                          name="CNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period"
-                          modes="SINGLE"
-                          name="PER"
-                          offset="0x26"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0"
-                          modes="SINGLE"
-                          name="CMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1"
-                          modes="SINGLE"
-                          name="CMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2"
-                          modes="SINGLE"
-                          name="CMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period Buffer"
-                          modes="SINGLE"
-                          name="PERBUF"
-                          offset="0x36"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0 Buffer"
-                          modes="SINGLE"
-                          name="CMP0BUF"
-                          offset="0x38"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1 Buffer"
-                          modes="SINGLE"
-                          name="CMP1BUF"
-                          offset="0x3A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2 Buffer"
-                          modes="SINGLE"
-                          name="CMP2BUF"
-                          offset="0x3C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary data for 16-bit Access" modes="SINGLE" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Count" modes="SINGLE" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Period" modes="SINGLE" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Compare 0" modes="SINGLE" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 1" modes="SINGLE" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 2" modes="SINGLE" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Period Buffer" modes="SINGLE" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" modes="SINGLE" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" modes="SINGLE" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" modes="SINGLE" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" modes="SPLIT" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Enable"
-                              mask="0x01"
-                              name="LCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Enable"
-                              mask="0x02"
-                              name="LCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Enable"
-                              mask="0x04"
-                              name="LCMP2EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Enable"
-                              mask="0x10"
-                              name="HCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Enable"
-                              mask="0x20"
-                              name="HCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Enable"
-                              mask="0x40"
-                              name="HCMP2EN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" modes="SPLIT" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Enable" mask="0x01" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x02" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x04" name="LCMP2EN" rw="RW"/>
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Output Value"
-                              mask="0x01"
-                              name="LCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Output Value"
-                              mask="0x02"
-                              name="LCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Output Value"
-                              mask="0x04"
-                              name="LCMP2OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Output Value"
-                              mask="0x10"
-                              name="HCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Output Value"
-                              mask="0x20"
-                              name="HCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Output Value"
-                              mask="0x40"
-                              name="HCMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SPLIT" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x01" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x02" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x04" name="LCMP2OV" rw="RW"/>
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SPLIT" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Clear" initval="0x00" modes="SPLIT" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Set" initval="0x00" modes="SPLIT" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Enable"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Enable"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Enable"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Enable"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Enable"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" modes="SPLIT" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Flag"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Flag"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Flag"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Flag"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Flag"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" modes="SPLIT" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SPLIT" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Low Count"
-                          modes="SPLIT"
-                          name="LCNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Count"
-                          modes="SPLIT"
-                          name="HCNT"
-                          offset="0x21"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Period"
-                          modes="SPLIT"
-                          name="LPER"
-                          offset="0x26"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Period"
-                          modes="SPLIT"
-                          name="HPER"
-                          offset="0x27"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP0"
-                          offset="0x29"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP1"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP2"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Low Count" modes="SPLIT" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="High Count" modes="SPLIT" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="Low Period" modes="SPLIT" name="LPER" offset="0x26" rw="RW" size="1"/>
+                <register caption="High Period" modes="SPLIT" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
             </register-group>
             <value-group caption="Clock Selection" name="TCA_SINGLE_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5048,12 +2255,8 @@
                 <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
                 <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
                 <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
-                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM"
-                       name="DSBOTH"
-                       value="0x06"/>
-                <value caption="Dual Slope PWM, overflow on BOTTOM"
-                       name="DSBOTTOM"
-                       value="0x07"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
             </value-group>
             <value-group caption="Command select" name="TCA_SINGLE_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
@@ -5066,31 +2269,17 @@
                 <value caption="Count down" name="DOWN" value="0x1"/>
             </value-group>
             <value-group caption="Event Action A select" name="TCA_SINGLE_EVACTA">
-                <value caption="Count on positive edge event"
-                       name="CNT_POSEDGE"
-                       value="0x00"/>
+                <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
-                <value caption="Count on prescaled clock while event line is 1."
-                       name="CNT_HIGHLVL"
-                       value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
+                <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
-                <value caption="Restart counter at positive edge event"
-                       name="RESTART_POSEDGE"
-                       value="0x04"/>
-                <value caption="Restart counter on any edge event"
-                       name="RESTART_ANYEDGE"
-                       value="0x05"/>
-                <value caption="Restart counter while event line is 1."
-                       name="RESTART_HIGHLVL"
-                       value="0x06"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+                <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
+                <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
+                <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
             </value-group>
             <value-group caption="Clock Selection" name="TCA_SPLIT_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5110,107 +2299,46 @@
             </value-group>
             <value-group caption="Command Enable select" name="TCA_SPLIT_CMDEN">
                 <value caption="None" name="NONE" value="0x0"/>
-                <value caption="Both low byte and high byte counter"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Both low byte and high byte counter" name="BOTH" value="0x3"/>
             </value-group>
         </module>
         <module caption="16-bit Timer Type B" id="tmr_16b_capture_v1" name="TCB">
             <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Select"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCB_CLKSEL"/>
+                    <bitfield caption="Clock Select" mask="0x0E" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
                     <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
                     <bitfield caption="Cascade two timers" mask="0x20" name="CASCADE" rw="RW"/>
                     <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control Register B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Timer Mode"
-                              mask="0x07"
-                              name="CNTMODE"
-                              rw="RW"
-                              values="TCB_CNTMODE"/>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Timer Mode" mask="0x07" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
                     <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
                     <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
                     <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Event Input Enable" mask="0x01" name="CAPTEI" rw="RW"/>
                     <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
-                    <bitfield caption="Input Capture Noise Cancellation Filter"
-                              mask="0x40"
-                              name="FILTER"
-                              rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
                     <bitfield caption="Run" mask="0x01" name="RUN" rw="R"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Value"
-                          name="TEMP"
-                          offset="0x9"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          initval="0x0000"
-                          name="CNT"
-                          offset="0xA"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare or Capture"
-                          name="CCMP"
-                          offset="0xC"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock Select" name="TCB_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5222,247 +2350,78 @@
                 <value caption="Periodic Interrupt" name="INT" value="0x00"/>
                 <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
                 <value caption="Input Capture Event" name="CAPT" value="0x02"/>
-                <value caption="Input Capture Frequency measurement"
-                       name="FRQ"
-                       value="0x03"/>
-                <value caption="Input Capture Pulse-Width measurement"
-                       name="PW"
-                       value="0x04"/>
-                <value caption="Input Capture Frequency and Pulse-Width measurement"
-                       name="FRQPW"
-                       value="0x05"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
                 <value caption="Single Shot" name="SINGLE" value="0x06"/>
                 <value caption="8-bit PWM" name="PWM8" value="0x07"/>
             </value-group>
         </module>
         <module caption="Timer Counter D" id="tmr_12b_psc_v1" name="TCD">
             <register-group caption="Timer Counter D" name="TCD" size="0x40">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler"
-                              mask="0x06"
-                              name="SYNCPRES"
-                              rw="RW"
-                              values="TCD_SYNCPRES"/>
-                    <bitfield caption="Counter prescaler"
-                              mask="0x18"
-                              name="CNTPRES"
-                              rw="RW"
-                              values="TCD_CNTPRES"/>
-                    <bitfield caption="Clock select"
-                              mask="0x60"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCD_CLKSEL"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x06" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+                    <bitfield caption="Counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+                    <bitfield caption="Clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x03"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCD_WGMODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x03" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare output value override"
-                              mask="0x01"
-                              name="CMPOVR"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare output value override" mask="0x01" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Auto update" mask="0x02" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Fifty percent waveform"
-                              mask="0x08"
-                              name="FIFTY"
-                              rw="RW"/>
-                    <bitfield caption="Compare C output select"
-                              mask="0x40"
-                              name="CMPCSEL"
-                              rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select"
-                              mask="0x80"
-                              name="CMPDSEL"
-                              rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Fifty percent waveform" mask="0x08" name="FIFTY" rw="RW"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x0F" name="CMPAVAL" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0xF0" name="CMPBVAL" rw="RW"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronize end of cycle strobe"
-                              mask="0x01"
-                              name="SYNCEOC"
-                              rw="RW"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Synchronize end of cycle strobe" mask="0x01" name="SYNCEOC" rw="RW"/>
                     <bitfield caption="synchronize strobe" mask="0x02" name="SYNC" rw="RW"/>
                     <bitfield caption="Restart strobe" mask="0x04" name="RESTART" rw="RW"/>
-                    <bitfield caption="Software Capture A Strobe"
-                              mask="0x08"
-                              name="SCAPTUREA"
-                              rw="RW"/>
-                    <bitfield caption="Software Capture B Strobe"
-                              mask="0x10"
-                              name="SCAPTUREB"
-                              rw="RW"/>
-                    <bitfield caption="Disable at end of cycle"
-                              mask="0x80"
-                              name="DISEOC"
-                              rw="RW"/>
+                    <bitfield caption="Software Capture A Strobe" mask="0x08" name="SCAPTUREA" rw="RW"/>
+                    <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+                    <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
                 </register>
-                <register caption="EVCTRLA"
-                          initval="0x00"
-                          name="EVCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="EVCTRLB"
-                          initval="0x00"
-                          name="EVCTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Enable ready" mask="0x01" name="ENRDY" rw="R"/>
                     <bitfield caption="Command ready" mask="0x02" name="CMDRDY" rw="R"/>
                     <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
                     <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
                 </register>
-                <register caption="Input Control A"
-                          initval="0x00"
-                          name="INPUTCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Input Control B"
-                          initval="0x00"
-                          name="INPUTCTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Fault Control"
-                          initval="0x00"
-                          name="FAULTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x01" name="CMPA" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0x02" name="CMPB" rw="RW"/>
                     <bitfield caption="Compare C value" mask="0x04" name="CMPC" rw="RW"/>
@@ -5472,100 +2431,33 @@
                     <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
                     <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
                 </register>
-                <register caption="Delay Control"
-                          initval="0x00"
-                          name="DLYCTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Delay select"
-                              mask="0x03"
-                              name="DLYSEL"
-                              rw="RW"
-                              values="TCD_DLYSEL"/>
-                    <bitfield caption="Delay trigger"
-                              mask="0x0C"
-                              name="DLYTRIG"
-                              rw="RW"
-                              values="TCD_DLYTRIG"/>
-                    <bitfield caption="Delay prescaler"
-                              mask="0x30"
-                              name="DLYPRESC"
-                              rw="RW"
-                              values="TCD_DLYPRESC"/>
+                <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Delay select" mask="0x03" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+                    <bitfield caption="Delay trigger" mask="0x0C" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+                    <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
                 </register>
-                <register caption="Delay value"
-                          initval="0x00"
-                          name="DLYVAL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Delay value" mask="0xFF" name="DLYVAL" rw="RW"/>
                 </register>
-                <register caption="Dither Control A"
-                          initval="0x00"
-                          name="DITCTRL"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Dither select"
-                              mask="0x03"
-                              name="DITHERSEL"
-                              rw="RW"
-                              values="TCD_DITHERSEL"/>
+                <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Dither select" mask="0x03" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
                 </register>
-                <register caption="Dither value"
-                          initval="0x00"
-                          name="DITVAL"
-                          offset="0x19"
-                          rw="RW"
-                          size="1">
+                <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
                     <bitfield caption="Dither value" mask="0x0F" name="DITHER" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                     <bitfield caption="Fault detection" mask="0x04" name="FAULTDET" rw="RW"/>
                 </register>
-                <register caption="Capture A"
-                          name="CAPTUREA"
-                          offset="0x22"
-                          rw="R"
-                          size="2"/>
-                <register caption="Capture B"
-                          name="CAPTUREB"
-                          offset="0x24"
-                          rw="R"
-                          size="2"/>
-                <register caption="Compare A Set"
-                          name="CMPASET"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare A Clear"
-                          name="CMPACLR"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Set"
-                          name="CMPBSET"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Clear"
-                          name="CMPBCLR"
-                          offset="0x2E"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+                <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+                <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock select" name="TCD_CLKSEL">
-                <value caption="Internal High-Frequency oscillator"
-                       name="OSCHF"
-                       value="0x00"/>
+                <value caption="Internal High-Frequency oscillator" name="OSCHF" value="0x00"/>
                 <value caption="PLL" name="PLL" value="0x01"/>
                 <value caption="External Clock" name="EXTCLK" value="0x02"/>
                 <value caption="Peripheral clock" name="CLKPER" value="0x03"/>
@@ -5576,18 +2468,10 @@
                 <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
             </value-group>
             <value-group caption="Synchronization prescaler select" name="TCD_SYNCPRES">
-                <value caption="Selected clock source divided by 1"
-                       name="DIV1"
-                       value="0x00"/>
-                <value caption="Selected clock source divided by 2"
-                       name="DIV2"
-                       value="0x01"/>
-                <value caption="Selected clock source divided by 4"
-                       name="DIV4"
-                       value="0x02"/>
-                <value caption="Selected clock source divided by 8"
-                       name="DIV8"
-                       value="0x03"/>
+                <value caption="Selected clock source divided by 1" name="DIV1" value="0x00"/>
+                <value caption="Selected clock source divided by 2" name="DIV2" value="0x01"/>
+                <value caption="Selected clock source divided by 4" name="DIV4" value="0x02"/>
+                <value caption="Selected clock source divided by 8" name="DIV8" value="0x03"/>
             </value-group>
             <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
                 <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
@@ -5628,176 +2512,63 @@
             </value-group>
             <value-group caption="Event action select" name="TCD_ACTION">
                 <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
-                <value caption="Event trigger a fault and capture"
-                       name="CAPTURE"
-                       value="0x1"/>
+                <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
             </value-group>
             <value-group caption="Event config select" name="TCD_CFG">
-                <value caption="Neither Filter nor Asynchronous Event is enabled"
-                       name="NEITHER"
-                       value="0x0"/>
-                <value caption="Input Capture Noise Cancellation Filter enabled"
-                       name="FILTER"
-                       value="0x1"/>
-                <value caption="Asynchronous Event output qualification enabled"
-                       name="ASYNC"
-                       value="0x2"/>
+                <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+                <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+                <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="Edge select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW"
-                       value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH"
-                       value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
-                <value caption="Stop output, jump to opposite compare cycle and wait"
-                       name="JMPWAIT"
-                       value="0x01"/>
-                <value caption="Stop output, execute opposite compare cycle and wait"
-                       name="EXECWAIT"
-                       value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active"
-                       name="EXECFAULT"
-                       value="0x03"/>
-                <value caption="Stop all outputs, maintain frequency"
-                       name="FREQ"
-                       value="0x04"/>
-                <value caption="Stop all outputs, execute dead time while fault active"
-                       name="EXECDT"
-                       value="0x05"/>
-                <value caption="Stop all outputs, jump to next compare cycle and wait"
-                       name="WAIT"
-                       value="0x06"/>
-                <value caption="Stop all outputs, wait for software action"
-                       name="WAITSW"
-                       value="0x07"/>
-                <value caption="Stop output on edge, jump to next compare cycle"
-                       name="EDGETRIG"
-                       value="0x08"/>
-                <value caption="Stop output on edge, maintain frequency"
-                       name="EDGETRIGFREQ"
-                       value="0x09"/>
-                <value caption="Stop output at level, maintain frequency"
-                       name="LVLTRIGFREQ"
-                       value="0x0A"/>
+                <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
+                <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
+                <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
+                <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
+                <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
+                <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x07"/>
+                <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x08"/>
+                <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x09"/>
+                <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0x0A"/>
             </value-group>
         </module>
         <module caption="Two-Wire Interface" id="i2c_8bit_avr_v3" name="TWI">
             <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="SDA Setup Time"
-                              mask="0x10"
-                              name="SDASETUP"
-                              rw="RW"
-                              values="TWI_SDASETUP"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Dual Mode Control"
-                          initval="0x00"
-                          name="DUALCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
+                <register caption="Dual Mode Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Debug Run"
-                              mask="0x01"
-                              name="DBGRUN"
-                              rw="RW"
-                              values="TWI_DBGRUN"/>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW" values="TWI_DBGRUN"/>
                 </register>
-                <register caption="Host Control A"
-                          initval="0x00"
-                          name="MCTRLA"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Inactive Bus Time-Out"
-                              mask="0x0C"
-                              name="TIMEOUT"
-                              rw="RW"
-                              values="TWI_TIMEOUT"/>
+                    <bitfield caption="Inactive Bus Time-Out" mask="0x0C" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
                     <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
-                    <bitfield caption="Write Interrupt Enable"
-                              mask="0x40"
-                              name="WIEN"
-                              rw="RW"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
                     <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
                 </register>
-                <register caption="Host Control B"
-                          initval="0x00"
-                          name="MCTRLB"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="MCMD"
-                              rw="RW"
-                              values="TWI_MCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Host Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                     <bitfield caption="Flush" mask="0x08" name="FLUSH" rw="RW"/>
                 </register>
-                <register caption="Host STATUS"
-                          initval="0x00"
-                          name="MSTATUS"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bus State"
-                              mask="0x03"
-                              name="BUSSTATE"
-                              rw="RW"
-                              values="TWI_BUSSTATE"/>
+                <register caption="Host STATUS" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
@@ -5805,147 +2576,69 @@
                     <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
                     <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
                 </register>
-                <register caption="Host Baud Rate"
-                          initval="0x00"
-                          name="MBAUD"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Baud Rate" initval="0x00" name="MBAUD" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Baud Rate" mask="0xFF" name="BAUD" rw="RW"/>
                 </register>
-                <register caption="Host Address"
-                          initval="0x00"
-                          name="MADDR"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Address" initval="0x00" name="MADDR" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Host Data"
-                          initval="0x00"
-                          name="MDATA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Data" initval="0x00" name="MDATA" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Control A"
-                          initval="0x00"
-                          name="SCTRLA"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Address Recognition Mode"
-                              mask="0x04"
-                              name="PMEN"
-                              rw="RW"/>
+                    <bitfield caption="Address Recognition Mode" mask="0x04" name="PMEN" rw="RW"/>
                     <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Enable"
-                              mask="0x40"
-                              name="APIEN"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
                     <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
                 </register>
-                <register caption="Client Control B"
-                          initval="0x00"
-                          name="SCTRLB"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="SCMD"
-                              rw="RW"
-                              values="TWI_SCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Client Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                 </register>
-                <register caption="Client Status"
-                          initval="0x00"
-                          name="SSTATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Address or Stop"
-                              mask="0x01"
-                              name="AP"
-                              rw="RW"
-                              values="TWI_AP"/>
+                <register caption="Client Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Address or Stop" mask="0x01" name="AP" rw="RW" values="TWI_AP"/>
                     <bitfield caption="Read/Write Direction" mask="0x02" name="DIR" rw="RW"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Collision" mask="0x08" name="COLL" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
                     <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Flag"
-                              mask="0x40"
-                              name="APIF"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
                     <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
                 </register>
-                <register caption="Client Address"
-                          initval="0x00"
-                          name="SADDR"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address" initval="0x00" name="SADDR" offset="0xC" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Client Data"
-                          initval="0x00"
-                          name="SDATA"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Data" initval="0x00" name="SDATA" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Address Mask"
-                          initval="0x00"
-                          name="SADDRMASK"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address Mask" initval="0x00" name="SADDRMASK" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Address Mask Enable" mask="0x01" name="ADDREN" rw="RW"/>
                     <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Fast-mode Plus Enable select" name="TWI_FMPEN">
-                <value caption="Operating in Standard-mode or Fast-mode"
-                       name="OFF"
-                       value="0x0"/>
+                <value caption="Operating in Standard-mode or Fast-mode" name="OFF" value="0x0"/>
                 <value caption="Operating in Fast-mode Plus" name="ON" value="0x1"/>
             </value-group>
             <value-group caption="Input voltage transition level select" name="TWI_INPUTLVL">
                 <value caption="I2C input voltage transition level" name="I2C" value="0x0"/>
-                <value caption="SMBus 3.0 input voltage transition level"
-                       name="SMBUS"
-                       value="0x1"/>
+                <value caption="SMBus 3.0 input voltage transition level" name="SMBUS" value="0x1"/>
             </value-group>
             <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
                 <value caption="No SDA Hold Delay" name="OFF" value="0x0"/>
                 <value caption="Short SDA hold time" name="50NS" value="0x1"/>
-                <value caption="Meets SMBUS 2.0 specification under typical conditions"
-                       name="300NS"
-                       value="0x2"/>
-                <value caption="Meets SMBUS 2.0 specificaiton across all corners"
-                       name="500NS"
-                       value="0x3"/>
+                <value caption="Meets SMBUS 2.0 specification under typical conditions" name="300NS" value="0x2"/>
+                <value caption="Meets SMBUS 2.0 specificaiton across all corners" name="500NS" value="0x3"/>
             </value-group>
             <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
                 <value caption="SDA setup time is four clock cycles" name="4CYC" value="0"/>
                 <value caption="SDA setup time is eight clock cycle" name="8CYC" value="1"/>
             </value-group>
             <value-group caption="Debug Run select" name="TWI_DBGRUN">
-                <value caption="The peripheral is halted in Break Debug mode and ignores events"
-                       name="HALT"
-                       value="0"/>
-                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted"
-                       name="RUN"
-                       value="1"/>
+                <value caption="The peripheral is halted in Break Debug mode and ignores events" name="HALT" value="0"/>
+                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted" name="RUN" value="1"/>
             </value-group>
             <value-group caption="Inactive Bus Time-Out select" name="TWI_TIMEOUT">
                 <value caption="Bus time-out disabled. I2C." name="DISABLED" value="0"/>
@@ -5959,15 +2652,9 @@
             </value-group>
             <value-group caption="Command select" name="TWI_MCMD">
                 <value caption="No action" name="NOACT" value="0"/>
-                <value caption="Execute Acknowledge Action followed by repeated Start."
-                       name="REPSTART"
-                       value="1"/>
-                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR."
-                       name="RECVTRANS"
-                       value="2"/>
-                <value caption="Execute Acknowledge Action followed by issuing a Stop condition."
-                       name="STOP"
-                       value="3"/>
+                <value caption="Execute Acknowledge Action followed by repeated Start." name="REPSTART" value="1"/>
+                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR." name="RECVTRANS" value="2"/>
+                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP" value="3"/>
             </value-group>
             <value-group caption="Bus State select" name="TWI_BUSSTATE">
                 <value caption="Unknown bus state" name="UNKNOWN" value="0"/>
@@ -5978,254 +2665,81 @@
             <value-group caption="Command select" name="TWI_SCMD">
                 <value caption="No Action" name="NOACT" value="0"/>
                 <value caption="Complete transaction" name="COMPTRANS" value="2"/>
-                <value caption="Used in response to an interrupt"
-                       name="RESPONSE"
-                       value="3"/>
+                <value caption="Used in response to an interrupt" name="RESPONSE" value="3"/>
             </value-group>
             <value-group caption="Address or Stop select" name="TWI_AP">
-                <value caption="A Stop condition generated the interrupt on APIF flag"
-                       name="STOP"
-                       value="0"/>
-                <value caption="Address detection generated the interrupt on APIF flag"
-                       name="ADR"
-                       value="1"/>
+                <value caption="A Stop condition generated the interrupt on APIF flag" name="STOP" value="0"/>
+                <value caption="Address detection generated the interrupt on APIF flag" name="ADR" value="1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                            name="USART"
-                            size="0x10">
-                <register caption="Receive Data Low Byte"
-                          initval="0x00"
-                          name="RXDATAL"
-                          offset="0x0"
-                          rw="R"
-                          size="1">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xFF" name="DATA" rw="R"/>
                 </register>
-                <register caption="Receive Data High Byte"
-                          initval="0x00"
-                          name="RXDATAH"
-                          offset="0x1"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="Receiver Data Register"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="R"/>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Receiver Data Register" mask="0x01" name="DATA8" rw="R"/>
                     <bitfield caption="Parity Error" mask="0x02" name="PERR" rw="R"/>
                     <bitfield caption="Frame Error" mask="0x04" name="FERR" rw="R"/>
                     <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Transmit Data Low Byte"
-                          initval="0x00"
-                          name="TXDATAL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register"
-                              mask="0xFF"
-                              name="DATA"
-                              rw="RW"/>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Transmit Data High Byte"
-                          initval="0x00"
-                          name="TXDATAH"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="RW"/>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x01" name="DATA8" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Wait For Break" mask="0x01" name="WFB" rw="RW"/>
                     <bitfield caption="Break Detected Flag" mask="0x02" name="BDF" rw="RW"/>
-                    <bitfield caption="Inconsistent Sync Field Interrupt Flag"
-                              mask="0x08"
-                              name="ISFIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Start Interrupt"
-                              mask="0x10"
-                              name="RXSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Flag"
-                              mask="0x20"
-                              name="DREIF"
-                              rw="R"/>
-                    <bitfield caption="Transmit Interrupt Flag"
-                              mask="0x40"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x08" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="RS485 Mode internal transmitter"
-                              mask="0x01"
-                              name="RS485"
-                              rw="RW"
-                              values="USART_RS485"/>
-                    <bitfield caption="Auto-baud Error Interrupt Enable"
-                              mask="0x04"
-                              name="ABEIE"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x01" name="RS485" rw="RW" values="USART_RS485"/>
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x04" name="ABEIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x08" name="LBME" rw="RW"/>
-                    <bitfield caption="Receiver Start Frame Interrupt Enable"
-                              mask="0x10"
-                              name="RXSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transmit Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multi-processor Communication Mode"
-                              mask="0x01"
-                              name="MPCM"
-                              rw="RW"/>
-                    <bitfield caption="Receiver Mode"
-                              mask="0x06"
-                              name="RXMODE"
-                              rw="RW"
-                              values="USART_RXMODE"/>
-                    <bitfield caption="Open Drain Mode Enable"
-                              mask="0x08"
-                              name="ODME"
-                              rw="RW"/>
-                    <bitfield caption="Start Frame Detection Enable"
-                              mask="0x10"
-                              name="SFDEN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x06" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x08" name="ODME" rw="RW"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
                     <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
                     <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x03"
-                          name="CTRLC"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="USART.CTRLC.CMODE" value="0x00 0x01 0x02"/>
                     <mode name="MSPI" qualifier="USART.CTRLC.CMODE" value="0x03"/>
-                    <bitfield caption="Communication Mode"
-                              mask="0xC0"
-                              name="CMODE"
-                              rw="RW"
-                              values="USART_CMODE"/>
-                    <bitfield caption="SPI Host Mode, Clock Phase"
-                              mask="0x02"
-                              modes="MSPI"
-                              name="UCPHA"
-                              rw="RW"/>
-                    <bitfield caption="SPI Host Mode, Data Order"
-                              mask="0x04"
-                              modes="MSPI"
-                              name="UDORD"
-                              rw="RW"/>
-                    <bitfield caption="Character Size"
-                              mask="0x07"
-                              modes="NORMAL"
-                              name="CHSIZE"
-                              rw="RW"
-                              values="USART_NORMAL_CHSIZE"/>
-                    <bitfield caption="Stop Bit Mode"
-                              mask="0x08"
-                              modes="NORMAL"
-                              name="SBMODE"
-                              rw="RW"
-                              values="USART_NORMAL_SBMODE"/>
-                    <bitfield caption="Parity Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="PMODE"
-                              rw="RW"
-                              values="USART_NORMAL_PMODE"/>
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" rw="RW" values="USART_CMODE"/>
+                    <bitfield caption="SPI Host Mode, Clock Phase" mask="0x02" modes="MSPI" name="UCPHA" rw="RW"/>
+                    <bitfield caption="SPI Host Mode, Data Order" mask="0x04" modes="MSPI" name="UDORD" rw="RW"/>
+                    <bitfield caption="Character Size" mask="0x07" modes="NORMAL" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" modes="NORMAL" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" modes="NORMAL" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
                 </register>
-                <register caption="Baud Rate"
-                          initval="0x0000"
-                          name="BAUD"
-                          offset="0x8"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Auto Baud Window"
-                              mask="0xC0"
-                              name="ABW"
-                              rw="RW"
-                              values="USART_ABW"/>
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xC0" name="ABW" rw="RW" values="USART_ABW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="IrDA Event Input Enable"
-                              mask="0x01"
-                              name="IREI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x01" name="IREI" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control"
-                          initval="0x00"
-                          name="TXPLCTRL"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xFF" name="TXPL" rw="RW"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control"
-                          initval="0x00"
-                          name="RXPLCTRL"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7F" name="RXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -6250,12 +2764,8 @@
                 <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
                 <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
                 <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
-                <value caption="Character size: 9 bit read low byte first"
-                       name="9BITL"
-                       value="0x06"/>
-                <value caption="Character size: 9 bit read high byte first"
-                       name="9BITH"
-                       value="0x07"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
             </value-group>
             <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
                 <value caption="No Parity" name="DISABLED" value="0x00"/>
@@ -6275,234 +2785,62 @@
         </module>
         <module caption="User Row" id="avrdd" name="USERROW">
             <register-group caption="User Row" name="USERROW" size="0x20">
-                <register caption="User Row Byte 0"
-                          name="USERROW0"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 1"
-                          name="USERROW1"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 2"
-                          name="USERROW2"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 3"
-                          name="USERROW3"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 4"
-                          name="USERROW4"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 5"
-                          name="USERROW5"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 6"
-                          name="USERROW6"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 7"
-                          name="USERROW7"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 8"
-                          name="USERROW8"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 9"
-                          name="USERROW9"
-                          offset="0x09"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 10"
-                          name="USERROW10"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 11"
-                          name="USERROW11"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 12"
-                          name="USERROW12"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 13"
-                          name="USERROW13"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 14"
-                          name="USERROW14"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 15"
-                          name="USERROW15"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 16"
-                          name="USERROW16"
-                          offset="0x10"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 17"
-                          name="USERROW17"
-                          offset="0x11"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 18"
-                          name="USERROW18"
-                          offset="0x12"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 19"
-                          name="USERROW19"
-                          offset="0x13"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 20"
-                          name="USERROW20"
-                          offset="0x14"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 21"
-                          name="USERROW21"
-                          offset="0x15"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 22"
-                          name="USERROW22"
-                          offset="0x16"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 23"
-                          name="USERROW23"
-                          offset="0x17"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 24"
-                          name="USERROW24"
-                          offset="0x18"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 25"
-                          name="USERROW25"
-                          offset="0x19"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 26"
-                          name="USERROW26"
-                          offset="0x1A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 27"
-                          name="USERROW27"
-                          offset="0x1B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 28"
-                          name="USERROW28"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 29"
-                          name="USERROW29"
-                          offset="0x1D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 30"
-                          name="USERROW30"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 31"
-                          name="USERROW31"
-                          offset="0x1F"
-                          rw="RW"
-                          size="1"/>
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Virtual Ports" id="gpio_ports_avr_v2_vport" name="VPORT">
             <register-group caption="Virtual Ports" name="VPORT" size="0x4">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Voltage reference" id="avrdd" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
-                <register caption="ADC0 Reference"
-                          initval="0x00"
-                          name="ADC0REF"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="ADC0 Reference" initval="0x00" name="ADC0REF" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="DAC0 Reference"
-                          initval="0x00"
-                          name="DAC0REF"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="DAC0 Reference" initval="0x00" name="DAC0REF" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="AC Reference"
-                          initval="0x00"
-                          name="ACREF"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="AC Reference" initval="0x00" name="ACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
             </register-group>
@@ -6517,33 +2855,12 @@
         </module>
         <module caption="Watch-Dog Timer" id="wdt_windowed_v2" name="WDT">
             <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="WDT_PERIOD"/>
-                    <bitfield caption="Window"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="WDT_WINDOW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x0F" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xF0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Syncronization busy"
-                              mask="0x01"
-                              name="SYNCBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY" rw="R"/>
                     <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
                 </register>
             </register-group>
@@ -6578,60 +2895,25 @@
         </module>
         <module caption="Zero Cross Detect" id="cmp_zxover_ctrl_v3" name="ZCD">
             <register-group caption="Zero Cross Detect" name="ZCD" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Invert signal from pin"
-                              mask="0x08"
-                              name="INVERT"
-                              rw="RW"/>
+                    <bitfield caption="Invert signal from pin" mask="0x08" name="INVERT" rw="RW"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x03"
-                              name="INTMODE"
-                              rw="RW"
-                              values="ZCD_INTMODE"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x03" name="INTMODE" rw="RW" values="ZCD_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="ZCD Interrupt Flag" mask="0x01" name="CROSSIF" rw="RW"/>
-                    <bitfield caption="ZCD State"
-                              mask="0x10"
-                              name="STATE"
-                              rw="R"
-                              values="ZCD_STATE"/>
+                    <bitfield caption="ZCD State" mask="0x10" name="STATE" rw="R" values="ZCD_STATE"/>
                 </register>
             </register-group>
             <value-group caption="Interrupt Mode select" name="ZCD_INTMODE">
                 <value caption="No interrupt" name="NONE" value="0x0"/>
-                <value caption="Interrupt on rising input signal"
-                       name="RISING"
-                       value="0x1"/>
-                <value caption="Interrupt on falling input signal"
-                       name="FALLING"
-                       value="0x2"/>
-                <value caption="Interrupt on both rising and falling input signal"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Interrupt on rising input signal" name="RISING" value="0x1"/>
+                <value caption="Interrupt on falling input signal" name="FALLING" value="0x2"/>
+                <value caption="Interrupt on both rising and falling input signal" name="BOTH" value="0x3"/>
             </value-group>
             <value-group caption="ZCD State select" name="ZCD_STATE">
                 <value caption="Output is 0" name="LOW" value="0x0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD20.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD20.xml
index 95105dcb..f1f35f01 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD20.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD20.xml
@@ -1,124 +1,41 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR32DD20"
-                 package="QFN20"
-                 pinout="QFN20MVIO"
-                 speedmax="32000000"
-                 tempmax="125"
-                 tempmin="-40"
-                 vccmax="5.5"
-                 vccmin="1.8"/>
+        <variant ordercode="AVR32DD20" package="QFN20" pinout="QFN20MVIO" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR32DD20" family="AVR8" architecture="AVR8X" avr-family="AVR DD">
         <address-spaces>
-            <address-space endianness="little"
-                           id="data"
-                           name="data"
-                           size="0x10000"
-                           start="0x0000">
-                <memory-segment exec="0"
-                                name="IO"
-                                rw="RW"
-                                size="0x103F"
-                                start="0x00"
-                                type="io"/>
-                <memory-segment exec="0"
-                                name="LOCKBITS"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x04"
-                                start="0x1040"
-                                type="lockbits"/>
-                <memory-segment exec="0"
-                                name="FUSES"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x10"
-                                start="0x1050"
-                                type="fuses"/>
-                <memory-segment exec="0"
-                                name="USER_SIGNATURES"
-                                pagesize="0x20"
-                                rw="RW"
-                                size="0x20"
-                                start="0x1080"
-                                type="user_signatures"/>
-                <memory-segment exec="0"
-                                name="SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x03"
-                                start="0x1100"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="PROD_SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x7D"
-                                start="0x1103"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="EEPROM"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x100"
-                                start="0x1400"
-                                type="eeprom"/>
-                <memory-segment exec="0"
-                                name="INTERNAL_SRAM"
-                                rw="RW"
-                                size="0x1000"
-                                start="0x7000"
-                                type="ram"/>
-                <memory-segment exec="0"
-                                name="MAPPED_PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x8000"
-                                start="0x8000"
-                                type="other"/>
+            <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+                <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00" type="io"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x04" start="0x1040" type="lockbits"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x1050" type="fuses"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x1080" type="user_signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x03" start="0x1100" type="signatures"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x1103" type="signatures"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x100" start="0x1400" type="eeprom"/>
+                <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1000" start="0x7000" type="ram"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x8000" type="other"/>
             </address-space>
-            <address-space endianness="little"
-                           id="prog"
-                           name="prog"
-                           size="0x8000"
-                           start="0x0000">
-                <memory-segment exec="1"
-                                name="PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x8000"
-                                start="0x00"
-                                type="flash"/>
+            <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
             <module id="cmp_control_v8" name="AC">
                 <instance name="AC0">
-                    <register-group address-space="data"
-                                    name="AC0"
-                                    name-in-module="AC"
-                                    offset="0x0680"/>
+                    <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
                     <signals>
                         <signal function="AC0" group="N" index="2" pad="PD7"/>
                         <signal function="AC0" group="N" index="3" pad="PC2"/>
                         <signal function="AC0" group="P" index="3" pad="PD6"/>
                         <signal function="AC0" group="P" index="4" pad="PC3"/>
-                        <signal field="PORTMUX.ACROUTEA.AC0"
-                                function="AC0"
-                                group="OUT"
-                                index="0"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ACROUTEA.AC0" function="AC0" group="OUT" index="0" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
             <module id="adc_12b_diff_ctrl_v1" name="ADC">
                 <instance name="ADC0">
-                    <register-group address-space="data"
-                                    name="ADC0"
-                                    name-in-module="ADC"
-                                    offset="0x0600"/>
+                    <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
                     <signals>
                         <signal function="AIN0" group="AIN" index="4" pad="PD4"/>
                         <signal function="AIN0" group="AIN" index="5" pad="PD5"/>
@@ -138,98 +55,33 @@
             </module>
             <module id="bor_lvd_ctrl_v1" name="BOD">
                 <instance name="BOD">
-                    <register-group address-space="data"
-                                    name="BOD"
-                                    name-in-module="BOD"
-                                    offset="0x00A0"/>
+                    <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x00A0"/>
                 </instance>
             </module>
             <module id="cla_ccl_v1" name="CCL">
                 <instance name="CCL">
-                    <register-group address-space="data"
-                                    name="CCL"
-                                    name-in-module="CCL"
-                                    offset="0x01C0"/>
+                    <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
                     <signals>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_OUT"
-                                index="0"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_OUT"
-                                index="0"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_OUT"
-                                index="0"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_OUT"
-                                index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_OUT" index="0" pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0" pad="PD6"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="CLKCTRL">
                 <instance name="CLKCTRL">
-                    <register-group address-space="data"
-                                    name="CLKCTRL"
-                                    name-in-module="CLKCTRL"
-                                    offset="0x0060"/>
+                    <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
                     <signals>
                         <signal function="CLKCTRL" group="CLKOUT" pad="PA7"/>
                         <signal function="CLKCTRL" group="EXTCLK" pad="PA0"/>
@@ -242,10 +94,7 @@
             </module>
             <module id="cpu_avr_xt_v1" name="CPU">
                 <instance name="CPU">
-                    <register-group address-space="data"
-                                    name="CPU"
-                                    name-in-module="CPU"
-                                    offset="0x0030"/>
+                    <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V4S"/>
                     </parameters>
@@ -253,26 +102,17 @@
             </module>
             <module id="int_8bit_v3" name="CPUINT">
                 <instance name="CPUINT">
-                    <register-group address-space="data"
-                                    name="CPUINT"
-                                    name-in-module="CPUINT"
-                                    offset="0x0110"/>
+                    <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
                 </instance>
             </module>
             <module id="math_pdi_crc_v1" name="CRCSCAN">
                 <instance name="CRCSCAN">
-                    <register-group address-space="data"
-                                    name="CRCSCAN"
-                                    name-in-module="CRCSCAN"
-                                    offset="0x0120"/>
+                    <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
                 </instance>
             </module>
             <module id="dac_nbit_ctrl_v5" name="DAC">
                 <instance name="DAC0">
-                    <register-group address-space="data"
-                                    name="DAC0"
-                                    name-in-module="DAC"
-                                    offset="0x06A0"/>
+                    <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
                     <signals>
                         <signal function="DAC0" group="OUT" index="0" pad="PD6"/>
                     </signals>
@@ -280,85 +120,44 @@
             </module>
             <module id="avrdd" name="EVSYS">
                 <instance name="EVSYS">
-                    <register-group address-space="data"
-                                    name="EVSYS"
-                                    name-in-module="EVSYS"
-                                    offset="0x0200"/>
+                    <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="5"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT1" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="FUSE">
                 <instance name="FUSE">
-                    <register-group address-space="data"
-                                    name="FUSE"
-                                    name-in-module="FUSE"
-                                    offset="0x1050"/>
+                    <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1050"/>
                 </instance>
             </module>
             <module id="avrdd" name="GPR">
                 <instance name="GPR">
-                    <register-group address-space="data"
-                                    name="GPR"
-                                    name-in-module="GPR"
-                                    offset="0x001C"/>
+                    <register-group address-space="data" name="GPR" name-in-module="GPR" offset="0x001C"/>
                 </instance>
             </module>
             <module id="avrdd" name="LOCK">
                 <instance name="LOCK">
-                    <register-group address-space="data"
-                                    name="LOCK"
-                                    name-in-module="LOCK"
-                                    offset="0x1040"/>
+                    <register-group address-space="data" name="LOCK" name-in-module="LOCK" offset="0x1040"/>
                 </instance>
             </module>
             <module id="io_multiv_ctrl_avr_v1" name="MVIO">
                 <instance name="MVIO">
-                    <register-group address-space="data"
-                                    name="MVIO"
-                                    name-in-module="MVIO"
-                                    offset="0x00C0"/>
+                    <register-group address-space="data" name="MVIO" name-in-module="MVIO" offset="0x00C0"/>
                 </instance>
             </module>
             <module id="nvm_ctrl_avr_v1" name="NVMCTRL">
                 <instance name="NVMCTRL">
-                    <register-group address-space="data"
-                                    name="NVMCTRL"
-                                    name-in-module="NVMCTRL"
-                                    offset="0x1000"/>
+                    <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_port" name="PORT">
                 <instance name="PORTA">
-                    <register-group address-space="data"
-                                    name="PORTA"
-                                    name-in-module="PORT"
-                                    offset="0x0400"/>
+                    <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
@@ -371,10 +170,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC">
-                    <register-group address-space="data"
-                                    name="PORTC"
-                                    name-in-module="PORT"
-                                    offset="0x0440"/>
+                    <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
                         <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
@@ -382,10 +178,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD">
-                    <register-group address-space="data"
-                                    name="PORTD"
-                                    name-in-module="PORT"
-                                    offset="0x0460"/>
+                    <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
                         <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
@@ -394,10 +187,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF">
-                    <register-group address-space="data"
-                                    name="PORTF"
-                                    name-in-module="PORT"
-                                    offset="0x04A0"/>
+                    <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="6" pad="PF6"/>
                         <signal function="IOPORT" group="PIN" index="7" pad="PF7"/>
@@ -406,18 +196,12 @@
             </module>
             <module id="avrdd" name="PORTMUX">
                 <instance name="PORTMUX">
-                    <register-group address-space="data"
-                                    name="PORTMUX"
-                                    name-in-module="PORTMUX"
-                                    offset="0x05E0"/>
+                    <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
                 </instance>
             </module>
             <module id="rst_integration_v8" name="RSTCTRL">
                 <instance name="RSTCTRL">
-                    <register-group address-space="data"
-                                    name="RSTCTRL"
-                                    name-in-module="RSTCTRL"
-                                    offset="0x0040"/>
+                    <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
                     <signals>
                         <signal function="OTHER" group="RESET" pad="PF6"/>
                     </signals>
@@ -425,494 +209,187 @@
             </module>
             <module id="tmr_16b_rtc_v1" name="RTC">
                 <instance name="RTC">
-                    <register-group address-space="data"
-                                    name="RTC"
-                                    name-in-module="RTC"
-                                    offset="0x0140"/>
+                    <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
                 </instance>
             </module>
             <module id="avrdd" name="SIGROW">
                 <instance name="SIGROW">
-                    <register-group address-space="data"
-                                    name="SIGROW"
-                                    name-in-module="SIGROW"
-                                    offset="0x1100"/>
+                    <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
                 </instance>
             </module>
             <module id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
                 <instance name="SLPCTRL">
-                    <register-group address-space="data"
-                                    name="SLPCTRL"
-                                    name-in-module="SLPCTRL"
-                                    offset="0x0050"/>
+                    <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
                 </instance>
             </module>
             <module id="spi_8bit_v2" name="SPI">
                 <instance name="SPI0">
-                    <register-group address-space="data"
-                                    name="SPI0"
-                                    name-in-module="SPI"
-                                    offset="0x0940"/>
+                    <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0940"/>
                     <signals>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="MISO"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="MOSI"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="SCK"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="SS"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MISO"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MOSI"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="SS"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MISO"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MOSI"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SS"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="MISO"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SS"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MISO"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MOSI"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SCK"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SS"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="MISO" pad="PA5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="MOSI" pad="PA4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="SCK" pad="PA6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="SS" pad="PA7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MISO" pad="PA1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MOSI" pad="PA0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="SS" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MISO" pad="PD5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MOSI" pad="PD4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SCK" pad="PD6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SS" pad="PD7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="MISO" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SCK" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SS" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MISO" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MOSI" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SCK" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SS" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="SYSCFG">
                 <instance name="SYSCFG">
-                    <register-group address-space="data"
-                                    name="SYSCFG"
-                                    name-in-module="SYSCFG"
-                                    offset="0x0F00"/>
+                    <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
                 </instance>
             </module>
             <module id="tmr_16b_pwm_v1" name="TCA">
                 <instance name="TCA0">
-                    <register-group address-space="data"
-                                    name="TCA0"
-                                    name-in-module="TCA"
-                                    offset="0x0A00"/>
+                    <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
                     <signals>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="3"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="4"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="5"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="3"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="4"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="5"
-                                pad="PD5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="3" pad="PA3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="4" pad="PA4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="5" pad="PA5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="3" pad="PC3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="4" pad="PD4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="5" pad="PD5"/>
                     </signals>
                 </instance>
             </module>
             <module id="tmr_16b_capture_v1" name="TCB">
                 <instance name="TCB0">
-                    <register-group address-space="data"
-                                    name="TCB0"
-                                    name-in-module="TCB"
-                                    offset="0x0B00"/>
+                    <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0B00"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB0"
-                                function="TCB0"
-                                group="WO"
-                                index="0"
-                                pad="PA2"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA2"/>
                     </signals>
                 </instance>
                 <instance name="TCB1">
-                    <register-group address-space="data"
-                                    name="TCB1"
-                                    name-in-module="TCB"
-                                    offset="0x0B10"/>
+                    <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0B10"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB1"
-                                function="TCB1"
-                                group="WO"
-                                index="0"
-                                pad="PA3"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
                     </signals>
                 </instance>
                 <instance name="TCB2">
-                    <register-group address-space="data"
-                                    name="TCB2"
-                                    name-in-module="TCB"
-                                    offset="0x0B20"/>
+                    <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0B20"/>
                 </instance>
             </module>
             <module id="tmr_12b_psc_v1" name="TCD">
                 <instance name="TCD0">
-                    <register-group address-space="data"
-                                    name="TCD0"
-                                    name-in-module="TCD"
-                                    offset="0x0B80"/>
+                    <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0B80"/>
                     <signals>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOA"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOB"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOC"
-                                index="2"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOD"
-                                index="3"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOA"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOB"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOC"
-                                index="2"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOD"
-                                index="3"
-                                pad="PD5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOA" pad="PA4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOB" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2" pad="PD4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3" pad="PD5"/>
                     </signals>
                 </instance>
             </module>
             <module id="i2c_8bit_avr_v3" name="TWI">
                 <instance name="TWI0">
-                    <register-group address-space="data"
-                                    name="TWI0"
-                                    name-in-module="TWI"
-                                    offset="0x0900"/>
+                    <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0900"/>
                     <signals>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT1"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT1"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SCL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SDA"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SDA_DUAL" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT1" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT1" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SCL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SDA" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL" pad="PA1"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA" pad="PA0"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA_DUAL" pad="PC2"/>
                     </signals>
                 </instance>
             </module>
             <module id="uart_autobd_v4" name="USART">
                 <instance name="USART0">
-                    <register-group address-space="data"
-                                    name="USART0"
-                                    name-in-module="USART"
-                                    offset="0x0800"/>
+                    <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="RXD"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="TXD"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="XCK"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="XDIR"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="RXD"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="TXD"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="XCK"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="XDIR"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT2"
-                                group="RXD"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT2"
-                                group="TXD"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="RXD"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="TXD"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XDIR"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="RXD"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="TXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="XCK"
-                                pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="RXD" pad="PA5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="TXD" pad="PA4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="XCK" pad="PA6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="XDIR" pad="PA7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT2" group="RXD" pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT2" group="TXD" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="RXD" pad="PD5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="TXD" pad="PD4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XCK" pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XDIR" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="RXD" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="TXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="XCK" pad="PC3"/>
                     </signals>
                 </instance>
                 <instance name="USART1">
-                    <register-group address-space="data"
-                                    name="USART1"
-                                    name-in-module="USART"
-                                    offset="0x0820"/>
+                    <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="RXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XDIR"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="RXD"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="TXD"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="RXD" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="TXD" pad="PD6"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="USERROW">
                 <instance name="USERROW">
-                    <register-group address-space="data"
-                                    name="USERROW"
-                                    name-in-module="USERROW"
-                                    offset="0x1080"/>
+                    <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1080"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_vport" name="VPORT">
                 <instance name="VPORTA">
-                    <register-group address-space="data"
-                                    name="VPORTA"
-                                    name-in-module="VPORT"
-                                    offset="0x0000"/>
+                    <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
                 </instance>
                 <instance name="VPORTC">
-                    <register-group address-space="data"
-                                    name="VPORTC"
-                                    name-in-module="VPORT"
-                                    offset="0x0008"/>
+                    <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
                 </instance>
                 <instance name="VPORTD">
-                    <register-group address-space="data"
-                                    name="VPORTD"
-                                    name-in-module="VPORT"
-                                    offset="0x000C"/>
+                    <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
                 </instance>
                 <instance name="VPORTF">
-                    <register-group address-space="data"
-                                    name="VPORTF"
-                                    name-in-module="VPORT"
-                                    offset="0x0014"/>
+                    <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
                 </instance>
             </module>
             <module id="avrdd" name="VREF">
                 <instance name="VREF">
-                    <register-group address-space="data"
-                                    name="VREF"
-                                    name-in-module="VREF"
-                                    offset="0x00B0"/>
+                    <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00B0"/>
                 </instance>
             </module>
             <module id="wdt_windowed_v2" name="WDT">
                 <instance name="WDT">
-                    <register-group address-space="data"
-                                    name="WDT"
-                                    name-in-module="WDT"
-                                    offset="0x0100"/>
+                    <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
                 </instance>
             </module>
             <module id="cmp_zxover_ctrl_v3" name="ZCD">
                 <instance name="ZCD3">
-                    <register-group address-space="data"
-                                    name="ZCD3"
-                                    name-in-module="ZCD"
-                                    offset="0x06D8"/>
+                    <register-group address-space="data" name="ZCD3" name-in-module="ZCD" offset="0x06D8"/>
                     <signals>
-                        <signal field="PORTMUX.ZCDROUTEA.ZCD3"
-                                function="ZCD3"
-                                group="IN"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.ZCDROUTEA.ZCD3"
-                                function="ZCD3"
-                                group="OUT"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ZCDROUTEA.ZCD3" function="ZCD3" group="IN" pad="PC2"/>
+                        <signal field="PORTMUX.ZCDROUTEA.ZCD3" function="ZCD3" group="OUT" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
@@ -984,90 +461,31 @@
     <modules>
         <module caption="Analog Comparator" id="cmp_control_v8" name="AC">
             <register-group caption="Analog Comparator" name="AC" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Hysteresis Mode"
-                              mask="0x06"
-                              name="HYSMODE"
-                              rw="RW"
-                              values="AC_HYSMODE"/>
-                    <bitfield caption="Power profile"
-                              mask="0x18"
-                              name="POWER"
-                              rw="RW"
-                              values="AC_POWER"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Power profile" mask="0x18" name="POWER" rw="RW" values="AC_POWER"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Mux Control A"
-                          initval="0x00"
-                          name="MUXCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input MUX Selection"
-                              mask="0x07"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection"
-                              mask="0x38"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="AC_MUXPOS"/>
-                    <bitfield caption="AC Output Initial Value"
-                              mask="0x40"
-                              name="INITVAL"
-                              rw="RW"
-                              values="AC_INITVAL"/>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Negative Input MUX Selection" mask="0x07" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+                    <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
                 </register>
-                <register caption="DAC Voltage Reference"
-                          initval="0xFF"
-                          name="DACREF"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="DAC Voltage Reference" initval="0xFF" name="DACREF" offset="0x5" rw="RW" size="1">
                     <bitfield caption="DACREF" mask="0xFF" name="DACREF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="WINSEL" value="0x00"/>
                     <mode name="WINDOW" qualifier="WINSEL" value="0x01 0x02"/>
                     <bitfield caption="Interrupt Enable" mask="0x01" name="CMP" rw="RW"/>
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="INTMODE"
-                              rw="RW"
-                              values="AC_NORMAL_INTMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" modes="NORMAL" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Comparator Interrupt Flag"
-                              mask="0x01"
-                              name="CMPIF"
-                              rw="RW"/>
-                    <bitfield caption="Analog Comparator State"
-                              mask="0x10"
-                              name="CMPSTATE"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x01" name="CMPIF" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -1077,23 +495,15 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption"
-                       name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
                 <value caption="Power profile 3" name="PROFILE3" value="0x3"/>
             </value-group>
             <value-group caption="Interrupt Mode select" name="AC_NORMAL_INTMODE">
-                <value caption="Positive and negative inputs crosses"
-                       name="BOTHEDGE"
-                       value="0x0"/>
-                <value caption="Positive input goes below negative input"
-                       name="NEGEDGE"
-                       value="0x2"/>
-                <value caption="Positive input goes above negative input"
-                       name="POSEDGE"
-                       value="0x3"/>
+                <value caption="Positive and negative inputs crosses" name="BOTHEDGE" value="0x0"/>
+                <value caption="Positive input goes below negative input" name="NEGEDGE" value="0x2"/>
+                <value caption="Positive input goes above negative input" name="POSEDGE" value="0x3"/>
             </value-group>
             <value-group caption="AC Output Initial Value select" name="AC_INITVAL">
                 <value caption="Output initialized to 0" name="LOW" value="0x0"/>
@@ -1111,194 +521,62 @@
                 <value caption="Positive Pin 4" name="AINP4" value="0x04"/>
             </value-group>
         </module>
-        <module caption="Analog to Digital Converter"
-                id="adc_12b_diff_ctrl_v1"
-                name="ADC">
+        <module caption="Analog to Digital Converter" id="adc_12b_diff_ctrl_v1" name="ADC">
             <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="ADC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Free running mode" mask="0x02" name="FREERUN" rw="RW"/>
-                    <bitfield caption="Resolution selection"
-                              mask="0x0C"
-                              name="RESSEL"
-                              rw="RW"
-                              values="ADC_RESSEL"/>
+                    <bitfield caption="Resolution selection" mask="0x0C" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
                     <bitfield caption="Left adjust result" mask="0x10" name="LEFTADJ" rw="RW"/>
-                    <bitfield caption="Conversion mode"
-                              mask="0x20"
-                              name="CONVMODE"
-                              rw="RW"
-                              values="ADC_CONVMODE"/>
+                    <bitfield caption="Conversion mode" mask="0x20" name="CONVMODE" rw="RW" values="ADC_CONVMODE"/>
                     <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Accumulation Samples"
-                              mask="0x07"
-                              name="SAMPNUM"
-                              rw="RW"
-                              values="ADC_SAMPNUM"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x07" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Pre-scaler"
-                              mask="0x0F"
-                              name="PRESC"
-                              rw="RW"
-                              values="ADC_PRESC"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x0F" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sampling Delay Selection"
-                              mask="0x0F"
-                              name="SAMPDLY"
-                              rw="RW"
-                              values="ADC_SAMPDLY"/>
-                    <bitfield caption="Initial Delay Selection"
-                              mask="0xE0"
-                              name="INITDLY"
-                              rw="RW"
-                              values="ADC_INITDLY"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Sampling Delay Selection" mask="0x0F" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xE0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Window Comparator Mode"
-                              mask="0x07"
-                              name="WINCM"
-                              rw="RW"
-                              values="ADC_WINCM"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x07" name="WINCM" rw="RW" values="ADC_WINCM"/>
                 </register>
-                <register caption="Sample Control"
-                          initval="0x00"
-                          name="SAMPCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Sample lenght" mask="0xFF" name="SAMPLEN" rw="RW"/>
                 </register>
-                <register caption="Positive mux input"
-                          initval="0x00"
-                          name="MUXPOS"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="ADC_MUXPOS"/>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
-                <register caption="Negative mux input"
-                          initval="0x00"
-                          name="MUXNEG"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="ADC_MUXNEG"/>
+                <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
-                <register caption="Command"
-                          initval="0x00"
-                          name="COMMAND"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Start Conversion" mask="0x01" name="STCONV" rw="RW"/>
                     <bitfield caption="Stop Conversion" mask="0x02" name="SPCONV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Start Event Input Enable"
-                              mask="0x01"
-                              name="STARTEI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x01" name="STARTEI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Result Ready Interrupt Enable"
-                              mask="0x01"
-                              name="RESRDY"
-                              rw="RW"/>
-                    <bitfield caption="Window Comparator Interrupt Enable"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x01" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
                     <bitfield caption="Result Ready Flag" mask="0x01" name="RESRDY" rw="RW"/>
-                    <bitfield caption="Window Comparator Flag"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Data"
-                          initval="0x00"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Temporary" mask="0xFF" name="TEMP" rw="RW"/>
                 </register>
-                <register caption="ADC Accumulator Result"
-                          name="RES"
-                          offset="0x10"
-                          rw="R"
-                          size="2"/>
-                <register caption="Window comparator low threshold"
-                          name="WINLT"
-                          offset="0x12"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Window comparator high threshold"
-                          name="WINHT"
-                          offset="0x14"
-                          rw="RW"
-                          size="2"/>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Conversion mode select" name="ADC_CONVMODE">
                 <value caption="Single-Ended mode" name="SINGLEENDED" value="0x0"/>
@@ -1428,99 +706,33 @@
         </module>
         <module caption="Bod interface" id="bor_lvd_ctrl_v1" name="BOD">
             <register-group caption="Bod interface" name="BOD" size="0x10">
-                <register caption="Control A"
-                          initval="0x01"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Operation in sleep mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="BOD_SLEEP"/>
-                    <bitfield caption="Operation in active mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="R"
-                              values="BOD_ACTIVE"/>
-                    <bitfield caption="Sample frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="R"
-                              values="BOD_SAMPFREQ"/>
+                <register caption="Control A" initval="0x01" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in sleep mode" mask="0x03" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                    <bitfield caption="Operation in active mode" mask="0x0C" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bod level"
-                              mask="0x07"
-                              name="LVL"
-                              rw="R"
-                              values="BOD_LVL"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x07" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor Control"
-                          initval="0x00"
-                          name="VLMCTRLA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level"
-                              mask="0x03"
-                              name="VLMLVL"
-                              rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x03" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor interrrupt enable"
-                              mask="0x01"
-                              name="VLMIE"
-                              rw="RW"/>
-                    <bitfield caption="Configuration"
-                              mask="0x06"
-                              name="VLMCFG"
-                              rw="RW"
-                              values="BOD_VLMCFG"/>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x01" name="VLMIE" rw="RW"/>
+                    <bitfield caption="Configuration" mask="0x06" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor interrupt flag"
-                              mask="0x01"
-                              name="VLMIF"
-                              rw="RW"/>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x01" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor status"
-                              mask="0x01"
-                              name="VLMS"
-                              rw="R"
-                              values="BOD_VLMS"/>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x01" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
                 <value caption="Disabled" name="DIS" value="0x00"/>
                 <value caption="Enabled" name="ENABLED" value="0x01"/>
                 <value caption="Sampled" name="SAMPLED" value="0x02"/>
-                <value caption="Enabled with wake-up halted until BOD is ready"
-                       name="ENWAKE"
-                       value="0x03"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
             </value-group>
             <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
                 <value caption="128Hz sampling frequency" name="128HZ" value="0x0"/>
@@ -1543,338 +755,103 @@
                 <value caption="VDD crosses VLM threshold" name="BOTH" value="0x02"/>
             </value-group>
             <value-group caption="Voltage level monitor status select" name="BOD_VLMS">
-                <value caption="The voltage is above the VLM threshold level"
-                       name="ABOVE"
-                       value="0x0"/>
-                <value caption="The voltage is below the VLM threshold level"
-                       name="BELOW"
-                       value="0x1"/>
+                <value caption="The voltage is above the VLM threshold level" name="ABOVE" value="0x0"/>
+                <value caption="The voltage is below the VLM threshold level" name="BELOW" value="0x1"/>
             </value-group>
             <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
                 <value caption="VLM Disabled" name="OFF" value="0x0"/>
-                <value caption="VLM threshold 5% above BOD level"
-                       name="5ABOVE"
-                       value="0x1"/>
-                <value caption="VLM threshold 15% above BOD level"
-                       name="15ABOVE"
-                       value="0x2"/>
-                <value caption="VLM threshold 25% above BOD level"
-                       name="25ABOVE"
-                       value="0x3"/>
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x1"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x2"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x3"/>
             </value-group>
         </module>
         <module caption="Configurable Custom Logic" id="cla_ccl_v1" name="CCL">
             <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Sequential Control 0"
-                          initval="0x00"
-                          name="SEQCTRL0"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Sequential Control 1"
-                          initval="0x00"
-                          name="SEQCTRL1"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Interrupt Control 0"
-                          initval="0x00"
-                          name="INTCTRL0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode for LUT0"
-                              mask="0x03"
-                              name="INTMODE0"
-                              rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1"
-                              mask="0x0C"
-                              name="INTMODE1"
-                              rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2"
-                              mask="0x30"
-                              name="INTMODE2"
-                              rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3"
-                              mask="0xC0"
-                              name="INTMODE3"
-                              rw="RW"
-                              values="CCL_INTMODE3"/>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x03" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0x0C" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xC0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x0F" name="INT" rw="RW"/>
                 </register>
-                <register caption="LUT 0 Control A"
-                          initval="0x00"
-                          name="LUT0CTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 0 Control A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 0 Control B"
-                          initval="0x00"
-                          name="LUT0CTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 0 Control C"
-                          initval="0x00"
-                          name="LUT0CTRLC"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 0"
-                          initval="0x00"
-                          name="TRUTH0"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 1 Control A"
-                          initval="0x00"
-                          name="LUT1CTRLA"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 1 Control A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 1 Control B"
-                          initval="0x00"
-                          name="LUT1CTRLB"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 1 Control C"
-                          initval="0x00"
-                          name="LUT1CTRLC"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 1"
-                          initval="0x00"
-                          name="TRUTH1"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 2 Control A"
-                          initval="0x00"
-                          name="LUT2CTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 2 Control A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 2 Control B"
-                          initval="0x00"
-                          name="LUT2CTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 2 Control C"
-                          initval="0x00"
-                          name="LUT2CTRLC"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 2"
-                          initval="0x00"
-                          name="TRUTH2"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 3 Control A"
-                          initval="0x00"
-                          name="LUT3CTRLA"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 3 Control A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 3 Control B"
-                          initval="0x00"
-                          name="LUT3CTRLB"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 3 Control C"
-                          initval="0x00"
-                          name="LUT3CTRLC"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 3"
-                          initval="0x00"
-                          name="TRUTH3"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
             </register-group>
@@ -1905,13 +882,9 @@
             <value-group caption="Clock Source Selection" name="CCL_CLKSRC">
                 <value caption="Peripheral Clock" name="CLKPER" value="0x0"/>
                 <value caption="Selection by INSEL2" name="IN2" value="0x1"/>
-                <value caption="Internal High-Frequency Oscillator"
-                       name="OSCHF"
-                       value="0x4"/>
+                <value caption="Internal High-Frequency Oscillator" name="OSCHF" value="0x4"/>
                 <value caption="32.768 kHz oscillator" name="OSC32K" value="0x5"/>
-                <value caption="32.768 kHz oscillator divided by 32"
-                       name="OSC1K"
-                       value="0x6"/>
+                <value caption="32.768 kHz oscillator divided by 32" name="OSC1K" value="0x6"/>
             </value-group>
             <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
                 <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
@@ -1977,195 +950,67 @@
         </module>
         <module caption="Clock controller" id="avrdd" name="CLKCTRL">
             <register-group caption="Clock controller" name="CLKCTRL" size="0x40">
-                <register caption="MCLK Control A"
-                          initval="0x00"
-                          name="MCLKCTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="CLKCTRL_CLKSEL"/>
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock select" mask="0x07" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
                     <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
                 </register>
-                <register caption="MCLK Control B"
-                          initval="0x00"
-                          name="MCLKCTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Prescaler enable" mask="0x01" name="PEN" rw="RW"/>
-                    <bitfield caption="Prescaler division"
-                              mask="0x1E"
-                              name="PDIV"
-                              rw="RW"
-                              values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler division" mask="0x1E" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
                 </register>
-                <register caption="MCLK Control C"
-                          initval="0x00"
-                          name="MCLKCTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Enable"
-                              mask="0x01"
-                              name="CFDEN"
-                              rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Test"
-                              mask="0x02"
-                              name="CFDTST"
-                              rw="W"/>
-                    <bitfield caption="Clock Failure Detect Source"
-                              mask="0x0C"
-                              name="CFDSRC"
-                              rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Enable" mask="0x01" name="CFDEN" rw="RW"/>
+                    <bitfield caption="Clock Failure Detect Test" mask="0x02" name="CFDTST" rw="W"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0x0C" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                 </register>
-                <register caption="MCLK Interrupt Control"
-                          initval="0x00"
-                          name="MCLKINTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Enable"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt type"
-                              mask="0x80"
-                              name="INTTYPE"
-                              rw="RW"
-                              values="CLKCTRL_INTTYPE"/>
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x01" name="CFD" rw="RW"/>
+                    <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags"
-                          initval="0x00"
-                          name="MCLKINTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Flag"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x01" name="CFD" rw="RW"/>
                 </register>
-                <register caption="MCLK Status"
-                          initval="0x00"
-                          name="MCLKSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="System Oscillator changing"
-                              mask="0x01"
-                              name="SOSC"
-                              rw="RW"/>
-                    <bitfield caption="High frequency oscillator status"
-                              mask="0x02"
-                              name="OSCHFS"
-                              rw="RW"/>
-                    <bitfield caption="32KHz oscillator status"
-                              mask="0x04"
-                              name="OSC32KS"
-                              rw="RW"/>
-                    <bitfield caption="32.768 kHz Crystal Oscillator status"
-                              mask="0x08"
-                              name="XOSC32KS"
-                              rw="RW"/>
+                <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="System Oscillator changing" mask="0x01" name="SOSC" rw="RW"/>
+                    <bitfield caption="High frequency oscillator status" mask="0x02" name="OSCHFS" rw="RW"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x04" name="OSC32KS" rw="RW"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x08" name="XOSC32KS" rw="RW"/>
                     <bitfield caption="External Clock status" mask="0x10" name="EXTS" rw="RW"/>
                     <bitfield caption="PLL oscillator status" mask="0x20" name="PLLS" rw="RW"/>
                 </register>
-                <register caption="OSCHF Control A"
-                          initval="0x0C"
-                          name="OSCHFCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Control A" initval="0x0C" name="OSCHFCTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="Autotune" mask="0x01" name="AUTOTUNE" rw="RW"/>
-                    <bitfield caption="Frequency select"
-                              mask="0x3C"
-                              name="FRQSEL"
-                              rw="RW"
-                              values="CLKCTRL_FRQSEL"/>
+                    <bitfield caption="Frequency select" mask="0x3C" name="FRQSEL" rw="RW" values="CLKCTRL_FRQSEL"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSCHF Tune"
-                          name="OSCHFTUNE"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Tune" name="OSCHFTUNE" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Tune" mask="0xFF" name="TUNE" rw="RW"/>
                 </register>
-                <register caption="PLL Control A"
-                          name="PLLCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multiplication factor"
-                              mask="0x03"
-                              name="MULFAC"
-                              rw="RW"
-                              values="CLKCTRL_MULFAC"/>
-                    <bitfield caption="Source"
-                              mask="0x40"
-                              name="SOURCE"
-                              rw="RW"
-                              values="CLKCTRL_SOURCE"/>
+                <register caption="PLL Control A" name="PLLCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Multiplication factor" mask="0x03" name="MULFAC" rw="RW" values="CLKCTRL_MULFAC"/>
+                    <bitfield caption="Source" mask="0x40" name="SOURCE" rw="RW" values="CLKCTRL_SOURCE"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSC32K Control A"
-                          initval="0x00"
-                          name="OSC32KCTRLA"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC32K Control A"
-                          initval="0x00"
-                          name="XOSC32KCTRLA"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Low power mode" mask="0x02" name="LPMODE" rw="RW"/>
                     <bitfield caption="Select" mask="0x04" name="SEL" rw="RW"/>
-                    <bitfield caption="Crystal startup time"
-                              mask="0x30"
-                              name="CSUT"
-                              rw="RW"
-                              values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC HF Control A"
-                          initval="0x00"
-                          name="XOSCHFCTRLA"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC HF Control A" initval="0x00" name="XOSCHFCTRLA" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="External Source Select"
-                              mask="0x02"
-                              name="SELHF"
-                              rw="RW"
-                              values="CLKCTRL_SELHF"/>
-                    <bitfield caption="Frequency Range"
-                              mask="0x0C"
-                              name="FRQRANGE"
-                              rw="RW"
-                              values="CLKCTRL_FRQRANGE"/>
-                    <bitfield caption="Start-up Time Select"
-                              mask="0x30"
-                              name="CSUTHF"
-                              rw="RW"
-                              values="CLKCTRL_CSUTHF"/>
+                    <bitfield caption="External Source Select" mask="0x02" name="SELHF" rw="RW" values="CLKCTRL_SELHF"/>
+                    <bitfield caption="Frequency Range" mask="0x0C" name="FRQRANGE" rw="RW" values="CLKCTRL_FRQRANGE"/>
+                    <bitfield caption="Start-up Time Select" mask="0x30" name="CSUTHF" rw="RW" values="CLKCTRL_CSUTHF"/>
                     <bitfield caption="Run Standby" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Clock select" name="CLKCTRL_CLKSEL">
-                <value caption="Internal high-frequency oscillator"
-                       name="OSCHF"
-                       value="0x0"/>
+                <value caption="Internal high-frequency oscillator" name="OSCHF" value="0x0"/>
                 <value caption="Internal 32.768 kHz oscillator" name="OSC32K" value="0x1"/>
                 <value caption="32.768 kHz crystal oscillator" name="XOSC32K" value="0x2"/>
                 <value caption="External clock" name="EXTCLK" value="0x3"/>
@@ -2209,12 +1054,8 @@
                 <value caption="3 x multiplication factor" name="3x" value="0x2"/>
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
-                <value caption="High frequency internal oscillator as PLL source"
-                       name="OSCHF"
-                       value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF"
-                       value="0x1"/>
+                <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -2240,44 +1081,19 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection"
-                          initval="0x00"
-                          name="CCP"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCP signature"
-                              mask="0xFF"
-                              name="CCP"
-                              rw="RW"
-                              values="CPU_CCP"/>
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Stack Pointer"
-                          initval="0x7FFF"
-                          name="SP"
-                          offset="0xD"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Status Register"
-                          initval="0x00"
-                          name="SREG"
-                          offset="0xF"
-                          rw="RW"
-                          size="1">
+                <register caption="Stack Pointer" initval="0x7FFF" name="SP" offset="0xD" rw="RW" size="2"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
                     <bitfield caption="Carry Flag" mask="0x01" name="C" rw="RW"/>
                     <bitfield caption="Zero Flag" mask="0x02" name="Z" rw="RW"/>
                     <bitfield caption="Negative Flag" mask="0x04" name="N" rw="RW"/>
-                    <bitfield caption="Two's Complement Overflow Flag"
-                              mask="0x08"
-                              name="V"
-                              rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V" rw="RW"/>
                     <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
                     <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
                     <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
-                    <bitfield caption="Global Interrupt Enable Flag"
-                              mask="0x80"
-                              name="I"
-                              rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="CCP signature select" name="CPU_CCP">
@@ -2287,530 +1103,157 @@
         </module>
         <module caption="Interrupt Controller" id="int_8bit_v3" name="CPUINT">
             <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Round-robin Scheduling Enable"
-                              mask="0x01"
-                              name="LVL0RR"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x01" name="LVL0RR" rw="RW"/>
                     <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
-                    <bitfield caption="Interrupt Vector Select"
-                              mask="0x40"
-                              name="IVSEL"
-                              rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Level 0 Interrupt Executing"
-                              mask="0x01"
-                              name="LVL0EX"
-                              rw="R"/>
-                    <bitfield caption="Level 1 Interrupt Executing"
-                              mask="0x02"
-                              name="LVL1EX"
-                              rw="R"/>
-                    <bitfield caption="Non-maskable Interrupt Executing"
-                              mask="0x80"
-                              name="NMIEX"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x01" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x02" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority"
-                          initval="0x00"
-                          name="LVL0PRI"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Level Priority"
-                              mask="0xFF"
-                              name="LVL0PRI"
-                              rw="RW"/>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xFF" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector"
-                          initval="0x00"
-                          name="LVL1VEC"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Vector with High Priority"
-                              mask="0xFF"
-                              name="LVL1VEC"
-                              rw="RW"/>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xFF" name="LVL1VEC" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="CRCSCAN" id="math_pdi_crc_v1" name="CRCSCAN">
             <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable CRC scan" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Enable NMI Trigger" mask="0x02" name="NMIEN" rw="RW"/>
                     <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CRC Source"
-                              mask="0x03"
-                              name="SRC"
-                              rw="RW"
-                              values="CRCSCAN_SRC"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x03" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
                 </register>
-                <register caption="Status"
-                          initval="0x02"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="CRC Busy" mask="0x01" name="BUSY" rw="R"/>
                     <bitfield caption="CRC Ok" mask="0x02" name="OK" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="CRC Source select" name="CRCSCAN_SRC">
                 <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
-                <value caption="CRC on boot and appl section of flash"
-                       name="APPLICATION"
-                       value="0x1"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
                 <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
             </value-group>
         </module>
-        <module caption="Digital to Analog Converter"
-                id="dac_nbit_ctrl_v5"
-                name="DAC">
+        <module caption="Digital to Analog Converter" id="dac_nbit_ctrl_v5" name="DAC">
             <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="DAC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="DATA Register"
-                          name="DATA"
-                          offset="0x2"
-                          rw="RW"
-                          size="2">
+                <register caption="DATA Register" name="DATA" offset="0x2" rw="RW" size="2">
                     <bitfield caption="Data" mask="0xFFC0" name="DATA" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Event System" id="avrdd" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Software Event A"
-                          initval="0x00"
-                          name="SWEVENTA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0xFF"
-                              name="SWEVENTA"
-                              rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0xFF" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
-                <register caption="Software Event B"
-                          initval="0x00"
-                          name="SWEVENTB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0x03"
-                              name="SWEVENTB"
-                              rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0x03" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
-                <register caption="Multiplexer Channel 0"
-                          initval="0x00"
-                          name="CHANNEL0"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 0 generator select"
-                              mask="0xFF"
-                              name="CHANNEL0"
-                              rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Channel 0 generator select" mask="0xFF" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
-                <register caption="Multiplexer Channel 1"
-                          initval="0x00"
-                          name="CHANNEL1"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 1 generator select"
-                              mask="0xFF"
-                              name="CHANNEL1"
-                              rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Channel 1 generator select" mask="0xFF" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
-                <register caption="Multiplexer Channel 2"
-                          initval="0x00"
-                          name="CHANNEL2"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 2 generator select"
-                              mask="0xFF"
-                              name="CHANNEL2"
-                              rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Channel 2 generator select" mask="0xFF" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
-                <register caption="Multiplexer Channel 3"
-                          initval="0x00"
-                          name="CHANNEL3"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 3 generator select"
-                              mask="0xFF"
-                              name="CHANNEL3"
-                              rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Channel 3 generator select" mask="0xFF" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
-                <register caption="Multiplexer Channel 4"
-                          initval="0x00"
-                          name="CHANNEL4"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 4 generator select"
-                              mask="0xFF"
-                              name="CHANNEL4"
-                              rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Channel 4 generator select" mask="0xFF" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
-                <register caption="Multiplexer Channel 5"
-                          initval="0x00"
-                          name="CHANNEL5"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 5 generator select"
-                              mask="0xFF"
-                              name="CHANNEL5"
-                              rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Channel 5 generator select" mask="0xFF" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT0A"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT0B"
-                          offset="0x21"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT1A"
-                          offset="0x22"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT1B"
-                          offset="0x23"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT2A"
-                          offset="0x24"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT2B"
-                          offset="0x25"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT3A"
-                          offset="0x26"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT3B"
-                          offset="0x27"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 12 - ADC0"
-                          initval="0x00"
-                          name="USERADC0START"
-                          offset="0x28"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTA"
-                          offset="0x29"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTC"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTD"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTF"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0"
-                          initval="0x00"
-                          name="USERUSART0IRDA"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1"
-                          initval="0x00"
-                          name="USERUSART1IRDA"
-                          offset="0x2E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A"
-                          initval="0x00"
-                          name="USERTCA0CNTA"
-                          offset="0x2F"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B"
-                          initval="0x00"
-                          name="USERTCA0CNTB"
-                          offset="0x30"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A"
-                          initval="0x00"
-                          name="USERTCB0CAPT"
-                          offset="0x31"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B"
-                          initval="0x00"
-                          name="USERTCB0COUNT"
-                          offset="0x32"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A"
-                          initval="0x00"
-                          name="USERTCB1CAPT"
-                          offset="0x33"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B"
-                          initval="0x00"
-                          name="USERTCB1COUNT"
-                          offset="0x34"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A"
-                          initval="0x00"
-                          name="USERTCB2CAPT"
-                          offset="0x35"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B"
-                          initval="0x00"
-                          name="USERTCB2COUNT"
-                          offset="0x36"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A"
-                          initval="0x00"
-                          name="USERTCD0INPUTA"
-                          offset="0x37"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B"
-                          initval="0x00"
-                          name="USERTCD0INPUTB"
-                          offset="0x38"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
             <value-group caption="Channel 0 generator select" name="EVSYS_CHANNEL0">
@@ -2819,30 +1262,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2857,21 +1284,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2889,30 +1306,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2927,21 +1328,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2959,30 +1350,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2996,21 +1371,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3028,30 +1393,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3065,21 +1414,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3097,30 +1436,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3129,21 +1452,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3161,30 +1474,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3193,21 +1490,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3235,149 +1522,48 @@
             </value-group>
             <value-group caption="User channel select" name="EVSYS_USER">
                 <value caption="Off" name="OFF" value="0x0"/>
-                <value caption="Connect user to event channel 0"
-                       name="CHANNEL0"
-                       value="0x1"/>
-                <value caption="Connect user to event channel 1"
-                       name="CHANNEL1"
-                       value="0x2"/>
-                <value caption="Connect user to event channel 2"
-                       name="CHANNEL2"
-                       value="0x3"/>
-                <value caption="Connect user to event channel 3"
-                       name="CHANNEL3"
-                       value="0x4"/>
-                <value caption="Connect user to event channel 4"
-                       name="CHANNEL4"
-                       value="0x5"/>
-                <value caption="Connect user to event channel 5"
-                       name="CHANNEL5"
-                       value="0x6"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
             </value-group>
         </module>
         <module caption="Fuses" id="avrdd" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Watchdog Configuration"
-                          initval="0x00"
-                          name="WDTCFG"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Watchdog Timeout Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="FUSE_WINDOW"/>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
-                <register caption="BOD Configuration"
-                          initval="0x00"
-                          name="BODCFG"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="BOD Operation in Sleep Mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="FUSE_SLEEP"/>
-                    <bitfield caption="BOD Operation in Active Mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="RW"
-                              values="FUSE_ACTIVE"/>
-                    <bitfield caption="BOD Sample Frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Level"
-                              mask="0xE0"
-                              name="LVL"
-                              rw="RW"
-                              values="FUSE_LVL"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x03" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x0C" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Level" mask="0xE0" name="LVL" rw="RW" values="FUSE_LVL"/>
                 </register>
-                <register caption="Oscillator Configuration"
-                          initval="0x00"
-                          name="OSCCFG"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Frequency Select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="FUSE_CLKSEL"/>
+                <register caption="Oscillator Configuration" initval="0x00" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x07" name="CLKSEL" rw="RW" values="FUSE_CLKSEL"/>
                 </register>
-                <register caption="System Configuration 0"
-                          initval="0xD0"
-                          name="SYSCFG0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="System Configuration 0" initval="0xD0" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="EEPROM Save" mask="0x01" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration"
-                              mask="0x08"
-                              name="RSTPINCFG"
-                              rw="RW"
-                              values="FUSE_RSTPINCFG"/>
-                    <bitfield caption="UPDI Pin Configuration"
-                              mask="0x10"
-                              name="UPDIPINCFG"
-                              rw="RW"
-                              values="FUSE_UPDIPINCFG"/>
-                    <bitfield caption="CRC Select"
-                              mask="0x20"
-                              name="CRCSEL"
-                              rw="RW"
-                              values="FUSE_CRCSEL"/>
-                    <bitfield caption="CRC Source"
-                              mask="0xC0"
-                              name="CRCSRC"
-                              rw="RW"
-                              values="FUSE_CRCSRC"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x08" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW" values="FUSE_UPDIPINCFG"/>
+                    <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
+                    <bitfield caption="CRC Source" mask="0xC0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                 </register>
-                <register caption="System Configuration 1"
-                          initval="0x08"
-                          name="SYSCFG1"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Startup Time"
-                              mask="0x07"
-                              name="SUT"
-                              rw="RW"
-                              values="FUSE_SUT"/>
-                    <bitfield caption="MVIO System Configuration"
-                              mask="0x18"
-                              name="MVSYSCFG"
-                              rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x07" name="SUT" rw="RW" values="FUSE_SUT"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                 </register>
-                <register caption="Code Section Size"
-                          initval="0x00"
-                          name="CODESIZE"
-                          offset="0x7"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Boot Section Size"
-                          initval="0x00"
-                          name="BOOTSIZE"
-                          offset="0x8"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
+                <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT"
-                       value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -3403,13 +1589,9 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)"
-                       name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
-                <value caption="CRC of application code and boot sections"
-                       name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -3421,12 +1603,8 @@
                 <value caption="UPDI Mode" name="UPDI" value="0x1"/>
             </value-group>
             <value-group caption="MVIO System Configuration select" name="FUSE_MVSYSCFG">
-                <value caption="Device used in a dual supply configuration"
-                       name="DUAL"
-                       value="0x1"/>
-                <value caption="Device used in a single supply configuration"
-                       name="SINGLE"
-                       value="0x2"/>
+                <value caption="Device used in a dual supply configuration" name="DUAL" value="0x1"/>
+                <value caption="Device used in a single supply configuration" name="SINGLE" value="0x2"/>
             </value-group>
             <value-group caption="Startup Time select" name="FUSE_SUT">
                 <value caption="0 ms" name="0MS" value="0x00"/>
@@ -3469,41 +1647,16 @@
         </module>
         <module caption="General Purpose Registers" id="avrdd" name="GPR">
             <register-group caption="General Purpose Registers" name="GPR" size="0x4">
-                <register caption="General Purpose Register 0"
-                          name="GPR0"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 1"
-                          name="GPR1"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 2"
-                          name="GPR2"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 3"
-                          name="GPR3"
-                          offset="0x3"
-                          rw="RW"
-                          size="1"/>
+                <register caption="General Purpose Register 0" name="GPR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose Register 1" name="GPR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose Register 2" name="GPR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose Register 3" name="GPR3" offset="0x3" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Lockbits" id="avrdd" name="LOCK">
             <register-group caption="Lockbits" name="LOCK" size="0x4">
-                <register caption="Lock Key Bits"
-                          initval="0x5CC5C55C"
-                          name="KEY"
-                          offset="0x0"
-                          rw="RW"
-                          size="4">
-                    <bitfield caption="Lock Key"
-                              mask="0xFFFFFFFF"
-                              name="KEY"
-                              rw="RW"
-                              values="LOCK_KEY"/>
+                <register caption="Lock Key Bits" initval="0x5CC5C55C" name="KEY" offset="0x0" rw="RW" size="4">
+                    <bitfield caption="Lock Key" mask="0xFFFFFFFF" name="KEY" rw="RW" values="LOCK_KEY"/>
                 </register>
             </register-group>
             <value-group caption="Lock Key select" name="LOCK_KEY">
@@ -3513,154 +1666,61 @@
         </module>
         <module caption="Multi-Voltage I/O" id="io_multiv_ctrl_avr_v1" name="MVIO">
             <register-group caption="Multi-Voltage I/O" name="MVIO" size="0x4">
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Enable"
-                              mask="0x01"
-                              name="VDDIO2IE"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Enable" mask="0x01" name="VDDIO2IE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Flag"
-                              mask="0x01"
-                              name="VDDIO2IF"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Flag" mask="0x01" name="VDDIO2IF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="VDDIO2 Status" mask="0x01" name="VDDIO2S" rw="R"/>
                 </register>
             </register-group>
         </module>
-        <module caption="Non-volatile Memory Controller"
-                id="nvm_ctrl_avr_v1"
-                name="NVMCTRL">
+        <module caption="Non-volatile Memory Controller" id="nvm_ctrl_avr_v1" name="NVMCTRL">
             <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x7F"
-                              name="CMD"
-                              rw="RW"
-                              values="NVMCTRL_CMD"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x30"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Application Code Write Protect"
-                              mask="0x01"
-                              name="APPCODEWP"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x30" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Application Code Write Protect" mask="0x01" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x02" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Application Data Write Protect"
-                              mask="0x04"
-                              name="APPDATAWP"
-                              rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space"
-                              mask="0x30"
-                              name="FLMAP"
-                              rw="RW"
-                              values="NVMCTRL_FLMAP"/>
-                    <bitfield caption="Flash Mapping Lock"
-                              mask="0x80"
-                              name="FLMAPLOCK"
-                              rw="RW"/>
+                    <bitfield caption="Application Data Write Protect" mask="0x04" name="APPDATAWP" rw="RW"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x02"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x02" rw="R" size="1">
                     <bitfield caption="Flash busy" mask="0x01" name="FBUSY" rw="R"/>
                     <bitfield caption="EEPROM busy" mask="0x02" name="EEBUSY" rw="R"/>
-                    <bitfield caption="Write error"
-                              mask="0x70"
-                              name="ERROR"
-                              rw="R"
-                              values="NVMCTRL_ERROR"/>
+                    <bitfield caption="Write error" mask="0x70" name="ERROR" rw="R" values="NVMCTRL_ERROR"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
-                <register caption="Address"
-                          name="ADDR"
-                          offset="0x08"
-                          rw="RW"
-                          size="4"/>
+                <register caption="Address" name="ADDR" offset="0x08" rw="RW" size="4"/>
             </register-group>
             <value-group caption="Command select" name="NVMCTRL_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
                 <value caption="No Operation" name="NOOP" value="0x01"/>
                 <value caption="Flash Write" name="FLWR" value="0x02"/>
                 <value caption="Flash Page Erase" name="FLPER" value="0x08"/>
-                <value caption="Flash Multi-Page Erase 2 pages"
-                       name="FLMPER2"
-                       value="0x09"/>
-                <value caption="Flash Multi-Page Erase 4 pages"
-                       name="FLMPER4"
-                       value="0x0A"/>
-                <value caption="Flash Multi-Page Erase 8 pages"
-                       name="FLMPER8"
-                       value="0x0B"/>
-                <value caption="Flash Multi-Page Erase 16 pages"
-                       name="FLMPER16"
-                       value="0x0C"/>
-                <value caption="Flash Multi-Page Erase 32 pages"
-                       name="FLMPER32"
-                       value="0x0D"/>
+                <value caption="Flash Multi-Page Erase 2 pages" name="FLMPER2" value="0x09"/>
+                <value caption="Flash Multi-Page Erase 4 pages" name="FLMPER4" value="0x0A"/>
+                <value caption="Flash Multi-Page Erase 8 pages" name="FLMPER8" value="0x0B"/>
+                <value caption="Flash Multi-Page Erase 16 pages" name="FLMPER16" value="0x0C"/>
+                <value caption="Flash Multi-Page Erase 32 pages" name="FLMPER32" value="0x0D"/>
                 <value caption="EEPROM Write" name="EEWR" value="0x12"/>
                 <value caption="EEPROM Erase and Write" name="EEERWR" value="0x13"/>
                 <value caption="EEPROM Byte Erase" name="EEBER" value="0x18"/>
-                <value caption="EEPROM Multi-Byte Erase 2 bytes"
-                       name="EEMBER2"
-                       value="0x19"/>
-                <value caption="EEPROM Multi-Byte Erase 4 bytes"
-                       name="EEMBER4"
-                       value="0x1A"/>
-                <value caption="EEPROM Multi-Byte Erase 8 bytes"
-                       name="EEMBER8"
-                       value="0x1B"/>
-                <value caption="EEPROM Multi-Byte Erase 16 bytes"
-                       name="EEMBER16"
-                       value="0x1C"/>
-                <value caption="EEPROM Multi-Byte Erase 32 bytes"
-                       name="EEMBER32"
-                       value="0x1D"/>
+                <value caption="EEPROM Multi-Byte Erase 2 bytes" name="EEMBER2" value="0x19"/>
+                <value caption="EEPROM Multi-Byte Erase 4 bytes" name="EEMBER4" value="0x1A"/>
+                <value caption="EEPROM Multi-Byte Erase 8 bytes" name="EEMBER8" value="0x1B"/>
+                <value caption="EEPROM Multi-Byte Erase 16 bytes" name="EEMBER16" value="0x1C"/>
+                <value caption="EEPROM Multi-Byte Erase 32 bytes" name="EEMBER32" value="0x1D"/>
                 <value caption="Chip Erase Command" name="CHER" value="0x20"/>
                 <value caption="EEPROM Erase Command" name="EECHER" value="0x30"/>
             </value-group>
@@ -3673,399 +1733,134 @@
             <value-group caption="Write error select" name="NVMCTRL_ERROR">
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
-                <value caption="Write to section not allowed"
-                       name="ILLEGALSADDR"
-                       value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted"
-                       name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed"
-                       name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_avr_v2_port" name="PORT">
             <register-group caption="I/O Ports" name="PORT" size="0x20">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Set"
-                          name="DIRSET"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Clear"
-                          name="DIRCLR"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Toggle"
-                          name="DIRTGL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Set"
-                          name="OUTSET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Clear"
-                          name="OUTCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Toggle"
-                          name="OUTTGL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
-                <register caption="Port Control"
-                          initval="0x00"
-                          name="PORTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Slew Rate Limit Enable" mask="0x01" name="SRL" rw="RW"/>
                 </register>
-                <register caption="Pin Control Config"
-                          initval="0x00"
-                          name="PINCONFIG"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin Control Config" initval="0x00" name="PINCONFIG" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin Control Update"
-                          initval="0x00"
-                          name="PINCTRLUPD"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control update mask"
-                              mask="0xFF"
-                              name="PINCTRLUPD"
-                              rw="RW"/>
+                <register caption="Pin Control Update" initval="0x00" name="PINCTRLUPD" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Pin control update mask" mask="0xFF" name="PINCTRLUPD" rw="RW"/>
                 </register>
-                <register caption="Pin Control Set"
-                          initval="0x00"
-                          name="PINCTRLSET"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control set mask"
-                              mask="0xFF"
-                              name="PINCTRLSET"
-                              rw="RW"/>
+                <register caption="Pin Control Set" initval="0x00" name="PINCTRLSET" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Pin control set mask" mask="0xFF" name="PINCTRLSET" rw="RW"/>
                 </register>
-                <register caption="Pin Control Clear"
-                          initval="0x00"
-                          name="PINCTRLCLR"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control clear mask"
-                              mask="0xFF"
-                              name="PINCTRLCLR"
-                              rw="RW"/>
+                <register caption="Pin Control Clear" initval="0x00" name="PINCTRLCLR" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Pin control clear mask" mask="0xFF" name="PINCTRLCLR" rw="RW"/>
                 </register>
-                <register caption="Pin 0 Control"
-                          initval="0x00"
-                          name="PIN0CTRL"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 1 Control"
-                          initval="0x00"
-                          name="PIN1CTRL"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 2 Control"
-                          initval="0x00"
-                          name="PIN2CTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 3 Control"
-                          initval="0x00"
-                          name="PIN3CTRL"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 4 Control"
-                          initval="0x00"
-                          name="PIN4CTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 5 Control"
-                          initval="0x00"
-                          name="PIN5CTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 6 Control"
-                          initval="0x00"
-                          name="PIN6CTRL"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 7 Control"
-                          initval="0x00"
-                          name="PIN7CTRL"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
-                <value caption="Interrupt disabled but input buffer enabled"
-                       name="INTDISABLE"
-                       value="0x0"/>
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
                 <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
                 <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
                 <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
-                <value caption="Digital Input Buffer disabled"
-                       name="INPUT_DISABLE"
-                       value="0x4"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
                 <value caption="Sense low Level" name="LEVEL" value="0x5"/>
             </value-group>
         </module>
         <module caption="Port Multiplexer" id="avrdd" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="EVSYS route A"
-                          initval="0x00"
-                          name="EVSYSROUTEA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Output A"
-                              mask="0x01"
-                              name="EVOUTA"
-                              rw="RW"
-                              values="PORTMUX_EVOUTA"/>
-                    <bitfield caption="Event Output C"
-                              mask="0x04"
-                              name="EVOUTC"
-                              rw="RW"
-                              values="PORTMUX_EVOUTC"/>
-                    <bitfield caption="Event Output D"
-                              mask="0x08"
-                              name="EVOUTD"
-                              rw="RW"
-                              values="PORTMUX_EVOUTD"/>
-                    <bitfield caption="Event Output F"
-                              mask="0x20"
-                              name="EVOUTF"
-                              rw="RW"
-                              values="PORTMUX_EVOUTF"/>
+                <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Event Output A" mask="0x01" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output C" mask="0x04" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x08" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
                 </register>
-                <register caption="CCL route A"
-                          initval="0x00"
-                          name="CCLROUTEA"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals"
-                              mask="0x01"
-                              name="LUT0"
-                              rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals"
-                              mask="0x02"
-                              name="LUT1"
-                              rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals"
-                              mask="0x04"
-                              name="LUT2"
-                              rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals"
-                              mask="0x08"
-                              name="LUT3"
-                              rw="RW"
-                              values="PORTMUX_LUT3"/>
+                <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x01" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x02" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x04" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x08" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
-                <register caption="USART route A"
-                          initval="0x00"
-                          name="USARTROUTEA"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="USART0 Signals"
-                              mask="0x07"
-                              name="USART0"
-                              rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="USART1 Signals"
-                              mask="0x18"
-                              name="USART1"
-                              rw="RW"
-                              values="PORTMUX_USART1"/>
+                <register caption="USART route A" initval="0x00" name="USARTROUTEA" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="USART0 Signals" mask="0x07" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="USART1 Signals" mask="0x18" name="USART1" rw="RW" values="PORTMUX_USART1"/>
                 </register>
-                <register caption="SPI route A"
-                          initval="0x00"
-                          name="SPIROUTEA"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI0 Signals"
-                              mask="0x07"
-                              name="SPI0"
-                              rw="RW"
-                              values="PORTMUX_SPI0"/>
+                <register caption="SPI route A" initval="0x00" name="SPIROUTEA" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="SPI0 Signals" mask="0x07" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                 </register>
-                <register caption="TWI route A"
-                          initval="0x00"
-                          name="TWIROUTEA"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TWI0 Signals"
-                              mask="0x03"
-                              name="TWI0"
-                              rw="RW"
-                              values="PORTMUX_TWI0"/>
+                <register caption="TWI route A" initval="0x00" name="TWIROUTEA" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="TWI0 Signals" mask="0x03" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="TCA route A"
-                          initval="0x00"
-                          name="TCAROUTEA"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCA0 Signals"
-                              mask="0x07"
-                              name="TCA0"
-                              rw="RW"
-                              values="PORTMUX_TCA0"/>
+                <register caption="TCA route A" initval="0x00" name="TCAROUTEA" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="TCA0 Signals" mask="0x07" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
                 </register>
-                <register caption="TCB route A"
-                          initval="0x00"
-                          name="TCBROUTEA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCB0 Output"
-                              mask="0x01"
-                              name="TCB0"
-                              rw="RW"
-                              values="PORTMUX_TCB0"/>
-                    <bitfield caption="TCB1 Output"
-                              mask="0x02"
-                              name="TCB1"
-                              rw="RW"
-                              values="PORTMUX_TCB1"/>
+                <register caption="TCB route A" initval="0x00" name="TCBROUTEA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="TCB0 Output" mask="0x01" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="TCB1 Output" mask="0x02" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
                 </register>
-                <register caption="TCD route A"
-                          initval="0x00"
-                          name="TCDROUTEA"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCD0 Signals"
-                              mask="0x07"
-                              name="TCD0"
-                              rw="RW"
-                              values="PORTMUX_TCD0"/>
+                <register caption="TCD route A" initval="0x00" name="TCDROUTEA" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="TCD0 Signals" mask="0x07" name="TCD0" rw="RW" values="PORTMUX_TCD0"/>
                 </register>
             </register-group>
             <value-group caption="CCL Look-Up Table 0 Signals select" name="PORTMUX_LUT0">
@@ -4154,199 +1949,69 @@
         </module>
         <module caption="Reset controller" id="rst_integration_v8" name="RSTCTRL">
             <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
-                <register caption="Reset Flags"
-                          initval="0x00"
-                          name="RSTFR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Power on Reset flag" mask="0x01" name="PORF" rw="RW"/>
-                    <bitfield caption="Brown out detector Reset flag"
-                              mask="0x02"
-                              name="BORF"
-                              rw="RW"/>
+                    <bitfield caption="Brown out detector Reset flag" mask="0x02" name="BORF" rw="RW"/>
                     <bitfield caption="External Reset flag" mask="0x04" name="EXTRF" rw="RW"/>
                     <bitfield caption="Watch dog Reset flag" mask="0x08" name="WDRF" rw="RW"/>
                     <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
                     <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
                 </register>
-                <register caption="Software Reset"
-                          initval="0x00"
-                          name="SWRR"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software reset enable"
-                              mask="0x01"
-                              name="SWRST"
-                              rw="RW"/>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x01" name="SWRST" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Real-Time Counter" id="tmr_16b_rtc_v1" name="RTC">
             <register-group caption="Real-Time Counter" name="RTC" size="0x20">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="RTCEN" rw="RW"/>
                     <bitfield caption="Correction enable" mask="0x04" name="CORREN" rw="RW"/>
-                    <bitfield caption="Prescaling Factor"
-                              mask="0x78"
-                              name="PRESCALER"
-                              rw="RW"
-                              values="RTC_PRESCALER"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
                     <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x01"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLABUSY"
-                              rw="R"/>
-                    <bitfield caption="Count Synchronization Busy Flag"
-                              mask="0x02"
-                              name="CNTBUSY"
-                              rw="R"/>
-                    <bitfield caption="Period Synchronization Busy Flag"
-                              mask="0x04"
-                              name="PERBUSY"
-                              rw="R"/>
-                    <bitfield caption="Comparator Synchronization Busy Flag"
-                              mask="0x08"
-                              name="CMPBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x02" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x04" name="PERBUSY" rw="R"/>
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x08" name="CMPBUSY" rw="R"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt enable"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt Flag"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Temporary"
-                          name="TEMP"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Debug control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Calibration"
-                          initval="0x00"
-                          name="CALIB"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Error Correction Value"
-                              mask="0x7F"
-                              name="ERROR"
-                              rw="RW"/>
-                    <bitfield caption="Error Correction Sign Bit"
-                              mask="0x80"
-                              name="SIGN"
-                              rw="RW"/>
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7F" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
                 </register>
-                <register caption="Clock Select"
-                          initval="0x00"
-                          name="CLKSEL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Select"
-                              mask="0x03"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="RTC_CLKSEL"/>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x03" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
                 </register>
                 <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
-                <register caption="Period"
-                          initval="0xFFFF"
-                          name="PER"
-                          offset="0x0A"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
                 <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
-                <register caption="PIT Control A"
-                          initval="0x00"
-                          name="PITCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="PITEN" rw="RW"/>
-                    <bitfield caption="Period"
-                              mask="0x78"
-                              name="PERIOD"
-                              rw="RW"
-                              values="RTC_PERIOD"/>
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
                 </register>
-                <register caption="PIT Status"
-                          initval="0x00"
-                          name="PITSTATUS"
-                          offset="0x11"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLBUSY"
-                              rw="R"/>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLBUSY" rw="R"/>
                 </register>
-                <register caption="PIT Interrupt Control"
-                          initval="0x00"
-                          name="PITINTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags"
-                          initval="0x00"
-                          name="PITINTFLAGS"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Debug control"
-                          initval="0x00"
-                          name="PITDBGCTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
             </register-group>
@@ -4394,156 +2059,42 @@
         </module>
         <module caption="Signature row" id="avrdd" name="SIGROW">
             <register-group caption="Signature row" name="SIGROW" size="0x40">
-                <register caption="Device ID Byte 0"
-                          name="DEVICEID0"
-                          offset="0x00"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 1"
-                          name="DEVICEID1"
-                          offset="0x01"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 2"
-                          name="DEVICEID2"
-                          offset="0x02"
-                          rw="R"
-                          size="1"/>
-                <register caption="Temperature Calibration 0"
-                          name="TEMPSENSE0"
-                          offset="0x04"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 0"
-                              mask="0xFFFF"
-                              name="TEMPSENSE0"
-                              rw="R"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Temperature Calibration 0" name="TEMPSENSE0" offset="0x04" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 0" mask="0xFFFF" name="TEMPSENSE0" rw="R"/>
                 </register>
-                <register caption="Temperature Calibration 1"
-                          name="TEMPSENSE1"
-                          offset="0x06"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 1"
-                              mask="0xFFFF"
-                              name="TEMPSENSE1"
-                              rw="R"/>
+                <register caption="Temperature Calibration 1" name="TEMPSENSE1" offset="0x06" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 1" mask="0xFFFF" name="TEMPSENSE1" rw="R"/>
                 </register>
-                <register caption="LOTNUM0"
-                          name="SERNUM0"
-                          offset="0x10"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM1"
-                          name="SERNUM1"
-                          offset="0x11"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM2"
-                          name="SERNUM2"
-                          offset="0x12"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM3"
-                          name="SERNUM3"
-                          offset="0x13"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM4"
-                          name="SERNUM4"
-                          offset="0x14"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM5"
-                          name="SERNUM5"
-                          offset="0x15"
-                          rw="R"
-                          size="1"/>
-                <register caption="RANDOM"
-                          name="SERNUM6"
-                          offset="0x16"
-                          rw="R"
-                          size="1"/>
-                <register caption="SCRIBE"
-                          name="SERNUM7"
-                          offset="0x17"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS0"
-                          name="SERNUM8"
-                          offset="0x18"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS1"
-                          name="SERNUM9"
-                          offset="0x19"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS0"
-                          name="SERNUM10"
-                          offset="0x1A"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS1"
-                          name="SERNUM11"
-                          offset="0x1B"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES0"
-                          name="SERNUM12"
-                          offset="0x1C"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES1"
-                          name="SERNUM13"
-                          offset="0x1D"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES2"
-                          name="SERNUM14"
-                          offset="0x1E"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES3"
-                          name="SERNUM15"
-                          offset="0x1F"
-                          rw="R"
-                          size="1"/>
+                <register caption="LOTNUM0" name="SERNUM0" offset="0x10" rw="R" size="1"/>
+                <register caption="LOTNUM1" name="SERNUM1" offset="0x11" rw="R" size="1"/>
+                <register caption="LOTNUM2" name="SERNUM2" offset="0x12" rw="R" size="1"/>
+                <register caption="LOTNUM3" name="SERNUM3" offset="0x13" rw="R" size="1"/>
+                <register caption="LOTNUM4" name="SERNUM4" offset="0x14" rw="R" size="1"/>
+                <register caption="LOTNUM5" name="SERNUM5" offset="0x15" rw="R" size="1"/>
+                <register caption="RANDOM" name="SERNUM6" offset="0x16" rw="R" size="1"/>
+                <register caption="SCRIBE" name="SERNUM7" offset="0x17" rw="R" size="1"/>
+                <register caption="XPOS0" name="SERNUM8" offset="0x18" rw="R" size="1"/>
+                <register caption="XPOS1" name="SERNUM9" offset="0x19" rw="R" size="1"/>
+                <register caption="YPOS0" name="SERNUM10" offset="0x1A" rw="R" size="1"/>
+                <register caption="YPOS1" name="SERNUM11" offset="0x1B" rw="R" size="1"/>
+                <register caption="RES0" name="SERNUM12" offset="0x1C" rw="R" size="1"/>
+                <register caption="RES1" name="SERNUM13" offset="0x1D" rw="R" size="1"/>
+                <register caption="RES2" name="SERNUM14" offset="0x1E" rw="R" size="1"/>
+                <register caption="RES3" name="SERNUM15" offset="0x1F" rw="R" size="1"/>
             </register-group>
         </module>
-        <module caption="Sleep Controller"
-                id="clk_sleep_ctrl_avr_v2"
-                name="SLPCTRL">
+        <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
             <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Sleep enable" mask="0x01" name="SEN" rw="RW"/>
-                    <bitfield caption="Sleep mode"
-                              mask="0x06"
-                              name="SMODE"
-                              rw="RW"
-                              values="SLPCTRL_SMODE"/>
+                    <bitfield caption="Sleep mode" mask="0x06" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="VREGCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Performance Mode"
-                              mask="0x07"
-                              name="PMODE"
-                              rw="RW"
-                              values="SLPCTRL_PMODE"/>
-                    <bitfield caption="High Temperature Low Leakage Enable"
-                              mask="0x10"
-                              name="HTLLEN"
-                              rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Performance Mode" mask="0x07" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                 </register>
             </register-group>
             <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
@@ -4551,8 +2102,7 @@
                 <value caption="Standby Mode" name="STDBY" value="0x01"/>
                 <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
             </value-group>
-            <value-group caption="High Temperature Low Leakage Enable select"
-                         name="SLPCTRL_HTLLEN">
+            <value-group caption="High Temperature Low Leakage Enable select" name="SLPCTRL_HTLLEN">
                 <value caption="Disabled" name="OFF" value="0x0"/>
                 <value caption="Enabled" name="ON" value="0x1"/>
             </value-group>
@@ -4563,110 +2113,36 @@
         </module>
         <module caption="Serial Peripheral Interface" id="spi_8bit_v2" name="SPI">
             <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable Module" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Prescaler"
-                              mask="0x06"
-                              name="PRESC"
-                              rw="RW"
-                              values="SPI_PRESC"/>
+                    <bitfield caption="Prescaler" mask="0x06" name="PRESC" rw="RW" values="SPI_PRESC"/>
                     <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
-                    <bitfield caption="Host Operation Enable"
-                              mask="0x20"
-                              name="MASTER"
-                              rw="RW"/>
+                    <bitfield caption="Host Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
                     <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI Mode"
-                              mask="0x03"
-                              name="MODE"
-                              rw="RW"
-                              values="SPI_MODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="SPI Mode" mask="0x03" name="MODE" rw="RW" values="SPI_MODE"/>
                     <bitfield caption="SPI Select Disable" mask="0x04" name="SSD" rw="RW"/>
-                    <bitfield caption="Buffer Mode Wait for Receive"
-                              mask="0x40"
-                              name="BUFWR"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Mode Wait for Receive" mask="0x40" name="BUFWR" rw="RW"/>
                     <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Enable" mask="0x01" name="IE" rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Enable"
-                              mask="0x10"
-                              name="SSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <mode name="DEFAULT" qualifier="SPI.CTRLB.BUFEN" value="0"/>
                     <mode name="BUFFERED" qualifier="SPI.CTRLB.BUFEN" value="1"/>
-                    <bitfield caption="Buffer Overflow"
-                              mask="0x01"
-                              modes="BUFFERED"
-                              name="BUFOVF"
-                              rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Flag"
-                              mask="0x10"
-                              modes="BUFFERED"
-                              name="SSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Flag"
-                              mask="0x20"
-                              modes="BUFFERED"
-                              name="DREIF"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Flag"
-                              mask="0x40"
-                              modes="BUFFERED"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              modes="BUFFERED"
-                              name="RXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Write Collision"
-                              mask="0x40"
-                              modes="DEFAULT"
-                              name="WRCOL"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt Flag"
-                              mask="0x80"
-                              modes="DEFAULT"
-                              name="IF"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Overflow" mask="0x01" modes="BUFFERED" name="BUFOVF" rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Flag" mask="0x10" modes="BUFFERED" name="SSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" modes="BUFFERED" name="DREIF" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" modes="BUFFERED" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" modes="BUFFERED" name="RXCIF" rw="RW"/>
+                    <bitfield caption="Write Collision" mask="0x40" modes="DEFAULT" name="WRCOL" rw="RW"/>
+                    <bitfield caption="Interrupt Flag" mask="0x80" modes="DEFAULT" name="IF" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
             </register-group>
@@ -4685,543 +2161,149 @@
         </module>
         <module caption="System Configuration Registers" id="avrdd" name="SYSCFG">
             <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
-                <register caption="Revision ID"
-                          name="REVID"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Control"
-                          name="OCDMCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Status"
-                          initval="0x00"
-                          name="OCDMSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+                <register caption="OCD Message Control" name="OCDMCTRL" offset="0x04" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMSTATUS" offset="0x05" rw="RW" size="1">
                     <bitfield caption="OCD Message Valid" mask="0x01" name="VALID" rw="RW"/>
                 </register>
             </register-group>
         </module>
-        <module caption="16-bit Timer/Counter Type A"
-                id="tmr_16b_pwm_v1"
-                name="TCA">
+        <module caption="16-bit Timer/Counter Type A" id="tmr_16b_pwm_v1" name="TCA">
             <register-group caption="16-bit Timer/Counter Type A" name="TCA" size="0x40">
-                <mode caption="Single Mode"
-                      name="SINGLE"
-                      qualifier="TCA.SINGLE.CTRLD.SPLITM"
-                      value="0"/>
-                <mode caption="Split Mode"
-                      name="SPLIT"
-                      qualifier="TCA.SPLIT.CTRLD.SPLITM"
-                      value="1"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <mode caption="Single Mode" name="SINGLE" qualifier="TCA.SINGLE.CTRLD.SPLITM" value="0"/>
+                <mode caption="Split Mode" name="SPLIT" qualifier="TCA.SPLIT.CTRLD.SPLITM" value="1"/>
+                <register caption="Control A" initval="0x00" modes="SINGLE" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x07"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                <register caption="Control B" initval="0x00" modes="SINGLE" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                     <bitfield caption="Auto Lock Update" mask="0x08" name="ALUPD" rw="RW"/>
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare 0 Waveform Output Value"
-                              mask="0x01"
-                              name="CMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Waveform Output Value"
-                              mask="0x02"
-                              name="CMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Waveform Output Value"
-                              mask="0x04"
-                              name="CMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SINGLE" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x01" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x02" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x04" name="CMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SINGLE" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Control E Clear" initval="0x00" modes="SINGLE" name="CTRLECLR" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Direction"
-                              mask="0x01"
-                              name="DIR"
-                              rw="RW"
-                              values="TCA_SINGLE_DIR"/>
+                <register caption="Control E Set" initval="0x00" modes="SINGLE" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control F Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Clear" initval="0x00" modes="SINGLE" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Control F Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFSET"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Set" initval="0x00" modes="SINGLE" name="CTRLFSET" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="EVCTRL"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Count on Event Input A"
-                              mask="0x01"
-                              name="CNTAEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action A"
-                              mask="0x0E"
-                              name="EVACTA"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTA"/>
-                    <bitfield caption="Count on Event Input B"
-                              mask="0x10"
-                              name="CNTBEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action B"
-                              mask="0xE0"
-                              name="EVACTB"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTB"/>
+                <register caption="Event Control" initval="0x00" modes="SINGLE" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input A" mask="0x01" name="CNTAEI" rw="RW"/>
+                    <bitfield caption="Event Action A" mask="0x0E" name="EVACTA" rw="RW" values="TCA_SINGLE_EVACTA"/>
+                    <bitfield caption="Count on Event Input B" mask="0x10" name="CNTBEI" rw="RW"/>
+                    <bitfield caption="Event Action B" mask="0xE0" name="EVACTB" rw="RW" values="TCA_SINGLE_EVACTB"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" modes="SINGLE" name="INTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" modes="SINGLE" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SINGLE" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary data for 16-bit Access"
-                          modes="SINGLE"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          modes="SINGLE"
-                          name="CNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period"
-                          modes="SINGLE"
-                          name="PER"
-                          offset="0x26"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0"
-                          modes="SINGLE"
-                          name="CMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1"
-                          modes="SINGLE"
-                          name="CMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2"
-                          modes="SINGLE"
-                          name="CMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period Buffer"
-                          modes="SINGLE"
-                          name="PERBUF"
-                          offset="0x36"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0 Buffer"
-                          modes="SINGLE"
-                          name="CMP0BUF"
-                          offset="0x38"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1 Buffer"
-                          modes="SINGLE"
-                          name="CMP1BUF"
-                          offset="0x3A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2 Buffer"
-                          modes="SINGLE"
-                          name="CMP2BUF"
-                          offset="0x3C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary data for 16-bit Access" modes="SINGLE" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Count" modes="SINGLE" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Period" modes="SINGLE" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Compare 0" modes="SINGLE" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 1" modes="SINGLE" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 2" modes="SINGLE" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Period Buffer" modes="SINGLE" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" modes="SINGLE" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" modes="SINGLE" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" modes="SINGLE" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" modes="SPLIT" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Enable"
-                              mask="0x01"
-                              name="LCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Enable"
-                              mask="0x02"
-                              name="LCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Enable"
-                              mask="0x04"
-                              name="LCMP2EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Enable"
-                              mask="0x10"
-                              name="HCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Enable"
-                              mask="0x20"
-                              name="HCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Enable"
-                              mask="0x40"
-                              name="HCMP2EN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" modes="SPLIT" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Enable" mask="0x01" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x02" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x04" name="LCMP2EN" rw="RW"/>
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Output Value"
-                              mask="0x01"
-                              name="LCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Output Value"
-                              mask="0x02"
-                              name="LCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Output Value"
-                              mask="0x04"
-                              name="LCMP2OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Output Value"
-                              mask="0x10"
-                              name="HCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Output Value"
-                              mask="0x20"
-                              name="HCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Output Value"
-                              mask="0x40"
-                              name="HCMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SPLIT" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x01" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x02" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x04" name="LCMP2OV" rw="RW"/>
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SPLIT" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Clear" initval="0x00" modes="SPLIT" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Set" initval="0x00" modes="SPLIT" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Enable"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Enable"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Enable"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Enable"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Enable"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" modes="SPLIT" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Flag"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Flag"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Flag"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Flag"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Flag"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" modes="SPLIT" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SPLIT" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Low Count"
-                          modes="SPLIT"
-                          name="LCNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Count"
-                          modes="SPLIT"
-                          name="HCNT"
-                          offset="0x21"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Period"
-                          modes="SPLIT"
-                          name="LPER"
-                          offset="0x26"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Period"
-                          modes="SPLIT"
-                          name="HPER"
-                          offset="0x27"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP0"
-                          offset="0x29"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP1"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP2"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Low Count" modes="SPLIT" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="High Count" modes="SPLIT" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="Low Period" modes="SPLIT" name="LPER" offset="0x26" rw="RW" size="1"/>
+                <register caption="High Period" modes="SPLIT" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
             </register-group>
             <value-group caption="Clock Selection" name="TCA_SINGLE_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5238,12 +2320,8 @@
                 <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
                 <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
                 <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
-                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM"
-                       name="DSBOTH"
-                       value="0x06"/>
-                <value caption="Dual Slope PWM, overflow on BOTTOM"
-                       name="DSBOTTOM"
-                       value="0x07"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
             </value-group>
             <value-group caption="Command select" name="TCA_SINGLE_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
@@ -5256,31 +2334,17 @@
                 <value caption="Count down" name="DOWN" value="0x1"/>
             </value-group>
             <value-group caption="Event Action A select" name="TCA_SINGLE_EVACTA">
-                <value caption="Count on positive edge event"
-                       name="CNT_POSEDGE"
-                       value="0x00"/>
+                <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
-                <value caption="Count on prescaled clock while event line is 1."
-                       name="CNT_HIGHLVL"
-                       value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
+                <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
-                <value caption="Restart counter at positive edge event"
-                       name="RESTART_POSEDGE"
-                       value="0x04"/>
-                <value caption="Restart counter on any edge event"
-                       name="RESTART_ANYEDGE"
-                       value="0x05"/>
-                <value caption="Restart counter while event line is 1."
-                       name="RESTART_HIGHLVL"
-                       value="0x06"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+                <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
+                <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
+                <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
             </value-group>
             <value-group caption="Clock Selection" name="TCA_SPLIT_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5300,107 +2364,46 @@
             </value-group>
             <value-group caption="Command Enable select" name="TCA_SPLIT_CMDEN">
                 <value caption="None" name="NONE" value="0x0"/>
-                <value caption="Both low byte and high byte counter"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Both low byte and high byte counter" name="BOTH" value="0x3"/>
             </value-group>
         </module>
         <module caption="16-bit Timer Type B" id="tmr_16b_capture_v1" name="TCB">
             <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Select"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCB_CLKSEL"/>
+                    <bitfield caption="Clock Select" mask="0x0E" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
                     <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
                     <bitfield caption="Cascade two timers" mask="0x20" name="CASCADE" rw="RW"/>
                     <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control Register B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Timer Mode"
-                              mask="0x07"
-                              name="CNTMODE"
-                              rw="RW"
-                              values="TCB_CNTMODE"/>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Timer Mode" mask="0x07" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
                     <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
                     <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
                     <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Event Input Enable" mask="0x01" name="CAPTEI" rw="RW"/>
                     <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
-                    <bitfield caption="Input Capture Noise Cancellation Filter"
-                              mask="0x40"
-                              name="FILTER"
-                              rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
                     <bitfield caption="Run" mask="0x01" name="RUN" rw="R"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Value"
-                          name="TEMP"
-                          offset="0x9"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          initval="0x0000"
-                          name="CNT"
-                          offset="0xA"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare or Capture"
-                          name="CCMP"
-                          offset="0xC"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock Select" name="TCB_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5412,247 +2415,78 @@
                 <value caption="Periodic Interrupt" name="INT" value="0x00"/>
                 <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
                 <value caption="Input Capture Event" name="CAPT" value="0x02"/>
-                <value caption="Input Capture Frequency measurement"
-                       name="FRQ"
-                       value="0x03"/>
-                <value caption="Input Capture Pulse-Width measurement"
-                       name="PW"
-                       value="0x04"/>
-                <value caption="Input Capture Frequency and Pulse-Width measurement"
-                       name="FRQPW"
-                       value="0x05"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
                 <value caption="Single Shot" name="SINGLE" value="0x06"/>
                 <value caption="8-bit PWM" name="PWM8" value="0x07"/>
             </value-group>
         </module>
         <module caption="Timer Counter D" id="tmr_12b_psc_v1" name="TCD">
             <register-group caption="Timer Counter D" name="TCD" size="0x40">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler"
-                              mask="0x06"
-                              name="SYNCPRES"
-                              rw="RW"
-                              values="TCD_SYNCPRES"/>
-                    <bitfield caption="Counter prescaler"
-                              mask="0x18"
-                              name="CNTPRES"
-                              rw="RW"
-                              values="TCD_CNTPRES"/>
-                    <bitfield caption="Clock select"
-                              mask="0x60"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCD_CLKSEL"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x06" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+                    <bitfield caption="Counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+                    <bitfield caption="Clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x03"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCD_WGMODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x03" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare output value override"
-                              mask="0x01"
-                              name="CMPOVR"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare output value override" mask="0x01" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Auto update" mask="0x02" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Fifty percent waveform"
-                              mask="0x08"
-                              name="FIFTY"
-                              rw="RW"/>
-                    <bitfield caption="Compare C output select"
-                              mask="0x40"
-                              name="CMPCSEL"
-                              rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select"
-                              mask="0x80"
-                              name="CMPDSEL"
-                              rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Fifty percent waveform" mask="0x08" name="FIFTY" rw="RW"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x0F" name="CMPAVAL" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0xF0" name="CMPBVAL" rw="RW"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronize end of cycle strobe"
-                              mask="0x01"
-                              name="SYNCEOC"
-                              rw="RW"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Synchronize end of cycle strobe" mask="0x01" name="SYNCEOC" rw="RW"/>
                     <bitfield caption="synchronize strobe" mask="0x02" name="SYNC" rw="RW"/>
                     <bitfield caption="Restart strobe" mask="0x04" name="RESTART" rw="RW"/>
-                    <bitfield caption="Software Capture A Strobe"
-                              mask="0x08"
-                              name="SCAPTUREA"
-                              rw="RW"/>
-                    <bitfield caption="Software Capture B Strobe"
-                              mask="0x10"
-                              name="SCAPTUREB"
-                              rw="RW"/>
-                    <bitfield caption="Disable at end of cycle"
-                              mask="0x80"
-                              name="DISEOC"
-                              rw="RW"/>
+                    <bitfield caption="Software Capture A Strobe" mask="0x08" name="SCAPTUREA" rw="RW"/>
+                    <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+                    <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
                 </register>
-                <register caption="EVCTRLA"
-                          initval="0x00"
-                          name="EVCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="EVCTRLB"
-                          initval="0x00"
-                          name="EVCTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Enable ready" mask="0x01" name="ENRDY" rw="R"/>
                     <bitfield caption="Command ready" mask="0x02" name="CMDRDY" rw="R"/>
                     <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
                     <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
                 </register>
-                <register caption="Input Control A"
-                          initval="0x00"
-                          name="INPUTCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Input Control B"
-                          initval="0x00"
-                          name="INPUTCTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Fault Control"
-                          initval="0x00"
-                          name="FAULTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x01" name="CMPA" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0x02" name="CMPB" rw="RW"/>
                     <bitfield caption="Compare C value" mask="0x04" name="CMPC" rw="RW"/>
@@ -5662,100 +2496,33 @@
                     <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
                     <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
                 </register>
-                <register caption="Delay Control"
-                          initval="0x00"
-                          name="DLYCTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Delay select"
-                              mask="0x03"
-                              name="DLYSEL"
-                              rw="RW"
-                              values="TCD_DLYSEL"/>
-                    <bitfield caption="Delay trigger"
-                              mask="0x0C"
-                              name="DLYTRIG"
-                              rw="RW"
-                              values="TCD_DLYTRIG"/>
-                    <bitfield caption="Delay prescaler"
-                              mask="0x30"
-                              name="DLYPRESC"
-                              rw="RW"
-                              values="TCD_DLYPRESC"/>
+                <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Delay select" mask="0x03" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+                    <bitfield caption="Delay trigger" mask="0x0C" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+                    <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
                 </register>
-                <register caption="Delay value"
-                          initval="0x00"
-                          name="DLYVAL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Delay value" mask="0xFF" name="DLYVAL" rw="RW"/>
                 </register>
-                <register caption="Dither Control A"
-                          initval="0x00"
-                          name="DITCTRL"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Dither select"
-                              mask="0x03"
-                              name="DITHERSEL"
-                              rw="RW"
-                              values="TCD_DITHERSEL"/>
+                <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Dither select" mask="0x03" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
                 </register>
-                <register caption="Dither value"
-                          initval="0x00"
-                          name="DITVAL"
-                          offset="0x19"
-                          rw="RW"
-                          size="1">
+                <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
                     <bitfield caption="Dither value" mask="0x0F" name="DITHER" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                     <bitfield caption="Fault detection" mask="0x04" name="FAULTDET" rw="RW"/>
                 </register>
-                <register caption="Capture A"
-                          name="CAPTUREA"
-                          offset="0x22"
-                          rw="R"
-                          size="2"/>
-                <register caption="Capture B"
-                          name="CAPTUREB"
-                          offset="0x24"
-                          rw="R"
-                          size="2"/>
-                <register caption="Compare A Set"
-                          name="CMPASET"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare A Clear"
-                          name="CMPACLR"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Set"
-                          name="CMPBSET"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Clear"
-                          name="CMPBCLR"
-                          offset="0x2E"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+                <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+                <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock select" name="TCD_CLKSEL">
-                <value caption="Internal High-Frequency oscillator"
-                       name="OSCHF"
-                       value="0x00"/>
+                <value caption="Internal High-Frequency oscillator" name="OSCHF" value="0x00"/>
                 <value caption="PLL" name="PLL" value="0x01"/>
                 <value caption="External Clock" name="EXTCLK" value="0x02"/>
                 <value caption="Peripheral clock" name="CLKPER" value="0x03"/>
@@ -5766,18 +2533,10 @@
                 <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
             </value-group>
             <value-group caption="Synchronization prescaler select" name="TCD_SYNCPRES">
-                <value caption="Selected clock source divided by 1"
-                       name="DIV1"
-                       value="0x00"/>
-                <value caption="Selected clock source divided by 2"
-                       name="DIV2"
-                       value="0x01"/>
-                <value caption="Selected clock source divided by 4"
-                       name="DIV4"
-                       value="0x02"/>
-                <value caption="Selected clock source divided by 8"
-                       name="DIV8"
-                       value="0x03"/>
+                <value caption="Selected clock source divided by 1" name="DIV1" value="0x00"/>
+                <value caption="Selected clock source divided by 2" name="DIV2" value="0x01"/>
+                <value caption="Selected clock source divided by 4" name="DIV4" value="0x02"/>
+                <value caption="Selected clock source divided by 8" name="DIV8" value="0x03"/>
             </value-group>
             <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
                 <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
@@ -5818,176 +2577,63 @@
             </value-group>
             <value-group caption="Event action select" name="TCD_ACTION">
                 <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
-                <value caption="Event trigger a fault and capture"
-                       name="CAPTURE"
-                       value="0x1"/>
+                <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
             </value-group>
             <value-group caption="Event config select" name="TCD_CFG">
-                <value caption="Neither Filter nor Asynchronous Event is enabled"
-                       name="NEITHER"
-                       value="0x0"/>
-                <value caption="Input Capture Noise Cancellation Filter enabled"
-                       name="FILTER"
-                       value="0x1"/>
-                <value caption="Asynchronous Event output qualification enabled"
-                       name="ASYNC"
-                       value="0x2"/>
+                <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+                <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+                <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="Edge select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW"
-                       value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH"
-                       value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
-                <value caption="Stop output, jump to opposite compare cycle and wait"
-                       name="JMPWAIT"
-                       value="0x01"/>
-                <value caption="Stop output, execute opposite compare cycle and wait"
-                       name="EXECWAIT"
-                       value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active"
-                       name="EXECFAULT"
-                       value="0x03"/>
-                <value caption="Stop all outputs, maintain frequency"
-                       name="FREQ"
-                       value="0x04"/>
-                <value caption="Stop all outputs, execute dead time while fault active"
-                       name="EXECDT"
-                       value="0x05"/>
-                <value caption="Stop all outputs, jump to next compare cycle and wait"
-                       name="WAIT"
-                       value="0x06"/>
-                <value caption="Stop all outputs, wait for software action"
-                       name="WAITSW"
-                       value="0x07"/>
-                <value caption="Stop output on edge, jump to next compare cycle"
-                       name="EDGETRIG"
-                       value="0x08"/>
-                <value caption="Stop output on edge, maintain frequency"
-                       name="EDGETRIGFREQ"
-                       value="0x09"/>
-                <value caption="Stop output at level, maintain frequency"
-                       name="LVLTRIGFREQ"
-                       value="0x0A"/>
+                <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
+                <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
+                <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
+                <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
+                <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
+                <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x07"/>
+                <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x08"/>
+                <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x09"/>
+                <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0x0A"/>
             </value-group>
         </module>
         <module caption="Two-Wire Interface" id="i2c_8bit_avr_v3" name="TWI">
             <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="SDA Setup Time"
-                              mask="0x10"
-                              name="SDASETUP"
-                              rw="RW"
-                              values="TWI_SDASETUP"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Dual Mode Control"
-                          initval="0x00"
-                          name="DUALCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
+                <register caption="Dual Mode Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Debug Run"
-                              mask="0x01"
-                              name="DBGRUN"
-                              rw="RW"
-                              values="TWI_DBGRUN"/>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW" values="TWI_DBGRUN"/>
                 </register>
-                <register caption="Host Control A"
-                          initval="0x00"
-                          name="MCTRLA"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Inactive Bus Time-Out"
-                              mask="0x0C"
-                              name="TIMEOUT"
-                              rw="RW"
-                              values="TWI_TIMEOUT"/>
+                    <bitfield caption="Inactive Bus Time-Out" mask="0x0C" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
                     <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
-                    <bitfield caption="Write Interrupt Enable"
-                              mask="0x40"
-                              name="WIEN"
-                              rw="RW"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
                     <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
                 </register>
-                <register caption="Host Control B"
-                          initval="0x00"
-                          name="MCTRLB"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="MCMD"
-                              rw="RW"
-                              values="TWI_MCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Host Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                     <bitfield caption="Flush" mask="0x08" name="FLUSH" rw="RW"/>
                 </register>
-                <register caption="Host STATUS"
-                          initval="0x00"
-                          name="MSTATUS"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bus State"
-                              mask="0x03"
-                              name="BUSSTATE"
-                              rw="RW"
-                              values="TWI_BUSSTATE"/>
+                <register caption="Host STATUS" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
@@ -5995,147 +2641,69 @@
                     <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
                     <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
                 </register>
-                <register caption="Host Baud Rate"
-                          initval="0x00"
-                          name="MBAUD"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Baud Rate" initval="0x00" name="MBAUD" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Baud Rate" mask="0xFF" name="BAUD" rw="RW"/>
                 </register>
-                <register caption="Host Address"
-                          initval="0x00"
-                          name="MADDR"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Address" initval="0x00" name="MADDR" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Host Data"
-                          initval="0x00"
-                          name="MDATA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Data" initval="0x00" name="MDATA" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Control A"
-                          initval="0x00"
-                          name="SCTRLA"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Address Recognition Mode"
-                              mask="0x04"
-                              name="PMEN"
-                              rw="RW"/>
+                    <bitfield caption="Address Recognition Mode" mask="0x04" name="PMEN" rw="RW"/>
                     <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Enable"
-                              mask="0x40"
-                              name="APIEN"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
                     <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
                 </register>
-                <register caption="Client Control B"
-                          initval="0x00"
-                          name="SCTRLB"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="SCMD"
-                              rw="RW"
-                              values="TWI_SCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Client Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                 </register>
-                <register caption="Client Status"
-                          initval="0x00"
-                          name="SSTATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Address or Stop"
-                              mask="0x01"
-                              name="AP"
-                              rw="RW"
-                              values="TWI_AP"/>
+                <register caption="Client Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Address or Stop" mask="0x01" name="AP" rw="RW" values="TWI_AP"/>
                     <bitfield caption="Read/Write Direction" mask="0x02" name="DIR" rw="RW"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Collision" mask="0x08" name="COLL" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
                     <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Flag"
-                              mask="0x40"
-                              name="APIF"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
                     <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
                 </register>
-                <register caption="Client Address"
-                          initval="0x00"
-                          name="SADDR"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address" initval="0x00" name="SADDR" offset="0xC" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Client Data"
-                          initval="0x00"
-                          name="SDATA"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Data" initval="0x00" name="SDATA" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Address Mask"
-                          initval="0x00"
-                          name="SADDRMASK"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address Mask" initval="0x00" name="SADDRMASK" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Address Mask Enable" mask="0x01" name="ADDREN" rw="RW"/>
                     <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Fast-mode Plus Enable select" name="TWI_FMPEN">
-                <value caption="Operating in Standard-mode or Fast-mode"
-                       name="OFF"
-                       value="0x0"/>
+                <value caption="Operating in Standard-mode or Fast-mode" name="OFF" value="0x0"/>
                 <value caption="Operating in Fast-mode Plus" name="ON" value="0x1"/>
             </value-group>
             <value-group caption="Input voltage transition level select" name="TWI_INPUTLVL">
                 <value caption="I2C input voltage transition level" name="I2C" value="0x0"/>
-                <value caption="SMBus 3.0 input voltage transition level"
-                       name="SMBUS"
-                       value="0x1"/>
+                <value caption="SMBus 3.0 input voltage transition level" name="SMBUS" value="0x1"/>
             </value-group>
             <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
                 <value caption="No SDA Hold Delay" name="OFF" value="0x0"/>
                 <value caption="Short SDA hold time" name="50NS" value="0x1"/>
-                <value caption="Meets SMBUS 2.0 specification under typical conditions"
-                       name="300NS"
-                       value="0x2"/>
-                <value caption="Meets SMBUS 2.0 specificaiton across all corners"
-                       name="500NS"
-                       value="0x3"/>
+                <value caption="Meets SMBUS 2.0 specification under typical conditions" name="300NS" value="0x2"/>
+                <value caption="Meets SMBUS 2.0 specificaiton across all corners" name="500NS" value="0x3"/>
             </value-group>
             <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
                 <value caption="SDA setup time is four clock cycles" name="4CYC" value="0"/>
                 <value caption="SDA setup time is eight clock cycle" name="8CYC" value="1"/>
             </value-group>
             <value-group caption="Debug Run select" name="TWI_DBGRUN">
-                <value caption="The peripheral is halted in Break Debug mode and ignores events"
-                       name="HALT"
-                       value="0"/>
-                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted"
-                       name="RUN"
-                       value="1"/>
+                <value caption="The peripheral is halted in Break Debug mode and ignores events" name="HALT" value="0"/>
+                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted" name="RUN" value="1"/>
             </value-group>
             <value-group caption="Inactive Bus Time-Out select" name="TWI_TIMEOUT">
                 <value caption="Bus time-out disabled. I2C." name="DISABLED" value="0"/>
@@ -6149,15 +2717,9 @@
             </value-group>
             <value-group caption="Command select" name="TWI_MCMD">
                 <value caption="No action" name="NOACT" value="0"/>
-                <value caption="Execute Acknowledge Action followed by repeated Start."
-                       name="REPSTART"
-                       value="1"/>
-                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR."
-                       name="RECVTRANS"
-                       value="2"/>
-                <value caption="Execute Acknowledge Action followed by issuing a Stop condition."
-                       name="STOP"
-                       value="3"/>
+                <value caption="Execute Acknowledge Action followed by repeated Start." name="REPSTART" value="1"/>
+                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR." name="RECVTRANS" value="2"/>
+                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP" value="3"/>
             </value-group>
             <value-group caption="Bus State select" name="TWI_BUSSTATE">
                 <value caption="Unknown bus state" name="UNKNOWN" value="0"/>
@@ -6168,254 +2730,81 @@
             <value-group caption="Command select" name="TWI_SCMD">
                 <value caption="No Action" name="NOACT" value="0"/>
                 <value caption="Complete transaction" name="COMPTRANS" value="2"/>
-                <value caption="Used in response to an interrupt"
-                       name="RESPONSE"
-                       value="3"/>
+                <value caption="Used in response to an interrupt" name="RESPONSE" value="3"/>
             </value-group>
             <value-group caption="Address or Stop select" name="TWI_AP">
-                <value caption="A Stop condition generated the interrupt on APIF flag"
-                       name="STOP"
-                       value="0"/>
-                <value caption="Address detection generated the interrupt on APIF flag"
-                       name="ADR"
-                       value="1"/>
+                <value caption="A Stop condition generated the interrupt on APIF flag" name="STOP" value="0"/>
+                <value caption="Address detection generated the interrupt on APIF flag" name="ADR" value="1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                            name="USART"
-                            size="0x10">
-                <register caption="Receive Data Low Byte"
-                          initval="0x00"
-                          name="RXDATAL"
-                          offset="0x0"
-                          rw="R"
-                          size="1">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xFF" name="DATA" rw="R"/>
                 </register>
-                <register caption="Receive Data High Byte"
-                          initval="0x00"
-                          name="RXDATAH"
-                          offset="0x1"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="Receiver Data Register"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="R"/>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Receiver Data Register" mask="0x01" name="DATA8" rw="R"/>
                     <bitfield caption="Parity Error" mask="0x02" name="PERR" rw="R"/>
                     <bitfield caption="Frame Error" mask="0x04" name="FERR" rw="R"/>
                     <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Transmit Data Low Byte"
-                          initval="0x00"
-                          name="TXDATAL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register"
-                              mask="0xFF"
-                              name="DATA"
-                              rw="RW"/>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Transmit Data High Byte"
-                          initval="0x00"
-                          name="TXDATAH"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="RW"/>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x01" name="DATA8" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Wait For Break" mask="0x01" name="WFB" rw="RW"/>
                     <bitfield caption="Break Detected Flag" mask="0x02" name="BDF" rw="RW"/>
-                    <bitfield caption="Inconsistent Sync Field Interrupt Flag"
-                              mask="0x08"
-                              name="ISFIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Start Interrupt"
-                              mask="0x10"
-                              name="RXSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Flag"
-                              mask="0x20"
-                              name="DREIF"
-                              rw="R"/>
-                    <bitfield caption="Transmit Interrupt Flag"
-                              mask="0x40"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x08" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="RS485 Mode internal transmitter"
-                              mask="0x01"
-                              name="RS485"
-                              rw="RW"
-                              values="USART_RS485"/>
-                    <bitfield caption="Auto-baud Error Interrupt Enable"
-                              mask="0x04"
-                              name="ABEIE"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x01" name="RS485" rw="RW" values="USART_RS485"/>
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x04" name="ABEIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x08" name="LBME" rw="RW"/>
-                    <bitfield caption="Receiver Start Frame Interrupt Enable"
-                              mask="0x10"
-                              name="RXSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transmit Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multi-processor Communication Mode"
-                              mask="0x01"
-                              name="MPCM"
-                              rw="RW"/>
-                    <bitfield caption="Receiver Mode"
-                              mask="0x06"
-                              name="RXMODE"
-                              rw="RW"
-                              values="USART_RXMODE"/>
-                    <bitfield caption="Open Drain Mode Enable"
-                              mask="0x08"
-                              name="ODME"
-                              rw="RW"/>
-                    <bitfield caption="Start Frame Detection Enable"
-                              mask="0x10"
-                              name="SFDEN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x06" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x08" name="ODME" rw="RW"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
                     <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
                     <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x03"
-                          name="CTRLC"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="USART.CTRLC.CMODE" value="0x00 0x01 0x02"/>
                     <mode name="MSPI" qualifier="USART.CTRLC.CMODE" value="0x03"/>
-                    <bitfield caption="Communication Mode"
-                              mask="0xC0"
-                              name="CMODE"
-                              rw="RW"
-                              values="USART_CMODE"/>
-                    <bitfield caption="SPI Host Mode, Clock Phase"
-                              mask="0x02"
-                              modes="MSPI"
-                              name="UCPHA"
-                              rw="RW"/>
-                    <bitfield caption="SPI Host Mode, Data Order"
-                              mask="0x04"
-                              modes="MSPI"
-                              name="UDORD"
-                              rw="RW"/>
-                    <bitfield caption="Character Size"
-                              mask="0x07"
-                              modes="NORMAL"
-                              name="CHSIZE"
-                              rw="RW"
-                              values="USART_NORMAL_CHSIZE"/>
-                    <bitfield caption="Stop Bit Mode"
-                              mask="0x08"
-                              modes="NORMAL"
-                              name="SBMODE"
-                              rw="RW"
-                              values="USART_NORMAL_SBMODE"/>
-                    <bitfield caption="Parity Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="PMODE"
-                              rw="RW"
-                              values="USART_NORMAL_PMODE"/>
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" rw="RW" values="USART_CMODE"/>
+                    <bitfield caption="SPI Host Mode, Clock Phase" mask="0x02" modes="MSPI" name="UCPHA" rw="RW"/>
+                    <bitfield caption="SPI Host Mode, Data Order" mask="0x04" modes="MSPI" name="UDORD" rw="RW"/>
+                    <bitfield caption="Character Size" mask="0x07" modes="NORMAL" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" modes="NORMAL" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" modes="NORMAL" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
                 </register>
-                <register caption="Baud Rate"
-                          initval="0x0000"
-                          name="BAUD"
-                          offset="0x8"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Auto Baud Window"
-                              mask="0xC0"
-                              name="ABW"
-                              rw="RW"
-                              values="USART_ABW"/>
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xC0" name="ABW" rw="RW" values="USART_ABW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="IrDA Event Input Enable"
-                              mask="0x01"
-                              name="IREI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x01" name="IREI" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control"
-                          initval="0x00"
-                          name="TXPLCTRL"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xFF" name="TXPL" rw="RW"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control"
-                          initval="0x00"
-                          name="RXPLCTRL"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7F" name="RXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -6440,12 +2829,8 @@
                 <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
                 <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
                 <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
-                <value caption="Character size: 9 bit read low byte first"
-                       name="9BITL"
-                       value="0x06"/>
-                <value caption="Character size: 9 bit read high byte first"
-                       name="9BITH"
-                       value="0x07"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
             </value-group>
             <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
                 <value caption="No Parity" name="DISABLED" value="0x00"/>
@@ -6465,234 +2850,62 @@
         </module>
         <module caption="User Row" id="avrdd" name="USERROW">
             <register-group caption="User Row" name="USERROW" size="0x20">
-                <register caption="User Row Byte 0"
-                          name="USERROW0"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 1"
-                          name="USERROW1"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 2"
-                          name="USERROW2"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 3"
-                          name="USERROW3"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 4"
-                          name="USERROW4"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 5"
-                          name="USERROW5"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 6"
-                          name="USERROW6"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 7"
-                          name="USERROW7"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 8"
-                          name="USERROW8"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 9"
-                          name="USERROW9"
-                          offset="0x09"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 10"
-                          name="USERROW10"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 11"
-                          name="USERROW11"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 12"
-                          name="USERROW12"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 13"
-                          name="USERROW13"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 14"
-                          name="USERROW14"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 15"
-                          name="USERROW15"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 16"
-                          name="USERROW16"
-                          offset="0x10"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 17"
-                          name="USERROW17"
-                          offset="0x11"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 18"
-                          name="USERROW18"
-                          offset="0x12"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 19"
-                          name="USERROW19"
-                          offset="0x13"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 20"
-                          name="USERROW20"
-                          offset="0x14"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 21"
-                          name="USERROW21"
-                          offset="0x15"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 22"
-                          name="USERROW22"
-                          offset="0x16"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 23"
-                          name="USERROW23"
-                          offset="0x17"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 24"
-                          name="USERROW24"
-                          offset="0x18"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 25"
-                          name="USERROW25"
-                          offset="0x19"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 26"
-                          name="USERROW26"
-                          offset="0x1A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 27"
-                          name="USERROW27"
-                          offset="0x1B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 28"
-                          name="USERROW28"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 29"
-                          name="USERROW29"
-                          offset="0x1D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 30"
-                          name="USERROW30"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 31"
-                          name="USERROW31"
-                          offset="0x1F"
-                          rw="RW"
-                          size="1"/>
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Virtual Ports" id="gpio_ports_avr_v2_vport" name="VPORT">
             <register-group caption="Virtual Ports" name="VPORT" size="0x4">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Voltage reference" id="avrdd" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
-                <register caption="ADC0 Reference"
-                          initval="0x00"
-                          name="ADC0REF"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="ADC0 Reference" initval="0x00" name="ADC0REF" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="DAC0 Reference"
-                          initval="0x00"
-                          name="DAC0REF"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="DAC0 Reference" initval="0x00" name="DAC0REF" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="AC Reference"
-                          initval="0x00"
-                          name="ACREF"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="AC Reference" initval="0x00" name="ACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
             </register-group>
@@ -6707,33 +2920,12 @@
         </module>
         <module caption="Watch-Dog Timer" id="wdt_windowed_v2" name="WDT">
             <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="WDT_PERIOD"/>
-                    <bitfield caption="Window"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="WDT_WINDOW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x0F" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xF0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Syncronization busy"
-                              mask="0x01"
-                              name="SYNCBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY" rw="R"/>
                     <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
                 </register>
             </register-group>
@@ -6768,60 +2960,25 @@
         </module>
         <module caption="Zero Cross Detect" id="cmp_zxover_ctrl_v3" name="ZCD">
             <register-group caption="Zero Cross Detect" name="ZCD" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Invert signal from pin"
-                              mask="0x08"
-                              name="INVERT"
-                              rw="RW"/>
+                    <bitfield caption="Invert signal from pin" mask="0x08" name="INVERT" rw="RW"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x03"
-                              name="INTMODE"
-                              rw="RW"
-                              values="ZCD_INTMODE"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x03" name="INTMODE" rw="RW" values="ZCD_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="ZCD Interrupt Flag" mask="0x01" name="CROSSIF" rw="RW"/>
-                    <bitfield caption="ZCD State"
-                              mask="0x10"
-                              name="STATE"
-                              rw="R"
-                              values="ZCD_STATE"/>
+                    <bitfield caption="ZCD State" mask="0x10" name="STATE" rw="R" values="ZCD_STATE"/>
                 </register>
             </register-group>
             <value-group caption="Interrupt Mode select" name="ZCD_INTMODE">
                 <value caption="No interrupt" name="NONE" value="0x0"/>
-                <value caption="Interrupt on rising input signal"
-                       name="RISING"
-                       value="0x1"/>
-                <value caption="Interrupt on falling input signal"
-                       name="FALLING"
-                       value="0x2"/>
-                <value caption="Interrupt on both rising and falling input signal"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Interrupt on rising input signal" name="RISING" value="0x1"/>
+                <value caption="Interrupt on falling input signal" name="FALLING" value="0x2"/>
+                <value caption="Interrupt on both rising and falling input signal" name="BOTH" value="0x3"/>
             </value-group>
             <value-group caption="ZCD State select" name="ZCD_STATE">
                 <value caption="Output is 0" name="LOW" value="0x0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD28.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD28.xml
index 915c7c3c..1359a622 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD28.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD28.xml
@@ -1,105 +1,29 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR32DD28"
-                 package="SOIC28"
-                 pinout="SOIC28MVIO"
-                 speedmax="32000000"
-                 tempmax="125"
-                 tempmin="-40"
-                 vccmax="5.5"
-                 vccmin="1.8"/>
+        <variant ordercode="AVR32DD28" package="SOIC28" pinout="SOIC28MVIO" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR32DD28" family="AVR8" architecture="AVR8X" avr-family="AVR DD">
         <address-spaces>
-            <address-space endianness="little"
-                           id="data"
-                           name="data"
-                           size="0x10000"
-                           start="0x0000">
-                <memory-segment exec="0"
-                                name="IO"
-                                rw="RW"
-                                size="0x103F"
-                                start="0x00"
-                                type="io"/>
-                <memory-segment exec="0"
-                                name="LOCKBITS"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x04"
-                                start="0x1040"
-                                type="lockbits"/>
-                <memory-segment exec="0"
-                                name="FUSES"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x10"
-                                start="0x1050"
-                                type="fuses"/>
-                <memory-segment exec="0"
-                                name="USER_SIGNATURES"
-                                pagesize="0x20"
-                                rw="RW"
-                                size="0x20"
-                                start="0x1080"
-                                type="user_signatures"/>
-                <memory-segment exec="0"
-                                name="SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x03"
-                                start="0x1100"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="PROD_SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x7D"
-                                start="0x1103"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="EEPROM"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x100"
-                                start="0x1400"
-                                type="eeprom"/>
-                <memory-segment exec="0"
-                                name="INTERNAL_SRAM"
-                                rw="RW"
-                                size="0x1000"
-                                start="0x7000"
-                                type="ram"/>
-                <memory-segment exec="0"
-                                name="MAPPED_PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x8000"
-                                start="0x8000"
-                                type="other"/>
+            <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+                <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00" type="io"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x04" start="0x1040" type="lockbits"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x1050" type="fuses"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x1080" type="user_signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x03" start="0x1100" type="signatures"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x1103" type="signatures"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x100" start="0x1400" type="eeprom"/>
+                <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1000" start="0x7000" type="ram"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x8000" type="other"/>
             </address-space>
-            <address-space endianness="little"
-                           id="prog"
-                           name="prog"
-                           size="0x8000"
-                           start="0x0000">
-                <memory-segment exec="1"
-                                name="PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x8000"
-                                start="0x00"
-                                type="flash"/>
+            <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
             <module id="cmp_control_v8" name="AC">
                 <instance name="AC0">
-                    <register-group address-space="data"
-                                    name="AC0"
-                                    name-in-module="AC"
-                                    offset="0x0680"/>
+                    <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
                     <signals>
                         <signal function="AC0" group="N" index="0" pad="PD3"/>
                         <signal function="AC0" group="N" index="2" pad="PD7"/>
@@ -107,20 +31,13 @@
                         <signal function="AC0" group="P" index="0" pad="PD2"/>
                         <signal function="AC0" group="P" index="3" pad="PD6"/>
                         <signal function="AC0" group="P" index="4" pad="PC3"/>
-                        <signal field="PORTMUX.ACROUTEA.AC0"
-                                function="AC0"
-                                group="OUT"
-                                index="0"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ACROUTEA.AC0" function="AC0" group="OUT" index="0" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
             <module id="adc_12b_diff_ctrl_v1" name="ADC">
                 <instance name="ADC0">
-                    <register-group address-space="data"
-                                    name="ADC0"
-                                    name-in-module="ADC"
-                                    offset="0x0600"/>
+                    <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
                     <signals>
                         <signal function="AIN0" group="AIN" index="1" pad="PD1"/>
                         <signal function="AIN0" group="AIN" index="2" pad="PD2"/>
@@ -146,143 +63,42 @@
             </module>
             <module id="bor_lvd_ctrl_v1" name="BOD">
                 <instance name="BOD">
-                    <register-group address-space="data"
-                                    name="BOD"
-                                    name-in-module="BOD"
-                                    offset="0x00A0"/>
+                    <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x00A0"/>
                 </instance>
             </module>
             <module id="cla_ccl_v1" name="CCL">
                 <instance name="CCL">
-                    <register-group address-space="data"
-                                    name="CCL"
-                                    name-in-module="CCL"
-                                    offset="0x01C0"/>
+                    <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
                     <signals>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_OUT"
-                                index="0"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_OUT"
-                                index="0"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="0"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_OUT"
-                                index="0"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="0"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL"
-                                group="LUT2_IN"
-                                index="1"
-                                pad="PD1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL"
-                                group="LUT2_IN"
-                                index="2"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL"
-                                group="LUT2_OUT"
-                                index="0"
-                                pad="PD3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_IN"
-                                index="1"
-                                pad="PD1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_IN"
-                                index="2"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_OUT"
-                                index="0"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3"
-                                function="CCL"
-                                group="LUT3_IN"
-                                index="0"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3"
-                                function="CCL"
-                                group="LUT3_IN"
-                                index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_OUT" index="0" pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="0" pad="PC0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="1" pad="PD1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="2" pad="PD2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0" pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="CLKCTRL">
                 <instance name="CLKCTRL">
-                    <register-group address-space="data"
-                                    name="CLKCTRL"
-                                    name-in-module="CLKCTRL"
-                                    offset="0x0060"/>
+                    <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
                     <signals>
                         <signal function="CLKCTRL" group="CLKOUT" pad="PA7"/>
                         <signal function="CLKCTRL" group="EXTCLK" pad="PA0"/>
@@ -297,10 +113,7 @@
             </module>
             <module id="cpu_avr_xt_v1" name="CPU">
                 <instance name="CPU">
-                    <register-group address-space="data"
-                                    name="CPU"
-                                    name-in-module="CPU"
-                                    offset="0x0030"/>
+                    <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V4S"/>
                     </parameters>
@@ -308,26 +121,17 @@
             </module>
             <module id="int_8bit_v3" name="CPUINT">
                 <instance name="CPUINT">
-                    <register-group address-space="data"
-                                    name="CPUINT"
-                                    name-in-module="CPUINT"
-                                    offset="0x0110"/>
+                    <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
                 </instance>
             </module>
             <module id="math_pdi_crc_v1" name="CRCSCAN">
                 <instance name="CRCSCAN">
-                    <register-group address-space="data"
-                                    name="CRCSCAN"
-                                    name-in-module="CRCSCAN"
-                                    offset="0x0120"/>
+                    <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
                 </instance>
             </module>
             <module id="dac_nbit_ctrl_v5" name="DAC">
                 <instance name="DAC0">
-                    <register-group address-space="data"
-                                    name="DAC0"
-                                    name-in-module="DAC"
-                                    offset="0x06A0"/>
+                    <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
                     <signals>
                         <signal function="DAC0" group="OUT" index="0" pad="PD6"/>
                     </signals>
@@ -335,90 +139,45 @@
             </module>
             <module id="avrdd" name="EVSYS">
                 <instance name="EVSYS">
-                    <register-group address-space="data"
-                                    name="EVSYS"
-                                    name-in-module="EVSYS"
-                                    offset="0x0200"/>
+                    <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="5"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT1" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="FUSE">
                 <instance name="FUSE">
-                    <register-group address-space="data"
-                                    name="FUSE"
-                                    name-in-module="FUSE"
-                                    offset="0x1050"/>
+                    <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1050"/>
                 </instance>
             </module>
             <module id="avrdd" name="GPR">
                 <instance name="GPR">
-                    <register-group address-space="data"
-                                    name="GPR"
-                                    name-in-module="GPR"
-                                    offset="0x001C"/>
+                    <register-group address-space="data" name="GPR" name-in-module="GPR" offset="0x001C"/>
                 </instance>
             </module>
             <module id="avrdd" name="LOCK">
                 <instance name="LOCK">
-                    <register-group address-space="data"
-                                    name="LOCK"
-                                    name-in-module="LOCK"
-                                    offset="0x1040"/>
+                    <register-group address-space="data" name="LOCK" name-in-module="LOCK" offset="0x1040"/>
                 </instance>
             </module>
             <module id="io_multiv_ctrl_avr_v1" name="MVIO">
                 <instance name="MVIO">
-                    <register-group address-space="data"
-                                    name="MVIO"
-                                    name-in-module="MVIO"
-                                    offset="0x00C0"/>
+                    <register-group address-space="data" name="MVIO" name-in-module="MVIO" offset="0x00C0"/>
                 </instance>
             </module>
             <module id="nvm_ctrl_avr_v1" name="NVMCTRL">
                 <instance name="NVMCTRL">
-                    <register-group address-space="data"
-                                    name="NVMCTRL"
-                                    name-in-module="NVMCTRL"
-                                    offset="0x1000"/>
+                    <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_port" name="PORT">
                 <instance name="PORTA">
-                    <register-group address-space="data"
-                                    name="PORTA"
-                                    name-in-module="PORT"
-                                    offset="0x0400"/>
+                    <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
@@ -431,10 +190,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC">
-                    <register-group address-space="data"
-                                    name="PORTC"
-                                    name-in-module="PORT"
-                                    offset="0x0440"/>
+                    <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
@@ -443,10 +199,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD">
-                    <register-group address-space="data"
-                                    name="PORTD"
-                                    name-in-module="PORT"
-                                    offset="0x0460"/>
+                    <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
                         <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
@@ -458,10 +211,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF">
-                    <register-group address-space="data"
-                                    name="PORTF"
-                                    name-in-module="PORT"
-                                    offset="0x04A0"/>
+                    <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PF0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PF1"/>
@@ -472,18 +222,12 @@
             </module>
             <module id="avrdd" name="PORTMUX">
                 <instance name="PORTMUX">
-                    <register-group address-space="data"
-                                    name="PORTMUX"
-                                    name-in-module="PORTMUX"
-                                    offset="0x05E0"/>
+                    <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
                 </instance>
             </module>
             <module id="rst_integration_v8" name="RSTCTRL">
                 <instance name="RSTCTRL">
-                    <register-group address-space="data"
-                                    name="RSTCTRL"
-                                    name-in-module="RSTCTRL"
-                                    offset="0x0040"/>
+                    <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
                     <signals>
                         <signal function="OTHER" group="RESET" pad="PF6"/>
                     </signals>
@@ -491,552 +235,201 @@
             </module>
             <module id="tmr_16b_rtc_v1" name="RTC">
                 <instance name="RTC">
-                    <register-group address-space="data"
-                                    name="RTC"
-                                    name-in-module="RTC"
-                                    offset="0x0140"/>
+                    <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
                 </instance>
             </module>
             <module id="avrdd" name="SIGROW">
                 <instance name="SIGROW">
-                    <register-group address-space="data"
-                                    name="SIGROW"
-                                    name-in-module="SIGROW"
-                                    offset="0x1100"/>
+                    <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
                 </instance>
             </module>
             <module id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
                 <instance name="SLPCTRL">
-                    <register-group address-space="data"
-                                    name="SLPCTRL"
-                                    name-in-module="SLPCTRL"
-                                    offset="0x0050"/>
+                    <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
                 </instance>
             </module>
             <module id="spi_8bit_v2" name="SPI">
                 <instance name="SPI0">
-                    <register-group address-space="data"
-                                    name="SPI0"
-                                    name-in-module="SPI"
-                                    offset="0x0940"/>
+                    <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0940"/>
                     <signals>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="MISO"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="MOSI"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="SCK"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="SS"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MISO"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MOSI"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="SCK"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="SS"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MISO"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MOSI"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SS"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="MISO"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="MOSI"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SS"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MISO"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MOSI"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SCK"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SS"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="MISO" pad="PA5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="MOSI" pad="PA4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="SCK" pad="PA6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="SS" pad="PA7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MISO" pad="PA1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MOSI" pad="PA0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="SCK" pad="PC0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="SS" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MISO" pad="PD5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MOSI" pad="PD4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SCK" pad="PD6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SS" pad="PD7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="MISO" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="MOSI" pad="PC0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SCK" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SS" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MISO" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MOSI" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SCK" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SS" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="SYSCFG">
                 <instance name="SYSCFG">
-                    <register-group address-space="data"
-                                    name="SYSCFG"
-                                    name-in-module="SYSCFG"
-                                    offset="0x0F00"/>
+                    <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
                 </instance>
             </module>
             <module id="tmr_16b_pwm_v1" name="TCA">
                 <instance name="TCA0">
-                    <register-group address-space="data"
-                                    name="TCA0"
-                                    name-in-module="TCA"
-                                    offset="0x0A00"/>
+                    <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
                     <signals>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="3"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="4"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="5"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="0"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="3"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="1"
-                                pad="PD1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="2"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="3"
-                                pad="PD3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="4"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="5"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="0"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="3" pad="PA3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="4" pad="PA4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="5" pad="PA5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="0" pad="PC0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="3" pad="PC3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="1" pad="PD1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="2" pad="PD2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="3" pad="PD3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="4" pad="PD4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="5" pad="PD5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="0" pad="PF0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="1" pad="PF1"/>
                     </signals>
                 </instance>
             </module>
             <module id="tmr_16b_capture_v1" name="TCB">
                 <instance name="TCB0">
-                    <register-group address-space="data"
-                                    name="TCB0"
-                                    name-in-module="TCB"
-                                    offset="0x0B00"/>
+                    <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0B00"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB0"
-                                function="TCB0"
-                                group="WO"
-                                index="0"
-                                pad="PA2"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA2"/>
                     </signals>
                 </instance>
                 <instance name="TCB1">
-                    <register-group address-space="data"
-                                    name="TCB1"
-                                    name-in-module="TCB"
-                                    offset="0x0B10"/>
+                    <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0B10"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB1"
-                                function="TCB1"
-                                group="WO"
-                                index="0"
-                                pad="PA3"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
                     </signals>
                 </instance>
                 <instance name="TCB2">
-                    <register-group address-space="data"
-                                    name="TCB2"
-                                    name-in-module="TCB"
-                                    offset="0x0B20"/>
+                    <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0B20"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB2"
-                                function="TCB2"
-                                group="WO"
-                                index="0"
-                                pad="PC0"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2" group="WO" index="0" pad="PC0"/>
                     </signals>
                 </instance>
             </module>
             <module id="tmr_12b_psc_v1" name="TCD">
                 <instance name="TCD0">
-                    <register-group address-space="data"
-                                    name="TCD0"
-                                    name-in-module="TCD"
-                                    offset="0x0B80"/>
+                    <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0B80"/>
                     <signals>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOA"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOB"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOC"
-                                index="2"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOD"
-                                index="3"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT2"
-                                group="WOA"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT2"
-                                group="WOB"
-                                index="1"
-                                pad="PF1"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOA"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOB"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOC"
-                                index="2"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOD"
-                                index="3"
-                                pad="PD5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOA" pad="PA4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOB" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2" pad="PD4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3" pad="PD5"/>
                     </signals>
                 </instance>
             </module>
             <module id="i2c_8bit_avr_v3" name="TWI">
                 <instance name="TWI0">
-                    <register-group address-space="data"
-                                    name="TWI0"
-                                    name-in-module="TWI"
-                                    offset="0x0900"/>
+                    <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0900"/>
                     <signals>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT1"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT1"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SCL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SDA"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SDA_DUAL" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT1" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT1" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SCL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SDA" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL" pad="PA1"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA" pad="PA0"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA_DUAL" pad="PC2"/>
                     </signals>
                 </instance>
             </module>
             <module id="uart_autobd_v4" name="USART">
                 <instance name="USART0">
-                    <register-group address-space="data"
-                                    name="USART0"
-                                    name-in-module="USART"
-                                    offset="0x0800"/>
+                    <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="RXD"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="TXD"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="XCK"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="XDIR"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="RXD"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="TXD"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="XCK"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="XDIR"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT2"
-                                group="RXD"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT2"
-                                group="TXD"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="RXD"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="TXD"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XDIR"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="RXD"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="TXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="XCK"
-                                pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="RXD" pad="PA5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="TXD" pad="PA4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="XCK" pad="PA6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="XDIR" pad="PA7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT2" group="RXD" pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT2" group="TXD" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="RXD" pad="PD5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="TXD" pad="PD4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XCK" pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XDIR" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="RXD" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="TXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="XCK" pad="PC3"/>
                     </signals>
                 </instance>
                 <instance name="USART1">
-                    <register-group address-space="data"
-                                    name="USART1"
-                                    name-in-module="USART"
-                                    offset="0x0820"/>
+                    <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="RXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="TXD"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XDIR"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="RXD"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="TXD"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="TXD" pad="PC0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="RXD" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="TXD" pad="PD6"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="USERROW">
                 <instance name="USERROW">
-                    <register-group address-space="data"
-                                    name="USERROW"
-                                    name-in-module="USERROW"
-                                    offset="0x1080"/>
+                    <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1080"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_vport" name="VPORT">
                 <instance name="VPORTA">
-                    <register-group address-space="data"
-                                    name="VPORTA"
-                                    name-in-module="VPORT"
-                                    offset="0x0000"/>
+                    <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
                 </instance>
                 <instance name="VPORTC">
-                    <register-group address-space="data"
-                                    name="VPORTC"
-                                    name-in-module="VPORT"
-                                    offset="0x0008"/>
+                    <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
                 </instance>
                 <instance name="VPORTD">
-                    <register-group address-space="data"
-                                    name="VPORTD"
-                                    name-in-module="VPORT"
-                                    offset="0x000C"/>
+                    <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
                 </instance>
                 <instance name="VPORTF">
-                    <register-group address-space="data"
-                                    name="VPORTF"
-                                    name-in-module="VPORT"
-                                    offset="0x0014"/>
+                    <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
                 </instance>
             </module>
             <module id="avrdd" name="VREF">
                 <instance name="VREF">
-                    <register-group address-space="data"
-                                    name="VREF"
-                                    name-in-module="VREF"
-                                    offset="0x00B0"/>
+                    <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00B0"/>
                 </instance>
             </module>
             <module id="wdt_windowed_v2" name="WDT">
                 <instance name="WDT">
-                    <register-group address-space="data"
-                                    name="WDT"
-                                    name-in-module="WDT"
-                                    offset="0x0100"/>
+                    <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
                 </instance>
             </module>
             <module id="cmp_zxover_ctrl_v3" name="ZCD">
                 <instance name="ZCD3">
-                    <register-group address-space="data"
-                                    name="ZCD3"
-                                    name-in-module="ZCD"
-                                    offset="0x06D8"/>
+                    <register-group address-space="data" name="ZCD3" name-in-module="ZCD" offset="0x06D8"/>
                     <signals>
-                        <signal field="PORTMUX.ZCDROUTEA.ZCD3"
-                                function="ZCD3"
-                                group="IN"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.ZCDROUTEA.ZCD3"
-                                function="ZCD3"
-                                group="OUT"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ZCDROUTEA.ZCD3" function="ZCD3" group="IN" pad="PC2"/>
+                        <signal field="PORTMUX.ZCDROUTEA.ZCD3" function="ZCD3" group="OUT" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
@@ -1108,90 +501,31 @@
     <modules>
         <module caption="Analog Comparator" id="cmp_control_v8" name="AC">
             <register-group caption="Analog Comparator" name="AC" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Hysteresis Mode"
-                              mask="0x06"
-                              name="HYSMODE"
-                              rw="RW"
-                              values="AC_HYSMODE"/>
-                    <bitfield caption="Power profile"
-                              mask="0x18"
-                              name="POWER"
-                              rw="RW"
-                              values="AC_POWER"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Power profile" mask="0x18" name="POWER" rw="RW" values="AC_POWER"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Mux Control A"
-                          initval="0x00"
-                          name="MUXCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input MUX Selection"
-                              mask="0x07"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection"
-                              mask="0x38"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="AC_MUXPOS"/>
-                    <bitfield caption="AC Output Initial Value"
-                              mask="0x40"
-                              name="INITVAL"
-                              rw="RW"
-                              values="AC_INITVAL"/>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Negative Input MUX Selection" mask="0x07" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+                    <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
                 </register>
-                <register caption="DAC Voltage Reference"
-                          initval="0xFF"
-                          name="DACREF"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="DAC Voltage Reference" initval="0xFF" name="DACREF" offset="0x5" rw="RW" size="1">
                     <bitfield caption="DACREF" mask="0xFF" name="DACREF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="WINSEL" value="0x00"/>
                     <mode name="WINDOW" qualifier="WINSEL" value="0x01 0x02"/>
                     <bitfield caption="Interrupt Enable" mask="0x01" name="CMP" rw="RW"/>
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="INTMODE"
-                              rw="RW"
-                              values="AC_NORMAL_INTMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" modes="NORMAL" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Comparator Interrupt Flag"
-                              mask="0x01"
-                              name="CMPIF"
-                              rw="RW"/>
-                    <bitfield caption="Analog Comparator State"
-                              mask="0x10"
-                              name="CMPSTATE"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x01" name="CMPIF" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -1201,23 +535,15 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption"
-                       name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
                 <value caption="Power profile 3" name="PROFILE3" value="0x3"/>
             </value-group>
             <value-group caption="Interrupt Mode select" name="AC_NORMAL_INTMODE">
-                <value caption="Positive and negative inputs crosses"
-                       name="BOTHEDGE"
-                       value="0x0"/>
-                <value caption="Positive input goes below negative input"
-                       name="NEGEDGE"
-                       value="0x2"/>
-                <value caption="Positive input goes above negative input"
-                       name="POSEDGE"
-                       value="0x3"/>
+                <value caption="Positive and negative inputs crosses" name="BOTHEDGE" value="0x0"/>
+                <value caption="Positive input goes below negative input" name="NEGEDGE" value="0x2"/>
+                <value caption="Positive input goes above negative input" name="POSEDGE" value="0x3"/>
             </value-group>
             <value-group caption="AC Output Initial Value select" name="AC_INITVAL">
                 <value caption="Output initialized to 0" name="LOW" value="0x0"/>
@@ -1235,194 +561,62 @@
                 <value caption="Positive Pin 4" name="AINP4" value="0x04"/>
             </value-group>
         </module>
-        <module caption="Analog to Digital Converter"
-                id="adc_12b_diff_ctrl_v1"
-                name="ADC">
+        <module caption="Analog to Digital Converter" id="adc_12b_diff_ctrl_v1" name="ADC">
             <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="ADC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Free running mode" mask="0x02" name="FREERUN" rw="RW"/>
-                    <bitfield caption="Resolution selection"
-                              mask="0x0C"
-                              name="RESSEL"
-                              rw="RW"
-                              values="ADC_RESSEL"/>
+                    <bitfield caption="Resolution selection" mask="0x0C" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
                     <bitfield caption="Left adjust result" mask="0x10" name="LEFTADJ" rw="RW"/>
-                    <bitfield caption="Conversion mode"
-                              mask="0x20"
-                              name="CONVMODE"
-                              rw="RW"
-                              values="ADC_CONVMODE"/>
+                    <bitfield caption="Conversion mode" mask="0x20" name="CONVMODE" rw="RW" values="ADC_CONVMODE"/>
                     <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Accumulation Samples"
-                              mask="0x07"
-                              name="SAMPNUM"
-                              rw="RW"
-                              values="ADC_SAMPNUM"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x07" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Pre-scaler"
-                              mask="0x0F"
-                              name="PRESC"
-                              rw="RW"
-                              values="ADC_PRESC"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x0F" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sampling Delay Selection"
-                              mask="0x0F"
-                              name="SAMPDLY"
-                              rw="RW"
-                              values="ADC_SAMPDLY"/>
-                    <bitfield caption="Initial Delay Selection"
-                              mask="0xE0"
-                              name="INITDLY"
-                              rw="RW"
-                              values="ADC_INITDLY"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Sampling Delay Selection" mask="0x0F" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xE0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Window Comparator Mode"
-                              mask="0x07"
-                              name="WINCM"
-                              rw="RW"
-                              values="ADC_WINCM"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x07" name="WINCM" rw="RW" values="ADC_WINCM"/>
                 </register>
-                <register caption="Sample Control"
-                          initval="0x00"
-                          name="SAMPCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Sample lenght" mask="0xFF" name="SAMPLEN" rw="RW"/>
                 </register>
-                <register caption="Positive mux input"
-                          initval="0x00"
-                          name="MUXPOS"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="ADC_MUXPOS"/>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
-                <register caption="Negative mux input"
-                          initval="0x00"
-                          name="MUXNEG"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="ADC_MUXNEG"/>
+                <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
-                <register caption="Command"
-                          initval="0x00"
-                          name="COMMAND"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Start Conversion" mask="0x01" name="STCONV" rw="RW"/>
                     <bitfield caption="Stop Conversion" mask="0x02" name="SPCONV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Start Event Input Enable"
-                              mask="0x01"
-                              name="STARTEI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x01" name="STARTEI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Result Ready Interrupt Enable"
-                              mask="0x01"
-                              name="RESRDY"
-                              rw="RW"/>
-                    <bitfield caption="Window Comparator Interrupt Enable"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x01" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
                     <bitfield caption="Result Ready Flag" mask="0x01" name="RESRDY" rw="RW"/>
-                    <bitfield caption="Window Comparator Flag"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Data"
-                          initval="0x00"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Temporary" mask="0xFF" name="TEMP" rw="RW"/>
                 </register>
-                <register caption="ADC Accumulator Result"
-                          name="RES"
-                          offset="0x10"
-                          rw="R"
-                          size="2"/>
-                <register caption="Window comparator low threshold"
-                          name="WINLT"
-                          offset="0x12"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Window comparator high threshold"
-                          name="WINHT"
-                          offset="0x14"
-                          rw="RW"
-                          size="2"/>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Conversion mode select" name="ADC_CONVMODE">
                 <value caption="Single-Ended mode" name="SINGLEENDED" value="0x0"/>
@@ -1552,99 +746,33 @@
         </module>
         <module caption="Bod interface" id="bor_lvd_ctrl_v1" name="BOD">
             <register-group caption="Bod interface" name="BOD" size="0x10">
-                <register caption="Control A"
-                          initval="0x01"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Operation in sleep mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="BOD_SLEEP"/>
-                    <bitfield caption="Operation in active mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="R"
-                              values="BOD_ACTIVE"/>
-                    <bitfield caption="Sample frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="R"
-                              values="BOD_SAMPFREQ"/>
+                <register caption="Control A" initval="0x01" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in sleep mode" mask="0x03" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                    <bitfield caption="Operation in active mode" mask="0x0C" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bod level"
-                              mask="0x07"
-                              name="LVL"
-                              rw="R"
-                              values="BOD_LVL"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x07" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor Control"
-                          initval="0x00"
-                          name="VLMCTRLA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level"
-                              mask="0x03"
-                              name="VLMLVL"
-                              rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x03" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor interrrupt enable"
-                              mask="0x01"
-                              name="VLMIE"
-                              rw="RW"/>
-                    <bitfield caption="Configuration"
-                              mask="0x06"
-                              name="VLMCFG"
-                              rw="RW"
-                              values="BOD_VLMCFG"/>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x01" name="VLMIE" rw="RW"/>
+                    <bitfield caption="Configuration" mask="0x06" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor interrupt flag"
-                              mask="0x01"
-                              name="VLMIF"
-                              rw="RW"/>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x01" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor status"
-                              mask="0x01"
-                              name="VLMS"
-                              rw="R"
-                              values="BOD_VLMS"/>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x01" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
                 <value caption="Disabled" name="DIS" value="0x00"/>
                 <value caption="Enabled" name="ENABLED" value="0x01"/>
                 <value caption="Sampled" name="SAMPLED" value="0x02"/>
-                <value caption="Enabled with wake-up halted until BOD is ready"
-                       name="ENWAKE"
-                       value="0x03"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
             </value-group>
             <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
                 <value caption="128Hz sampling frequency" name="128HZ" value="0x0"/>
@@ -1667,338 +795,103 @@
                 <value caption="VDD crosses VLM threshold" name="BOTH" value="0x02"/>
             </value-group>
             <value-group caption="Voltage level monitor status select" name="BOD_VLMS">
-                <value caption="The voltage is above the VLM threshold level"
-                       name="ABOVE"
-                       value="0x0"/>
-                <value caption="The voltage is below the VLM threshold level"
-                       name="BELOW"
-                       value="0x1"/>
+                <value caption="The voltage is above the VLM threshold level" name="ABOVE" value="0x0"/>
+                <value caption="The voltage is below the VLM threshold level" name="BELOW" value="0x1"/>
             </value-group>
             <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
                 <value caption="VLM Disabled" name="OFF" value="0x0"/>
-                <value caption="VLM threshold 5% above BOD level"
-                       name="5ABOVE"
-                       value="0x1"/>
-                <value caption="VLM threshold 15% above BOD level"
-                       name="15ABOVE"
-                       value="0x2"/>
-                <value caption="VLM threshold 25% above BOD level"
-                       name="25ABOVE"
-                       value="0x3"/>
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x1"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x2"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x3"/>
             </value-group>
         </module>
         <module caption="Configurable Custom Logic" id="cla_ccl_v1" name="CCL">
             <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Sequential Control 0"
-                          initval="0x00"
-                          name="SEQCTRL0"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Sequential Control 1"
-                          initval="0x00"
-                          name="SEQCTRL1"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Interrupt Control 0"
-                          initval="0x00"
-                          name="INTCTRL0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode for LUT0"
-                              mask="0x03"
-                              name="INTMODE0"
-                              rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1"
-                              mask="0x0C"
-                              name="INTMODE1"
-                              rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2"
-                              mask="0x30"
-                              name="INTMODE2"
-                              rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3"
-                              mask="0xC0"
-                              name="INTMODE3"
-                              rw="RW"
-                              values="CCL_INTMODE3"/>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x03" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0x0C" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xC0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x0F" name="INT" rw="RW"/>
                 </register>
-                <register caption="LUT 0 Control A"
-                          initval="0x00"
-                          name="LUT0CTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 0 Control A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 0 Control B"
-                          initval="0x00"
-                          name="LUT0CTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 0 Control C"
-                          initval="0x00"
-                          name="LUT0CTRLC"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 0"
-                          initval="0x00"
-                          name="TRUTH0"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 1 Control A"
-                          initval="0x00"
-                          name="LUT1CTRLA"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 1 Control A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 1 Control B"
-                          initval="0x00"
-                          name="LUT1CTRLB"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 1 Control C"
-                          initval="0x00"
-                          name="LUT1CTRLC"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 1"
-                          initval="0x00"
-                          name="TRUTH1"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 2 Control A"
-                          initval="0x00"
-                          name="LUT2CTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 2 Control A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 2 Control B"
-                          initval="0x00"
-                          name="LUT2CTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 2 Control C"
-                          initval="0x00"
-                          name="LUT2CTRLC"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 2"
-                          initval="0x00"
-                          name="TRUTH2"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 3 Control A"
-                          initval="0x00"
-                          name="LUT3CTRLA"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 3 Control A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 3 Control B"
-                          initval="0x00"
-                          name="LUT3CTRLB"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 3 Control C"
-                          initval="0x00"
-                          name="LUT3CTRLC"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 3"
-                          initval="0x00"
-                          name="TRUTH3"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
             </register-group>
@@ -2029,13 +922,9 @@
             <value-group caption="Clock Source Selection" name="CCL_CLKSRC">
                 <value caption="Peripheral Clock" name="CLKPER" value="0x0"/>
                 <value caption="Selection by INSEL2" name="IN2" value="0x1"/>
-                <value caption="Internal High-Frequency Oscillator"
-                       name="OSCHF"
-                       value="0x4"/>
+                <value caption="Internal High-Frequency Oscillator" name="OSCHF" value="0x4"/>
                 <value caption="32.768 kHz oscillator" name="OSC32K" value="0x5"/>
-                <value caption="32.768 kHz oscillator divided by 32"
-                       name="OSC1K"
-                       value="0x6"/>
+                <value caption="32.768 kHz oscillator divided by 32" name="OSC1K" value="0x6"/>
             </value-group>
             <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
                 <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
@@ -2101,195 +990,67 @@
         </module>
         <module caption="Clock controller" id="avrdd" name="CLKCTRL">
             <register-group caption="Clock controller" name="CLKCTRL" size="0x40">
-                <register caption="MCLK Control A"
-                          initval="0x00"
-                          name="MCLKCTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="CLKCTRL_CLKSEL"/>
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock select" mask="0x07" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
                     <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
                 </register>
-                <register caption="MCLK Control B"
-                          initval="0x00"
-                          name="MCLKCTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Prescaler enable" mask="0x01" name="PEN" rw="RW"/>
-                    <bitfield caption="Prescaler division"
-                              mask="0x1E"
-                              name="PDIV"
-                              rw="RW"
-                              values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler division" mask="0x1E" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
                 </register>
-                <register caption="MCLK Control C"
-                          initval="0x00"
-                          name="MCLKCTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Enable"
-                              mask="0x01"
-                              name="CFDEN"
-                              rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Test"
-                              mask="0x02"
-                              name="CFDTST"
-                              rw="W"/>
-                    <bitfield caption="Clock Failure Detect Source"
-                              mask="0x0C"
-                              name="CFDSRC"
-                              rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Enable" mask="0x01" name="CFDEN" rw="RW"/>
+                    <bitfield caption="Clock Failure Detect Test" mask="0x02" name="CFDTST" rw="W"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0x0C" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                 </register>
-                <register caption="MCLK Interrupt Control"
-                          initval="0x00"
-                          name="MCLKINTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Enable"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt type"
-                              mask="0x80"
-                              name="INTTYPE"
-                              rw="RW"
-                              values="CLKCTRL_INTTYPE"/>
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x01" name="CFD" rw="RW"/>
+                    <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags"
-                          initval="0x00"
-                          name="MCLKINTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Flag"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x01" name="CFD" rw="RW"/>
                 </register>
-                <register caption="MCLK Status"
-                          initval="0x00"
-                          name="MCLKSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="System Oscillator changing"
-                              mask="0x01"
-                              name="SOSC"
-                              rw="RW"/>
-                    <bitfield caption="High frequency oscillator status"
-                              mask="0x02"
-                              name="OSCHFS"
-                              rw="RW"/>
-                    <bitfield caption="32KHz oscillator status"
-                              mask="0x04"
-                              name="OSC32KS"
-                              rw="RW"/>
-                    <bitfield caption="32.768 kHz Crystal Oscillator status"
-                              mask="0x08"
-                              name="XOSC32KS"
-                              rw="RW"/>
+                <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="System Oscillator changing" mask="0x01" name="SOSC" rw="RW"/>
+                    <bitfield caption="High frequency oscillator status" mask="0x02" name="OSCHFS" rw="RW"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x04" name="OSC32KS" rw="RW"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x08" name="XOSC32KS" rw="RW"/>
                     <bitfield caption="External Clock status" mask="0x10" name="EXTS" rw="RW"/>
                     <bitfield caption="PLL oscillator status" mask="0x20" name="PLLS" rw="RW"/>
                 </register>
-                <register caption="OSCHF Control A"
-                          initval="0x0C"
-                          name="OSCHFCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Control A" initval="0x0C" name="OSCHFCTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="Autotune" mask="0x01" name="AUTOTUNE" rw="RW"/>
-                    <bitfield caption="Frequency select"
-                              mask="0x3C"
-                              name="FRQSEL"
-                              rw="RW"
-                              values="CLKCTRL_FRQSEL"/>
+                    <bitfield caption="Frequency select" mask="0x3C" name="FRQSEL" rw="RW" values="CLKCTRL_FRQSEL"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSCHF Tune"
-                          name="OSCHFTUNE"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Tune" name="OSCHFTUNE" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Tune" mask="0xFF" name="TUNE" rw="RW"/>
                 </register>
-                <register caption="PLL Control A"
-                          name="PLLCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multiplication factor"
-                              mask="0x03"
-                              name="MULFAC"
-                              rw="RW"
-                              values="CLKCTRL_MULFAC"/>
-                    <bitfield caption="Source"
-                              mask="0x40"
-                              name="SOURCE"
-                              rw="RW"
-                              values="CLKCTRL_SOURCE"/>
+                <register caption="PLL Control A" name="PLLCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Multiplication factor" mask="0x03" name="MULFAC" rw="RW" values="CLKCTRL_MULFAC"/>
+                    <bitfield caption="Source" mask="0x40" name="SOURCE" rw="RW" values="CLKCTRL_SOURCE"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSC32K Control A"
-                          initval="0x00"
-                          name="OSC32KCTRLA"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC32K Control A"
-                          initval="0x00"
-                          name="XOSC32KCTRLA"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Low power mode" mask="0x02" name="LPMODE" rw="RW"/>
                     <bitfield caption="Select" mask="0x04" name="SEL" rw="RW"/>
-                    <bitfield caption="Crystal startup time"
-                              mask="0x30"
-                              name="CSUT"
-                              rw="RW"
-                              values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC HF Control A"
-                          initval="0x00"
-                          name="XOSCHFCTRLA"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC HF Control A" initval="0x00" name="XOSCHFCTRLA" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="External Source Select"
-                              mask="0x02"
-                              name="SELHF"
-                              rw="RW"
-                              values="CLKCTRL_SELHF"/>
-                    <bitfield caption="Frequency Range"
-                              mask="0x0C"
-                              name="FRQRANGE"
-                              rw="RW"
-                              values="CLKCTRL_FRQRANGE"/>
-                    <bitfield caption="Start-up Time Select"
-                              mask="0x30"
-                              name="CSUTHF"
-                              rw="RW"
-                              values="CLKCTRL_CSUTHF"/>
+                    <bitfield caption="External Source Select" mask="0x02" name="SELHF" rw="RW" values="CLKCTRL_SELHF"/>
+                    <bitfield caption="Frequency Range" mask="0x0C" name="FRQRANGE" rw="RW" values="CLKCTRL_FRQRANGE"/>
+                    <bitfield caption="Start-up Time Select" mask="0x30" name="CSUTHF" rw="RW" values="CLKCTRL_CSUTHF"/>
                     <bitfield caption="Run Standby" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Clock select" name="CLKCTRL_CLKSEL">
-                <value caption="Internal high-frequency oscillator"
-                       name="OSCHF"
-                       value="0x0"/>
+                <value caption="Internal high-frequency oscillator" name="OSCHF" value="0x0"/>
                 <value caption="Internal 32.768 kHz oscillator" name="OSC32K" value="0x1"/>
                 <value caption="32.768 kHz crystal oscillator" name="XOSC32K" value="0x2"/>
                 <value caption="External clock" name="EXTCLK" value="0x3"/>
@@ -2333,12 +1094,8 @@
                 <value caption="3 x multiplication factor" name="3x" value="0x2"/>
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
-                <value caption="High frequency internal oscillator as PLL source"
-                       name="OSCHF"
-                       value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF"
-                       value="0x1"/>
+                <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -2364,44 +1121,19 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection"
-                          initval="0x00"
-                          name="CCP"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCP signature"
-                              mask="0xFF"
-                              name="CCP"
-                              rw="RW"
-                              values="CPU_CCP"/>
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Stack Pointer"
-                          initval="0x7FFF"
-                          name="SP"
-                          offset="0xD"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Status Register"
-                          initval="0x00"
-                          name="SREG"
-                          offset="0xF"
-                          rw="RW"
-                          size="1">
+                <register caption="Stack Pointer" initval="0x7FFF" name="SP" offset="0xD" rw="RW" size="2"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
                     <bitfield caption="Carry Flag" mask="0x01" name="C" rw="RW"/>
                     <bitfield caption="Zero Flag" mask="0x02" name="Z" rw="RW"/>
                     <bitfield caption="Negative Flag" mask="0x04" name="N" rw="RW"/>
-                    <bitfield caption="Two's Complement Overflow Flag"
-                              mask="0x08"
-                              name="V"
-                              rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V" rw="RW"/>
                     <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
                     <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
                     <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
-                    <bitfield caption="Global Interrupt Enable Flag"
-                              mask="0x80"
-                              name="I"
-                              rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="CCP signature select" name="CPU_CCP">
@@ -2411,530 +1143,157 @@
         </module>
         <module caption="Interrupt Controller" id="int_8bit_v3" name="CPUINT">
             <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Round-robin Scheduling Enable"
-                              mask="0x01"
-                              name="LVL0RR"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x01" name="LVL0RR" rw="RW"/>
                     <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
-                    <bitfield caption="Interrupt Vector Select"
-                              mask="0x40"
-                              name="IVSEL"
-                              rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Level 0 Interrupt Executing"
-                              mask="0x01"
-                              name="LVL0EX"
-                              rw="R"/>
-                    <bitfield caption="Level 1 Interrupt Executing"
-                              mask="0x02"
-                              name="LVL1EX"
-                              rw="R"/>
-                    <bitfield caption="Non-maskable Interrupt Executing"
-                              mask="0x80"
-                              name="NMIEX"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x01" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x02" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority"
-                          initval="0x00"
-                          name="LVL0PRI"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Level Priority"
-                              mask="0xFF"
-                              name="LVL0PRI"
-                              rw="RW"/>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xFF" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector"
-                          initval="0x00"
-                          name="LVL1VEC"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Vector with High Priority"
-                              mask="0xFF"
-                              name="LVL1VEC"
-                              rw="RW"/>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xFF" name="LVL1VEC" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="CRCSCAN" id="math_pdi_crc_v1" name="CRCSCAN">
             <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable CRC scan" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Enable NMI Trigger" mask="0x02" name="NMIEN" rw="RW"/>
                     <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CRC Source"
-                              mask="0x03"
-                              name="SRC"
-                              rw="RW"
-                              values="CRCSCAN_SRC"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x03" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
                 </register>
-                <register caption="Status"
-                          initval="0x02"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="CRC Busy" mask="0x01" name="BUSY" rw="R"/>
                     <bitfield caption="CRC Ok" mask="0x02" name="OK" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="CRC Source select" name="CRCSCAN_SRC">
                 <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
-                <value caption="CRC on boot and appl section of flash"
-                       name="APPLICATION"
-                       value="0x1"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
                 <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
             </value-group>
         </module>
-        <module caption="Digital to Analog Converter"
-                id="dac_nbit_ctrl_v5"
-                name="DAC">
+        <module caption="Digital to Analog Converter" id="dac_nbit_ctrl_v5" name="DAC">
             <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="DAC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="DATA Register"
-                          name="DATA"
-                          offset="0x2"
-                          rw="RW"
-                          size="2">
+                <register caption="DATA Register" name="DATA" offset="0x2" rw="RW" size="2">
                     <bitfield caption="Data" mask="0xFFC0" name="DATA" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Event System" id="avrdd" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Software Event A"
-                          initval="0x00"
-                          name="SWEVENTA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0xFF"
-                              name="SWEVENTA"
-                              rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0xFF" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
-                <register caption="Software Event B"
-                          initval="0x00"
-                          name="SWEVENTB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0x03"
-                              name="SWEVENTB"
-                              rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0x03" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
-                <register caption="Multiplexer Channel 0"
-                          initval="0x00"
-                          name="CHANNEL0"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 0 generator select"
-                              mask="0xFF"
-                              name="CHANNEL0"
-                              rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Channel 0 generator select" mask="0xFF" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
-                <register caption="Multiplexer Channel 1"
-                          initval="0x00"
-                          name="CHANNEL1"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 1 generator select"
-                              mask="0xFF"
-                              name="CHANNEL1"
-                              rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Channel 1 generator select" mask="0xFF" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
-                <register caption="Multiplexer Channel 2"
-                          initval="0x00"
-                          name="CHANNEL2"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 2 generator select"
-                              mask="0xFF"
-                              name="CHANNEL2"
-                              rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Channel 2 generator select" mask="0xFF" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
-                <register caption="Multiplexer Channel 3"
-                          initval="0x00"
-                          name="CHANNEL3"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 3 generator select"
-                              mask="0xFF"
-                              name="CHANNEL3"
-                              rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Channel 3 generator select" mask="0xFF" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
-                <register caption="Multiplexer Channel 4"
-                          initval="0x00"
-                          name="CHANNEL4"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 4 generator select"
-                              mask="0xFF"
-                              name="CHANNEL4"
-                              rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Channel 4 generator select" mask="0xFF" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
-                <register caption="Multiplexer Channel 5"
-                          initval="0x00"
-                          name="CHANNEL5"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 5 generator select"
-                              mask="0xFF"
-                              name="CHANNEL5"
-                              rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Channel 5 generator select" mask="0xFF" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT0A"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT0B"
-                          offset="0x21"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT1A"
-                          offset="0x22"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT1B"
-                          offset="0x23"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT2A"
-                          offset="0x24"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT2B"
-                          offset="0x25"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT3A"
-                          offset="0x26"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT3B"
-                          offset="0x27"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 12 - ADC0"
-                          initval="0x00"
-                          name="USERADC0START"
-                          offset="0x28"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTA"
-                          offset="0x29"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTC"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTD"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTF"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0"
-                          initval="0x00"
-                          name="USERUSART0IRDA"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1"
-                          initval="0x00"
-                          name="USERUSART1IRDA"
-                          offset="0x2E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A"
-                          initval="0x00"
-                          name="USERTCA0CNTA"
-                          offset="0x2F"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B"
-                          initval="0x00"
-                          name="USERTCA0CNTB"
-                          offset="0x30"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A"
-                          initval="0x00"
-                          name="USERTCB0CAPT"
-                          offset="0x31"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B"
-                          initval="0x00"
-                          name="USERTCB0COUNT"
-                          offset="0x32"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A"
-                          initval="0x00"
-                          name="USERTCB1CAPT"
-                          offset="0x33"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B"
-                          initval="0x00"
-                          name="USERTCB1COUNT"
-                          offset="0x34"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A"
-                          initval="0x00"
-                          name="USERTCB2CAPT"
-                          offset="0x35"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B"
-                          initval="0x00"
-                          name="USERTCB2COUNT"
-                          offset="0x36"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A"
-                          initval="0x00"
-                          name="USERTCD0INPUTA"
-                          offset="0x37"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B"
-                          initval="0x00"
-                          name="USERTCD0INPUTB"
-                          offset="0x38"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
             <value-group caption="Channel 0 generator select" name="EVSYS_CHANNEL0">
@@ -2943,30 +1302,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -2981,21 +1324,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3013,30 +1346,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3051,21 +1368,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3083,30 +1390,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3124,21 +1415,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3156,30 +1437,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3197,21 +1462,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3229,30 +1484,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3263,21 +1502,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3295,30 +1524,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3329,21 +1542,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3371,149 +1574,48 @@
             </value-group>
             <value-group caption="User channel select" name="EVSYS_USER">
                 <value caption="Off" name="OFF" value="0x0"/>
-                <value caption="Connect user to event channel 0"
-                       name="CHANNEL0"
-                       value="0x1"/>
-                <value caption="Connect user to event channel 1"
-                       name="CHANNEL1"
-                       value="0x2"/>
-                <value caption="Connect user to event channel 2"
-                       name="CHANNEL2"
-                       value="0x3"/>
-                <value caption="Connect user to event channel 3"
-                       name="CHANNEL3"
-                       value="0x4"/>
-                <value caption="Connect user to event channel 4"
-                       name="CHANNEL4"
-                       value="0x5"/>
-                <value caption="Connect user to event channel 5"
-                       name="CHANNEL5"
-                       value="0x6"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
             </value-group>
         </module>
         <module caption="Fuses" id="avrdd" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Watchdog Configuration"
-                          initval="0x00"
-                          name="WDTCFG"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Watchdog Timeout Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="FUSE_WINDOW"/>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
-                <register caption="BOD Configuration"
-                          initval="0x00"
-                          name="BODCFG"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="BOD Operation in Sleep Mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="FUSE_SLEEP"/>
-                    <bitfield caption="BOD Operation in Active Mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="RW"
-                              values="FUSE_ACTIVE"/>
-                    <bitfield caption="BOD Sample Frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Level"
-                              mask="0xE0"
-                              name="LVL"
-                              rw="RW"
-                              values="FUSE_LVL"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x03" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x0C" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Level" mask="0xE0" name="LVL" rw="RW" values="FUSE_LVL"/>
                 </register>
-                <register caption="Oscillator Configuration"
-                          initval="0x00"
-                          name="OSCCFG"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Frequency Select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="FUSE_CLKSEL"/>
+                <register caption="Oscillator Configuration" initval="0x00" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x07" name="CLKSEL" rw="RW" values="FUSE_CLKSEL"/>
                 </register>
-                <register caption="System Configuration 0"
-                          initval="0xD0"
-                          name="SYSCFG0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="System Configuration 0" initval="0xD0" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="EEPROM Save" mask="0x01" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration"
-                              mask="0x08"
-                              name="RSTPINCFG"
-                              rw="RW"
-                              values="FUSE_RSTPINCFG"/>
-                    <bitfield caption="UPDI Pin Configuration"
-                              mask="0x10"
-                              name="UPDIPINCFG"
-                              rw="RW"
-                              values="FUSE_UPDIPINCFG"/>
-                    <bitfield caption="CRC Select"
-                              mask="0x20"
-                              name="CRCSEL"
-                              rw="RW"
-                              values="FUSE_CRCSEL"/>
-                    <bitfield caption="CRC Source"
-                              mask="0xC0"
-                              name="CRCSRC"
-                              rw="RW"
-                              values="FUSE_CRCSRC"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x08" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW" values="FUSE_UPDIPINCFG"/>
+                    <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
+                    <bitfield caption="CRC Source" mask="0xC0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                 </register>
-                <register caption="System Configuration 1"
-                          initval="0x08"
-                          name="SYSCFG1"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Startup Time"
-                              mask="0x07"
-                              name="SUT"
-                              rw="RW"
-                              values="FUSE_SUT"/>
-                    <bitfield caption="MVIO System Configuration"
-                              mask="0x18"
-                              name="MVSYSCFG"
-                              rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x07" name="SUT" rw="RW" values="FUSE_SUT"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                 </register>
-                <register caption="Code Section Size"
-                          initval="0x00"
-                          name="CODESIZE"
-                          offset="0x7"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Boot Section Size"
-                          initval="0x00"
-                          name="BOOTSIZE"
-                          offset="0x8"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
+                <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT"
-                       value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -3539,13 +1641,9 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)"
-                       name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
-                <value caption="CRC of application code and boot sections"
-                       name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -3557,12 +1655,8 @@
                 <value caption="UPDI Mode" name="UPDI" value="0x1"/>
             </value-group>
             <value-group caption="MVIO System Configuration select" name="FUSE_MVSYSCFG">
-                <value caption="Device used in a dual supply configuration"
-                       name="DUAL"
-                       value="0x1"/>
-                <value caption="Device used in a single supply configuration"
-                       name="SINGLE"
-                       value="0x2"/>
+                <value caption="Device used in a dual supply configuration" name="DUAL" value="0x1"/>
+                <value caption="Device used in a single supply configuration" name="SINGLE" value="0x2"/>
             </value-group>
             <value-group caption="Startup Time select" name="FUSE_SUT">
                 <value caption="0 ms" name="0MS" value="0x00"/>
@@ -3605,41 +1699,16 @@
         </module>
         <module caption="General Purpose Registers" id="avrdd" name="GPR">
             <register-group caption="General Purpose Registers" name="GPR" size="0x4">
-                <register caption="General Purpose Register 0"
-                          name="GPR0"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 1"
-                          name="GPR1"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 2"
-                          name="GPR2"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 3"
-                          name="GPR3"
-                          offset="0x3"
-                          rw="RW"
-                          size="1"/>
+                <register caption="General Purpose Register 0" name="GPR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose Register 1" name="GPR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose Register 2" name="GPR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose Register 3" name="GPR3" offset="0x3" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Lockbits" id="avrdd" name="LOCK">
             <register-group caption="Lockbits" name="LOCK" size="0x4">
-                <register caption="Lock Key Bits"
-                          initval="0x5CC5C55C"
-                          name="KEY"
-                          offset="0x0"
-                          rw="RW"
-                          size="4">
-                    <bitfield caption="Lock Key"
-                              mask="0xFFFFFFFF"
-                              name="KEY"
-                              rw="RW"
-                              values="LOCK_KEY"/>
+                <register caption="Lock Key Bits" initval="0x5CC5C55C" name="KEY" offset="0x0" rw="RW" size="4">
+                    <bitfield caption="Lock Key" mask="0xFFFFFFFF" name="KEY" rw="RW" values="LOCK_KEY"/>
                 </register>
             </register-group>
             <value-group caption="Lock Key select" name="LOCK_KEY">
@@ -3649,154 +1718,61 @@
         </module>
         <module caption="Multi-Voltage I/O" id="io_multiv_ctrl_avr_v1" name="MVIO">
             <register-group caption="Multi-Voltage I/O" name="MVIO" size="0x4">
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Enable"
-                              mask="0x01"
-                              name="VDDIO2IE"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Enable" mask="0x01" name="VDDIO2IE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Flag"
-                              mask="0x01"
-                              name="VDDIO2IF"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Flag" mask="0x01" name="VDDIO2IF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="VDDIO2 Status" mask="0x01" name="VDDIO2S" rw="R"/>
                 </register>
             </register-group>
         </module>
-        <module caption="Non-volatile Memory Controller"
-                id="nvm_ctrl_avr_v1"
-                name="NVMCTRL">
+        <module caption="Non-volatile Memory Controller" id="nvm_ctrl_avr_v1" name="NVMCTRL">
             <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x7F"
-                              name="CMD"
-                              rw="RW"
-                              values="NVMCTRL_CMD"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x30"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Application Code Write Protect"
-                              mask="0x01"
-                              name="APPCODEWP"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x30" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Application Code Write Protect" mask="0x01" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x02" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Application Data Write Protect"
-                              mask="0x04"
-                              name="APPDATAWP"
-                              rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space"
-                              mask="0x30"
-                              name="FLMAP"
-                              rw="RW"
-                              values="NVMCTRL_FLMAP"/>
-                    <bitfield caption="Flash Mapping Lock"
-                              mask="0x80"
-                              name="FLMAPLOCK"
-                              rw="RW"/>
+                    <bitfield caption="Application Data Write Protect" mask="0x04" name="APPDATAWP" rw="RW"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x02"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x02" rw="R" size="1">
                     <bitfield caption="Flash busy" mask="0x01" name="FBUSY" rw="R"/>
                     <bitfield caption="EEPROM busy" mask="0x02" name="EEBUSY" rw="R"/>
-                    <bitfield caption="Write error"
-                              mask="0x70"
-                              name="ERROR"
-                              rw="R"
-                              values="NVMCTRL_ERROR"/>
+                    <bitfield caption="Write error" mask="0x70" name="ERROR" rw="R" values="NVMCTRL_ERROR"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
-                <register caption="Address"
-                          name="ADDR"
-                          offset="0x08"
-                          rw="RW"
-                          size="4"/>
+                <register caption="Address" name="ADDR" offset="0x08" rw="RW" size="4"/>
             </register-group>
             <value-group caption="Command select" name="NVMCTRL_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
                 <value caption="No Operation" name="NOOP" value="0x01"/>
                 <value caption="Flash Write" name="FLWR" value="0x02"/>
                 <value caption="Flash Page Erase" name="FLPER" value="0x08"/>
-                <value caption="Flash Multi-Page Erase 2 pages"
-                       name="FLMPER2"
-                       value="0x09"/>
-                <value caption="Flash Multi-Page Erase 4 pages"
-                       name="FLMPER4"
-                       value="0x0A"/>
-                <value caption="Flash Multi-Page Erase 8 pages"
-                       name="FLMPER8"
-                       value="0x0B"/>
-                <value caption="Flash Multi-Page Erase 16 pages"
-                       name="FLMPER16"
-                       value="0x0C"/>
-                <value caption="Flash Multi-Page Erase 32 pages"
-                       name="FLMPER32"
-                       value="0x0D"/>
+                <value caption="Flash Multi-Page Erase 2 pages" name="FLMPER2" value="0x09"/>
+                <value caption="Flash Multi-Page Erase 4 pages" name="FLMPER4" value="0x0A"/>
+                <value caption="Flash Multi-Page Erase 8 pages" name="FLMPER8" value="0x0B"/>
+                <value caption="Flash Multi-Page Erase 16 pages" name="FLMPER16" value="0x0C"/>
+                <value caption="Flash Multi-Page Erase 32 pages" name="FLMPER32" value="0x0D"/>
                 <value caption="EEPROM Write" name="EEWR" value="0x12"/>
                 <value caption="EEPROM Erase and Write" name="EEERWR" value="0x13"/>
                 <value caption="EEPROM Byte Erase" name="EEBER" value="0x18"/>
-                <value caption="EEPROM Multi-Byte Erase 2 bytes"
-                       name="EEMBER2"
-                       value="0x19"/>
-                <value caption="EEPROM Multi-Byte Erase 4 bytes"
-                       name="EEMBER4"
-                       value="0x1A"/>
-                <value caption="EEPROM Multi-Byte Erase 8 bytes"
-                       name="EEMBER8"
-                       value="0x1B"/>
-                <value caption="EEPROM Multi-Byte Erase 16 bytes"
-                       name="EEMBER16"
-                       value="0x1C"/>
-                <value caption="EEPROM Multi-Byte Erase 32 bytes"
-                       name="EEMBER32"
-                       value="0x1D"/>
+                <value caption="EEPROM Multi-Byte Erase 2 bytes" name="EEMBER2" value="0x19"/>
+                <value caption="EEPROM Multi-Byte Erase 4 bytes" name="EEMBER4" value="0x1A"/>
+                <value caption="EEPROM Multi-Byte Erase 8 bytes" name="EEMBER8" value="0x1B"/>
+                <value caption="EEPROM Multi-Byte Erase 16 bytes" name="EEMBER16" value="0x1C"/>
+                <value caption="EEPROM Multi-Byte Erase 32 bytes" name="EEMBER32" value="0x1D"/>
                 <value caption="Chip Erase Command" name="CHER" value="0x20"/>
                 <value caption="EEPROM Erase Command" name="EECHER" value="0x30"/>
             </value-group>
@@ -3809,404 +1785,135 @@
             <value-group caption="Write error select" name="NVMCTRL_ERROR">
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
-                <value caption="Write to section not allowed"
-                       name="ILLEGALSADDR"
-                       value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted"
-                       name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed"
-                       name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_avr_v2_port" name="PORT">
             <register-group caption="I/O Ports" name="PORT" size="0x20">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Set"
-                          name="DIRSET"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Clear"
-                          name="DIRCLR"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Toggle"
-                          name="DIRTGL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Set"
-                          name="OUTSET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Clear"
-                          name="OUTCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Toggle"
-                          name="OUTTGL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
-                <register caption="Port Control"
-                          initval="0x00"
-                          name="PORTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Slew Rate Limit Enable" mask="0x01" name="SRL" rw="RW"/>
                 </register>
-                <register caption="Pin Control Config"
-                          initval="0x00"
-                          name="PINCONFIG"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin Control Config" initval="0x00" name="PINCONFIG" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin Control Update"
-                          initval="0x00"
-                          name="PINCTRLUPD"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control update mask"
-                              mask="0xFF"
-                              name="PINCTRLUPD"
-                              rw="RW"/>
+                <register caption="Pin Control Update" initval="0x00" name="PINCTRLUPD" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Pin control update mask" mask="0xFF" name="PINCTRLUPD" rw="RW"/>
                 </register>
-                <register caption="Pin Control Set"
-                          initval="0x00"
-                          name="PINCTRLSET"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control set mask"
-                              mask="0xFF"
-                              name="PINCTRLSET"
-                              rw="RW"/>
+                <register caption="Pin Control Set" initval="0x00" name="PINCTRLSET" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Pin control set mask" mask="0xFF" name="PINCTRLSET" rw="RW"/>
                 </register>
-                <register caption="Pin Control Clear"
-                          initval="0x00"
-                          name="PINCTRLCLR"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control clear mask"
-                              mask="0xFF"
-                              name="PINCTRLCLR"
-                              rw="RW"/>
+                <register caption="Pin Control Clear" initval="0x00" name="PINCTRLCLR" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Pin control clear mask" mask="0xFF" name="PINCTRLCLR" rw="RW"/>
                 </register>
-                <register caption="Pin 0 Control"
-                          initval="0x00"
-                          name="PIN0CTRL"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 1 Control"
-                          initval="0x00"
-                          name="PIN1CTRL"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 2 Control"
-                          initval="0x00"
-                          name="PIN2CTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 3 Control"
-                          initval="0x00"
-                          name="PIN3CTRL"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 4 Control"
-                          initval="0x00"
-                          name="PIN4CTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 5 Control"
-                          initval="0x00"
-                          name="PIN5CTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 6 Control"
-                          initval="0x00"
-                          name="PIN6CTRL"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 7 Control"
-                          initval="0x00"
-                          name="PIN7CTRL"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
-                <value caption="Interrupt disabled but input buffer enabled"
-                       name="INTDISABLE"
-                       value="0x0"/>
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
                 <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
                 <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
                 <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
-                <value caption="Digital Input Buffer disabled"
-                       name="INPUT_DISABLE"
-                       value="0x4"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
                 <value caption="Sense low Level" name="LEVEL" value="0x5"/>
             </value-group>
         </module>
         <module caption="Port Multiplexer" id="avrdd" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="EVSYS route A"
-                          initval="0x00"
-                          name="EVSYSROUTEA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Output A"
-                              mask="0x01"
-                              name="EVOUTA"
-                              rw="RW"
-                              values="PORTMUX_EVOUTA"/>
-                    <bitfield caption="Event Output C"
-                              mask="0x04"
-                              name="EVOUTC"
-                              rw="RW"
-                              values="PORTMUX_EVOUTC"/>
-                    <bitfield caption="Event Output D"
-                              mask="0x08"
-                              name="EVOUTD"
-                              rw="RW"
-                              values="PORTMUX_EVOUTD"/>
-                    <bitfield caption="Event Output F"
-                              mask="0x20"
-                              name="EVOUTF"
-                              rw="RW"
-                              values="PORTMUX_EVOUTF"/>
+                <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Event Output A" mask="0x01" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output C" mask="0x04" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x08" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
                 </register>
-                <register caption="CCL route A"
-                          initval="0x00"
-                          name="CCLROUTEA"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals"
-                              mask="0x01"
-                              name="LUT0"
-                              rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals"
-                              mask="0x02"
-                              name="LUT1"
-                              rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals"
-                              mask="0x04"
-                              name="LUT2"
-                              rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals"
-                              mask="0x08"
-                              name="LUT3"
-                              rw="RW"
-                              values="PORTMUX_LUT3"/>
+                <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x01" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x02" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x04" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x08" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
-                <register caption="USART route A"
-                          initval="0x00"
-                          name="USARTROUTEA"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="USART0 Signals"
-                              mask="0x07"
-                              name="USART0"
-                              rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="USART1 Signals"
-                              mask="0x18"
-                              name="USART1"
-                              rw="RW"
-                              values="PORTMUX_USART1"/>
+                <register caption="USART route A" initval="0x00" name="USARTROUTEA" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="USART0 Signals" mask="0x07" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="USART1 Signals" mask="0x18" name="USART1" rw="RW" values="PORTMUX_USART1"/>
                 </register>
-                <register caption="SPI route A"
-                          initval="0x00"
-                          name="SPIROUTEA"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI0 Signals"
-                              mask="0x07"
-                              name="SPI0"
-                              rw="RW"
-                              values="PORTMUX_SPI0"/>
+                <register caption="SPI route A" initval="0x00" name="SPIROUTEA" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="SPI0 Signals" mask="0x07" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                 </register>
-                <register caption="TWI route A"
-                          initval="0x00"
-                          name="TWIROUTEA"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TWI0 Signals"
-                              mask="0x03"
-                              name="TWI0"
-                              rw="RW"
-                              values="PORTMUX_TWI0"/>
+                <register caption="TWI route A" initval="0x00" name="TWIROUTEA" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="TWI0 Signals" mask="0x03" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="TCA route A"
-                          initval="0x00"
-                          name="TCAROUTEA"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCA0 Signals"
-                              mask="0x07"
-                              name="TCA0"
-                              rw="RW"
-                              values="PORTMUX_TCA0"/>
+                <register caption="TCA route A" initval="0x00" name="TCAROUTEA" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="TCA0 Signals" mask="0x07" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
                 </register>
-                <register caption="TCB route A"
-                          initval="0x00"
-                          name="TCBROUTEA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCB0 Output"
-                              mask="0x01"
-                              name="TCB0"
-                              rw="RW"
-                              values="PORTMUX_TCB0"/>
-                    <bitfield caption="TCB1 Output"
-                              mask="0x02"
-                              name="TCB1"
-                              rw="RW"
-                              values="PORTMUX_TCB1"/>
-                    <bitfield caption="TCB2 Output"
-                              mask="0x04"
-                              name="TCB2"
-                              rw="RW"
-                              values="PORTMUX_TCB2"/>
+                <register caption="TCB route A" initval="0x00" name="TCBROUTEA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="TCB0 Output" mask="0x01" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="TCB1 Output" mask="0x02" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+                    <bitfield caption="TCB2 Output" mask="0x04" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
                 </register>
-                <register caption="TCD route A"
-                          initval="0x00"
-                          name="TCDROUTEA"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCD0 Signals"
-                              mask="0x07"
-                              name="TCD0"
-                              rw="RW"
-                              values="PORTMUX_TCD0"/>
+                <register caption="TCD route A" initval="0x00" name="TCDROUTEA" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="TCD0 Signals" mask="0x07" name="TCD0" rw="RW" values="PORTMUX_TCD0"/>
                 </register>
             </register-group>
             <value-group caption="CCL Look-Up Table 0 Signals select" name="PORTMUX_LUT0">
@@ -4299,199 +2006,69 @@
         </module>
         <module caption="Reset controller" id="rst_integration_v8" name="RSTCTRL">
             <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
-                <register caption="Reset Flags"
-                          initval="0x00"
-                          name="RSTFR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Power on Reset flag" mask="0x01" name="PORF" rw="RW"/>
-                    <bitfield caption="Brown out detector Reset flag"
-                              mask="0x02"
-                              name="BORF"
-                              rw="RW"/>
+                    <bitfield caption="Brown out detector Reset flag" mask="0x02" name="BORF" rw="RW"/>
                     <bitfield caption="External Reset flag" mask="0x04" name="EXTRF" rw="RW"/>
                     <bitfield caption="Watch dog Reset flag" mask="0x08" name="WDRF" rw="RW"/>
                     <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
                     <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
                 </register>
-                <register caption="Software Reset"
-                          initval="0x00"
-                          name="SWRR"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software reset enable"
-                              mask="0x01"
-                              name="SWRST"
-                              rw="RW"/>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x01" name="SWRST" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Real-Time Counter" id="tmr_16b_rtc_v1" name="RTC">
             <register-group caption="Real-Time Counter" name="RTC" size="0x20">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="RTCEN" rw="RW"/>
                     <bitfield caption="Correction enable" mask="0x04" name="CORREN" rw="RW"/>
-                    <bitfield caption="Prescaling Factor"
-                              mask="0x78"
-                              name="PRESCALER"
-                              rw="RW"
-                              values="RTC_PRESCALER"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
                     <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x01"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLABUSY"
-                              rw="R"/>
-                    <bitfield caption="Count Synchronization Busy Flag"
-                              mask="0x02"
-                              name="CNTBUSY"
-                              rw="R"/>
-                    <bitfield caption="Period Synchronization Busy Flag"
-                              mask="0x04"
-                              name="PERBUSY"
-                              rw="R"/>
-                    <bitfield caption="Comparator Synchronization Busy Flag"
-                              mask="0x08"
-                              name="CMPBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x02" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x04" name="PERBUSY" rw="R"/>
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x08" name="CMPBUSY" rw="R"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt enable"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt Flag"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Temporary"
-                          name="TEMP"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Debug control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Calibration"
-                          initval="0x00"
-                          name="CALIB"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Error Correction Value"
-                              mask="0x7F"
-                              name="ERROR"
-                              rw="RW"/>
-                    <bitfield caption="Error Correction Sign Bit"
-                              mask="0x80"
-                              name="SIGN"
-                              rw="RW"/>
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7F" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
                 </register>
-                <register caption="Clock Select"
-                          initval="0x00"
-                          name="CLKSEL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Select"
-                              mask="0x03"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="RTC_CLKSEL"/>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x03" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
                 </register>
                 <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
-                <register caption="Period"
-                          initval="0xFFFF"
-                          name="PER"
-                          offset="0x0A"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
                 <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
-                <register caption="PIT Control A"
-                          initval="0x00"
-                          name="PITCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="PITEN" rw="RW"/>
-                    <bitfield caption="Period"
-                              mask="0x78"
-                              name="PERIOD"
-                              rw="RW"
-                              values="RTC_PERIOD"/>
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
                 </register>
-                <register caption="PIT Status"
-                          initval="0x00"
-                          name="PITSTATUS"
-                          offset="0x11"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLBUSY"
-                              rw="R"/>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLBUSY" rw="R"/>
                 </register>
-                <register caption="PIT Interrupt Control"
-                          initval="0x00"
-                          name="PITINTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags"
-                          initval="0x00"
-                          name="PITINTFLAGS"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Debug control"
-                          initval="0x00"
-                          name="PITDBGCTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
             </register-group>
@@ -4539,156 +2116,42 @@
         </module>
         <module caption="Signature row" id="avrdd" name="SIGROW">
             <register-group caption="Signature row" name="SIGROW" size="0x40">
-                <register caption="Device ID Byte 0"
-                          name="DEVICEID0"
-                          offset="0x00"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 1"
-                          name="DEVICEID1"
-                          offset="0x01"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 2"
-                          name="DEVICEID2"
-                          offset="0x02"
-                          rw="R"
-                          size="1"/>
-                <register caption="Temperature Calibration 0"
-                          name="TEMPSENSE0"
-                          offset="0x04"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 0"
-                              mask="0xFFFF"
-                              name="TEMPSENSE0"
-                              rw="R"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Temperature Calibration 0" name="TEMPSENSE0" offset="0x04" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 0" mask="0xFFFF" name="TEMPSENSE0" rw="R"/>
                 </register>
-                <register caption="Temperature Calibration 1"
-                          name="TEMPSENSE1"
-                          offset="0x06"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 1"
-                              mask="0xFFFF"
-                              name="TEMPSENSE1"
-                              rw="R"/>
+                <register caption="Temperature Calibration 1" name="TEMPSENSE1" offset="0x06" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 1" mask="0xFFFF" name="TEMPSENSE1" rw="R"/>
                 </register>
-                <register caption="LOTNUM0"
-                          name="SERNUM0"
-                          offset="0x10"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM1"
-                          name="SERNUM1"
-                          offset="0x11"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM2"
-                          name="SERNUM2"
-                          offset="0x12"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM3"
-                          name="SERNUM3"
-                          offset="0x13"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM4"
-                          name="SERNUM4"
-                          offset="0x14"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM5"
-                          name="SERNUM5"
-                          offset="0x15"
-                          rw="R"
-                          size="1"/>
-                <register caption="RANDOM"
-                          name="SERNUM6"
-                          offset="0x16"
-                          rw="R"
-                          size="1"/>
-                <register caption="SCRIBE"
-                          name="SERNUM7"
-                          offset="0x17"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS0"
-                          name="SERNUM8"
-                          offset="0x18"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS1"
-                          name="SERNUM9"
-                          offset="0x19"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS0"
-                          name="SERNUM10"
-                          offset="0x1A"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS1"
-                          name="SERNUM11"
-                          offset="0x1B"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES0"
-                          name="SERNUM12"
-                          offset="0x1C"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES1"
-                          name="SERNUM13"
-                          offset="0x1D"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES2"
-                          name="SERNUM14"
-                          offset="0x1E"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES3"
-                          name="SERNUM15"
-                          offset="0x1F"
-                          rw="R"
-                          size="1"/>
+                <register caption="LOTNUM0" name="SERNUM0" offset="0x10" rw="R" size="1"/>
+                <register caption="LOTNUM1" name="SERNUM1" offset="0x11" rw="R" size="1"/>
+                <register caption="LOTNUM2" name="SERNUM2" offset="0x12" rw="R" size="1"/>
+                <register caption="LOTNUM3" name="SERNUM3" offset="0x13" rw="R" size="1"/>
+                <register caption="LOTNUM4" name="SERNUM4" offset="0x14" rw="R" size="1"/>
+                <register caption="LOTNUM5" name="SERNUM5" offset="0x15" rw="R" size="1"/>
+                <register caption="RANDOM" name="SERNUM6" offset="0x16" rw="R" size="1"/>
+                <register caption="SCRIBE" name="SERNUM7" offset="0x17" rw="R" size="1"/>
+                <register caption="XPOS0" name="SERNUM8" offset="0x18" rw="R" size="1"/>
+                <register caption="XPOS1" name="SERNUM9" offset="0x19" rw="R" size="1"/>
+                <register caption="YPOS0" name="SERNUM10" offset="0x1A" rw="R" size="1"/>
+                <register caption="YPOS1" name="SERNUM11" offset="0x1B" rw="R" size="1"/>
+                <register caption="RES0" name="SERNUM12" offset="0x1C" rw="R" size="1"/>
+                <register caption="RES1" name="SERNUM13" offset="0x1D" rw="R" size="1"/>
+                <register caption="RES2" name="SERNUM14" offset="0x1E" rw="R" size="1"/>
+                <register caption="RES3" name="SERNUM15" offset="0x1F" rw="R" size="1"/>
             </register-group>
         </module>
-        <module caption="Sleep Controller"
-                id="clk_sleep_ctrl_avr_v2"
-                name="SLPCTRL">
+        <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
             <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Sleep enable" mask="0x01" name="SEN" rw="RW"/>
-                    <bitfield caption="Sleep mode"
-                              mask="0x06"
-                              name="SMODE"
-                              rw="RW"
-                              values="SLPCTRL_SMODE"/>
+                    <bitfield caption="Sleep mode" mask="0x06" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="VREGCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Performance Mode"
-                              mask="0x07"
-                              name="PMODE"
-                              rw="RW"
-                              values="SLPCTRL_PMODE"/>
-                    <bitfield caption="High Temperature Low Leakage Enable"
-                              mask="0x10"
-                              name="HTLLEN"
-                              rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Performance Mode" mask="0x07" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                 </register>
             </register-group>
             <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
@@ -4696,8 +2159,7 @@
                 <value caption="Standby Mode" name="STDBY" value="0x01"/>
                 <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
             </value-group>
-            <value-group caption="High Temperature Low Leakage Enable select"
-                         name="SLPCTRL_HTLLEN">
+            <value-group caption="High Temperature Low Leakage Enable select" name="SLPCTRL_HTLLEN">
                 <value caption="Disabled" name="OFF" value="0x0"/>
                 <value caption="Enabled" name="ON" value="0x1"/>
             </value-group>
@@ -4708,110 +2170,36 @@
         </module>
         <module caption="Serial Peripheral Interface" id="spi_8bit_v2" name="SPI">
             <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable Module" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Prescaler"
-                              mask="0x06"
-                              name="PRESC"
-                              rw="RW"
-                              values="SPI_PRESC"/>
+                    <bitfield caption="Prescaler" mask="0x06" name="PRESC" rw="RW" values="SPI_PRESC"/>
                     <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
-                    <bitfield caption="Host Operation Enable"
-                              mask="0x20"
-                              name="MASTER"
-                              rw="RW"/>
+                    <bitfield caption="Host Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
                     <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI Mode"
-                              mask="0x03"
-                              name="MODE"
-                              rw="RW"
-                              values="SPI_MODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="SPI Mode" mask="0x03" name="MODE" rw="RW" values="SPI_MODE"/>
                     <bitfield caption="SPI Select Disable" mask="0x04" name="SSD" rw="RW"/>
-                    <bitfield caption="Buffer Mode Wait for Receive"
-                              mask="0x40"
-                              name="BUFWR"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Mode Wait for Receive" mask="0x40" name="BUFWR" rw="RW"/>
                     <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Enable" mask="0x01" name="IE" rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Enable"
-                              mask="0x10"
-                              name="SSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <mode name="DEFAULT" qualifier="SPI.CTRLB.BUFEN" value="0"/>
                     <mode name="BUFFERED" qualifier="SPI.CTRLB.BUFEN" value="1"/>
-                    <bitfield caption="Buffer Overflow"
-                              mask="0x01"
-                              modes="BUFFERED"
-                              name="BUFOVF"
-                              rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Flag"
-                              mask="0x10"
-                              modes="BUFFERED"
-                              name="SSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Flag"
-                              mask="0x20"
-                              modes="BUFFERED"
-                              name="DREIF"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Flag"
-                              mask="0x40"
-                              modes="BUFFERED"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              modes="BUFFERED"
-                              name="RXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Write Collision"
-                              mask="0x40"
-                              modes="DEFAULT"
-                              name="WRCOL"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt Flag"
-                              mask="0x80"
-                              modes="DEFAULT"
-                              name="IF"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Overflow" mask="0x01" modes="BUFFERED" name="BUFOVF" rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Flag" mask="0x10" modes="BUFFERED" name="SSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" modes="BUFFERED" name="DREIF" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" modes="BUFFERED" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" modes="BUFFERED" name="RXCIF" rw="RW"/>
+                    <bitfield caption="Write Collision" mask="0x40" modes="DEFAULT" name="WRCOL" rw="RW"/>
+                    <bitfield caption="Interrupt Flag" mask="0x80" modes="DEFAULT" name="IF" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
             </register-group>
@@ -4830,543 +2218,149 @@
         </module>
         <module caption="System Configuration Registers" id="avrdd" name="SYSCFG">
             <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
-                <register caption="Revision ID"
-                          name="REVID"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Control"
-                          name="OCDMCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Status"
-                          initval="0x00"
-                          name="OCDMSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+                <register caption="OCD Message Control" name="OCDMCTRL" offset="0x04" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMSTATUS" offset="0x05" rw="RW" size="1">
                     <bitfield caption="OCD Message Valid" mask="0x01" name="VALID" rw="RW"/>
                 </register>
             </register-group>
         </module>
-        <module caption="16-bit Timer/Counter Type A"
-                id="tmr_16b_pwm_v1"
-                name="TCA">
+        <module caption="16-bit Timer/Counter Type A" id="tmr_16b_pwm_v1" name="TCA">
             <register-group caption="16-bit Timer/Counter Type A" name="TCA" size="0x40">
-                <mode caption="Single Mode"
-                      name="SINGLE"
-                      qualifier="TCA.SINGLE.CTRLD.SPLITM"
-                      value="0"/>
-                <mode caption="Split Mode"
-                      name="SPLIT"
-                      qualifier="TCA.SPLIT.CTRLD.SPLITM"
-                      value="1"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <mode caption="Single Mode" name="SINGLE" qualifier="TCA.SINGLE.CTRLD.SPLITM" value="0"/>
+                <mode caption="Split Mode" name="SPLIT" qualifier="TCA.SPLIT.CTRLD.SPLITM" value="1"/>
+                <register caption="Control A" initval="0x00" modes="SINGLE" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x07"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                <register caption="Control B" initval="0x00" modes="SINGLE" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                     <bitfield caption="Auto Lock Update" mask="0x08" name="ALUPD" rw="RW"/>
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare 0 Waveform Output Value"
-                              mask="0x01"
-                              name="CMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Waveform Output Value"
-                              mask="0x02"
-                              name="CMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Waveform Output Value"
-                              mask="0x04"
-                              name="CMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SINGLE" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x01" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x02" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x04" name="CMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SINGLE" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Control E Clear" initval="0x00" modes="SINGLE" name="CTRLECLR" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Direction"
-                              mask="0x01"
-                              name="DIR"
-                              rw="RW"
-                              values="TCA_SINGLE_DIR"/>
+                <register caption="Control E Set" initval="0x00" modes="SINGLE" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control F Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Clear" initval="0x00" modes="SINGLE" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Control F Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFSET"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Set" initval="0x00" modes="SINGLE" name="CTRLFSET" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="EVCTRL"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Count on Event Input A"
-                              mask="0x01"
-                              name="CNTAEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action A"
-                              mask="0x0E"
-                              name="EVACTA"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTA"/>
-                    <bitfield caption="Count on Event Input B"
-                              mask="0x10"
-                              name="CNTBEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action B"
-                              mask="0xE0"
-                              name="EVACTB"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTB"/>
+                <register caption="Event Control" initval="0x00" modes="SINGLE" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input A" mask="0x01" name="CNTAEI" rw="RW"/>
+                    <bitfield caption="Event Action A" mask="0x0E" name="EVACTA" rw="RW" values="TCA_SINGLE_EVACTA"/>
+                    <bitfield caption="Count on Event Input B" mask="0x10" name="CNTBEI" rw="RW"/>
+                    <bitfield caption="Event Action B" mask="0xE0" name="EVACTB" rw="RW" values="TCA_SINGLE_EVACTB"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" modes="SINGLE" name="INTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" modes="SINGLE" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SINGLE" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary data for 16-bit Access"
-                          modes="SINGLE"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          modes="SINGLE"
-                          name="CNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period"
-                          modes="SINGLE"
-                          name="PER"
-                          offset="0x26"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0"
-                          modes="SINGLE"
-                          name="CMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1"
-                          modes="SINGLE"
-                          name="CMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2"
-                          modes="SINGLE"
-                          name="CMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period Buffer"
-                          modes="SINGLE"
-                          name="PERBUF"
-                          offset="0x36"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0 Buffer"
-                          modes="SINGLE"
-                          name="CMP0BUF"
-                          offset="0x38"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1 Buffer"
-                          modes="SINGLE"
-                          name="CMP1BUF"
-                          offset="0x3A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2 Buffer"
-                          modes="SINGLE"
-                          name="CMP2BUF"
-                          offset="0x3C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary data for 16-bit Access" modes="SINGLE" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Count" modes="SINGLE" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Period" modes="SINGLE" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Compare 0" modes="SINGLE" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 1" modes="SINGLE" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 2" modes="SINGLE" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Period Buffer" modes="SINGLE" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" modes="SINGLE" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" modes="SINGLE" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" modes="SINGLE" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" modes="SPLIT" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Enable"
-                              mask="0x01"
-                              name="LCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Enable"
-                              mask="0x02"
-                              name="LCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Enable"
-                              mask="0x04"
-                              name="LCMP2EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Enable"
-                              mask="0x10"
-                              name="HCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Enable"
-                              mask="0x20"
-                              name="HCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Enable"
-                              mask="0x40"
-                              name="HCMP2EN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" modes="SPLIT" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Enable" mask="0x01" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x02" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x04" name="LCMP2EN" rw="RW"/>
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Output Value"
-                              mask="0x01"
-                              name="LCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Output Value"
-                              mask="0x02"
-                              name="LCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Output Value"
-                              mask="0x04"
-                              name="LCMP2OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Output Value"
-                              mask="0x10"
-                              name="HCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Output Value"
-                              mask="0x20"
-                              name="HCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Output Value"
-                              mask="0x40"
-                              name="HCMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SPLIT" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x01" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x02" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x04" name="LCMP2OV" rw="RW"/>
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SPLIT" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Clear" initval="0x00" modes="SPLIT" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Set" initval="0x00" modes="SPLIT" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Enable"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Enable"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Enable"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Enable"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Enable"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" modes="SPLIT" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Flag"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Flag"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Flag"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Flag"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Flag"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" modes="SPLIT" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SPLIT" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Low Count"
-                          modes="SPLIT"
-                          name="LCNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Count"
-                          modes="SPLIT"
-                          name="HCNT"
-                          offset="0x21"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Period"
-                          modes="SPLIT"
-                          name="LPER"
-                          offset="0x26"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Period"
-                          modes="SPLIT"
-                          name="HPER"
-                          offset="0x27"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP0"
-                          offset="0x29"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP1"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP2"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Low Count" modes="SPLIT" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="High Count" modes="SPLIT" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="Low Period" modes="SPLIT" name="LPER" offset="0x26" rw="RW" size="1"/>
+                <register caption="High Period" modes="SPLIT" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
             </register-group>
             <value-group caption="Clock Selection" name="TCA_SINGLE_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5383,12 +2377,8 @@
                 <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
                 <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
                 <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
-                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM"
-                       name="DSBOTH"
-                       value="0x06"/>
-                <value caption="Dual Slope PWM, overflow on BOTTOM"
-                       name="DSBOTTOM"
-                       value="0x07"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
             </value-group>
             <value-group caption="Command select" name="TCA_SINGLE_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
@@ -5401,31 +2391,17 @@
                 <value caption="Count down" name="DOWN" value="0x1"/>
             </value-group>
             <value-group caption="Event Action A select" name="TCA_SINGLE_EVACTA">
-                <value caption="Count on positive edge event"
-                       name="CNT_POSEDGE"
-                       value="0x00"/>
+                <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
-                <value caption="Count on prescaled clock while event line is 1."
-                       name="CNT_HIGHLVL"
-                       value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
+                <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
-                <value caption="Restart counter at positive edge event"
-                       name="RESTART_POSEDGE"
-                       value="0x04"/>
-                <value caption="Restart counter on any edge event"
-                       name="RESTART_ANYEDGE"
-                       value="0x05"/>
-                <value caption="Restart counter while event line is 1."
-                       name="RESTART_HIGHLVL"
-                       value="0x06"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+                <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
+                <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
+                <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
             </value-group>
             <value-group caption="Clock Selection" name="TCA_SPLIT_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5445,107 +2421,46 @@
             </value-group>
             <value-group caption="Command Enable select" name="TCA_SPLIT_CMDEN">
                 <value caption="None" name="NONE" value="0x0"/>
-                <value caption="Both low byte and high byte counter"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Both low byte and high byte counter" name="BOTH" value="0x3"/>
             </value-group>
         </module>
         <module caption="16-bit Timer Type B" id="tmr_16b_capture_v1" name="TCB">
             <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Select"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCB_CLKSEL"/>
+                    <bitfield caption="Clock Select" mask="0x0E" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
                     <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
                     <bitfield caption="Cascade two timers" mask="0x20" name="CASCADE" rw="RW"/>
                     <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control Register B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Timer Mode"
-                              mask="0x07"
-                              name="CNTMODE"
-                              rw="RW"
-                              values="TCB_CNTMODE"/>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Timer Mode" mask="0x07" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
                     <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
                     <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
                     <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Event Input Enable" mask="0x01" name="CAPTEI" rw="RW"/>
                     <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
-                    <bitfield caption="Input Capture Noise Cancellation Filter"
-                              mask="0x40"
-                              name="FILTER"
-                              rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
                     <bitfield caption="Run" mask="0x01" name="RUN" rw="R"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Value"
-                          name="TEMP"
-                          offset="0x9"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          initval="0x0000"
-                          name="CNT"
-                          offset="0xA"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare or Capture"
-                          name="CCMP"
-                          offset="0xC"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock Select" name="TCB_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5557,247 +2472,78 @@
                 <value caption="Periodic Interrupt" name="INT" value="0x00"/>
                 <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
                 <value caption="Input Capture Event" name="CAPT" value="0x02"/>
-                <value caption="Input Capture Frequency measurement"
-                       name="FRQ"
-                       value="0x03"/>
-                <value caption="Input Capture Pulse-Width measurement"
-                       name="PW"
-                       value="0x04"/>
-                <value caption="Input Capture Frequency and Pulse-Width measurement"
-                       name="FRQPW"
-                       value="0x05"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
                 <value caption="Single Shot" name="SINGLE" value="0x06"/>
                 <value caption="8-bit PWM" name="PWM8" value="0x07"/>
             </value-group>
         </module>
         <module caption="Timer Counter D" id="tmr_12b_psc_v1" name="TCD">
             <register-group caption="Timer Counter D" name="TCD" size="0x40">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler"
-                              mask="0x06"
-                              name="SYNCPRES"
-                              rw="RW"
-                              values="TCD_SYNCPRES"/>
-                    <bitfield caption="Counter prescaler"
-                              mask="0x18"
-                              name="CNTPRES"
-                              rw="RW"
-                              values="TCD_CNTPRES"/>
-                    <bitfield caption="Clock select"
-                              mask="0x60"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCD_CLKSEL"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x06" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+                    <bitfield caption="Counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+                    <bitfield caption="Clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x03"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCD_WGMODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x03" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare output value override"
-                              mask="0x01"
-                              name="CMPOVR"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare output value override" mask="0x01" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Auto update" mask="0x02" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Fifty percent waveform"
-                              mask="0x08"
-                              name="FIFTY"
-                              rw="RW"/>
-                    <bitfield caption="Compare C output select"
-                              mask="0x40"
-                              name="CMPCSEL"
-                              rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select"
-                              mask="0x80"
-                              name="CMPDSEL"
-                              rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Fifty percent waveform" mask="0x08" name="FIFTY" rw="RW"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x0F" name="CMPAVAL" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0xF0" name="CMPBVAL" rw="RW"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronize end of cycle strobe"
-                              mask="0x01"
-                              name="SYNCEOC"
-                              rw="RW"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Synchronize end of cycle strobe" mask="0x01" name="SYNCEOC" rw="RW"/>
                     <bitfield caption="synchronize strobe" mask="0x02" name="SYNC" rw="RW"/>
                     <bitfield caption="Restart strobe" mask="0x04" name="RESTART" rw="RW"/>
-                    <bitfield caption="Software Capture A Strobe"
-                              mask="0x08"
-                              name="SCAPTUREA"
-                              rw="RW"/>
-                    <bitfield caption="Software Capture B Strobe"
-                              mask="0x10"
-                              name="SCAPTUREB"
-                              rw="RW"/>
-                    <bitfield caption="Disable at end of cycle"
-                              mask="0x80"
-                              name="DISEOC"
-                              rw="RW"/>
+                    <bitfield caption="Software Capture A Strobe" mask="0x08" name="SCAPTUREA" rw="RW"/>
+                    <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+                    <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
                 </register>
-                <register caption="EVCTRLA"
-                          initval="0x00"
-                          name="EVCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="EVCTRLB"
-                          initval="0x00"
-                          name="EVCTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Enable ready" mask="0x01" name="ENRDY" rw="R"/>
                     <bitfield caption="Command ready" mask="0x02" name="CMDRDY" rw="R"/>
                     <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
                     <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
                 </register>
-                <register caption="Input Control A"
-                          initval="0x00"
-                          name="INPUTCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Input Control B"
-                          initval="0x00"
-                          name="INPUTCTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Fault Control"
-                          initval="0x00"
-                          name="FAULTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x01" name="CMPA" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0x02" name="CMPB" rw="RW"/>
                     <bitfield caption="Compare C value" mask="0x04" name="CMPC" rw="RW"/>
@@ -5807,100 +2553,33 @@
                     <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
                     <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
                 </register>
-                <register caption="Delay Control"
-                          initval="0x00"
-                          name="DLYCTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Delay select"
-                              mask="0x03"
-                              name="DLYSEL"
-                              rw="RW"
-                              values="TCD_DLYSEL"/>
-                    <bitfield caption="Delay trigger"
-                              mask="0x0C"
-                              name="DLYTRIG"
-                              rw="RW"
-                              values="TCD_DLYTRIG"/>
-                    <bitfield caption="Delay prescaler"
-                              mask="0x30"
-                              name="DLYPRESC"
-                              rw="RW"
-                              values="TCD_DLYPRESC"/>
+                <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Delay select" mask="0x03" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+                    <bitfield caption="Delay trigger" mask="0x0C" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+                    <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
                 </register>
-                <register caption="Delay value"
-                          initval="0x00"
-                          name="DLYVAL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Delay value" mask="0xFF" name="DLYVAL" rw="RW"/>
                 </register>
-                <register caption="Dither Control A"
-                          initval="0x00"
-                          name="DITCTRL"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Dither select"
-                              mask="0x03"
-                              name="DITHERSEL"
-                              rw="RW"
-                              values="TCD_DITHERSEL"/>
+                <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Dither select" mask="0x03" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
                 </register>
-                <register caption="Dither value"
-                          initval="0x00"
-                          name="DITVAL"
-                          offset="0x19"
-                          rw="RW"
-                          size="1">
+                <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
                     <bitfield caption="Dither value" mask="0x0F" name="DITHER" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                     <bitfield caption="Fault detection" mask="0x04" name="FAULTDET" rw="RW"/>
                 </register>
-                <register caption="Capture A"
-                          name="CAPTUREA"
-                          offset="0x22"
-                          rw="R"
-                          size="2"/>
-                <register caption="Capture B"
-                          name="CAPTUREB"
-                          offset="0x24"
-                          rw="R"
-                          size="2"/>
-                <register caption="Compare A Set"
-                          name="CMPASET"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare A Clear"
-                          name="CMPACLR"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Set"
-                          name="CMPBSET"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Clear"
-                          name="CMPBCLR"
-                          offset="0x2E"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+                <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+                <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock select" name="TCD_CLKSEL">
-                <value caption="Internal High-Frequency oscillator"
-                       name="OSCHF"
-                       value="0x00"/>
+                <value caption="Internal High-Frequency oscillator" name="OSCHF" value="0x00"/>
                 <value caption="PLL" name="PLL" value="0x01"/>
                 <value caption="External Clock" name="EXTCLK" value="0x02"/>
                 <value caption="Peripheral clock" name="CLKPER" value="0x03"/>
@@ -5911,18 +2590,10 @@
                 <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
             </value-group>
             <value-group caption="Synchronization prescaler select" name="TCD_SYNCPRES">
-                <value caption="Selected clock source divided by 1"
-                       name="DIV1"
-                       value="0x00"/>
-                <value caption="Selected clock source divided by 2"
-                       name="DIV2"
-                       value="0x01"/>
-                <value caption="Selected clock source divided by 4"
-                       name="DIV4"
-                       value="0x02"/>
-                <value caption="Selected clock source divided by 8"
-                       name="DIV8"
-                       value="0x03"/>
+                <value caption="Selected clock source divided by 1" name="DIV1" value="0x00"/>
+                <value caption="Selected clock source divided by 2" name="DIV2" value="0x01"/>
+                <value caption="Selected clock source divided by 4" name="DIV4" value="0x02"/>
+                <value caption="Selected clock source divided by 8" name="DIV8" value="0x03"/>
             </value-group>
             <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
                 <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
@@ -5963,176 +2634,63 @@
             </value-group>
             <value-group caption="Event action select" name="TCD_ACTION">
                 <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
-                <value caption="Event trigger a fault and capture"
-                       name="CAPTURE"
-                       value="0x1"/>
+                <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
             </value-group>
             <value-group caption="Event config select" name="TCD_CFG">
-                <value caption="Neither Filter nor Asynchronous Event is enabled"
-                       name="NEITHER"
-                       value="0x0"/>
-                <value caption="Input Capture Noise Cancellation Filter enabled"
-                       name="FILTER"
-                       value="0x1"/>
-                <value caption="Asynchronous Event output qualification enabled"
-                       name="ASYNC"
-                       value="0x2"/>
+                <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+                <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+                <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="Edge select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW"
-                       value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH"
-                       value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
-                <value caption="Stop output, jump to opposite compare cycle and wait"
-                       name="JMPWAIT"
-                       value="0x01"/>
-                <value caption="Stop output, execute opposite compare cycle and wait"
-                       name="EXECWAIT"
-                       value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active"
-                       name="EXECFAULT"
-                       value="0x03"/>
-                <value caption="Stop all outputs, maintain frequency"
-                       name="FREQ"
-                       value="0x04"/>
-                <value caption="Stop all outputs, execute dead time while fault active"
-                       name="EXECDT"
-                       value="0x05"/>
-                <value caption="Stop all outputs, jump to next compare cycle and wait"
-                       name="WAIT"
-                       value="0x06"/>
-                <value caption="Stop all outputs, wait for software action"
-                       name="WAITSW"
-                       value="0x07"/>
-                <value caption="Stop output on edge, jump to next compare cycle"
-                       name="EDGETRIG"
-                       value="0x08"/>
-                <value caption="Stop output on edge, maintain frequency"
-                       name="EDGETRIGFREQ"
-                       value="0x09"/>
-                <value caption="Stop output at level, maintain frequency"
-                       name="LVLTRIGFREQ"
-                       value="0x0A"/>
+                <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
+                <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
+                <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
+                <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
+                <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
+                <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x07"/>
+                <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x08"/>
+                <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x09"/>
+                <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0x0A"/>
             </value-group>
         </module>
         <module caption="Two-Wire Interface" id="i2c_8bit_avr_v3" name="TWI">
             <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="SDA Setup Time"
-                              mask="0x10"
-                              name="SDASETUP"
-                              rw="RW"
-                              values="TWI_SDASETUP"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Dual Mode Control"
-                          initval="0x00"
-                          name="DUALCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
+                <register caption="Dual Mode Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Debug Run"
-                              mask="0x01"
-                              name="DBGRUN"
-                              rw="RW"
-                              values="TWI_DBGRUN"/>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW" values="TWI_DBGRUN"/>
                 </register>
-                <register caption="Host Control A"
-                          initval="0x00"
-                          name="MCTRLA"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Inactive Bus Time-Out"
-                              mask="0x0C"
-                              name="TIMEOUT"
-                              rw="RW"
-                              values="TWI_TIMEOUT"/>
+                    <bitfield caption="Inactive Bus Time-Out" mask="0x0C" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
                     <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
-                    <bitfield caption="Write Interrupt Enable"
-                              mask="0x40"
-                              name="WIEN"
-                              rw="RW"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
                     <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
                 </register>
-                <register caption="Host Control B"
-                          initval="0x00"
-                          name="MCTRLB"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="MCMD"
-                              rw="RW"
-                              values="TWI_MCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Host Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                     <bitfield caption="Flush" mask="0x08" name="FLUSH" rw="RW"/>
                 </register>
-                <register caption="Host STATUS"
-                          initval="0x00"
-                          name="MSTATUS"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bus State"
-                              mask="0x03"
-                              name="BUSSTATE"
-                              rw="RW"
-                              values="TWI_BUSSTATE"/>
+                <register caption="Host STATUS" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
@@ -6140,147 +2698,69 @@
                     <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
                     <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
                 </register>
-                <register caption="Host Baud Rate"
-                          initval="0x00"
-                          name="MBAUD"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Baud Rate" initval="0x00" name="MBAUD" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Baud Rate" mask="0xFF" name="BAUD" rw="RW"/>
                 </register>
-                <register caption="Host Address"
-                          initval="0x00"
-                          name="MADDR"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Address" initval="0x00" name="MADDR" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Host Data"
-                          initval="0x00"
-                          name="MDATA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Data" initval="0x00" name="MDATA" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Control A"
-                          initval="0x00"
-                          name="SCTRLA"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Address Recognition Mode"
-                              mask="0x04"
-                              name="PMEN"
-                              rw="RW"/>
+                    <bitfield caption="Address Recognition Mode" mask="0x04" name="PMEN" rw="RW"/>
                     <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Enable"
-                              mask="0x40"
-                              name="APIEN"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
                     <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
                 </register>
-                <register caption="Client Control B"
-                          initval="0x00"
-                          name="SCTRLB"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="SCMD"
-                              rw="RW"
-                              values="TWI_SCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Client Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                 </register>
-                <register caption="Client Status"
-                          initval="0x00"
-                          name="SSTATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Address or Stop"
-                              mask="0x01"
-                              name="AP"
-                              rw="RW"
-                              values="TWI_AP"/>
+                <register caption="Client Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Address or Stop" mask="0x01" name="AP" rw="RW" values="TWI_AP"/>
                     <bitfield caption="Read/Write Direction" mask="0x02" name="DIR" rw="RW"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Collision" mask="0x08" name="COLL" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
                     <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Flag"
-                              mask="0x40"
-                              name="APIF"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
                     <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
                 </register>
-                <register caption="Client Address"
-                          initval="0x00"
-                          name="SADDR"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address" initval="0x00" name="SADDR" offset="0xC" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Client Data"
-                          initval="0x00"
-                          name="SDATA"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Data" initval="0x00" name="SDATA" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Address Mask"
-                          initval="0x00"
-                          name="SADDRMASK"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address Mask" initval="0x00" name="SADDRMASK" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Address Mask Enable" mask="0x01" name="ADDREN" rw="RW"/>
                     <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Fast-mode Plus Enable select" name="TWI_FMPEN">
-                <value caption="Operating in Standard-mode or Fast-mode"
-                       name="OFF"
-                       value="0x0"/>
+                <value caption="Operating in Standard-mode or Fast-mode" name="OFF" value="0x0"/>
                 <value caption="Operating in Fast-mode Plus" name="ON" value="0x1"/>
             </value-group>
             <value-group caption="Input voltage transition level select" name="TWI_INPUTLVL">
                 <value caption="I2C input voltage transition level" name="I2C" value="0x0"/>
-                <value caption="SMBus 3.0 input voltage transition level"
-                       name="SMBUS"
-                       value="0x1"/>
+                <value caption="SMBus 3.0 input voltage transition level" name="SMBUS" value="0x1"/>
             </value-group>
             <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
                 <value caption="No SDA Hold Delay" name="OFF" value="0x0"/>
                 <value caption="Short SDA hold time" name="50NS" value="0x1"/>
-                <value caption="Meets SMBUS 2.0 specification under typical conditions"
-                       name="300NS"
-                       value="0x2"/>
-                <value caption="Meets SMBUS 2.0 specificaiton across all corners"
-                       name="500NS"
-                       value="0x3"/>
+                <value caption="Meets SMBUS 2.0 specification under typical conditions" name="300NS" value="0x2"/>
+                <value caption="Meets SMBUS 2.0 specificaiton across all corners" name="500NS" value="0x3"/>
             </value-group>
             <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
                 <value caption="SDA setup time is four clock cycles" name="4CYC" value="0"/>
                 <value caption="SDA setup time is eight clock cycle" name="8CYC" value="1"/>
             </value-group>
             <value-group caption="Debug Run select" name="TWI_DBGRUN">
-                <value caption="The peripheral is halted in Break Debug mode and ignores events"
-                       name="HALT"
-                       value="0"/>
-                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted"
-                       name="RUN"
-                       value="1"/>
+                <value caption="The peripheral is halted in Break Debug mode and ignores events" name="HALT" value="0"/>
+                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted" name="RUN" value="1"/>
             </value-group>
             <value-group caption="Inactive Bus Time-Out select" name="TWI_TIMEOUT">
                 <value caption="Bus time-out disabled. I2C." name="DISABLED" value="0"/>
@@ -6294,15 +2774,9 @@
             </value-group>
             <value-group caption="Command select" name="TWI_MCMD">
                 <value caption="No action" name="NOACT" value="0"/>
-                <value caption="Execute Acknowledge Action followed by repeated Start."
-                       name="REPSTART"
-                       value="1"/>
-                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR."
-                       name="RECVTRANS"
-                       value="2"/>
-                <value caption="Execute Acknowledge Action followed by issuing a Stop condition."
-                       name="STOP"
-                       value="3"/>
+                <value caption="Execute Acknowledge Action followed by repeated Start." name="REPSTART" value="1"/>
+                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR." name="RECVTRANS" value="2"/>
+                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP" value="3"/>
             </value-group>
             <value-group caption="Bus State select" name="TWI_BUSSTATE">
                 <value caption="Unknown bus state" name="UNKNOWN" value="0"/>
@@ -6313,254 +2787,81 @@
             <value-group caption="Command select" name="TWI_SCMD">
                 <value caption="No Action" name="NOACT" value="0"/>
                 <value caption="Complete transaction" name="COMPTRANS" value="2"/>
-                <value caption="Used in response to an interrupt"
-                       name="RESPONSE"
-                       value="3"/>
+                <value caption="Used in response to an interrupt" name="RESPONSE" value="3"/>
             </value-group>
             <value-group caption="Address or Stop select" name="TWI_AP">
-                <value caption="A Stop condition generated the interrupt on APIF flag"
-                       name="STOP"
-                       value="0"/>
-                <value caption="Address detection generated the interrupt on APIF flag"
-                       name="ADR"
-                       value="1"/>
+                <value caption="A Stop condition generated the interrupt on APIF flag" name="STOP" value="0"/>
+                <value caption="Address detection generated the interrupt on APIF flag" name="ADR" value="1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                            name="USART"
-                            size="0x10">
-                <register caption="Receive Data Low Byte"
-                          initval="0x00"
-                          name="RXDATAL"
-                          offset="0x0"
-                          rw="R"
-                          size="1">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xFF" name="DATA" rw="R"/>
                 </register>
-                <register caption="Receive Data High Byte"
-                          initval="0x00"
-                          name="RXDATAH"
-                          offset="0x1"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="Receiver Data Register"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="R"/>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Receiver Data Register" mask="0x01" name="DATA8" rw="R"/>
                     <bitfield caption="Parity Error" mask="0x02" name="PERR" rw="R"/>
                     <bitfield caption="Frame Error" mask="0x04" name="FERR" rw="R"/>
                     <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Transmit Data Low Byte"
-                          initval="0x00"
-                          name="TXDATAL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register"
-                              mask="0xFF"
-                              name="DATA"
-                              rw="RW"/>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Transmit Data High Byte"
-                          initval="0x00"
-                          name="TXDATAH"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="RW"/>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x01" name="DATA8" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Wait For Break" mask="0x01" name="WFB" rw="RW"/>
                     <bitfield caption="Break Detected Flag" mask="0x02" name="BDF" rw="RW"/>
-                    <bitfield caption="Inconsistent Sync Field Interrupt Flag"
-                              mask="0x08"
-                              name="ISFIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Start Interrupt"
-                              mask="0x10"
-                              name="RXSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Flag"
-                              mask="0x20"
-                              name="DREIF"
-                              rw="R"/>
-                    <bitfield caption="Transmit Interrupt Flag"
-                              mask="0x40"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x08" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="RS485 Mode internal transmitter"
-                              mask="0x01"
-                              name="RS485"
-                              rw="RW"
-                              values="USART_RS485"/>
-                    <bitfield caption="Auto-baud Error Interrupt Enable"
-                              mask="0x04"
-                              name="ABEIE"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x01" name="RS485" rw="RW" values="USART_RS485"/>
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x04" name="ABEIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x08" name="LBME" rw="RW"/>
-                    <bitfield caption="Receiver Start Frame Interrupt Enable"
-                              mask="0x10"
-                              name="RXSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transmit Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multi-processor Communication Mode"
-                              mask="0x01"
-                              name="MPCM"
-                              rw="RW"/>
-                    <bitfield caption="Receiver Mode"
-                              mask="0x06"
-                              name="RXMODE"
-                              rw="RW"
-                              values="USART_RXMODE"/>
-                    <bitfield caption="Open Drain Mode Enable"
-                              mask="0x08"
-                              name="ODME"
-                              rw="RW"/>
-                    <bitfield caption="Start Frame Detection Enable"
-                              mask="0x10"
-                              name="SFDEN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x06" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x08" name="ODME" rw="RW"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
                     <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
                     <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x03"
-                          name="CTRLC"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="USART.CTRLC.CMODE" value="0x00 0x01 0x02"/>
                     <mode name="MSPI" qualifier="USART.CTRLC.CMODE" value="0x03"/>
-                    <bitfield caption="Communication Mode"
-                              mask="0xC0"
-                              name="CMODE"
-                              rw="RW"
-                              values="USART_CMODE"/>
-                    <bitfield caption="SPI Host Mode, Clock Phase"
-                              mask="0x02"
-                              modes="MSPI"
-                              name="UCPHA"
-                              rw="RW"/>
-                    <bitfield caption="SPI Host Mode, Data Order"
-                              mask="0x04"
-                              modes="MSPI"
-                              name="UDORD"
-                              rw="RW"/>
-                    <bitfield caption="Character Size"
-                              mask="0x07"
-                              modes="NORMAL"
-                              name="CHSIZE"
-                              rw="RW"
-                              values="USART_NORMAL_CHSIZE"/>
-                    <bitfield caption="Stop Bit Mode"
-                              mask="0x08"
-                              modes="NORMAL"
-                              name="SBMODE"
-                              rw="RW"
-                              values="USART_NORMAL_SBMODE"/>
-                    <bitfield caption="Parity Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="PMODE"
-                              rw="RW"
-                              values="USART_NORMAL_PMODE"/>
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" rw="RW" values="USART_CMODE"/>
+                    <bitfield caption="SPI Host Mode, Clock Phase" mask="0x02" modes="MSPI" name="UCPHA" rw="RW"/>
+                    <bitfield caption="SPI Host Mode, Data Order" mask="0x04" modes="MSPI" name="UDORD" rw="RW"/>
+                    <bitfield caption="Character Size" mask="0x07" modes="NORMAL" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" modes="NORMAL" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" modes="NORMAL" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
                 </register>
-                <register caption="Baud Rate"
-                          initval="0x0000"
-                          name="BAUD"
-                          offset="0x8"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Auto Baud Window"
-                              mask="0xC0"
-                              name="ABW"
-                              rw="RW"
-                              values="USART_ABW"/>
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xC0" name="ABW" rw="RW" values="USART_ABW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="IrDA Event Input Enable"
-                              mask="0x01"
-                              name="IREI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x01" name="IREI" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control"
-                          initval="0x00"
-                          name="TXPLCTRL"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xFF" name="TXPL" rw="RW"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control"
-                          initval="0x00"
-                          name="RXPLCTRL"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7F" name="RXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -6585,12 +2886,8 @@
                 <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
                 <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
                 <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
-                <value caption="Character size: 9 bit read low byte first"
-                       name="9BITL"
-                       value="0x06"/>
-                <value caption="Character size: 9 bit read high byte first"
-                       name="9BITH"
-                       value="0x07"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
             </value-group>
             <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
                 <value caption="No Parity" name="DISABLED" value="0x00"/>
@@ -6610,234 +2907,62 @@
         </module>
         <module caption="User Row" id="avrdd" name="USERROW">
             <register-group caption="User Row" name="USERROW" size="0x20">
-                <register caption="User Row Byte 0"
-                          name="USERROW0"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 1"
-                          name="USERROW1"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 2"
-                          name="USERROW2"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 3"
-                          name="USERROW3"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 4"
-                          name="USERROW4"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 5"
-                          name="USERROW5"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 6"
-                          name="USERROW6"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 7"
-                          name="USERROW7"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 8"
-                          name="USERROW8"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 9"
-                          name="USERROW9"
-                          offset="0x09"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 10"
-                          name="USERROW10"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 11"
-                          name="USERROW11"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 12"
-                          name="USERROW12"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 13"
-                          name="USERROW13"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 14"
-                          name="USERROW14"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 15"
-                          name="USERROW15"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 16"
-                          name="USERROW16"
-                          offset="0x10"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 17"
-                          name="USERROW17"
-                          offset="0x11"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 18"
-                          name="USERROW18"
-                          offset="0x12"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 19"
-                          name="USERROW19"
-                          offset="0x13"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 20"
-                          name="USERROW20"
-                          offset="0x14"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 21"
-                          name="USERROW21"
-                          offset="0x15"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 22"
-                          name="USERROW22"
-                          offset="0x16"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 23"
-                          name="USERROW23"
-                          offset="0x17"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 24"
-                          name="USERROW24"
-                          offset="0x18"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 25"
-                          name="USERROW25"
-                          offset="0x19"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 26"
-                          name="USERROW26"
-                          offset="0x1A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 27"
-                          name="USERROW27"
-                          offset="0x1B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 28"
-                          name="USERROW28"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 29"
-                          name="USERROW29"
-                          offset="0x1D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 30"
-                          name="USERROW30"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 31"
-                          name="USERROW31"
-                          offset="0x1F"
-                          rw="RW"
-                          size="1"/>
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Virtual Ports" id="gpio_ports_avr_v2_vport" name="VPORT">
             <register-group caption="Virtual Ports" name="VPORT" size="0x4">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Voltage reference" id="avrdd" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
-                <register caption="ADC0 Reference"
-                          initval="0x00"
-                          name="ADC0REF"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="ADC0 Reference" initval="0x00" name="ADC0REF" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="DAC0 Reference"
-                          initval="0x00"
-                          name="DAC0REF"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="DAC0 Reference" initval="0x00" name="DAC0REF" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="AC Reference"
-                          initval="0x00"
-                          name="ACREF"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="AC Reference" initval="0x00" name="ACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
             </register-group>
@@ -6852,33 +2977,12 @@
         </module>
         <module caption="Watch-Dog Timer" id="wdt_windowed_v2" name="WDT">
             <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="WDT_PERIOD"/>
-                    <bitfield caption="Window"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="WDT_WINDOW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x0F" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xF0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Syncronization busy"
-                              mask="0x01"
-                              name="SYNCBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY" rw="R"/>
                     <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
                 </register>
             </register-group>
@@ -6913,60 +3017,25 @@
         </module>
         <module caption="Zero Cross Detect" id="cmp_zxover_ctrl_v3" name="ZCD">
             <register-group caption="Zero Cross Detect" name="ZCD" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Invert signal from pin"
-                              mask="0x08"
-                              name="INVERT"
-                              rw="RW"/>
+                    <bitfield caption="Invert signal from pin" mask="0x08" name="INVERT" rw="RW"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x03"
-                              name="INTMODE"
-                              rw="RW"
-                              values="ZCD_INTMODE"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x03" name="INTMODE" rw="RW" values="ZCD_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="ZCD Interrupt Flag" mask="0x01" name="CROSSIF" rw="RW"/>
-                    <bitfield caption="ZCD State"
-                              mask="0x10"
-                              name="STATE"
-                              rw="R"
-                              values="ZCD_STATE"/>
+                    <bitfield caption="ZCD State" mask="0x10" name="STATE" rw="R" values="ZCD_STATE"/>
                 </register>
             </register-group>
             <value-group caption="Interrupt Mode select" name="ZCD_INTMODE">
                 <value caption="No interrupt" name="NONE" value="0x0"/>
-                <value caption="Interrupt on rising input signal"
-                       name="RISING"
-                       value="0x1"/>
-                <value caption="Interrupt on falling input signal"
-                       name="FALLING"
-                       value="0x2"/>
-                <value caption="Interrupt on both rising and falling input signal"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Interrupt on rising input signal" name="RISING" value="0x1"/>
+                <value caption="Interrupt on falling input signal" name="FALLING" value="0x2"/>
+                <value caption="Interrupt on both rising and falling input signal" name="BOTH" value="0x3"/>
             </value-group>
             <value-group caption="ZCD State select" name="ZCD_STATE">
                 <value caption="Output is 0" name="LOW" value="0x0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD32.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD32.xml
index c0a6a5cb..744e04ad 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD32.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DD32.xml
@@ -1,105 +1,29 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR32DD32"
-                 package="QFN32"
-                 pinout="QFN32MVIO"
-                 speedmax="32000000"
-                 tempmax="125"
-                 tempmin="-40"
-                 vccmax="5.5"
-                 vccmin="1.8"/>
+        <variant ordercode="AVR32DD32" package="QFN32" pinout="QFN32MVIO" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR32DD32" family="AVR8" architecture="AVR8X" avr-family="AVR DD">
         <address-spaces>
-            <address-space endianness="little"
-                           id="data"
-                           name="data"
-                           size="0x10000"
-                           start="0x0000">
-                <memory-segment exec="0"
-                                name="IO"
-                                rw="RW"
-                                size="0x103F"
-                                start="0x00"
-                                type="io"/>
-                <memory-segment exec="0"
-                                name="LOCKBITS"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x04"
-                                start="0x1040"
-                                type="lockbits"/>
-                <memory-segment exec="0"
-                                name="FUSES"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x10"
-                                start="0x1050"
-                                type="fuses"/>
-                <memory-segment exec="0"
-                                name="USER_SIGNATURES"
-                                pagesize="0x20"
-                                rw="RW"
-                                size="0x20"
-                                start="0x1080"
-                                type="user_signatures"/>
-                <memory-segment exec="0"
-                                name="SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x03"
-                                start="0x1100"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="PROD_SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x7D"
-                                start="0x1103"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="EEPROM"
-                                pagesize="0x1"
-                                rw="RW"
-                                size="0x100"
-                                start="0x1400"
-                                type="eeprom"/>
-                <memory-segment exec="0"
-                                name="INTERNAL_SRAM"
-                                rw="RW"
-                                size="0x1000"
-                                start="0x7000"
-                                type="ram"/>
-                <memory-segment exec="0"
-                                name="MAPPED_PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x8000"
-                                start="0x8000"
-                                type="other"/>
+            <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+                <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00" type="io"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x04" start="0x1040" type="lockbits"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x1050" type="fuses"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x1080" type="user_signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x03" start="0x1100" type="signatures"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x1103" type="signatures"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x100" start="0x1400" type="eeprom"/>
+                <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1000" start="0x7000" type="ram"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x8000" type="other"/>
             </address-space>
-            <address-space endianness="little"
-                           id="prog"
-                           name="prog"
-                           size="0x8000"
-                           start="0x0000">
-                <memory-segment exec="1"
-                                name="PROGMEM"
-                                pagesize="0x200"
-                                rw="RW"
-                                size="0x8000"
-                                start="0x00"
-                                type="flash"/>
+            <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
             <module id="cmp_control_v8" name="AC">
                 <instance name="AC0">
-                    <register-group address-space="data"
-                                    name="AC0"
-                                    name-in-module="AC"
-                                    offset="0x0680"/>
+                    <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
                     <signals>
                         <signal function="AC0" group="N" index="0" pad="PD3"/>
                         <signal function="AC0" group="N" index="2" pad="PD7"/>
@@ -107,20 +31,13 @@
                         <signal function="AC0" group="P" index="0" pad="PD2"/>
                         <signal function="AC0" group="P" index="3" pad="PD6"/>
                         <signal function="AC0" group="P" index="4" pad="PC3"/>
-                        <signal field="PORTMUX.ACROUTEA.AC0"
-                                function="AC0"
-                                group="OUT"
-                                index="0"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ACROUTEA.AC0" function="AC0" group="OUT" index="0" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
             <module id="adc_12b_diff_ctrl_v1" name="ADC">
                 <instance name="ADC0">
-                    <register-group address-space="data"
-                                    name="ADC0"
-                                    name-in-module="ADC"
-                                    offset="0x0600"/>
+                    <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
                     <signals>
                         <signal function="AIN0" group="AIN" index="1" pad="PD1"/>
                         <signal function="AIN0" group="AIN" index="2" pad="PD2"/>
@@ -150,153 +67,44 @@
             </module>
             <module id="bor_lvd_ctrl_v1" name="BOD">
                 <instance name="BOD">
-                    <register-group address-space="data"
-                                    name="BOD"
-                                    name-in-module="BOD"
-                                    offset="0x00A0"/>
+                    <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x00A0"/>
                 </instance>
             </module>
             <module id="cla_ccl_v1" name="CCL">
                 <instance name="CCL">
-                    <register-group address-space="data"
-                                    name="CCL"
-                                    name-in-module="CCL"
-                                    offset="0x01C0"/>
+                    <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
                     <signals>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_IN"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL"
-                                group="LUT0_OUT"
-                                index="0"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_IN"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="CCL_ALT1"
-                                group="LUT0_OUT"
-                                index="0"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="0"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL"
-                                group="LUT1_OUT"
-                                index="0"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="0"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="CCL_ALT1"
-                                group="LUT1_IN"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL"
-                                group="LUT2_IN"
-                                index="1"
-                                pad="PD1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL"
-                                group="LUT2_IN"
-                                index="2"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL"
-                                group="LUT2_OUT"
-                                index="0"
-                                pad="PD3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_IN"
-                                index="1"
-                                pad="PD1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_IN"
-                                index="2"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="CCL_ALT1"
-                                group="LUT2_OUT"
-                                index="0"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3"
-                                function="CCL"
-                                group="LUT3_IN"
-                                index="0"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3"
-                                function="CCL"
-                                group="LUT3_IN"
-                                index="1"
-                                pad="PF1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3"
-                                function="CCL"
-                                group="LUT3_IN"
-                                index="2"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3"
-                                function="CCL"
-                                group="LUT3_OUT"
-                                index="0"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_OUT" index="0" pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="0" pad="PC0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="1" pad="PD1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="2" pad="PD2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0" pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="0" pad="PF3"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="CLKCTRL">
                 <instance name="CLKCTRL">
-                    <register-group address-space="data"
-                                    name="CLKCTRL"
-                                    name-in-module="CLKCTRL"
-                                    offset="0x0060"/>
+                    <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
                     <signals>
                         <signal function="CLKCTRL" group="CLKOUT" pad="PA7"/>
                         <signal function="CLKCTRL" group="EXTCLK" pad="PA0"/>
@@ -311,10 +119,7 @@
             </module>
             <module id="cpu_avr_xt_v1" name="CPU">
                 <instance name="CPU">
-                    <register-group address-space="data"
-                                    name="CPU"
-                                    name-in-module="CPU"
-                                    offset="0x0030"/>
+                    <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V4S"/>
                     </parameters>
@@ -322,26 +127,17 @@
             </module>
             <module id="int_8bit_v3" name="CPUINT">
                 <instance name="CPUINT">
-                    <register-group address-space="data"
-                                    name="CPUINT"
-                                    name-in-module="CPUINT"
-                                    offset="0x0110"/>
+                    <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
                 </instance>
             </module>
             <module id="math_pdi_crc_v1" name="CRCSCAN">
                 <instance name="CRCSCAN">
-                    <register-group address-space="data"
-                                    name="CRCSCAN"
-                                    name-in-module="CRCSCAN"
-                                    offset="0x0120"/>
+                    <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
                 </instance>
             </module>
             <module id="dac_nbit_ctrl_v5" name="DAC">
                 <instance name="DAC0">
-                    <register-group address-space="data"
-                                    name="DAC0"
-                                    name-in-module="DAC"
-                                    offset="0x06A0"/>
+                    <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
                     <signals>
                         <signal function="DAC0" group="OUT" index="0" pad="PD6"/>
                     </signals>
@@ -349,95 +145,46 @@
             </module>
             <module id="avrdd" name="EVSYS">
                 <instance name="EVSYS">
-                    <register-group address-space="data"
-                                    name="EVSYS"
-                                    name-in-module="EVSYS"
-                                    offset="0x0200"/>
+                    <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF"
-                                function="EVSYS"
-                                group="EVOUT"
-                                index="5"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF"
-                                function="EVSYS_ALT1"
-                                group="EVOUT"
-                                index="5"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT1" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="FUSE">
                 <instance name="FUSE">
-                    <register-group address-space="data"
-                                    name="FUSE"
-                                    name-in-module="FUSE"
-                                    offset="0x1050"/>
+                    <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1050"/>
                 </instance>
             </module>
             <module id="avrdd" name="GPR">
                 <instance name="GPR">
-                    <register-group address-space="data"
-                                    name="GPR"
-                                    name-in-module="GPR"
-                                    offset="0x001C"/>
+                    <register-group address-space="data" name="GPR" name-in-module="GPR" offset="0x001C"/>
                 </instance>
             </module>
             <module id="avrdd" name="LOCK">
                 <instance name="LOCK">
-                    <register-group address-space="data"
-                                    name="LOCK"
-                                    name-in-module="LOCK"
-                                    offset="0x1040"/>
+                    <register-group address-space="data" name="LOCK" name-in-module="LOCK" offset="0x1040"/>
                 </instance>
             </module>
             <module id="io_multiv_ctrl_avr_v1" name="MVIO">
                 <instance name="MVIO">
-                    <register-group address-space="data"
-                                    name="MVIO"
-                                    name-in-module="MVIO"
-                                    offset="0x00C0"/>
+                    <register-group address-space="data" name="MVIO" name-in-module="MVIO" offset="0x00C0"/>
                 </instance>
             </module>
             <module id="nvm_ctrl_avr_v1" name="NVMCTRL">
                 <instance name="NVMCTRL">
-                    <register-group address-space="data"
-                                    name="NVMCTRL"
-                                    name-in-module="NVMCTRL"
-                                    offset="0x1000"/>
+                    <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_port" name="PORT">
                 <instance name="PORTA">
-                    <register-group address-space="data"
-                                    name="PORTA"
-                                    name-in-module="PORT"
-                                    offset="0x0400"/>
+                    <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
@@ -450,10 +197,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC">
-                    <register-group address-space="data"
-                                    name="PORTC"
-                                    name-in-module="PORT"
-                                    offset="0x0440"/>
+                    <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
@@ -462,10 +206,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD">
-                    <register-group address-space="data"
-                                    name="PORTD"
-                                    name-in-module="PORT"
-                                    offset="0x0460"/>
+                    <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
                         <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
@@ -477,10 +218,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF">
-                    <register-group address-space="data"
-                                    name="PORTF"
-                                    name-in-module="PORT"
-                                    offset="0x04A0"/>
+                    <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PF0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PF1"/>
@@ -495,18 +233,12 @@
             </module>
             <module id="avrdd" name="PORTMUX">
                 <instance name="PORTMUX">
-                    <register-group address-space="data"
-                                    name="PORTMUX"
-                                    name-in-module="PORTMUX"
-                                    offset="0x05E0"/>
+                    <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
                 </instance>
             </module>
             <module id="rst_integration_v8" name="RSTCTRL">
                 <instance name="RSTCTRL">
-                    <register-group address-space="data"
-                                    name="RSTCTRL"
-                                    name-in-module="RSTCTRL"
-                                    offset="0x0040"/>
+                    <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
                     <signals>
                         <signal function="OTHER" group="RESET" pad="PF6"/>
                     </signals>
@@ -514,592 +246,209 @@
             </module>
             <module id="tmr_16b_rtc_v1" name="RTC">
                 <instance name="RTC">
-                    <register-group address-space="data"
-                                    name="RTC"
-                                    name-in-module="RTC"
-                                    offset="0x0140"/>
+                    <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
                 </instance>
             </module>
             <module id="avrdd" name="SIGROW">
                 <instance name="SIGROW">
-                    <register-group address-space="data"
-                                    name="SIGROW"
-                                    name-in-module="SIGROW"
-                                    offset="0x1100"/>
+                    <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
                 </instance>
             </module>
             <module id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
                 <instance name="SLPCTRL">
-                    <register-group address-space="data"
-                                    name="SLPCTRL"
-                                    name-in-module="SLPCTRL"
-                                    offset="0x0050"/>
+                    <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
                 </instance>
             </module>
             <module id="spi_8bit_v2" name="SPI">
                 <instance name="SPI0">
-                    <register-group address-space="data"
-                                    name="SPI0"
-                                    name-in-module="SPI"
-                                    offset="0x0940"/>
+                    <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0940"/>
                     <signals>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="MISO"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="MOSI"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="SCK"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0"
-                                group="SS"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MISO"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="MOSI"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="SCK"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT3"
-                                group="SS"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MISO"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="MOSI"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT4"
-                                group="SS"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="MISO"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="MOSI"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT5"
-                                group="SS"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MISO"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="MOSI"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SCK"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="SPI0_ALT6"
-                                group="SS"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="MISO" pad="PA5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="MOSI" pad="PA4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="SCK" pad="PA6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0" group="SS" pad="PA7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MISO" pad="PA1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="MOSI" pad="PA0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="SCK" pad="PC0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT3" group="SS" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MISO" pad="PD5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="MOSI" pad="PD4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SCK" pad="PD6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT4" group="SS" pad="PD7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="MISO" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="MOSI" pad="PC0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SCK" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT5" group="SS" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MISO" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="MOSI" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SCK" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI0_ALT6" group="SS" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="SYSCFG">
                 <instance name="SYSCFG">
-                    <register-group address-space="data"
-                                    name="SYSCFG"
-                                    name-in-module="SYSCFG"
-                                    offset="0x0F00"/>
+                    <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
                 </instance>
             </module>
             <module id="tmr_16b_pwm_v1" name="TCA">
                 <instance name="TCA0">
-                    <register-group address-space="data"
-                                    name="TCA0"
-                                    name-in-module="TCA"
-                                    offset="0x0A00"/>
+                    <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
                     <signals>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="3"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="4"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0"
-                                group="WO"
-                                index="5"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="0"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT2"
-                                group="WO"
-                                index="3"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="1"
-                                pad="PD1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="2"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="3"
-                                pad="PD3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="4"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT3"
-                                group="WO"
-                                index="5"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="0"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="1"
-                                pad="PF1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="2"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="3"
-                                pad="PF3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="4"
-                                pad="PF4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="TCA0_ALT5"
-                                group="WO"
-                                index="5"
-                                pad="PF5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="3" pad="PA3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="4" pad="PA4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0" group="WO" index="5" pad="PA5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="0" pad="PC0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT2" group="WO" index="3" pad="PC3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="1" pad="PD1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="2" pad="PD2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="3" pad="PD3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="4" pad="PD4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT3" group="WO" index="5" pad="PD5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="0" pad="PF0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="1" pad="PF1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="2" pad="PF2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="3" pad="PF3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="4" pad="PF4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA0_ALT5" group="WO" index="5" pad="PF5"/>
                     </signals>
                 </instance>
             </module>
             <module id="tmr_16b_capture_v1" name="TCB">
                 <instance name="TCB0">
-                    <register-group address-space="data"
-                                    name="TCB0"
-                                    name-in-module="TCB"
-                                    offset="0x0B00"/>
+                    <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0B00"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB0"
-                                function="TCB0"
-                                group="WO"
-                                index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TCBROUTEA.TCB0"
-                                function="TCB0_ALT1"
-                                group="WO"
-                                index="0"
-                                pad="PF4"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0_ALT1" group="WO" index="0" pad="PF4"/>
                     </signals>
                 </instance>
                 <instance name="TCB1">
-                    <register-group address-space="data"
-                                    name="TCB1"
-                                    name-in-module="TCB"
-                                    offset="0x0B10"/>
+                    <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0B10"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB1"
-                                function="TCB1"
-                                group="WO"
-                                index="0"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TCBROUTEA.TCB1"
-                                function="TCB1_ALT1"
-                                group="WO"
-                                index="0"
-                                pad="PF5"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1_ALT1" group="WO" index="0" pad="PF5"/>
                     </signals>
                 </instance>
                 <instance name="TCB2">
-                    <register-group address-space="data"
-                                    name="TCB2"
-                                    name-in-module="TCB"
-                                    offset="0x0B20"/>
+                    <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0B20"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB2"
-                                function="TCB2"
-                                group="WO"
-                                index="0"
-                                pad="PC0"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2" group="WO" index="0" pad="PC0"/>
                     </signals>
                 </instance>
             </module>
             <module id="tmr_12b_psc_v1" name="TCD">
                 <instance name="TCD0">
-                    <register-group address-space="data"
-                                    name="TCD0"
-                                    name-in-module="TCD"
-                                    offset="0x0B80"/>
+                    <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0B80"/>
                     <signals>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOA"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOB"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOC"
-                                index="2"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0"
-                                group="WOD"
-                                index="3"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT2"
-                                group="WOA"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT2"
-                                group="WOB"
-                                index="1"
-                                pad="PF1"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT2"
-                                group="WOC"
-                                index="2"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT2"
-                                group="WOD"
-                                index="3"
-                                pad="PF3"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOA"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOB"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOC"
-                                index="2"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0"
-                                function="TCD0_ALT4"
-                                group="WOD"
-                                index="3"
-                                pad="PD5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOA" pad="PA4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOB" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2" pad="PD4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3" pad="PD5"/>
                     </signals>
                 </instance>
             </module>
             <module id="i2c_8bit_avr_v3" name="TWI">
                 <instance name="TWI0">
-                    <register-group address-space="data"
-                                    name="TWI0"
-                                    name-in-module="TWI"
-                                    offset="0x0900"/>
+                    <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0900"/>
                     <signals>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT1"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT1"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SCL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT2"
-                                group="SDA"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="I2C0_ALT3"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0" group="SDA_DUAL" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT1" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT1" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SCL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT2" group="SDA" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL" pad="PA1"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA" pad="PA0"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="I2C0_ALT3" group="SDA_DUAL" pad="PC2"/>
                     </signals>
                 </instance>
             </module>
             <module id="uart_autobd_v4" name="USART">
                 <instance name="USART0">
-                    <register-group address-space="data"
-                                    name="USART0"
-                                    name-in-module="USART"
-                                    offset="0x0800"/>
+                    <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="RXD"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="TXD"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="XCK"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0"
-                                group="XDIR"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="RXD"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="TXD"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="XCK"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT1"
-                                group="XDIR"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT2"
-                                group="RXD"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT2"
-                                group="TXD"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="RXD"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="TXD"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT3"
-                                group="XDIR"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="RXD"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="TXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="USART0_ALT4"
-                                group="XCK"
-                                pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="RXD" pad="PA5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="TXD" pad="PA4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="XCK" pad="PA6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT1" group="XDIR" pad="PA7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT2" group="RXD" pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT2" group="TXD" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="RXD" pad="PD5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="TXD" pad="PD4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XCK" pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT3" group="XDIR" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="RXD" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="TXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT4" group="XCK" pad="PC3"/>
                     </signals>
                 </instance>
                 <instance name="USART1">
-                    <register-group address-space="data"
-                                    name="USART1"
-                                    name-in-module="USART"
-                                    offset="0x0820"/>
+                    <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="RXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="TXD"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1"
-                                group="XDIR"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="RXD"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="USART1_ALT2"
-                                group="TXD"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="TXD" pad="PC0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="RXD" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT2" group="TXD" pad="PD6"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrdd" name="USERROW">
                 <instance name="USERROW">
-                    <register-group address-space="data"
-                                    name="USERROW"
-                                    name-in-module="USERROW"
-                                    offset="0x1080"/>
+                    <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1080"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v2_vport" name="VPORT">
                 <instance name="VPORTA">
-                    <register-group address-space="data"
-                                    name="VPORTA"
-                                    name-in-module="VPORT"
-                                    offset="0x0000"/>
+                    <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
                 </instance>
                 <instance name="VPORTC">
-                    <register-group address-space="data"
-                                    name="VPORTC"
-                                    name-in-module="VPORT"
-                                    offset="0x0008"/>
+                    <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
                 </instance>
                 <instance name="VPORTD">
-                    <register-group address-space="data"
-                                    name="VPORTD"
-                                    name-in-module="VPORT"
-                                    offset="0x000C"/>
+                    <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
                 </instance>
                 <instance name="VPORTF">
-                    <register-group address-space="data"
-                                    name="VPORTF"
-                                    name-in-module="VPORT"
-                                    offset="0x0014"/>
+                    <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
                 </instance>
             </module>
             <module id="avrdd" name="VREF">
                 <instance name="VREF">
-                    <register-group address-space="data"
-                                    name="VREF"
-                                    name-in-module="VREF"
-                                    offset="0x00B0"/>
+                    <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00B0"/>
                 </instance>
             </module>
             <module id="wdt_windowed_v2" name="WDT">
                 <instance name="WDT">
-                    <register-group address-space="data"
-                                    name="WDT"
-                                    name-in-module="WDT"
-                                    offset="0x0100"/>
+                    <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
                 </instance>
             </module>
             <module id="cmp_zxover_ctrl_v3" name="ZCD">
                 <instance name="ZCD3">
-                    <register-group address-space="data"
-                                    name="ZCD3"
-                                    name-in-module="ZCD"
-                                    offset="0x06D8"/>
+                    <register-group address-space="data" name="ZCD3" name-in-module="ZCD" offset="0x06D8"/>
                     <signals>
-                        <signal field="PORTMUX.ZCDROUTEA.ZCD3"
-                                function="ZCD3"
-                                group="IN"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.ZCDROUTEA.ZCD3"
-                                function="ZCD3"
-                                group="OUT"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ZCDROUTEA.ZCD3" function="ZCD3" group="IN" pad="PC2"/>
+                        <signal field="PORTMUX.ZCDROUTEA.ZCD3" function="ZCD3" group="OUT" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
@@ -1171,90 +520,31 @@
     <modules>
         <module caption="Analog Comparator" id="cmp_control_v8" name="AC">
             <register-group caption="Analog Comparator" name="AC" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Hysteresis Mode"
-                              mask="0x06"
-                              name="HYSMODE"
-                              rw="RW"
-                              values="AC_HYSMODE"/>
-                    <bitfield caption="Power profile"
-                              mask="0x18"
-                              name="POWER"
-                              rw="RW"
-                              values="AC_POWER"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Power profile" mask="0x18" name="POWER" rw="RW" values="AC_POWER"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Mux Control A"
-                          initval="0x00"
-                          name="MUXCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input MUX Selection"
-                              mask="0x07"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection"
-                              mask="0x38"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="AC_MUXPOS"/>
-                    <bitfield caption="AC Output Initial Value"
-                              mask="0x40"
-                              name="INITVAL"
-                              rw="RW"
-                              values="AC_INITVAL"/>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Negative Input MUX Selection" mask="0x07" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+                    <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
                 </register>
-                <register caption="DAC Voltage Reference"
-                          initval="0xFF"
-                          name="DACREF"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="DAC Voltage Reference" initval="0xFF" name="DACREF" offset="0x5" rw="RW" size="1">
                     <bitfield caption="DACREF" mask="0xFF" name="DACREF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="WINSEL" value="0x00"/>
                     <mode name="WINDOW" qualifier="WINSEL" value="0x01 0x02"/>
                     <bitfield caption="Interrupt Enable" mask="0x01" name="CMP" rw="RW"/>
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="INTMODE"
-                              rw="RW"
-                              values="AC_NORMAL_INTMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" modes="NORMAL" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Comparator Interrupt Flag"
-                              mask="0x01"
-                              name="CMPIF"
-                              rw="RW"/>
-                    <bitfield caption="Analog Comparator State"
-                              mask="0x10"
-                              name="CMPSTATE"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x01" name="CMPIF" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -1264,23 +554,15 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption"
-                       name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
                 <value caption="Power profile 3" name="PROFILE3" value="0x3"/>
             </value-group>
             <value-group caption="Interrupt Mode select" name="AC_NORMAL_INTMODE">
-                <value caption="Positive and negative inputs crosses"
-                       name="BOTHEDGE"
-                       value="0x0"/>
-                <value caption="Positive input goes below negative input"
-                       name="NEGEDGE"
-                       value="0x2"/>
-                <value caption="Positive input goes above negative input"
-                       name="POSEDGE"
-                       value="0x3"/>
+                <value caption="Positive and negative inputs crosses" name="BOTHEDGE" value="0x0"/>
+                <value caption="Positive input goes below negative input" name="NEGEDGE" value="0x2"/>
+                <value caption="Positive input goes above negative input" name="POSEDGE" value="0x3"/>
             </value-group>
             <value-group caption="AC Output Initial Value select" name="AC_INITVAL">
                 <value caption="Output initialized to 0" name="LOW" value="0x0"/>
@@ -1298,194 +580,62 @@
                 <value caption="Positive Pin 4" name="AINP4" value="0x04"/>
             </value-group>
         </module>
-        <module caption="Analog to Digital Converter"
-                id="adc_12b_diff_ctrl_v1"
-                name="ADC">
+        <module caption="Analog to Digital Converter" id="adc_12b_diff_ctrl_v1" name="ADC">
             <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="ADC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Free running mode" mask="0x02" name="FREERUN" rw="RW"/>
-                    <bitfield caption="Resolution selection"
-                              mask="0x0C"
-                              name="RESSEL"
-                              rw="RW"
-                              values="ADC_RESSEL"/>
+                    <bitfield caption="Resolution selection" mask="0x0C" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
                     <bitfield caption="Left adjust result" mask="0x10" name="LEFTADJ" rw="RW"/>
-                    <bitfield caption="Conversion mode"
-                              mask="0x20"
-                              name="CONVMODE"
-                              rw="RW"
-                              values="ADC_CONVMODE"/>
+                    <bitfield caption="Conversion mode" mask="0x20" name="CONVMODE" rw="RW" values="ADC_CONVMODE"/>
                     <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Accumulation Samples"
-                              mask="0x07"
-                              name="SAMPNUM"
-                              rw="RW"
-                              values="ADC_SAMPNUM"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x07" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Pre-scaler"
-                              mask="0x0F"
-                              name="PRESC"
-                              rw="RW"
-                              values="ADC_PRESC"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x0F" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sampling Delay Selection"
-                              mask="0x0F"
-                              name="SAMPDLY"
-                              rw="RW"
-                              values="ADC_SAMPDLY"/>
-                    <bitfield caption="Initial Delay Selection"
-                              mask="0xE0"
-                              name="INITDLY"
-                              rw="RW"
-                              values="ADC_INITDLY"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Sampling Delay Selection" mask="0x0F" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xE0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Window Comparator Mode"
-                              mask="0x07"
-                              name="WINCM"
-                              rw="RW"
-                              values="ADC_WINCM"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x07" name="WINCM" rw="RW" values="ADC_WINCM"/>
                 </register>
-                <register caption="Sample Control"
-                          initval="0x00"
-                          name="SAMPCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Sample lenght" mask="0xFF" name="SAMPLEN" rw="RW"/>
                 </register>
-                <register caption="Positive mux input"
-                          initval="0x00"
-                          name="MUXPOS"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="ADC_MUXPOS"/>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
-                <register caption="Negative mux input"
-                          initval="0x00"
-                          name="MUXNEG"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x7F"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="ADC_MUXNEG"/>
+                <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7F" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
-                <register caption="Command"
-                          initval="0x00"
-                          name="COMMAND"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Start Conversion" mask="0x01" name="STCONV" rw="RW"/>
                     <bitfield caption="Stop Conversion" mask="0x02" name="SPCONV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Start Event Input Enable"
-                              mask="0x01"
-                              name="STARTEI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x01" name="STARTEI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Result Ready Interrupt Enable"
-                              mask="0x01"
-                              name="RESRDY"
-                              rw="RW"/>
-                    <bitfield caption="Window Comparator Interrupt Enable"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x01" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
                     <bitfield caption="Result Ready Flag" mask="0x01" name="RESRDY" rw="RW"/>
-                    <bitfield caption="Window Comparator Flag"
-                              mask="0x02"
-                              name="WCMP"
-                              rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x02" name="WCMP" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Data"
-                          initval="0x00"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Temporary" mask="0xFF" name="TEMP" rw="RW"/>
                 </register>
-                <register caption="ADC Accumulator Result"
-                          name="RES"
-                          offset="0x10"
-                          rw="R"
-                          size="2"/>
-                <register caption="Window comparator low threshold"
-                          name="WINLT"
-                          offset="0x12"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Window comparator high threshold"
-                          name="WINHT"
-                          offset="0x14"
-                          rw="RW"
-                          size="2"/>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Conversion mode select" name="ADC_CONVMODE">
                 <value caption="Single-Ended mode" name="SINGLEENDED" value="0x0"/>
@@ -1615,99 +765,33 @@
         </module>
         <module caption="Bod interface" id="bor_lvd_ctrl_v1" name="BOD">
             <register-group caption="Bod interface" name="BOD" size="0x10">
-                <register caption="Control A"
-                          initval="0x01"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Operation in sleep mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="BOD_SLEEP"/>
-                    <bitfield caption="Operation in active mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="R"
-                              values="BOD_ACTIVE"/>
-                    <bitfield caption="Sample frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="R"
-                              values="BOD_SAMPFREQ"/>
+                <register caption="Control A" initval="0x01" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in sleep mode" mask="0x03" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                    <bitfield caption="Operation in active mode" mask="0x0C" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bod level"
-                              mask="0x07"
-                              name="LVL"
-                              rw="R"
-                              values="BOD_LVL"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x07" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor Control"
-                          initval="0x00"
-                          name="VLMCTRLA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level"
-                              mask="0x03"
-                              name="VLMLVL"
-                              rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x03" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor interrrupt enable"
-                              mask="0x01"
-                              name="VLMIE"
-                              rw="RW"/>
-                    <bitfield caption="Configuration"
-                              mask="0x06"
-                              name="VLMCFG"
-                              rw="RW"
-                              values="BOD_VLMCFG"/>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x01" name="VLMIE" rw="RW"/>
+                    <bitfield caption="Configuration" mask="0x06" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor interrupt flag"
-                              mask="0x01"
-                              name="VLMIF"
-                              rw="RW"/>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x01" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor status"
-                              mask="0x01"
-                              name="VLMS"
-                              rw="R"
-                              values="BOD_VLMS"/>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x01" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
                 <value caption="Disabled" name="DIS" value="0x00"/>
                 <value caption="Enabled" name="ENABLED" value="0x01"/>
                 <value caption="Sampled" name="SAMPLED" value="0x02"/>
-                <value caption="Enabled with wake-up halted until BOD is ready"
-                       name="ENWAKE"
-                       value="0x03"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
             </value-group>
             <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
                 <value caption="128Hz sampling frequency" name="128HZ" value="0x0"/>
@@ -1730,338 +814,103 @@
                 <value caption="VDD crosses VLM threshold" name="BOTH" value="0x02"/>
             </value-group>
             <value-group caption="Voltage level monitor status select" name="BOD_VLMS">
-                <value caption="The voltage is above the VLM threshold level"
-                       name="ABOVE"
-                       value="0x0"/>
-                <value caption="The voltage is below the VLM threshold level"
-                       name="BELOW"
-                       value="0x1"/>
+                <value caption="The voltage is above the VLM threshold level" name="ABOVE" value="0x0"/>
+                <value caption="The voltage is below the VLM threshold level" name="BELOW" value="0x1"/>
             </value-group>
             <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
                 <value caption="VLM Disabled" name="OFF" value="0x0"/>
-                <value caption="VLM threshold 5% above BOD level"
-                       name="5ABOVE"
-                       value="0x1"/>
-                <value caption="VLM threshold 15% above BOD level"
-                       name="15ABOVE"
-                       value="0x2"/>
-                <value caption="VLM threshold 25% above BOD level"
-                       name="25ABOVE"
-                       value="0x3"/>
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x1"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x2"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x3"/>
             </value-group>
         </module>
         <module caption="Configurable Custom Logic" id="cla_ccl_v1" name="CCL">
             <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Sequential Control 0"
-                          initval="0x00"
-                          name="SEQCTRL0"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Sequential Control 1"
-                          initval="0x00"
-                          name="SEQCTRL1"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Interrupt Control 0"
-                          initval="0x00"
-                          name="INTCTRL0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode for LUT0"
-                              mask="0x03"
-                              name="INTMODE0"
-                              rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1"
-                              mask="0x0C"
-                              name="INTMODE1"
-                              rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2"
-                              mask="0x30"
-                              name="INTMODE2"
-                              rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3"
-                              mask="0xC0"
-                              name="INTMODE3"
-                              rw="RW"
-                              values="CCL_INTMODE3"/>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x03" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0x0C" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xC0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x0F" name="INT" rw="RW"/>
                 </register>
-                <register caption="LUT 0 Control A"
-                          initval="0x00"
-                          name="LUT0CTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 0 Control A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 0 Control B"
-                          initval="0x00"
-                          name="LUT0CTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 0 Control C"
-                          initval="0x00"
-                          name="LUT0CTRLC"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 0"
-                          initval="0x00"
-                          name="TRUTH0"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 1 Control A"
-                          initval="0x00"
-                          name="LUT1CTRLA"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 1 Control A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 1 Control B"
-                          initval="0x00"
-                          name="LUT1CTRLB"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 1 Control C"
-                          initval="0x00"
-                          name="LUT1CTRLC"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 1"
-                          initval="0x00"
-                          name="TRUTH1"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 2 Control A"
-                          initval="0x00"
-                          name="LUT2CTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 2 Control A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 2 Control B"
-                          initval="0x00"
-                          name="LUT2CTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 2 Control C"
-                          initval="0x00"
-                          name="LUT2CTRLC"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 2"
-                          initval="0x00"
-                          name="TRUTH2"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 3 Control A"
-                          initval="0x00"
-                          name="LUT3CTRLA"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 3 Control A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 3 Control B"
-                          initval="0x00"
-                          name="LUT3CTRLB"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 3 Control C"
-                          initval="0x00"
-                          name="LUT3CTRLC"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 3"
-                          initval="0x00"
-                          name="TRUTH3"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
             </register-group>
@@ -2092,13 +941,9 @@
             <value-group caption="Clock Source Selection" name="CCL_CLKSRC">
                 <value caption="Peripheral Clock" name="CLKPER" value="0x0"/>
                 <value caption="Selection by INSEL2" name="IN2" value="0x1"/>
-                <value caption="Internal High-Frequency Oscillator"
-                       name="OSCHF"
-                       value="0x4"/>
+                <value caption="Internal High-Frequency Oscillator" name="OSCHF" value="0x4"/>
                 <value caption="32.768 kHz oscillator" name="OSC32K" value="0x5"/>
-                <value caption="32.768 kHz oscillator divided by 32"
-                       name="OSC1K"
-                       value="0x6"/>
+                <value caption="32.768 kHz oscillator divided by 32" name="OSC1K" value="0x6"/>
             </value-group>
             <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
                 <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
@@ -2164,195 +1009,67 @@
         </module>
         <module caption="Clock controller" id="avrdd" name="CLKCTRL">
             <register-group caption="Clock controller" name="CLKCTRL" size="0x40">
-                <register caption="MCLK Control A"
-                          initval="0x00"
-                          name="MCLKCTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="CLKCTRL_CLKSEL"/>
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock select" mask="0x07" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
                     <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
                 </register>
-                <register caption="MCLK Control B"
-                          initval="0x00"
-                          name="MCLKCTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Prescaler enable" mask="0x01" name="PEN" rw="RW"/>
-                    <bitfield caption="Prescaler division"
-                              mask="0x1E"
-                              name="PDIV"
-                              rw="RW"
-                              values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler division" mask="0x1E" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
                 </register>
-                <register caption="MCLK Control C"
-                          initval="0x00"
-                          name="MCLKCTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Enable"
-                              mask="0x01"
-                              name="CFDEN"
-                              rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Test"
-                              mask="0x02"
-                              name="CFDTST"
-                              rw="W"/>
-                    <bitfield caption="Clock Failure Detect Source"
-                              mask="0x0C"
-                              name="CFDSRC"
-                              rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Enable" mask="0x01" name="CFDEN" rw="RW"/>
+                    <bitfield caption="Clock Failure Detect Test" mask="0x02" name="CFDTST" rw="W"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0x0C" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                 </register>
-                <register caption="MCLK Interrupt Control"
-                          initval="0x00"
-                          name="MCLKINTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Enable"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt type"
-                              mask="0x80"
-                              name="INTTYPE"
-                              rw="RW"
-                              values="CLKCTRL_INTTYPE"/>
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x01" name="CFD" rw="RW"/>
+                    <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags"
-                          initval="0x00"
-                          name="MCLKINTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Interrupt Flag"
-                              mask="0x01"
-                              name="CFD"
-                              rw="RW"/>
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x01" name="CFD" rw="RW"/>
                 </register>
-                <register caption="MCLK Status"
-                          initval="0x00"
-                          name="MCLKSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="System Oscillator changing"
-                              mask="0x01"
-                              name="SOSC"
-                              rw="RW"/>
-                    <bitfield caption="High frequency oscillator status"
-                              mask="0x02"
-                              name="OSCHFS"
-                              rw="RW"/>
-                    <bitfield caption="32KHz oscillator status"
-                              mask="0x04"
-                              name="OSC32KS"
-                              rw="RW"/>
-                    <bitfield caption="32.768 kHz Crystal Oscillator status"
-                              mask="0x08"
-                              name="XOSC32KS"
-                              rw="RW"/>
+                <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="System Oscillator changing" mask="0x01" name="SOSC" rw="RW"/>
+                    <bitfield caption="High frequency oscillator status" mask="0x02" name="OSCHFS" rw="RW"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x04" name="OSC32KS" rw="RW"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x08" name="XOSC32KS" rw="RW"/>
                     <bitfield caption="External Clock status" mask="0x10" name="EXTS" rw="RW"/>
                     <bitfield caption="PLL oscillator status" mask="0x20" name="PLLS" rw="RW"/>
                 </register>
-                <register caption="OSCHF Control A"
-                          initval="0x0C"
-                          name="OSCHFCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Control A" initval="0x0C" name="OSCHFCTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="Autotune" mask="0x01" name="AUTOTUNE" rw="RW"/>
-                    <bitfield caption="Frequency select"
-                              mask="0x3C"
-                              name="FRQSEL"
-                              rw="RW"
-                              values="CLKCTRL_FRQSEL"/>
+                    <bitfield caption="Frequency select" mask="0x3C" name="FRQSEL" rw="RW" values="CLKCTRL_FRQSEL"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSCHF Tune"
-                          name="OSCHFTUNE"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Tune" name="OSCHFTUNE" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Tune" mask="0xFF" name="TUNE" rw="RW"/>
                 </register>
-                <register caption="PLL Control A"
-                          name="PLLCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multiplication factor"
-                              mask="0x03"
-                              name="MULFAC"
-                              rw="RW"
-                              values="CLKCTRL_MULFAC"/>
-                    <bitfield caption="Source"
-                              mask="0x40"
-                              name="SOURCE"
-                              rw="RW"
-                              values="CLKCTRL_SOURCE"/>
+                <register caption="PLL Control A" name="PLLCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Multiplication factor" mask="0x03" name="MULFAC" rw="RW" values="CLKCTRL_MULFAC"/>
+                    <bitfield caption="Source" mask="0x40" name="SOURCE" rw="RW" values="CLKCTRL_SOURCE"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSC32K Control A"
-                          initval="0x00"
-                          name="OSC32KCTRLA"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC32K Control A"
-                          initval="0x00"
-                          name="XOSC32KCTRLA"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Low power mode" mask="0x02" name="LPMODE" rw="RW"/>
                     <bitfield caption="Select" mask="0x04" name="SEL" rw="RW"/>
-                    <bitfield caption="Crystal startup time"
-                              mask="0x30"
-                              name="CSUT"
-                              rw="RW"
-                              values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC HF Control A"
-                          initval="0x00"
-                          name="XOSCHFCTRLA"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC HF Control A" initval="0x00" name="XOSCHFCTRLA" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="External Source Select"
-                              mask="0x02"
-                              name="SELHF"
-                              rw="RW"
-                              values="CLKCTRL_SELHF"/>
-                    <bitfield caption="Frequency Range"
-                              mask="0x0C"
-                              name="FRQRANGE"
-                              rw="RW"
-                              values="CLKCTRL_FRQRANGE"/>
-                    <bitfield caption="Start-up Time Select"
-                              mask="0x30"
-                              name="CSUTHF"
-                              rw="RW"
-                              values="CLKCTRL_CSUTHF"/>
+                    <bitfield caption="External Source Select" mask="0x02" name="SELHF" rw="RW" values="CLKCTRL_SELHF"/>
+                    <bitfield caption="Frequency Range" mask="0x0C" name="FRQRANGE" rw="RW" values="CLKCTRL_FRQRANGE"/>
+                    <bitfield caption="Start-up Time Select" mask="0x30" name="CSUTHF" rw="RW" values="CLKCTRL_CSUTHF"/>
                     <bitfield caption="Run Standby" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Clock select" name="CLKCTRL_CLKSEL">
-                <value caption="Internal high-frequency oscillator"
-                       name="OSCHF"
-                       value="0x0"/>
+                <value caption="Internal high-frequency oscillator" name="OSCHF" value="0x0"/>
                 <value caption="Internal 32.768 kHz oscillator" name="OSC32K" value="0x1"/>
                 <value caption="32.768 kHz crystal oscillator" name="XOSC32K" value="0x2"/>
                 <value caption="External clock" name="EXTCLK" value="0x3"/>
@@ -2396,12 +1113,8 @@
                 <value caption="3 x multiplication factor" name="3x" value="0x2"/>
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
-                <value caption="High frequency internal oscillator as PLL source"
-                       name="OSCHF"
-                       value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF"
-                       value="0x1"/>
+                <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -2427,44 +1140,19 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection"
-                          initval="0x00"
-                          name="CCP"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCP signature"
-                              mask="0xFF"
-                              name="CCP"
-                              rw="RW"
-                              values="CPU_CCP"/>
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Stack Pointer"
-                          initval="0x7FFF"
-                          name="SP"
-                          offset="0xD"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Status Register"
-                          initval="0x00"
-                          name="SREG"
-                          offset="0xF"
-                          rw="RW"
-                          size="1">
+                <register caption="Stack Pointer" initval="0x7FFF" name="SP" offset="0xD" rw="RW" size="2"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
                     <bitfield caption="Carry Flag" mask="0x01" name="C" rw="RW"/>
                     <bitfield caption="Zero Flag" mask="0x02" name="Z" rw="RW"/>
                     <bitfield caption="Negative Flag" mask="0x04" name="N" rw="RW"/>
-                    <bitfield caption="Two's Complement Overflow Flag"
-                              mask="0x08"
-                              name="V"
-                              rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V" rw="RW"/>
                     <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
                     <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
                     <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
-                    <bitfield caption="Global Interrupt Enable Flag"
-                              mask="0x80"
-                              name="I"
-                              rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="CCP signature select" name="CPU_CCP">
@@ -2474,530 +1162,157 @@
         </module>
         <module caption="Interrupt Controller" id="int_8bit_v3" name="CPUINT">
             <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Round-robin Scheduling Enable"
-                              mask="0x01"
-                              name="LVL0RR"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x01" name="LVL0RR" rw="RW"/>
                     <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
-                    <bitfield caption="Interrupt Vector Select"
-                              mask="0x40"
-                              name="IVSEL"
-                              rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Level 0 Interrupt Executing"
-                              mask="0x01"
-                              name="LVL0EX"
-                              rw="R"/>
-                    <bitfield caption="Level 1 Interrupt Executing"
-                              mask="0x02"
-                              name="LVL1EX"
-                              rw="R"/>
-                    <bitfield caption="Non-maskable Interrupt Executing"
-                              mask="0x80"
-                              name="NMIEX"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x01" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x02" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority"
-                          initval="0x00"
-                          name="LVL0PRI"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Level Priority"
-                              mask="0xFF"
-                              name="LVL0PRI"
-                              rw="RW"/>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xFF" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector"
-                          initval="0x00"
-                          name="LVL1VEC"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Vector with High Priority"
-                              mask="0xFF"
-                              name="LVL1VEC"
-                              rw="RW"/>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xFF" name="LVL1VEC" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="CRCSCAN" id="math_pdi_crc_v1" name="CRCSCAN">
             <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable CRC scan" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Enable NMI Trigger" mask="0x02" name="NMIEN" rw="RW"/>
                     <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CRC Source"
-                              mask="0x03"
-                              name="SRC"
-                              rw="RW"
-                              values="CRCSCAN_SRC"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x03" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
                 </register>
-                <register caption="Status"
-                          initval="0x02"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="CRC Busy" mask="0x01" name="BUSY" rw="R"/>
                     <bitfield caption="CRC Ok" mask="0x02" name="OK" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="CRC Source select" name="CRCSCAN_SRC">
                 <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
-                <value caption="CRC on boot and appl section of flash"
-                       name="APPLICATION"
-                       value="0x1"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
                 <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
             </value-group>
         </module>
-        <module caption="Digital to Analog Converter"
-                id="dac_nbit_ctrl_v5"
-                name="DAC">
+        <module caption="Digital to Analog Converter" id="dac_nbit_ctrl_v5" name="DAC">
             <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="DAC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="DATA Register"
-                          name="DATA"
-                          offset="0x2"
-                          rw="RW"
-                          size="2">
+                <register caption="DATA Register" name="DATA" offset="0x2" rw="RW" size="2">
                     <bitfield caption="Data" mask="0xFFC0" name="DATA" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Event System" id="avrdd" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Software Event A"
-                          initval="0x00"
-                          name="SWEVENTA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0xFF"
-                              name="SWEVENTA"
-                              rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0xFF" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
-                <register caption="Software Event B"
-                          initval="0x00"
-                          name="SWEVENTB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0x03"
-                              name="SWEVENTB"
-                              rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0x03" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
-                <register caption="Multiplexer Channel 0"
-                          initval="0x00"
-                          name="CHANNEL0"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 0 generator select"
-                              mask="0xFF"
-                              name="CHANNEL0"
-                              rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Channel 0 generator select" mask="0xFF" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
-                <register caption="Multiplexer Channel 1"
-                          initval="0x00"
-                          name="CHANNEL1"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 1 generator select"
-                              mask="0xFF"
-                              name="CHANNEL1"
-                              rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Channel 1 generator select" mask="0xFF" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
-                <register caption="Multiplexer Channel 2"
-                          initval="0x00"
-                          name="CHANNEL2"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 2 generator select"
-                              mask="0xFF"
-                              name="CHANNEL2"
-                              rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Channel 2 generator select" mask="0xFF" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
-                <register caption="Multiplexer Channel 3"
-                          initval="0x00"
-                          name="CHANNEL3"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 3 generator select"
-                              mask="0xFF"
-                              name="CHANNEL3"
-                              rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Channel 3 generator select" mask="0xFF" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
-                <register caption="Multiplexer Channel 4"
-                          initval="0x00"
-                          name="CHANNEL4"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 4 generator select"
-                              mask="0xFF"
-                              name="CHANNEL4"
-                              rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Channel 4 generator select" mask="0xFF" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
-                <register caption="Multiplexer Channel 5"
-                          initval="0x00"
-                          name="CHANNEL5"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel 5 generator select"
-                              mask="0xFF"
-                              name="CHANNEL5"
-                              rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Channel 5 generator select" mask="0xFF" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT0A"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT0B"
-                          offset="0x21"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT1A"
-                          offset="0x22"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT1B"
-                          offset="0x23"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT2A"
-                          offset="0x24"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT2B"
-                          offset="0x25"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT3A"
-                          offset="0x26"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT3B"
-                          offset="0x27"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 12 - ADC0"
-                          initval="0x00"
-                          name="USERADC0START"
-                          offset="0x28"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTA"
-                          offset="0x29"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTC"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTD"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTF"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0"
-                          initval="0x00"
-                          name="USERUSART0IRDA"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1"
-                          initval="0x00"
-                          name="USERUSART1IRDA"
-                          offset="0x2E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A"
-                          initval="0x00"
-                          name="USERTCA0CNTA"
-                          offset="0x2F"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B"
-                          initval="0x00"
-                          name="USERTCA0CNTB"
-                          offset="0x30"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A"
-                          initval="0x00"
-                          name="USERTCB0CAPT"
-                          offset="0x31"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B"
-                          initval="0x00"
-                          name="USERTCB0COUNT"
-                          offset="0x32"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A"
-                          initval="0x00"
-                          name="USERTCB1CAPT"
-                          offset="0x33"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B"
-                          initval="0x00"
-                          name="USERTCB1COUNT"
-                          offset="0x34"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A"
-                          initval="0x00"
-                          name="USERTCB2CAPT"
-                          offset="0x35"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B"
-                          initval="0x00"
-                          name="USERTCB2COUNT"
-                          offset="0x36"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A"
-                          initval="0x00"
-                          name="USERTCD0INPUTA"
-                          offset="0x37"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B"
-                          initval="0x00"
-                          name="USERTCD0INPUTB"
-                          offset="0x38"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
             <value-group caption="Channel 0 generator select" name="EVSYS_CHANNEL0">
@@ -3006,30 +1321,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3044,21 +1343,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3076,30 +1365,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3114,21 +1387,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3146,30 +1409,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3187,21 +1434,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3219,30 +1456,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3260,21 +1481,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3292,30 +1503,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV8192"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV4096"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV2048"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV1024"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3330,21 +1525,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3362,30 +1547,14 @@
                 <value caption="MVIO VDDIO2 OK" name="MVIO" value="0x5"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer output 0"
-                       name="RTC_PIT_DIV512"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer output 1"
-                       name="RTC_PIT_DIV256"
-                       value="0x9"/>
-                <value caption="Periodic Interrupt Timer output 2"
-                       name="RTC_PIT_DIV128"
-                       value="0xA"/>
-                <value caption="Periodic Interrupt Timer output 3"
-                       name="RTC_PIT_DIV64"
-                       value="0xB"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RESRDY" value="0x24"/>
                 <value caption="Zero Cross Detect 3 out" name="ZCD3" value="0x30"/>
@@ -3400,21 +1569,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3442,149 +1601,48 @@
             </value-group>
             <value-group caption="User channel select" name="EVSYS_USER">
                 <value caption="Off" name="OFF" value="0x0"/>
-                <value caption="Connect user to event channel 0"
-                       name="CHANNEL0"
-                       value="0x1"/>
-                <value caption="Connect user to event channel 1"
-                       name="CHANNEL1"
-                       value="0x2"/>
-                <value caption="Connect user to event channel 2"
-                       name="CHANNEL2"
-                       value="0x3"/>
-                <value caption="Connect user to event channel 3"
-                       name="CHANNEL3"
-                       value="0x4"/>
-                <value caption="Connect user to event channel 4"
-                       name="CHANNEL4"
-                       value="0x5"/>
-                <value caption="Connect user to event channel 5"
-                       name="CHANNEL5"
-                       value="0x6"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
             </value-group>
         </module>
         <module caption="Fuses" id="avrdd" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Watchdog Configuration"
-                          initval="0x00"
-                          name="WDTCFG"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Watchdog Timeout Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="FUSE_WINDOW"/>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
-                <register caption="BOD Configuration"
-                          initval="0x00"
-                          name="BODCFG"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="BOD Operation in Sleep Mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="FUSE_SLEEP"/>
-                    <bitfield caption="BOD Operation in Active Mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="RW"
-                              values="FUSE_ACTIVE"/>
-                    <bitfield caption="BOD Sample Frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Level"
-                              mask="0xE0"
-                              name="LVL"
-                              rw="RW"
-                              values="FUSE_LVL"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x03" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x0C" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Level" mask="0xE0" name="LVL" rw="RW" values="FUSE_LVL"/>
                 </register>
-                <register caption="Oscillator Configuration"
-                          initval="0x00"
-                          name="OSCCFG"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Frequency Select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="FUSE_CLKSEL"/>
+                <register caption="Oscillator Configuration" initval="0x00" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x07" name="CLKSEL" rw="RW" values="FUSE_CLKSEL"/>
                 </register>
-                <register caption="System Configuration 0"
-                          initval="0xD0"
-                          name="SYSCFG0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="System Configuration 0" initval="0xD0" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="EEPROM Save" mask="0x01" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration"
-                              mask="0x08"
-                              name="RSTPINCFG"
-                              rw="RW"
-                              values="FUSE_RSTPINCFG"/>
-                    <bitfield caption="UPDI Pin Configuration"
-                              mask="0x10"
-                              name="UPDIPINCFG"
-                              rw="RW"
-                              values="FUSE_UPDIPINCFG"/>
-                    <bitfield caption="CRC Select"
-                              mask="0x20"
-                              name="CRCSEL"
-                              rw="RW"
-                              values="FUSE_CRCSEL"/>
-                    <bitfield caption="CRC Source"
-                              mask="0xC0"
-                              name="CRCSRC"
-                              rw="RW"
-                              values="FUSE_CRCSRC"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x08" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW" values="FUSE_UPDIPINCFG"/>
+                    <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
+                    <bitfield caption="CRC Source" mask="0xC0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                 </register>
-                <register caption="System Configuration 1"
-                          initval="0x08"
-                          name="SYSCFG1"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Startup Time"
-                              mask="0x07"
-                              name="SUT"
-                              rw="RW"
-                              values="FUSE_SUT"/>
-                    <bitfield caption="MVIO System Configuration"
-                              mask="0x18"
-                              name="MVSYSCFG"
-                              rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x07" name="SUT" rw="RW" values="FUSE_SUT"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                 </register>
-                <register caption="Code Section Size"
-                          initval="0x00"
-                          name="CODESIZE"
-                          offset="0x7"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Boot Section Size"
-                          initval="0x00"
-                          name="BOOTSIZE"
-                          offset="0x8"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
+                <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT"
-                       value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -3610,13 +1668,9 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)"
-                       name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
-                <value caption="CRC of application code and boot sections"
-                       name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -3628,12 +1682,8 @@
                 <value caption="UPDI Mode" name="UPDI" value="0x1"/>
             </value-group>
             <value-group caption="MVIO System Configuration select" name="FUSE_MVSYSCFG">
-                <value caption="Device used in a dual supply configuration"
-                       name="DUAL"
-                       value="0x1"/>
-                <value caption="Device used in a single supply configuration"
-                       name="SINGLE"
-                       value="0x2"/>
+                <value caption="Device used in a dual supply configuration" name="DUAL" value="0x1"/>
+                <value caption="Device used in a single supply configuration" name="SINGLE" value="0x2"/>
             </value-group>
             <value-group caption="Startup Time select" name="FUSE_SUT">
                 <value caption="0 ms" name="0MS" value="0x00"/>
@@ -3676,41 +1726,16 @@
         </module>
         <module caption="General Purpose Registers" id="avrdd" name="GPR">
             <register-group caption="General Purpose Registers" name="GPR" size="0x4">
-                <register caption="General Purpose Register 0"
-                          name="GPR0"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 1"
-                          name="GPR1"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 2"
-                          name="GPR2"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 3"
-                          name="GPR3"
-                          offset="0x3"
-                          rw="RW"
-                          size="1"/>
+                <register caption="General Purpose Register 0" name="GPR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose Register 1" name="GPR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose Register 2" name="GPR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose Register 3" name="GPR3" offset="0x3" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Lockbits" id="avrdd" name="LOCK">
             <register-group caption="Lockbits" name="LOCK" size="0x4">
-                <register caption="Lock Key Bits"
-                          initval="0x5CC5C55C"
-                          name="KEY"
-                          offset="0x0"
-                          rw="RW"
-                          size="4">
-                    <bitfield caption="Lock Key"
-                              mask="0xFFFFFFFF"
-                              name="KEY"
-                              rw="RW"
-                              values="LOCK_KEY"/>
+                <register caption="Lock Key Bits" initval="0x5CC5C55C" name="KEY" offset="0x0" rw="RW" size="4">
+                    <bitfield caption="Lock Key" mask="0xFFFFFFFF" name="KEY" rw="RW" values="LOCK_KEY"/>
                 </register>
             </register-group>
             <value-group caption="Lock Key select" name="LOCK_KEY">
@@ -3720,154 +1745,61 @@
         </module>
         <module caption="Multi-Voltage I/O" id="io_multiv_ctrl_avr_v1" name="MVIO">
             <register-group caption="Multi-Voltage I/O" name="MVIO" size="0x4">
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Enable"
-                              mask="0x01"
-                              name="VDDIO2IE"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Enable" mask="0x01" name="VDDIO2IE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="VDDIO2 Interrupt Flag"
-                              mask="0x01"
-                              name="VDDIO2IF"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="VDDIO2 Interrupt Flag" mask="0x01" name="VDDIO2IF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="VDDIO2 Status" mask="0x01" name="VDDIO2S" rw="R"/>
                 </register>
             </register-group>
         </module>
-        <module caption="Non-volatile Memory Controller"
-                id="nvm_ctrl_avr_v1"
-                name="NVMCTRL">
+        <module caption="Non-volatile Memory Controller" id="nvm_ctrl_avr_v1" name="NVMCTRL">
             <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x7F"
-                              name="CMD"
-                              rw="RW"
-                              values="NVMCTRL_CMD"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x30"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Application Code Write Protect"
-                              mask="0x01"
-                              name="APPCODEWP"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x30" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Application Code Write Protect" mask="0x01" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x02" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Application Data Write Protect"
-                              mask="0x04"
-                              name="APPDATAWP"
-                              rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space"
-                              mask="0x30"
-                              name="FLMAP"
-                              rw="RW"
-                              values="NVMCTRL_FLMAP"/>
-                    <bitfield caption="Flash Mapping Lock"
-                              mask="0x80"
-                              name="FLMAPLOCK"
-                              rw="RW"/>
+                    <bitfield caption="Application Data Write Protect" mask="0x04" name="APPDATAWP" rw="RW"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x02"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x02" rw="R" size="1">
                     <bitfield caption="Flash busy" mask="0x01" name="FBUSY" rw="R"/>
                     <bitfield caption="EEPROM busy" mask="0x02" name="EEBUSY" rw="R"/>
-                    <bitfield caption="Write error"
-                              mask="0x70"
-                              name="ERROR"
-                              rw="R"
-                              values="NVMCTRL_ERROR"/>
+                    <bitfield caption="Write error" mask="0x70" name="ERROR" rw="R" values="NVMCTRL_ERROR"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
-                <register caption="Address"
-                          name="ADDR"
-                          offset="0x08"
-                          rw="RW"
-                          size="4"/>
+                <register caption="Address" name="ADDR" offset="0x08" rw="RW" size="4"/>
             </register-group>
             <value-group caption="Command select" name="NVMCTRL_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
                 <value caption="No Operation" name="NOOP" value="0x01"/>
                 <value caption="Flash Write" name="FLWR" value="0x02"/>
                 <value caption="Flash Page Erase" name="FLPER" value="0x08"/>
-                <value caption="Flash Multi-Page Erase 2 pages"
-                       name="FLMPER2"
-                       value="0x09"/>
-                <value caption="Flash Multi-Page Erase 4 pages"
-                       name="FLMPER4"
-                       value="0x0A"/>
-                <value caption="Flash Multi-Page Erase 8 pages"
-                       name="FLMPER8"
-                       value="0x0B"/>
-                <value caption="Flash Multi-Page Erase 16 pages"
-                       name="FLMPER16"
-                       value="0x0C"/>
-                <value caption="Flash Multi-Page Erase 32 pages"
-                       name="FLMPER32"
-                       value="0x0D"/>
+                <value caption="Flash Multi-Page Erase 2 pages" name="FLMPER2" value="0x09"/>
+                <value caption="Flash Multi-Page Erase 4 pages" name="FLMPER4" value="0x0A"/>
+                <value caption="Flash Multi-Page Erase 8 pages" name="FLMPER8" value="0x0B"/>
+                <value caption="Flash Multi-Page Erase 16 pages" name="FLMPER16" value="0x0C"/>
+                <value caption="Flash Multi-Page Erase 32 pages" name="FLMPER32" value="0x0D"/>
                 <value caption="EEPROM Write" name="EEWR" value="0x12"/>
                 <value caption="EEPROM Erase and Write" name="EEERWR" value="0x13"/>
                 <value caption="EEPROM Byte Erase" name="EEBER" value="0x18"/>
-                <value caption="EEPROM Multi-Byte Erase 2 bytes"
-                       name="EEMBER2"
-                       value="0x19"/>
-                <value caption="EEPROM Multi-Byte Erase 4 bytes"
-                       name="EEMBER4"
-                       value="0x1A"/>
-                <value caption="EEPROM Multi-Byte Erase 8 bytes"
-                       name="EEMBER8"
-                       value="0x1B"/>
-                <value caption="EEPROM Multi-Byte Erase 16 bytes"
-                       name="EEMBER16"
-                       value="0x1C"/>
-                <value caption="EEPROM Multi-Byte Erase 32 bytes"
-                       name="EEMBER32"
-                       value="0x1D"/>
+                <value caption="EEPROM Multi-Byte Erase 2 bytes" name="EEMBER2" value="0x19"/>
+                <value caption="EEPROM Multi-Byte Erase 4 bytes" name="EEMBER4" value="0x1A"/>
+                <value caption="EEPROM Multi-Byte Erase 8 bytes" name="EEMBER8" value="0x1B"/>
+                <value caption="EEPROM Multi-Byte Erase 16 bytes" name="EEMBER16" value="0x1C"/>
+                <value caption="EEPROM Multi-Byte Erase 32 bytes" name="EEMBER32" value="0x1D"/>
                 <value caption="Chip Erase Command" name="CHER" value="0x20"/>
                 <value caption="EEPROM Erase Command" name="EECHER" value="0x30"/>
             </value-group>
@@ -3880,404 +1812,135 @@
             <value-group caption="Write error select" name="NVMCTRL_ERROR">
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
-                <value caption="Write to section not allowed"
-                       name="ILLEGALSADDR"
-                       value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted"
-                       name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed"
-                       name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_avr_v2_port" name="PORT">
             <register-group caption="I/O Ports" name="PORT" size="0x20">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Set"
-                          name="DIRSET"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Clear"
-                          name="DIRCLR"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Toggle"
-                          name="DIRTGL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Set"
-                          name="OUTSET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Clear"
-                          name="OUTCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Toggle"
-                          name="OUTTGL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
-                <register caption="Port Control"
-                          initval="0x00"
-                          name="PORTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Slew Rate Limit Enable" mask="0x01" name="SRL" rw="RW"/>
                 </register>
-                <register caption="Pin Control Config"
-                          initval="0x00"
-                          name="PINCONFIG"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin Control Config" initval="0x00" name="PINCONFIG" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin Control Update"
-                          initval="0x00"
-                          name="PINCTRLUPD"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control update mask"
-                              mask="0xFF"
-                              name="PINCTRLUPD"
-                              rw="RW"/>
+                <register caption="Pin Control Update" initval="0x00" name="PINCTRLUPD" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Pin control update mask" mask="0xFF" name="PINCTRLUPD" rw="RW"/>
                 </register>
-                <register caption="Pin Control Set"
-                          initval="0x00"
-                          name="PINCTRLSET"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control set mask"
-                              mask="0xFF"
-                              name="PINCTRLSET"
-                              rw="RW"/>
+                <register caption="Pin Control Set" initval="0x00" name="PINCTRLSET" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Pin control set mask" mask="0xFF" name="PINCTRLSET" rw="RW"/>
                 </register>
-                <register caption="Pin Control Clear"
-                          initval="0x00"
-                          name="PINCTRLCLR"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Pin control clear mask"
-                              mask="0xFF"
-                              name="PINCTRLCLR"
-                              rw="RW"/>
+                <register caption="Pin Control Clear" initval="0x00" name="PINCTRLCLR" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Pin control clear mask" mask="0xFF" name="PINCTRLCLR" rw="RW"/>
                 </register>
-                <register caption="Pin 0 Control"
-                          initval="0x00"
-                          name="PIN0CTRL"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 1 Control"
-                          initval="0x00"
-                          name="PIN1CTRL"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 2 Control"
-                          initval="0x00"
-                          name="PIN2CTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 3 Control"
-                          initval="0x00"
-                          name="PIN3CTRL"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 4 Control"
-                          initval="0x00"
-                          name="PIN4CTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 5 Control"
-                          initval="0x00"
-                          name="PIN5CTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 6 Control"
-                          initval="0x00"
-                          name="PIN6CTRL"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 7 Control"
-                          initval="0x00"
-                          name="PIN7CTRL"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
                     <bitfield caption="Input level select" mask="0x40" name="INLVL" rw="RW"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
-                <value caption="Interrupt disabled but input buffer enabled"
-                       name="INTDISABLE"
-                       value="0x0"/>
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
                 <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
                 <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
                 <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
-                <value caption="Digital Input Buffer disabled"
-                       name="INPUT_DISABLE"
-                       value="0x4"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
                 <value caption="Sense low Level" name="LEVEL" value="0x5"/>
             </value-group>
         </module>
         <module caption="Port Multiplexer" id="avrdd" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="EVSYS route A"
-                          initval="0x00"
-                          name="EVSYSROUTEA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Output A"
-                              mask="0x01"
-                              name="EVOUTA"
-                              rw="RW"
-                              values="PORTMUX_EVOUTA"/>
-                    <bitfield caption="Event Output C"
-                              mask="0x04"
-                              name="EVOUTC"
-                              rw="RW"
-                              values="PORTMUX_EVOUTC"/>
-                    <bitfield caption="Event Output D"
-                              mask="0x08"
-                              name="EVOUTD"
-                              rw="RW"
-                              values="PORTMUX_EVOUTD"/>
-                    <bitfield caption="Event Output F"
-                              mask="0x20"
-                              name="EVOUTF"
-                              rw="RW"
-                              values="PORTMUX_EVOUTF"/>
+                <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Event Output A" mask="0x01" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output C" mask="0x04" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x08" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
                 </register>
-                <register caption="CCL route A"
-                          initval="0x00"
-                          name="CCLROUTEA"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals"
-                              mask="0x01"
-                              name="LUT0"
-                              rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals"
-                              mask="0x02"
-                              name="LUT1"
-                              rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals"
-                              mask="0x04"
-                              name="LUT2"
-                              rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals"
-                              mask="0x08"
-                              name="LUT3"
-                              rw="RW"
-                              values="PORTMUX_LUT3"/>
+                <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x01" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x02" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x04" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x08" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
-                <register caption="USART route A"
-                          initval="0x00"
-                          name="USARTROUTEA"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="USART0 Signals"
-                              mask="0x07"
-                              name="USART0"
-                              rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="USART1 Signals"
-                              mask="0x18"
-                              name="USART1"
-                              rw="RW"
-                              values="PORTMUX_USART1"/>
+                <register caption="USART route A" initval="0x00" name="USARTROUTEA" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="USART0 Signals" mask="0x07" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="USART1 Signals" mask="0x18" name="USART1" rw="RW" values="PORTMUX_USART1"/>
                 </register>
-                <register caption="SPI route A"
-                          initval="0x00"
-                          name="SPIROUTEA"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI0 Signals"
-                              mask="0x07"
-                              name="SPI0"
-                              rw="RW"
-                              values="PORTMUX_SPI0"/>
+                <register caption="SPI route A" initval="0x00" name="SPIROUTEA" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="SPI0 Signals" mask="0x07" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                 </register>
-                <register caption="TWI route A"
-                          initval="0x00"
-                          name="TWIROUTEA"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TWI0 Signals"
-                              mask="0x03"
-                              name="TWI0"
-                              rw="RW"
-                              values="PORTMUX_TWI0"/>
+                <register caption="TWI route A" initval="0x00" name="TWIROUTEA" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="TWI0 Signals" mask="0x03" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="TCA route A"
-                          initval="0x00"
-                          name="TCAROUTEA"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCA0 Signals"
-                              mask="0x07"
-                              name="TCA0"
-                              rw="RW"
-                              values="PORTMUX_TCA0"/>
+                <register caption="TCA route A" initval="0x00" name="TCAROUTEA" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="TCA0 Signals" mask="0x07" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
                 </register>
-                <register caption="TCB route A"
-                          initval="0x00"
-                          name="TCBROUTEA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCB0 Output"
-                              mask="0x01"
-                              name="TCB0"
-                              rw="RW"
-                              values="PORTMUX_TCB0"/>
-                    <bitfield caption="TCB1 Output"
-                              mask="0x02"
-                              name="TCB1"
-                              rw="RW"
-                              values="PORTMUX_TCB1"/>
-                    <bitfield caption="TCB2 Output"
-                              mask="0x04"
-                              name="TCB2"
-                              rw="RW"
-                              values="PORTMUX_TCB2"/>
+                <register caption="TCB route A" initval="0x00" name="TCBROUTEA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="TCB0 Output" mask="0x01" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="TCB1 Output" mask="0x02" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+                    <bitfield caption="TCB2 Output" mask="0x04" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
                 </register>
-                <register caption="TCD route A"
-                          initval="0x00"
-                          name="TCDROUTEA"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCD0 Signals"
-                              mask="0x07"
-                              name="TCD0"
-                              rw="RW"
-                              values="PORTMUX_TCD0"/>
+                <register caption="TCD route A" initval="0x00" name="TCDROUTEA" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="TCD0 Signals" mask="0x07" name="TCD0" rw="RW" values="PORTMUX_TCD0"/>
                 </register>
             </register-group>
             <value-group caption="CCL Look-Up Table 0 Signals select" name="PORTMUX_LUT0">
@@ -4370,199 +2033,69 @@
         </module>
         <module caption="Reset controller" id="rst_integration_v8" name="RSTCTRL">
             <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
-                <register caption="Reset Flags"
-                          initval="0x00"
-                          name="RSTFR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Power on Reset flag" mask="0x01" name="PORF" rw="RW"/>
-                    <bitfield caption="Brown out detector Reset flag"
-                              mask="0x02"
-                              name="BORF"
-                              rw="RW"/>
+                    <bitfield caption="Brown out detector Reset flag" mask="0x02" name="BORF" rw="RW"/>
                     <bitfield caption="External Reset flag" mask="0x04" name="EXTRF" rw="RW"/>
                     <bitfield caption="Watch dog Reset flag" mask="0x08" name="WDRF" rw="RW"/>
                     <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
                     <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
                 </register>
-                <register caption="Software Reset"
-                          initval="0x00"
-                          name="SWRR"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software reset enable"
-                              mask="0x01"
-                              name="SWRST"
-                              rw="RW"/>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x01" name="SWRST" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Real-Time Counter" id="tmr_16b_rtc_v1" name="RTC">
             <register-group caption="Real-Time Counter" name="RTC" size="0x20">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="RTCEN" rw="RW"/>
                     <bitfield caption="Correction enable" mask="0x04" name="CORREN" rw="RW"/>
-                    <bitfield caption="Prescaling Factor"
-                              mask="0x78"
-                              name="PRESCALER"
-                              rw="RW"
-                              values="RTC_PRESCALER"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
                     <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x01"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLABUSY"
-                              rw="R"/>
-                    <bitfield caption="Count Synchronization Busy Flag"
-                              mask="0x02"
-                              name="CNTBUSY"
-                              rw="R"/>
-                    <bitfield caption="Period Synchronization Busy Flag"
-                              mask="0x04"
-                              name="PERBUSY"
-                              rw="R"/>
-                    <bitfield caption="Comparator Synchronization Busy Flag"
-                              mask="0x08"
-                              name="CMPBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x02" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x04" name="PERBUSY" rw="R"/>
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x08" name="CMPBUSY" rw="R"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt enable"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt Flag"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Temporary"
-                          name="TEMP"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Debug control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Calibration"
-                          initval="0x00"
-                          name="CALIB"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Error Correction Value"
-                              mask="0x7F"
-                              name="ERROR"
-                              rw="RW"/>
-                    <bitfield caption="Error Correction Sign Bit"
-                              mask="0x80"
-                              name="SIGN"
-                              rw="RW"/>
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7F" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
                 </register>
-                <register caption="Clock Select"
-                          initval="0x00"
-                          name="CLKSEL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Select"
-                              mask="0x03"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="RTC_CLKSEL"/>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x03" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
                 </register>
                 <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
-                <register caption="Period"
-                          initval="0xFFFF"
-                          name="PER"
-                          offset="0x0A"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
                 <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
-                <register caption="PIT Control A"
-                          initval="0x00"
-                          name="PITCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="PITEN" rw="RW"/>
-                    <bitfield caption="Period"
-                              mask="0x78"
-                              name="PERIOD"
-                              rw="RW"
-                              values="RTC_PERIOD"/>
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
                 </register>
-                <register caption="PIT Status"
-                          initval="0x00"
-                          name="PITSTATUS"
-                          offset="0x11"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLBUSY"
-                              rw="R"/>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLBUSY" rw="R"/>
                 </register>
-                <register caption="PIT Interrupt Control"
-                          initval="0x00"
-                          name="PITINTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags"
-                          initval="0x00"
-                          name="PITINTFLAGS"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Debug control"
-                          initval="0x00"
-                          name="PITDBGCTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
             </register-group>
@@ -4610,156 +2143,42 @@
         </module>
         <module caption="Signature row" id="avrdd" name="SIGROW">
             <register-group caption="Signature row" name="SIGROW" size="0x40">
-                <register caption="Device ID Byte 0"
-                          name="DEVICEID0"
-                          offset="0x00"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 1"
-                          name="DEVICEID1"
-                          offset="0x01"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 2"
-                          name="DEVICEID2"
-                          offset="0x02"
-                          rw="R"
-                          size="1"/>
-                <register caption="Temperature Calibration 0"
-                          name="TEMPSENSE0"
-                          offset="0x04"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 0"
-                              mask="0xFFFF"
-                              name="TEMPSENSE0"
-                              rw="R"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Temperature Calibration 0" name="TEMPSENSE0" offset="0x04" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 0" mask="0xFFFF" name="TEMPSENSE0" rw="R"/>
                 </register>
-                <register caption="Temperature Calibration 1"
-                          name="TEMPSENSE1"
-                          offset="0x06"
-                          rw="R"
-                          size="2">
-                    <bitfield caption="Temperature Calibration 1"
-                              mask="0xFFFF"
-                              name="TEMPSENSE1"
-                              rw="R"/>
+                <register caption="Temperature Calibration 1" name="TEMPSENSE1" offset="0x06" rw="R" size="2">
+                    <bitfield caption="Temperature Calibration 1" mask="0xFFFF" name="TEMPSENSE1" rw="R"/>
                 </register>
-                <register caption="LOTNUM0"
-                          name="SERNUM0"
-                          offset="0x10"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM1"
-                          name="SERNUM1"
-                          offset="0x11"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM2"
-                          name="SERNUM2"
-                          offset="0x12"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM3"
-                          name="SERNUM3"
-                          offset="0x13"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM4"
-                          name="SERNUM4"
-                          offset="0x14"
-                          rw="R"
-                          size="1"/>
-                <register caption="LOTNUM5"
-                          name="SERNUM5"
-                          offset="0x15"
-                          rw="R"
-                          size="1"/>
-                <register caption="RANDOM"
-                          name="SERNUM6"
-                          offset="0x16"
-                          rw="R"
-                          size="1"/>
-                <register caption="SCRIBE"
-                          name="SERNUM7"
-                          offset="0x17"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS0"
-                          name="SERNUM8"
-                          offset="0x18"
-                          rw="R"
-                          size="1"/>
-                <register caption="XPOS1"
-                          name="SERNUM9"
-                          offset="0x19"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS0"
-                          name="SERNUM10"
-                          offset="0x1A"
-                          rw="R"
-                          size="1"/>
-                <register caption="YPOS1"
-                          name="SERNUM11"
-                          offset="0x1B"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES0"
-                          name="SERNUM12"
-                          offset="0x1C"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES1"
-                          name="SERNUM13"
-                          offset="0x1D"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES2"
-                          name="SERNUM14"
-                          offset="0x1E"
-                          rw="R"
-                          size="1"/>
-                <register caption="RES3"
-                          name="SERNUM15"
-                          offset="0x1F"
-                          rw="R"
-                          size="1"/>
+                <register caption="LOTNUM0" name="SERNUM0" offset="0x10" rw="R" size="1"/>
+                <register caption="LOTNUM1" name="SERNUM1" offset="0x11" rw="R" size="1"/>
+                <register caption="LOTNUM2" name="SERNUM2" offset="0x12" rw="R" size="1"/>
+                <register caption="LOTNUM3" name="SERNUM3" offset="0x13" rw="R" size="1"/>
+                <register caption="LOTNUM4" name="SERNUM4" offset="0x14" rw="R" size="1"/>
+                <register caption="LOTNUM5" name="SERNUM5" offset="0x15" rw="R" size="1"/>
+                <register caption="RANDOM" name="SERNUM6" offset="0x16" rw="R" size="1"/>
+                <register caption="SCRIBE" name="SERNUM7" offset="0x17" rw="R" size="1"/>
+                <register caption="XPOS0" name="SERNUM8" offset="0x18" rw="R" size="1"/>
+                <register caption="XPOS1" name="SERNUM9" offset="0x19" rw="R" size="1"/>
+                <register caption="YPOS0" name="SERNUM10" offset="0x1A" rw="R" size="1"/>
+                <register caption="YPOS1" name="SERNUM11" offset="0x1B" rw="R" size="1"/>
+                <register caption="RES0" name="SERNUM12" offset="0x1C" rw="R" size="1"/>
+                <register caption="RES1" name="SERNUM13" offset="0x1D" rw="R" size="1"/>
+                <register caption="RES2" name="SERNUM14" offset="0x1E" rw="R" size="1"/>
+                <register caption="RES3" name="SERNUM15" offset="0x1F" rw="R" size="1"/>
             </register-group>
         </module>
-        <module caption="Sleep Controller"
-                id="clk_sleep_ctrl_avr_v2"
-                name="SLPCTRL">
+        <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v2" name="SLPCTRL">
             <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Sleep enable" mask="0x01" name="SEN" rw="RW"/>
-                    <bitfield caption="Sleep mode"
-                              mask="0x06"
-                              name="SMODE"
-                              rw="RW"
-                              values="SLPCTRL_SMODE"/>
+                    <bitfield caption="Sleep mode" mask="0x06" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="VREGCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Performance Mode"
-                              mask="0x07"
-                              name="PMODE"
-                              rw="RW"
-                              values="SLPCTRL_PMODE"/>
-                    <bitfield caption="High Temperature Low Leakage Enable"
-                              mask="0x10"
-                              name="HTLLEN"
-                              rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Performance Mode" mask="0x07" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                 </register>
             </register-group>
             <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
@@ -4767,8 +2186,7 @@
                 <value caption="Standby Mode" name="STDBY" value="0x01"/>
                 <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
             </value-group>
-            <value-group caption="High Temperature Low Leakage Enable select"
-                         name="SLPCTRL_HTLLEN">
+            <value-group caption="High Temperature Low Leakage Enable select" name="SLPCTRL_HTLLEN">
                 <value caption="Disabled" name="OFF" value="0x0"/>
                 <value caption="Enabled" name="ON" value="0x1"/>
             </value-group>
@@ -4779,110 +2197,36 @@
         </module>
         <module caption="Serial Peripheral Interface" id="spi_8bit_v2" name="SPI">
             <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable Module" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Prescaler"
-                              mask="0x06"
-                              name="PRESC"
-                              rw="RW"
-                              values="SPI_PRESC"/>
+                    <bitfield caption="Prescaler" mask="0x06" name="PRESC" rw="RW" values="SPI_PRESC"/>
                     <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
-                    <bitfield caption="Host Operation Enable"
-                              mask="0x20"
-                              name="MASTER"
-                              rw="RW"/>
+                    <bitfield caption="Host Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
                     <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI Mode"
-                              mask="0x03"
-                              name="MODE"
-                              rw="RW"
-                              values="SPI_MODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="SPI Mode" mask="0x03" name="MODE" rw="RW" values="SPI_MODE"/>
                     <bitfield caption="SPI Select Disable" mask="0x04" name="SSD" rw="RW"/>
-                    <bitfield caption="Buffer Mode Wait for Receive"
-                              mask="0x40"
-                              name="BUFWR"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Mode Wait for Receive" mask="0x40" name="BUFWR" rw="RW"/>
                     <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Enable" mask="0x01" name="IE" rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Enable"
-                              mask="0x10"
-                              name="SSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <mode name="DEFAULT" qualifier="SPI.CTRLB.BUFEN" value="0"/>
                     <mode name="BUFFERED" qualifier="SPI.CTRLB.BUFEN" value="1"/>
-                    <bitfield caption="Buffer Overflow"
-                              mask="0x01"
-                              modes="BUFFERED"
-                              name="BUFOVF"
-                              rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Flag"
-                              mask="0x10"
-                              modes="BUFFERED"
-                              name="SSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Flag"
-                              mask="0x20"
-                              modes="BUFFERED"
-                              name="DREIF"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Flag"
-                              mask="0x40"
-                              modes="BUFFERED"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              modes="BUFFERED"
-                              name="RXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Write Collision"
-                              mask="0x40"
-                              modes="DEFAULT"
-                              name="WRCOL"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt Flag"
-                              mask="0x80"
-                              modes="DEFAULT"
-                              name="IF"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Overflow" mask="0x01" modes="BUFFERED" name="BUFOVF" rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Flag" mask="0x10" modes="BUFFERED" name="SSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" modes="BUFFERED" name="DREIF" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" modes="BUFFERED" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" modes="BUFFERED" name="RXCIF" rw="RW"/>
+                    <bitfield caption="Write Collision" mask="0x40" modes="DEFAULT" name="WRCOL" rw="RW"/>
+                    <bitfield caption="Interrupt Flag" mask="0x80" modes="DEFAULT" name="IF" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
             </register-group>
@@ -4901,543 +2245,149 @@
         </module>
         <module caption="System Configuration Registers" id="avrdd" name="SYSCFG">
             <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
-                <register caption="Revision ID"
-                          name="REVID"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Control"
-                          name="OCDMCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="OCD Message Status"
-                          initval="0x00"
-                          name="OCDMSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+                <register caption="OCD Message Control" name="OCDMCTRL" offset="0x04" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMSTATUS" offset="0x05" rw="RW" size="1">
                     <bitfield caption="OCD Message Valid" mask="0x01" name="VALID" rw="RW"/>
                 </register>
             </register-group>
         </module>
-        <module caption="16-bit Timer/Counter Type A"
-                id="tmr_16b_pwm_v1"
-                name="TCA">
+        <module caption="16-bit Timer/Counter Type A" id="tmr_16b_pwm_v1" name="TCA">
             <register-group caption="16-bit Timer/Counter Type A" name="TCA" size="0x40">
-                <mode caption="Single Mode"
-                      name="SINGLE"
-                      qualifier="TCA.SINGLE.CTRLD.SPLITM"
-                      value="0"/>
-                <mode caption="Split Mode"
-                      name="SPLIT"
-                      qualifier="TCA.SPLIT.CTRLD.SPLITM"
-                      value="1"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <mode caption="Single Mode" name="SINGLE" qualifier="TCA.SINGLE.CTRLD.SPLITM" value="0"/>
+                <mode caption="Split Mode" name="SPLIT" qualifier="TCA.SPLIT.CTRLD.SPLITM" value="1"/>
+                <register caption="Control A" initval="0x00" modes="SINGLE" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x07"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                <register caption="Control B" initval="0x00" modes="SINGLE" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                     <bitfield caption="Auto Lock Update" mask="0x08" name="ALUPD" rw="RW"/>
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare 0 Waveform Output Value"
-                              mask="0x01"
-                              name="CMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Waveform Output Value"
-                              mask="0x02"
-                              name="CMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Waveform Output Value"
-                              mask="0x04"
-                              name="CMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SINGLE" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x01" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x02" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x04" name="CMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SINGLE" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Control E Clear" initval="0x00" modes="SINGLE" name="CTRLECLR" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Direction"
-                              mask="0x01"
-                              name="DIR"
-                              rw="RW"
-                              values="TCA_SINGLE_DIR"/>
+                <register caption="Control E Set" initval="0x00" modes="SINGLE" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control F Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Clear" initval="0x00" modes="SINGLE" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Control F Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFSET"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Set" initval="0x00" modes="SINGLE" name="CTRLFSET" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="EVCTRL"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Count on Event Input A"
-                              mask="0x01"
-                              name="CNTAEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action A"
-                              mask="0x0E"
-                              name="EVACTA"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTA"/>
-                    <bitfield caption="Count on Event Input B"
-                              mask="0x10"
-                              name="CNTBEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action B"
-                              mask="0xE0"
-                              name="EVACTB"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTB"/>
+                <register caption="Event Control" initval="0x00" modes="SINGLE" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input A" mask="0x01" name="CNTAEI" rw="RW"/>
+                    <bitfield caption="Event Action A" mask="0x0E" name="EVACTA" rw="RW" values="TCA_SINGLE_EVACTA"/>
+                    <bitfield caption="Count on Event Input B" mask="0x10" name="CNTBEI" rw="RW"/>
+                    <bitfield caption="Event Action B" mask="0xE0" name="EVACTB" rw="RW" values="TCA_SINGLE_EVACTB"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" modes="SINGLE" name="INTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" modes="SINGLE" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SINGLE" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary data for 16-bit Access"
-                          modes="SINGLE"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          modes="SINGLE"
-                          name="CNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period"
-                          modes="SINGLE"
-                          name="PER"
-                          offset="0x26"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0"
-                          modes="SINGLE"
-                          name="CMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1"
-                          modes="SINGLE"
-                          name="CMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2"
-                          modes="SINGLE"
-                          name="CMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period Buffer"
-                          modes="SINGLE"
-                          name="PERBUF"
-                          offset="0x36"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0 Buffer"
-                          modes="SINGLE"
-                          name="CMP0BUF"
-                          offset="0x38"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1 Buffer"
-                          modes="SINGLE"
-                          name="CMP1BUF"
-                          offset="0x3A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2 Buffer"
-                          modes="SINGLE"
-                          name="CMP2BUF"
-                          offset="0x3C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary data for 16-bit Access" modes="SINGLE" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Count" modes="SINGLE" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Period" modes="SINGLE" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Compare 0" modes="SINGLE" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 1" modes="SINGLE" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 2" modes="SINGLE" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Period Buffer" modes="SINGLE" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" modes="SINGLE" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" modes="SINGLE" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" modes="SINGLE" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" modes="SPLIT" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Enable"
-                              mask="0x01"
-                              name="LCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Enable"
-                              mask="0x02"
-                              name="LCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Enable"
-                              mask="0x04"
-                              name="LCMP2EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Enable"
-                              mask="0x10"
-                              name="HCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Enable"
-                              mask="0x20"
-                              name="HCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Enable"
-                              mask="0x40"
-                              name="HCMP2EN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" modes="SPLIT" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Enable" mask="0x01" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x02" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x04" name="LCMP2EN" rw="RW"/>
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Output Value"
-                              mask="0x01"
-                              name="LCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Output Value"
-                              mask="0x02"
-                              name="LCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Output Value"
-                              mask="0x04"
-                              name="LCMP2OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Output Value"
-                              mask="0x10"
-                              name="HCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Output Value"
-                              mask="0x20"
-                              name="HCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Output Value"
-                              mask="0x40"
-                              name="HCMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SPLIT" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x01" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x02" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x04" name="LCMP2OV" rw="RW"/>
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SPLIT" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Clear" initval="0x00" modes="SPLIT" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Set" initval="0x00" modes="SPLIT" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Enable"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Enable"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Enable"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Enable"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Enable"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" modes="SPLIT" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Flag"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Flag"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Flag"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Flag"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Flag"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" modes="SPLIT" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SPLIT" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Low Count"
-                          modes="SPLIT"
-                          name="LCNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Count"
-                          modes="SPLIT"
-                          name="HCNT"
-                          offset="0x21"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Period"
-                          modes="SPLIT"
-                          name="LPER"
-                          offset="0x26"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Period"
-                          modes="SPLIT"
-                          name="HPER"
-                          offset="0x27"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP0"
-                          offset="0x29"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP1"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP2"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Low Count" modes="SPLIT" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="High Count" modes="SPLIT" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="Low Period" modes="SPLIT" name="LPER" offset="0x26" rw="RW" size="1"/>
+                <register caption="High Period" modes="SPLIT" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
             </register-group>
             <value-group caption="Clock Selection" name="TCA_SINGLE_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5454,12 +2404,8 @@
                 <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
                 <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
                 <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
-                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM"
-                       name="DSBOTH"
-                       value="0x06"/>
-                <value caption="Dual Slope PWM, overflow on BOTTOM"
-                       name="DSBOTTOM"
-                       value="0x07"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
             </value-group>
             <value-group caption="Command select" name="TCA_SINGLE_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
@@ -5472,31 +2418,17 @@
                 <value caption="Count down" name="DOWN" value="0x1"/>
             </value-group>
             <value-group caption="Event Action A select" name="TCA_SINGLE_EVACTA">
-                <value caption="Count on positive edge event"
-                       name="CNT_POSEDGE"
-                       value="0x00"/>
+                <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
-                <value caption="Count on prescaled clock while event line is 1."
-                       name="CNT_HIGHLVL"
-                       value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
+                <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
-                <value caption="Restart counter at positive edge event"
-                       name="RESTART_POSEDGE"
-                       value="0x04"/>
-                <value caption="Restart counter on any edge event"
-                       name="RESTART_ANYEDGE"
-                       value="0x05"/>
-                <value caption="Restart counter while event line is 1."
-                       name="RESTART_HIGHLVL"
-                       value="0x06"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+                <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
+                <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
+                <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
             </value-group>
             <value-group caption="Clock Selection" name="TCA_SPLIT_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5516,107 +2448,46 @@
             </value-group>
             <value-group caption="Command Enable select" name="TCA_SPLIT_CMDEN">
                 <value caption="None" name="NONE" value="0x0"/>
-                <value caption="Both low byte and high byte counter"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Both low byte and high byte counter" name="BOTH" value="0x3"/>
             </value-group>
         </module>
         <module caption="16-bit Timer Type B" id="tmr_16b_capture_v1" name="TCB">
             <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Select"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCB_CLKSEL"/>
+                    <bitfield caption="Clock Select" mask="0x0E" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
                     <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
                     <bitfield caption="Cascade two timers" mask="0x20" name="CASCADE" rw="RW"/>
                     <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control Register B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Timer Mode"
-                              mask="0x07"
-                              name="CNTMODE"
-                              rw="RW"
-                              values="TCB_CNTMODE"/>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Timer Mode" mask="0x07" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
                     <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
                     <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
                     <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Event Input Enable" mask="0x01" name="CAPTEI" rw="RW"/>
                     <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
-                    <bitfield caption="Input Capture Noise Cancellation Filter"
-                              mask="0x40"
-                              name="FILTER"
-                              rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
                     <bitfield caption="Run" mask="0x01" name="RUN" rw="R"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Value"
-                          name="TEMP"
-                          offset="0x9"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          initval="0x0000"
-                          name="CNT"
-                          offset="0xA"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare or Capture"
-                          name="CCMP"
-                          offset="0xC"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock Select" name="TCB_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5628,247 +2499,78 @@
                 <value caption="Periodic Interrupt" name="INT" value="0x00"/>
                 <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
                 <value caption="Input Capture Event" name="CAPT" value="0x02"/>
-                <value caption="Input Capture Frequency measurement"
-                       name="FRQ"
-                       value="0x03"/>
-                <value caption="Input Capture Pulse-Width measurement"
-                       name="PW"
-                       value="0x04"/>
-                <value caption="Input Capture Frequency and Pulse-Width measurement"
-                       name="FRQPW"
-                       value="0x05"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
                 <value caption="Single Shot" name="SINGLE" value="0x06"/>
                 <value caption="8-bit PWM" name="PWM8" value="0x07"/>
             </value-group>
         </module>
         <module caption="Timer Counter D" id="tmr_12b_psc_v1" name="TCD">
             <register-group caption="Timer Counter D" name="TCD" size="0x40">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler"
-                              mask="0x06"
-                              name="SYNCPRES"
-                              rw="RW"
-                              values="TCD_SYNCPRES"/>
-                    <bitfield caption="Counter prescaler"
-                              mask="0x18"
-                              name="CNTPRES"
-                              rw="RW"
-                              values="TCD_CNTPRES"/>
-                    <bitfield caption="Clock select"
-                              mask="0x60"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCD_CLKSEL"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x06" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+                    <bitfield caption="Counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+                    <bitfield caption="Clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x03"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCD_WGMODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x03" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare output value override"
-                              mask="0x01"
-                              name="CMPOVR"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare output value override" mask="0x01" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Auto update" mask="0x02" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Fifty percent waveform"
-                              mask="0x08"
-                              name="FIFTY"
-                              rw="RW"/>
-                    <bitfield caption="Compare C output select"
-                              mask="0x40"
-                              name="CMPCSEL"
-                              rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select"
-                              mask="0x80"
-                              name="CMPDSEL"
-                              rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Fifty percent waveform" mask="0x08" name="FIFTY" rw="RW"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x0F" name="CMPAVAL" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0xF0" name="CMPBVAL" rw="RW"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronize end of cycle strobe"
-                              mask="0x01"
-                              name="SYNCEOC"
-                              rw="RW"/>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Synchronize end of cycle strobe" mask="0x01" name="SYNCEOC" rw="RW"/>
                     <bitfield caption="synchronize strobe" mask="0x02" name="SYNC" rw="RW"/>
                     <bitfield caption="Restart strobe" mask="0x04" name="RESTART" rw="RW"/>
-                    <bitfield caption="Software Capture A Strobe"
-                              mask="0x08"
-                              name="SCAPTUREA"
-                              rw="RW"/>
-                    <bitfield caption="Software Capture B Strobe"
-                              mask="0x10"
-                              name="SCAPTUREB"
-                              rw="RW"/>
-                    <bitfield caption="Disable at end of cycle"
-                              mask="0x80"
-                              name="DISEOC"
-                              rw="RW"/>
+                    <bitfield caption="Software Capture A Strobe" mask="0x08" name="SCAPTUREA" rw="RW"/>
+                    <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+                    <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
                 </register>
-                <register caption="EVCTRLA"
-                          initval="0x00"
-                          name="EVCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="EVCTRLB"
-                          initval="0x00"
-                          name="EVCTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Trigger event enable"
-                              mask="0x01"
-                              name="TRIGEI"
-                              rw="RW"/>
-                    <bitfield caption="Event action"
-                              mask="0x04"
-                              name="ACTION"
-                              rw="RW"
-                              values="TCD_ACTION"/>
-                    <bitfield caption="Edge select"
-                              mask="0x10"
-                              name="EDGE"
-                              rw="RW"
-                              values="TCD_EDGE"/>
-                    <bitfield caption="Event config"
-                              mask="0xC0"
-                              name="CFG"
-                              rw="RW"
-                              values="TCD_CFG"/>
+                <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Trigger event enable" mask="0x01" name="TRIGEI" rw="RW"/>
+                    <bitfield caption="Event action" mask="0x04" name="ACTION" rw="RW" values="TCD_ACTION"/>
+                    <bitfield caption="Edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+                    <bitfield caption="Event config" mask="0xC0" name="CFG" rw="RW" values="TCD_CFG"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Trigger A interrupt enable"
-                              mask="0x04"
-                              name="TRIGA"
-                              rw="RW"/>
-                    <bitfield caption="Trigger B interrupt enable"
-                              mask="0x08"
-                              name="TRIGB"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Overflow interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Trigger A interrupt enable" mask="0x04" name="TRIGA" rw="RW"/>
+                    <bitfield caption="Trigger B interrupt enable" mask="0x08" name="TRIGB" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Enable ready" mask="0x01" name="ENRDY" rw="R"/>
                     <bitfield caption="Command ready" mask="0x02" name="CMDRDY" rw="R"/>
                     <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
                     <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
                 </register>
-                <register caption="Input Control A"
-                          initval="0x00"
-                          name="INPUTCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Input Control B"
-                          initval="0x00"
-                          name="INPUTCTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input mode"
-                              mask="0x0F"
-                              name="INPUTMODE"
-                              rw="RW"
-                              values="TCD_INPUTMODE"/>
+                <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input mode" mask="0x0F" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
                 </register>
-                <register caption="Fault Control"
-                          initval="0x00"
-                          name="FAULTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Compare A value" mask="0x01" name="CMPA" rw="RW"/>
                     <bitfield caption="Compare B value" mask="0x02" name="CMPB" rw="RW"/>
                     <bitfield caption="Compare C value" mask="0x04" name="CMPC" rw="RW"/>
@@ -5878,100 +2580,33 @@
                     <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
                     <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
                 </register>
-                <register caption="Delay Control"
-                          initval="0x00"
-                          name="DLYCTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Delay select"
-                              mask="0x03"
-                              name="DLYSEL"
-                              rw="RW"
-                              values="TCD_DLYSEL"/>
-                    <bitfield caption="Delay trigger"
-                              mask="0x0C"
-                              name="DLYTRIG"
-                              rw="RW"
-                              values="TCD_DLYTRIG"/>
-                    <bitfield caption="Delay prescaler"
-                              mask="0x30"
-                              name="DLYPRESC"
-                              rw="RW"
-                              values="TCD_DLYPRESC"/>
+                <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Delay select" mask="0x03" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+                    <bitfield caption="Delay trigger" mask="0x0C" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+                    <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
                 </register>
-                <register caption="Delay value"
-                          initval="0x00"
-                          name="DLYVAL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Delay value" mask="0xFF" name="DLYVAL" rw="RW"/>
                 </register>
-                <register caption="Dither Control A"
-                          initval="0x00"
-                          name="DITCTRL"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Dither select"
-                              mask="0x03"
-                              name="DITHERSEL"
-                              rw="RW"
-                              values="TCD_DITHERSEL"/>
+                <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Dither select" mask="0x03" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
                 </register>
-                <register caption="Dither value"
-                          initval="0x00"
-                          name="DITVAL"
-                          offset="0x19"
-                          rw="RW"
-                          size="1">
+                <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
                     <bitfield caption="Dither value" mask="0x0F" name="DITHER" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
                     <bitfield caption="Debug run" mask="0x01" name="DBGRUN" rw="RW"/>
                     <bitfield caption="Fault detection" mask="0x04" name="FAULTDET" rw="RW"/>
                 </register>
-                <register caption="Capture A"
-                          name="CAPTUREA"
-                          offset="0x22"
-                          rw="R"
-                          size="2"/>
-                <register caption="Capture B"
-                          name="CAPTUREB"
-                          offset="0x24"
-                          rw="R"
-                          size="2"/>
-                <register caption="Compare A Set"
-                          name="CMPASET"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare A Clear"
-                          name="CMPACLR"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Set"
-                          name="CMPBSET"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare B Clear"
-                          name="CMPBCLR"
-                          offset="0x2E"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+                <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+                <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock select" name="TCD_CLKSEL">
-                <value caption="Internal High-Frequency oscillator"
-                       name="OSCHF"
-                       value="0x00"/>
+                <value caption="Internal High-Frequency oscillator" name="OSCHF" value="0x00"/>
                 <value caption="PLL" name="PLL" value="0x01"/>
                 <value caption="External Clock" name="EXTCLK" value="0x02"/>
                 <value caption="Peripheral clock" name="CLKPER" value="0x03"/>
@@ -5982,18 +2617,10 @@
                 <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
             </value-group>
             <value-group caption="Synchronization prescaler select" name="TCD_SYNCPRES">
-                <value caption="Selected clock source divided by 1"
-                       name="DIV1"
-                       value="0x00"/>
-                <value caption="Selected clock source divided by 2"
-                       name="DIV2"
-                       value="0x01"/>
-                <value caption="Selected clock source divided by 4"
-                       name="DIV4"
-                       value="0x02"/>
-                <value caption="Selected clock source divided by 8"
-                       name="DIV8"
-                       value="0x03"/>
+                <value caption="Selected clock source divided by 1" name="DIV1" value="0x00"/>
+                <value caption="Selected clock source divided by 2" name="DIV2" value="0x01"/>
+                <value caption="Selected clock source divided by 4" name="DIV4" value="0x02"/>
+                <value caption="Selected clock source divided by 8" name="DIV8" value="0x03"/>
             </value-group>
             <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
                 <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
@@ -6034,176 +2661,63 @@
             </value-group>
             <value-group caption="Event action select" name="TCD_ACTION">
                 <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
-                <value caption="Event trigger a fault and capture"
-                       name="CAPTURE"
-                       value="0x1"/>
+                <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
             </value-group>
             <value-group caption="Event config select" name="TCD_CFG">
-                <value caption="Neither Filter nor Asynchronous Event is enabled"
-                       name="NEITHER"
-                       value="0x0"/>
-                <value caption="Input Capture Noise Cancellation Filter enabled"
-                       name="FILTER"
-                       value="0x1"/>
-                <value caption="Asynchronous Event output qualification enabled"
-                       name="ASYNC"
-                       value="0x2"/>
+                <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+                <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+                <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="Edge select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW"
-                       value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH"
-                       value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
-                <value caption="Stop output, jump to opposite compare cycle and wait"
-                       name="JMPWAIT"
-                       value="0x01"/>
-                <value caption="Stop output, execute opposite compare cycle and wait"
-                       name="EXECWAIT"
-                       value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active"
-                       name="EXECFAULT"
-                       value="0x03"/>
-                <value caption="Stop all outputs, maintain frequency"
-                       name="FREQ"
-                       value="0x04"/>
-                <value caption="Stop all outputs, execute dead time while fault active"
-                       name="EXECDT"
-                       value="0x05"/>
-                <value caption="Stop all outputs, jump to next compare cycle and wait"
-                       name="WAIT"
-                       value="0x06"/>
-                <value caption="Stop all outputs, wait for software action"
-                       name="WAITSW"
-                       value="0x07"/>
-                <value caption="Stop output on edge, jump to next compare cycle"
-                       name="EDGETRIG"
-                       value="0x08"/>
-                <value caption="Stop output on edge, maintain frequency"
-                       name="EDGETRIGFREQ"
-                       value="0x09"/>
-                <value caption="Stop output at level, maintain frequency"
-                       name="LVLTRIGFREQ"
-                       value="0x0A"/>
+                <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
+                <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
+                <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
+                <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
+                <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
+                <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x07"/>
+                <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x08"/>
+                <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x09"/>
+                <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0x0A"/>
             </value-group>
         </module>
         <module caption="Two-Wire Interface" id="i2c_8bit_avr_v3" name="TWI">
             <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="SDA Setup Time"
-                              mask="0x10"
-                              name="SDASETUP"
-                              rw="RW"
-                              values="TWI_SDASETUP"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Dual Mode Control"
-                          initval="0x00"
-                          name="DUALCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
+                <register caption="Dual Mode Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Debug Run"
-                              mask="0x01"
-                              name="DBGRUN"
-                              rw="RW"
-                              values="TWI_DBGRUN"/>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW" values="TWI_DBGRUN"/>
                 </register>
-                <register caption="Host Control A"
-                          initval="0x00"
-                          name="MCTRLA"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Inactive Bus Time-Out"
-                              mask="0x0C"
-                              name="TIMEOUT"
-                              rw="RW"
-                              values="TWI_TIMEOUT"/>
+                    <bitfield caption="Inactive Bus Time-Out" mask="0x0C" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
                     <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
-                    <bitfield caption="Write Interrupt Enable"
-                              mask="0x40"
-                              name="WIEN"
-                              rw="RW"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
                     <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
                 </register>
-                <register caption="Host Control B"
-                          initval="0x00"
-                          name="MCTRLB"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="MCMD"
-                              rw="RW"
-                              values="TWI_MCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Host Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                     <bitfield caption="Flush" mask="0x08" name="FLUSH" rw="RW"/>
                 </register>
-                <register caption="Host STATUS"
-                          initval="0x00"
-                          name="MSTATUS"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bus State"
-                              mask="0x03"
-                              name="BUSSTATE"
-                              rw="RW"
-                              values="TWI_BUSSTATE"/>
+                <register caption="Host STATUS" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
@@ -6211,147 +2725,69 @@
                     <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
                     <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
                 </register>
-                <register caption="Host Baud Rate"
-                          initval="0x00"
-                          name="MBAUD"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Baud Rate" initval="0x00" name="MBAUD" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Baud Rate" mask="0xFF" name="BAUD" rw="RW"/>
                 </register>
-                <register caption="Host Address"
-                          initval="0x00"
-                          name="MADDR"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Address" initval="0x00" name="MADDR" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Host Data"
-                          initval="0x00"
-                          name="MDATA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Data" initval="0x00" name="MDATA" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Control A"
-                          initval="0x00"
-                          name="SCTRLA"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Address Recognition Mode"
-                              mask="0x04"
-                              name="PMEN"
-                              rw="RW"/>
+                    <bitfield caption="Address Recognition Mode" mask="0x04" name="PMEN" rw="RW"/>
                     <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Enable"
-                              mask="0x40"
-                              name="APIEN"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
                     <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
                 </register>
-                <register caption="Client Control B"
-                          initval="0x00"
-                          name="SCTRLB"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="SCMD"
-                              rw="RW"
-                              values="TWI_SCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Client Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                 </register>
-                <register caption="Client Status"
-                          initval="0x00"
-                          name="SSTATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Address or Stop"
-                              mask="0x01"
-                              name="AP"
-                              rw="RW"
-                              values="TWI_AP"/>
+                <register caption="Client Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Address or Stop" mask="0x01" name="AP" rw="RW" values="TWI_AP"/>
                     <bitfield caption="Read/Write Direction" mask="0x02" name="DIR" rw="RW"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Collision" mask="0x08" name="COLL" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
                     <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Flag"
-                              mask="0x40"
-                              name="APIF"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
                     <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
                 </register>
-                <register caption="Client Address"
-                          initval="0x00"
-                          name="SADDR"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address" initval="0x00" name="SADDR" offset="0xC" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Client Data"
-                          initval="0x00"
-                          name="SDATA"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Data" initval="0x00" name="SDATA" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Address Mask"
-                          initval="0x00"
-                          name="SADDRMASK"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address Mask" initval="0x00" name="SADDRMASK" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Address Mask Enable" mask="0x01" name="ADDREN" rw="RW"/>
                     <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Fast-mode Plus Enable select" name="TWI_FMPEN">
-                <value caption="Operating in Standard-mode or Fast-mode"
-                       name="OFF"
-                       value="0x0"/>
+                <value caption="Operating in Standard-mode or Fast-mode" name="OFF" value="0x0"/>
                 <value caption="Operating in Fast-mode Plus" name="ON" value="0x1"/>
             </value-group>
             <value-group caption="Input voltage transition level select" name="TWI_INPUTLVL">
                 <value caption="I2C input voltage transition level" name="I2C" value="0x0"/>
-                <value caption="SMBus 3.0 input voltage transition level"
-                       name="SMBUS"
-                       value="0x1"/>
+                <value caption="SMBus 3.0 input voltage transition level" name="SMBUS" value="0x1"/>
             </value-group>
             <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
                 <value caption="No SDA Hold Delay" name="OFF" value="0x0"/>
                 <value caption="Short SDA hold time" name="50NS" value="0x1"/>
-                <value caption="Meets SMBUS 2.0 specification under typical conditions"
-                       name="300NS"
-                       value="0x2"/>
-                <value caption="Meets SMBUS 2.0 specificaiton across all corners"
-                       name="500NS"
-                       value="0x3"/>
+                <value caption="Meets SMBUS 2.0 specification under typical conditions" name="300NS" value="0x2"/>
+                <value caption="Meets SMBUS 2.0 specificaiton across all corners" name="500NS" value="0x3"/>
             </value-group>
             <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
                 <value caption="SDA setup time is four clock cycles" name="4CYC" value="0"/>
                 <value caption="SDA setup time is eight clock cycle" name="8CYC" value="1"/>
             </value-group>
             <value-group caption="Debug Run select" name="TWI_DBGRUN">
-                <value caption="The peripheral is halted in Break Debug mode and ignores events"
-                       name="HALT"
-                       value="0"/>
-                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted"
-                       name="RUN"
-                       value="1"/>
+                <value caption="The peripheral is halted in Break Debug mode and ignores events" name="HALT" value="0"/>
+                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted" name="RUN" value="1"/>
             </value-group>
             <value-group caption="Inactive Bus Time-Out select" name="TWI_TIMEOUT">
                 <value caption="Bus time-out disabled. I2C." name="DISABLED" value="0"/>
@@ -6365,15 +2801,9 @@
             </value-group>
             <value-group caption="Command select" name="TWI_MCMD">
                 <value caption="No action" name="NOACT" value="0"/>
-                <value caption="Execute Acknowledge Action followed by repeated Start."
-                       name="REPSTART"
-                       value="1"/>
-                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR."
-                       name="RECVTRANS"
-                       value="2"/>
-                <value caption="Execute Acknowledge Action followed by issuing a Stop condition."
-                       name="STOP"
-                       value="3"/>
+                <value caption="Execute Acknowledge Action followed by repeated Start." name="REPSTART" value="1"/>
+                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR." name="RECVTRANS" value="2"/>
+                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP" value="3"/>
             </value-group>
             <value-group caption="Bus State select" name="TWI_BUSSTATE">
                 <value caption="Unknown bus state" name="UNKNOWN" value="0"/>
@@ -6384,254 +2814,81 @@
             <value-group caption="Command select" name="TWI_SCMD">
                 <value caption="No Action" name="NOACT" value="0"/>
                 <value caption="Complete transaction" name="COMPTRANS" value="2"/>
-                <value caption="Used in response to an interrupt"
-                       name="RESPONSE"
-                       value="3"/>
+                <value caption="Used in response to an interrupt" name="RESPONSE" value="3"/>
             </value-group>
             <value-group caption="Address or Stop select" name="TWI_AP">
-                <value caption="A Stop condition generated the interrupt on APIF flag"
-                       name="STOP"
-                       value="0"/>
-                <value caption="Address detection generated the interrupt on APIF flag"
-                       name="ADR"
-                       value="1"/>
+                <value caption="A Stop condition generated the interrupt on APIF flag" name="STOP" value="0"/>
+                <value caption="Address detection generated the interrupt on APIF flag" name="ADR" value="1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                            name="USART"
-                            size="0x10">
-                <register caption="Receive Data Low Byte"
-                          initval="0x00"
-                          name="RXDATAL"
-                          offset="0x0"
-                          rw="R"
-                          size="1">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xFF" name="DATA" rw="R"/>
                 </register>
-                <register caption="Receive Data High Byte"
-                          initval="0x00"
-                          name="RXDATAH"
-                          offset="0x1"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="Receiver Data Register"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="R"/>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Receiver Data Register" mask="0x01" name="DATA8" rw="R"/>
                     <bitfield caption="Parity Error" mask="0x02" name="PERR" rw="R"/>
                     <bitfield caption="Frame Error" mask="0x04" name="FERR" rw="R"/>
                     <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Transmit Data Low Byte"
-                          initval="0x00"
-                          name="TXDATAL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register"
-                              mask="0xFF"
-                              name="DATA"
-                              rw="RW"/>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Transmit Data High Byte"
-                          initval="0x00"
-                          name="TXDATAH"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="RW"/>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x01" name="DATA8" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Wait For Break" mask="0x01" name="WFB" rw="RW"/>
                     <bitfield caption="Break Detected Flag" mask="0x02" name="BDF" rw="RW"/>
-                    <bitfield caption="Inconsistent Sync Field Interrupt Flag"
-                              mask="0x08"
-                              name="ISFIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Start Interrupt"
-                              mask="0x10"
-                              name="RXSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Flag"
-                              mask="0x20"
-                              name="DREIF"
-                              rw="R"/>
-                    <bitfield caption="Transmit Interrupt Flag"
-                              mask="0x40"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x08" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="RS485 Mode internal transmitter"
-                              mask="0x01"
-                              name="RS485"
-                              rw="RW"
-                              values="USART_RS485"/>
-                    <bitfield caption="Auto-baud Error Interrupt Enable"
-                              mask="0x04"
-                              name="ABEIE"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x01" name="RS485" rw="RW" values="USART_RS485"/>
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x04" name="ABEIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x08" name="LBME" rw="RW"/>
-                    <bitfield caption="Receiver Start Frame Interrupt Enable"
-                              mask="0x10"
-                              name="RXSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transmit Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multi-processor Communication Mode"
-                              mask="0x01"
-                              name="MPCM"
-                              rw="RW"/>
-                    <bitfield caption="Receiver Mode"
-                              mask="0x06"
-                              name="RXMODE"
-                              rw="RW"
-                              values="USART_RXMODE"/>
-                    <bitfield caption="Open Drain Mode Enable"
-                              mask="0x08"
-                              name="ODME"
-                              rw="RW"/>
-                    <bitfield caption="Start Frame Detection Enable"
-                              mask="0x10"
-                              name="SFDEN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x06" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x08" name="ODME" rw="RW"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
                     <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
                     <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x03"
-                          name="CTRLC"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="USART.CTRLC.CMODE" value="0x00 0x01 0x02"/>
                     <mode name="MSPI" qualifier="USART.CTRLC.CMODE" value="0x03"/>
-                    <bitfield caption="Communication Mode"
-                              mask="0xC0"
-                              name="CMODE"
-                              rw="RW"
-                              values="USART_CMODE"/>
-                    <bitfield caption="SPI Host Mode, Clock Phase"
-                              mask="0x02"
-                              modes="MSPI"
-                              name="UCPHA"
-                              rw="RW"/>
-                    <bitfield caption="SPI Host Mode, Data Order"
-                              mask="0x04"
-                              modes="MSPI"
-                              name="UDORD"
-                              rw="RW"/>
-                    <bitfield caption="Character Size"
-                              mask="0x07"
-                              modes="NORMAL"
-                              name="CHSIZE"
-                              rw="RW"
-                              values="USART_NORMAL_CHSIZE"/>
-                    <bitfield caption="Stop Bit Mode"
-                              mask="0x08"
-                              modes="NORMAL"
-                              name="SBMODE"
-                              rw="RW"
-                              values="USART_NORMAL_SBMODE"/>
-                    <bitfield caption="Parity Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="PMODE"
-                              rw="RW"
-                              values="USART_NORMAL_PMODE"/>
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" rw="RW" values="USART_CMODE"/>
+                    <bitfield caption="SPI Host Mode, Clock Phase" mask="0x02" modes="MSPI" name="UCPHA" rw="RW"/>
+                    <bitfield caption="SPI Host Mode, Data Order" mask="0x04" modes="MSPI" name="UDORD" rw="RW"/>
+                    <bitfield caption="Character Size" mask="0x07" modes="NORMAL" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" modes="NORMAL" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" modes="NORMAL" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
                 </register>
-                <register caption="Baud Rate"
-                          initval="0x0000"
-                          name="BAUD"
-                          offset="0x8"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Auto Baud Window"
-                              mask="0xC0"
-                              name="ABW"
-                              rw="RW"
-                              values="USART_ABW"/>
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xC0" name="ABW" rw="RW" values="USART_ABW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="IrDA Event Input Enable"
-                              mask="0x01"
-                              name="IREI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x01" name="IREI" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control"
-                          initval="0x00"
-                          name="TXPLCTRL"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xFF" name="TXPL" rw="RW"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control"
-                          initval="0x00"
-                          name="RXPLCTRL"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7F" name="RXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -6656,12 +2913,8 @@
                 <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
                 <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
                 <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
-                <value caption="Character size: 9 bit read low byte first"
-                       name="9BITL"
-                       value="0x06"/>
-                <value caption="Character size: 9 bit read high byte first"
-                       name="9BITH"
-                       value="0x07"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
             </value-group>
             <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
                 <value caption="No Parity" name="DISABLED" value="0x00"/>
@@ -6681,234 +2934,62 @@
         </module>
         <module caption="User Row" id="avrdd" name="USERROW">
             <register-group caption="User Row" name="USERROW" size="0x20">
-                <register caption="User Row Byte 0"
-                          name="USERROW0"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 1"
-                          name="USERROW1"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 2"
-                          name="USERROW2"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 3"
-                          name="USERROW3"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 4"
-                          name="USERROW4"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 5"
-                          name="USERROW5"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 6"
-                          name="USERROW6"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 7"
-                          name="USERROW7"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 8"
-                          name="USERROW8"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 9"
-                          name="USERROW9"
-                          offset="0x09"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 10"
-                          name="USERROW10"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 11"
-                          name="USERROW11"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 12"
-                          name="USERROW12"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 13"
-                          name="USERROW13"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 14"
-                          name="USERROW14"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 15"
-                          name="USERROW15"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 16"
-                          name="USERROW16"
-                          offset="0x10"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 17"
-                          name="USERROW17"
-                          offset="0x11"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 18"
-                          name="USERROW18"
-                          offset="0x12"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 19"
-                          name="USERROW19"
-                          offset="0x13"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 20"
-                          name="USERROW20"
-                          offset="0x14"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 21"
-                          name="USERROW21"
-                          offset="0x15"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 22"
-                          name="USERROW22"
-                          offset="0x16"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 23"
-                          name="USERROW23"
-                          offset="0x17"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 24"
-                          name="USERROW24"
-                          offset="0x18"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 25"
-                          name="USERROW25"
-                          offset="0x19"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 26"
-                          name="USERROW26"
-                          offset="0x1A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 27"
-                          name="USERROW27"
-                          offset="0x1B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 28"
-                          name="USERROW28"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 29"
-                          name="USERROW29"
-                          offset="0x1D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 30"
-                          name="USERROW30"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 31"
-                          name="USERROW31"
-                          offset="0x1F"
-                          rw="RW"
-                          size="1"/>
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Virtual Ports" id="gpio_ports_avr_v2_vport" name="VPORT">
             <register-group caption="Virtual Ports" name="VPORT" size="0x4">
-                <register caption="Data Direction"
-                          name="DIR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          name="OUT"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          name="IN"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Voltage reference" id="avrdd" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
-                <register caption="ADC0 Reference"
-                          initval="0x00"
-                          name="ADC0REF"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="ADC0 Reference" initval="0x00" name="ADC0REF" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="DAC0 Reference"
-                          initval="0x00"
-                          name="DAC0REF"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="DAC0 Reference" initval="0x00" name="DAC0REF" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="AC Reference"
-                          initval="0x00"
-                          name="ACREF"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="AC Reference" initval="0x00" name="ACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
             </register-group>
@@ -6923,33 +3004,12 @@
         </module>
         <module caption="Watch-Dog Timer" id="wdt_windowed_v2" name="WDT">
             <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="WDT_PERIOD"/>
-                    <bitfield caption="Window"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="WDT_WINDOW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x0F" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xF0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Syncronization busy"
-                              mask="0x01"
-                              name="SYNCBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY" rw="R"/>
                     <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
                 </register>
             </register-group>
@@ -6984,60 +3044,25 @@
         </module>
         <module caption="Zero Cross Detect" id="cmp_zxover_ctrl_v3" name="ZCD">
             <register-group caption="Zero Cross Detect" name="ZCD" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Invert signal from pin"
-                              mask="0x08"
-                              name="INVERT"
-                              rw="RW"/>
+                    <bitfield caption="Invert signal from pin" mask="0x08" name="INVERT" rw="RW"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x03"
-                              name="INTMODE"
-                              rw="RW"
-                              values="ZCD_INTMODE"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x03" name="INTMODE" rw="RW" values="ZCD_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="ZCD Interrupt Flag" mask="0x01" name="CROSSIF" rw="RW"/>
-                    <bitfield caption="ZCD State"
-                              mask="0x10"
-                              name="STATE"
-                              rw="R"
-                              values="ZCD_STATE"/>
+                    <bitfield caption="ZCD State" mask="0x10" name="STATE" rw="R" values="ZCD_STATE"/>
                 </register>
             </register-group>
             <value-group caption="Interrupt Mode select" name="ZCD_INTMODE">
                 <value caption="No interrupt" name="NONE" value="0x0"/>
-                <value caption="Interrupt on rising input signal"
-                       name="RISING"
-                       value="0x1"/>
-                <value caption="Interrupt on falling input signal"
-                       name="FALLING"
-                       value="0x2"/>
-                <value caption="Interrupt on both rising and falling input signal"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Interrupt on rising input signal" name="RISING" value="0x1"/>
+                <value caption="Interrupt on falling input signal" name="FALLING" value="0x2"/>
+                <value caption="Interrupt on both rising and falling input signal" name="BOTH" value="0x3"/>
             </value-group>
             <value-group caption="ZCD State select" name="ZCD_STATE">
                 <value caption="Output is 0" name="LOW" value="0x0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA28.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA28.xml
index 0d72f5e5..0ed3b813 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA28.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA28.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR64DA28" package="SOIC28" pinout="SOIC28" speedmax="24000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR64DA28" package="SOIC28" pinout="SOIC28" speedmax="24000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR64DA28" family="AVR8" architecture="AVR8X" avr-family="AVR DA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x2000" start="0x6000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x10000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -97,8 +88,7 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
@@ -107,8 +97,7 @@
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -156,16 +145,11 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
                     </signals>
                 </instance>
             </module>
@@ -362,8 +346,7 @@
                     <signals>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
@@ -542,28 +525,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -573,8 +551,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -637,10 +614,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -660,12 +635,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -781,23 +754,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -868,44 +836,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -930,14 +886,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -1123,12 +1075,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1"/>
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1"/>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
                 <register caption="Stack Pointer Low" initval="0xFF" name="SPL" offset="0xD" rw="RW" size="1"/>
                 <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
@@ -1154,12 +1104,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1205,145 +1153,111 @@
         <module caption="Event System" id="avrda" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
                 <register caption="User 13 - PTC" initval="0x00" name="USERPTCSTART" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1379,17 +1293,12 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1433,15 +1342,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1489,15 +1394,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1545,15 +1446,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1592,15 +1489,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1639,15 +1532,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1683,15 +1572,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1727,15 +1612,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1772,13 +1653,10 @@
         <module caption="Fuses" id="avrda" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1789,24 +1667,21 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x00" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1832,8 +1707,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -1910,8 +1784,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -1958,10 +1831,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_v6_port" name="PORT">
@@ -2053,14 +1924,10 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2091,8 +1958,7 @@
                     <bitfield caption="USART2 Signals" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -2229,12 +2095,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2326,8 +2190,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2423,8 +2286,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2542,8 +2404,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2579,13 +2440,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2678,18 +2537,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2832,17 +2688,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -2857,12 +2710,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2874,10 +2724,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -2980,17 +2828,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3005,19 +2850,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3040,8 +2881,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3059,8 +2899,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA32.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA32.xml
index 3a2cba31..9cbff69b 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA32.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA32.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR64DA32" package="QFN32" pinout="QFN32" speedmax="24000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR64DA32" package="QFN32" pinout="QFN32" speedmax="24000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR64DA32" family="AVR8" architecture="AVR8X" avr-family="AVR DA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x2000" start="0x6000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x10000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -101,8 +92,7 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
@@ -111,8 +101,7 @@
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -162,18 +151,12 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -384,14 +367,11 @@
                     <signals>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
                 </instance>
@@ -583,28 +563,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -614,8 +589,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -678,10 +652,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -701,12 +673,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -826,23 +796,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -913,44 +878,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -975,14 +928,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -1168,12 +1117,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1"/>
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1"/>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
                 <register caption="Stack Pointer Low" initval="0xFF" name="SPL" offset="0xD" rw="RW" size="1"/>
                 <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
@@ -1199,12 +1146,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1250,145 +1195,111 @@
         <module caption="Event System" id="avrda" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
                 <register caption="User 13 - PTC" initval="0x00" name="USERPTCSTART" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1424,17 +1335,12 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1478,15 +1384,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1534,15 +1436,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1590,15 +1488,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1637,15 +1531,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1688,15 +1578,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1736,15 +1622,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1780,15 +1662,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1825,13 +1703,10 @@
         <module caption="Fuses" id="avrda" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1842,24 +1717,21 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x00" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1885,8 +1757,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -1963,8 +1834,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2011,10 +1881,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_v6_port" name="PORT">
@@ -2106,14 +1974,10 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2146,8 +2010,7 @@
                     <bitfield caption="USART2 Signals" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -2293,12 +2156,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2390,8 +2251,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2487,8 +2347,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2606,8 +2465,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2643,13 +2501,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2742,18 +2598,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2896,17 +2749,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -2921,12 +2771,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2938,10 +2785,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -3044,17 +2889,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3069,19 +2911,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3104,8 +2942,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3123,8 +2960,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA48.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA48.xml
index 46b3be62..66f3d4b9 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA48.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA48.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR64DA48" package="QFN48" pinout="QFN48" speedmax="24000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR64DA48" package="QFN48" pinout="QFN48" speedmax="24000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR64DA48" family="AVR8" architecture="AVR8X" avr-family="AVR DA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x2000" start="0x6000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x10000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -111,20 +102,17 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="2" pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
-                                pad="PC6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -178,24 +166,15 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2" pad="PC7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4" pad="PE2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -485,15 +464,12 @@
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOA" pad="PB4"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOB" index="1" pad="PB5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
                 </instance>
@@ -751,28 +727,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -782,8 +753,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -846,10 +816,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -869,12 +837,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -1002,23 +968,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -1103,64 +1064,46 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 4 Control B" initval="0x00" name="LUT4CTRLB" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 5 Control B" initval="0x00" name="LUT5CTRLB" offset="0x1d" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 4 Control C" initval="0x00" name="LUT4CTRLC" offset="0x1a" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 5 Control C" initval="0x00" name="LUT5CTRLC" offset="0x1e" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -1194,20 +1137,14 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Control 1" initval="0x00" name="INTCTRL1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW"
-                              values="CCL_INTMODE4"/>
-                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW"
-                              values="CCL_INTMODE5"/>
+                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW" values="CCL_INTMODE4"/>
+                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW" values="CCL_INTMODE5"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x3f" name="INT" rw="RW"/>
@@ -1409,12 +1346,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1"/>
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1"/>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
                 <register caption="Stack Pointer Low" initval="0xFF" name="SPL" offset="0xD" rw="RW" size="1"/>
                 <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
@@ -1440,12 +1375,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1491,205 +1424,156 @@
         <module caption="Event System" id="avrda" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Multiplexer Channel 8" initval="0x00" name="CHANNEL8" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW"
-                              values="EVSYS_CHANNEL8"/>
+                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW" values="EVSYS_CHANNEL8"/>
                 </register>
                 <register caption="Multiplexer Channel 9" initval="0x00" name="CHANNEL9" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW"
-                              values="EVSYS_CHANNEL9"/>
+                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW" values="EVSYS_CHANNEL9"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW"
-                          size="1">
+                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
                 <register caption="User 13 - PTC" initval="0x00" name="USERPTCSTART" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 29 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3D" rw="RW"
-                          size="1">
+                <register caption="User 29 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 37 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x45" rw="RW"
-                          size="1">
+                <register caption="User 37 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x45" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 38 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x46" rw="RW"
-                          size="1">
+                <register caption="User 38 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x46" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 24 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x38" rw="RW"
-                          size="1">
+                <register caption="User 24 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x38" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 25 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x39" rw="RW"
-                          size="1">
+                <register caption="User 25 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x39" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1725,17 +1609,12 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1748,12 +1627,9 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
@@ -1799,15 +1675,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1819,15 +1691,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
@@ -1877,15 +1745,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1897,15 +1761,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x44"/>
@@ -1953,15 +1813,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1973,15 +1829,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x44"/>
@@ -2020,15 +1872,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2040,15 +1888,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port E Pin 0" name="PORTE_PIN0" value="0x40"/>
@@ -2091,15 +1935,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2111,15 +1951,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port E Pin 0" name="PORTE_PIN0" value="0x40"/>
@@ -2159,15 +1995,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2179,15 +2011,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="USART 3 XCK" name="USART3_XCK" value="0x63"/>
@@ -2219,15 +2047,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2239,15 +2063,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="USART 3 XCK" name="USART3_XCK" value="0x63"/>
@@ -2279,15 +2099,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2299,15 +2115,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="USART 3 XCK" name="USART3_XCK" value="0x63"/>
@@ -2339,15 +2151,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2359,15 +2167,11 @@
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="USART 3 XCK" name="USART3_XCK" value="0x63"/>
@@ -2406,13 +2210,10 @@
         <module caption="Fuses" id="avrda" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -2423,24 +2224,21 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x00" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -2466,8 +2264,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2544,8 +2341,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2592,10 +2388,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_v6_port" name="PORT">
@@ -2687,16 +2481,11 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
-                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW"
-                              values="PORTMUX_LUT4"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW" values="PORTMUX_LUT4"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2737,10 +2526,8 @@
                     <bitfield caption="USART4 Signals" mask="0x3" name="USART4" rw="RW" values="PORTMUX_USART4"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
-                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW"
-                              values="PORTMUX_ZCD1"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW" values="PORTMUX_ZCD1"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -2931,12 +2718,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -3028,8 +2813,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -3125,8 +2909,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -3244,8 +3027,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -3281,13 +3063,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -3381,18 +3161,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -3535,17 +3312,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -3560,12 +3334,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -3577,10 +3348,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -3683,17 +3452,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3708,19 +3474,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3743,8 +3505,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3762,8 +3523,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA64.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA64.xml
index 5c673427..e0d6219b 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA64.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DA64.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR64DA64" package="QFN64" pinout="QFN64" speedmax="24000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR64DA64" package="QFN64" pinout="QFN64" speedmax="24000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR64DA64" family="AVR8" architecture="AVR8X" avr-family="AVR DA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x2000" start="0x6000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x10000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -115,20 +106,17 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="2" pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
-                                pad="PC6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -137,14 +125,12 @@
                         <signal function="CCL_IN" group="LUT4_IN" index="0" pad="PB0"/>
                         <signal function="CCL_IN" group="LUT4_IN" index="1" pad="PB1"/>
                         <signal function="CCL_IN" group="LUT4_IN" index="2" pad="PB2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT4" function="CCL_ALT" group="LUT4_OUT" index="0"
-                                pad="PB6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT4" function="CCL_ALT" group="LUT4_OUT" index="0" pad="PB6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT4" function="CCL" group="LUT4_OUT" index="0" pad="PB3"/>
                         <signal function="CCL_IN" group="LUT5_IN" index="0" pad="PG0"/>
                         <signal function="CCL_IN" group="LUT5_IN" index="1" pad="PG1"/>
                         <signal function="CCL_IN" group="LUT5_IN" index="2" pad="PG2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT5" function="CCL_ALT" group="LUT5_OUT" index="0"
-                                pad="PG6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT5" function="CCL_ALT" group="LUT5_OUT" index="0" pad="PG6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT5" function="CCL" group="LUT5_OUT" index="0" pad="PG3"/>
                     </signals>
                 </instance>
@@ -190,32 +176,19 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS_ALT" group="EVOUT" index="1"
-                                pad="PB7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS_ALT" group="EVOUT" index="4"
-                                pad="PE7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS_ALT" group="EVOUT" index="6"
-                                pad="PG7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS" group="EVOUT" index="6"
-                                pad="PG2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS_ALT" group="EVOUT" index="1" pad="PB7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2" pad="PC7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS_ALT" group="EVOUT" index="4" pad="PE7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4" pad="PE2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS_ALT" group="EVOUT" index="6" pad="PG7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS" group="EVOUT" index="6" pad="PG2"/>
                     </signals>
                 </instance>
             </module>
@@ -569,22 +542,16 @@
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOA" pad="PB4"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOB" index="1"
-                                pad="PG5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOB" index="1" pad="PG5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOB" index="1" pad="PB5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOC" index="2"
-                                pad="PG6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOC" index="2" pad="PG6"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOC" index="2" pad="PB6"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOD" index="3"
-                                pad="PG7"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOD" index="3" pad="PG7"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOD" index="3" pad="PB7"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
@@ -883,28 +850,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -914,8 +876,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -978,10 +939,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -1001,12 +960,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -1142,23 +1099,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -1243,64 +1195,46 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 4 Control B" initval="0x00" name="LUT4CTRLB" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 5 Control B" initval="0x00" name="LUT5CTRLB" offset="0x1d" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 4 Control C" initval="0x00" name="LUT4CTRLC" offset="0x1a" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 5 Control C" initval="0x00" name="LUT5CTRLC" offset="0x1e" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -1334,20 +1268,14 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Control 1" initval="0x00" name="INTCTRL1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW"
-                              values="CCL_INTMODE4"/>
-                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW"
-                              values="CCL_INTMODE5"/>
+                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW" values="CCL_INTMODE4"/>
+                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW" values="CCL_INTMODE5"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x3f" name="INT" rw="RW"/>
@@ -1550,12 +1478,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1"/>
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1"/>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
                 <register caption="Stack Pointer Low" initval="0xFF" name="SPL" offset="0xD" rw="RW" size="1"/>
                 <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
@@ -1581,12 +1507,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1632,221 +1556,168 @@
         <module caption="Event System" id="avrda" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Multiplexer Channel 8" initval="0x00" name="CHANNEL8" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW"
-                              values="EVSYS_CHANNEL8"/>
+                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW" values="EVSYS_CHANNEL8"/>
                 </register>
                 <register caption="Multiplexer Channel 9" initval="0x00" name="CHANNEL9" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW"
-                              values="EVSYS_CHANNEL9"/>
+                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW" values="EVSYS_CHANNEL9"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW"
-                          size="1">
+                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 19 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - EVOUTG" initval="0x00" name="USEREVSYSEVOUTG" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 20 - EVOUTG" initval="0x00" name="USEREVSYSEVOUTG" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
                 <register caption="User 13 - PTC" initval="0x00" name="USERPTCSTART" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 29 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3D" rw="RW"
-                          size="1">
+                <register caption="User 29 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 37 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x45" rw="RW"
-                          size="1">
+                <register caption="User 37 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x45" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 38 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x46" rw="RW"
-                          size="1">
+                <register caption="User 38 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x46" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 39 - TCB4 Event A" initval="0x00" name="USERTCB4CAPT" offset="0x47" rw="RW"
-                          size="1">
+                <register caption="User 39 - TCB4 Event A" initval="0x00" name="USERTCB4CAPT" offset="0x47" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCB4 Event B" initval="0x00" name="USERTCB4COUNT" offset="0x48" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCB4 Event B" initval="0x00" name="USERTCB4COUNT" offset="0x48" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 24 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x38" rw="RW"
-                          size="1">
+                <register caption="User 24 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x38" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 25 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x39" rw="RW"
-                          size="1">
+                <register caption="User 25 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x39" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - USART5" initval="0x00" name="USERUSART5IRDA" offset="0x3A" rw="RW"
-                          size="1">
+                <register caption="User 26 - USART5" initval="0x00" name="USERUSART5IRDA" offset="0x3A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1882,17 +1753,12 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1906,12 +1772,9 @@
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -1962,15 +1825,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1983,15 +1842,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2046,15 +1901,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2067,15 +1918,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2126,15 +1973,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2147,15 +1990,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2197,15 +2036,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2218,15 +2053,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2276,15 +2107,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2297,15 +2124,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2352,15 +2175,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2373,15 +2192,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2424,15 +2239,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2445,15 +2256,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2496,15 +2303,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2517,15 +2320,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2560,15 +2359,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2581,15 +2376,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2631,13 +2422,10 @@
         <module caption="Fuses" id="avrda" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -2648,24 +2436,21 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x00" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -2691,8 +2476,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2769,8 +2553,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2817,10 +2600,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_v6_port" name="PORT">
@@ -2912,18 +2693,12 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
-                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW"
-                              values="PORTMUX_LUT4"/>
-                    <bitfield caption="CCL Look-Up Table 5 Signals" mask="0x20" name="LUT5" rw="RW"
-                              values="PORTMUX_LUT5"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW" values="PORTMUX_LUT4"/>
+                    <bitfield caption="CCL Look-Up Table 5 Signals" mask="0x20" name="LUT5" rw="RW" values="PORTMUX_LUT5"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2967,12 +2742,9 @@
                     <bitfield caption="USART5 Signals" mask="0xc" name="USART5" rw="RW" values="PORTMUX_USART5"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
-                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW"
-                              values="PORTMUX_ZCD1"/>
-                    <bitfield caption="Zero Cross Detector 2 Output" mask="0x4" name="ZCD2" rw="RW"
-                              values="PORTMUX_ZCD2"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW" values="PORTMUX_ZCD1"/>
+                    <bitfield caption="Zero Cross Detector 2 Output" mask="0x4" name="ZCD2" rw="RW" values="PORTMUX_ZCD2"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -3195,12 +2967,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -3292,8 +3062,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -3389,8 +3158,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -3508,8 +3276,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -3545,13 +3312,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -3645,18 +3410,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -3799,17 +3561,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -3824,12 +3583,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -3841,10 +3597,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -3947,17 +3701,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3972,19 +3723,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -4007,8 +3754,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -4026,8 +3772,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB28.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB28.xml
index 2083ca34..28d8e3c0 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB28.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB28.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR64DB28" package="SOIC28" pinout="SOIC28" speedmax="32000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR64DB28" package="SOIC28" pinout="SOIC28" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR64DB28" family="AVR8" architecture="AVR8X" avr-family="AVR DB">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x2000" start="0x6000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x10000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -93,8 +84,7 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
@@ -102,8 +92,7 @@
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -153,16 +142,11 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
                     </signals>
                 </instance>
             </module>
@@ -351,8 +335,7 @@
                     <signals>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
@@ -528,28 +511,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -559,8 +537,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -623,10 +600,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -646,12 +621,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -786,23 +759,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -873,44 +841,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -935,14 +891,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -1051,17 +1003,14 @@
                 </register>
                 <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Enable" mask="0x1" name="CFDEN" rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                     <bitfield caption="Clock Failure Detect Test" mask="0x2" name="CFDTST" rw="W"/>
                 </register>
-                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x1" name="CFD" rw="RW"/>
                     <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x1" name="CFD" rw="RW"/>
                 </register>
                 <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
@@ -1149,8 +1098,7 @@
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
                 <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF" value="0x1"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -1176,12 +1124,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1"/>
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1"/>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
                 <register caption="Stack Pointer Low" initval="0xFF" name="SPL" offset="0xD" rw="RW" size="1"/>
                 <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
@@ -1207,12 +1153,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1258,174 +1202,132 @@
         <module caption="Event System" id="chip" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW"
-                          size="1">
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B"
-                          rw="RW" size="1">
+                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW"
-                          size="1">
+                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW"
-                          size="1">
+                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F"
-                          rw="RW" size="1">
+                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW"
-                          size="1">
+                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW"
-                          size="1">
+                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW"
-                          size="1">
+                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW"
-                          size="1">
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1463,15 +1365,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1517,15 +1415,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1574,15 +1468,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1631,15 +1521,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1680,15 +1566,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1729,15 +1611,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1775,15 +1653,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1821,15 +1695,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1866,13 +1736,10 @@
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1883,26 +1750,22 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1928,8 +1791,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2023,8 +1885,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2071,10 +1932,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="Operational Amplifier System" id="amp_opamp_ctrl_avr_v1" name="OPAMP">
@@ -2094,19 +1953,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP0_MUXPOS"/>
+                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP0_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12"
-                          rw="RW" size="1">
+                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 0 Settle" initval="0x00" name="OP0SETTLE" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2123,19 +1977,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP1_MUXPOS"/>
+                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP1_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A"
-                          rw="RW" size="1">
+                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 1 Settle" initval="0x00" name="OP1SETTLE" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2301,14 +2150,10 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2340,8 +2185,7 @@
                     <bitfield caption="USART2 Signals" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -2501,12 +2345,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2598,8 +2440,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2695,8 +2536,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2814,8 +2654,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2851,13 +2690,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2950,18 +2787,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -3104,17 +2938,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -3129,12 +2960,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -3146,10 +2974,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -3252,17 +3078,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3277,19 +3100,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3312,8 +3131,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3331,8 +3149,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB32.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB32.xml
index 83f6d4d7..f138574e 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB32.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB32.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR64DB32" package="QFN32" pinout="QFN32" speedmax="32000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR64DB32" package="QFN32" pinout="QFN32" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR64DB32" family="AVR8" architecture="AVR8X" avr-family="AVR DB">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x2000" start="0x6000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x10000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -97,8 +88,7 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
@@ -106,8 +96,7 @@
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -159,18 +148,12 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -369,14 +352,11 @@
                     <signals>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
                 </instance>
@@ -563,28 +543,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -594,8 +569,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -658,10 +632,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -681,12 +653,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -821,23 +791,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -908,44 +873,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -970,14 +923,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -1086,17 +1035,14 @@
                 </register>
                 <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Enable" mask="0x1" name="CFDEN" rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                     <bitfield caption="Clock Failure Detect Test" mask="0x2" name="CFDTST" rw="W"/>
                 </register>
-                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x1" name="CFD" rw="RW"/>
                     <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x1" name="CFD" rw="RW"/>
                 </register>
                 <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
@@ -1184,8 +1130,7 @@
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
                 <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF" value="0x1"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -1211,12 +1156,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1"/>
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1"/>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
                 <register caption="Stack Pointer Low" initval="0xFF" name="SPL" offset="0xD" rw="RW" size="1"/>
                 <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
@@ -1242,12 +1185,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1293,174 +1234,132 @@
         <module caption="Event System" id="chip" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW"
-                          size="1">
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B"
-                          rw="RW" size="1">
+                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW"
-                          size="1">
+                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW"
-                          size="1">
+                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F"
-                          rw="RW" size="1">
+                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW"
-                          size="1">
+                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW"
-                          size="1">
+                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW"
-                          size="1">
+                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW"
-                          size="1">
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1498,15 +1397,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1552,15 +1447,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1609,15 +1500,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1666,15 +1553,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1715,15 +1598,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1768,15 +1647,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1818,15 +1693,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1864,15 +1735,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1909,13 +1776,10 @@
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1926,26 +1790,22 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1971,8 +1831,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2066,8 +1925,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2114,10 +1972,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="Operational Amplifier System" id="amp_opamp_ctrl_avr_v1" name="OPAMP">
@@ -2137,19 +1993,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP0_MUXPOS"/>
+                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP0_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12"
-                          rw="RW" size="1">
+                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 0 Settle" initval="0x00" name="OP0SETTLE" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2166,19 +2017,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP1_MUXPOS"/>
+                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP1_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A"
-                          rw="RW" size="1">
+                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 1 Settle" initval="0x00" name="OP1SETTLE" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2344,14 +2190,10 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2384,8 +2226,7 @@
                     <bitfield caption="USART2 Signals" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -2550,12 +2391,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2647,8 +2486,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2744,8 +2582,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2863,8 +2700,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2900,13 +2736,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2999,18 +2833,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -3153,17 +2984,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -3178,12 +3006,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -3195,10 +3020,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -3301,17 +3124,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -3326,19 +3146,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3361,8 +3177,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3380,8 +3195,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB48.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB48.xml
index 22afbcca..efaec1a5 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB48.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB48.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR64DB48" package="QFN48" pinout="QFN48" speedmax="32000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR64DB48" package="QFN48" pinout="QFN48" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR64DB48" family="AVR8" architecture="AVR8X" avr-family="AVR DB">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x2000" start="0x6000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x10000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -111,20 +102,17 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="2" pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
-                                pad="PC6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -180,24 +168,15 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2" pad="PC7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4" pad="PE2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -470,15 +449,12 @@
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOA" pad="PB4"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOB" index="1" pad="PB5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
                 </instance>
@@ -735,28 +711,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -766,8 +737,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -830,10 +800,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -853,12 +821,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -993,23 +959,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -1094,64 +1055,46 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 4 Control B" initval="0x00" name="LUT4CTRLB" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 5 Control B" initval="0x00" name="LUT5CTRLB" offset="0x1d" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 4 Control C" initval="0x00" name="LUT4CTRLC" offset="0x1a" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 5 Control C" initval="0x00" name="LUT5CTRLC" offset="0x1e" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -1185,20 +1128,14 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Control 1" initval="0x00" name="INTCTRL1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW"
-                              values="CCL_INTMODE4"/>
-                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW"
-                              values="CCL_INTMODE5"/>
+                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW" values="CCL_INTMODE4"/>
+                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW" values="CCL_INTMODE5"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x3f" name="INT" rw="RW"/>
@@ -1324,17 +1261,14 @@
                 </register>
                 <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Enable" mask="0x1" name="CFDEN" rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                     <bitfield caption="Clock Failure Detect Test" mask="0x2" name="CFDTST" rw="W"/>
                 </register>
-                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x1" name="CFD" rw="RW"/>
                     <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x1" name="CFD" rw="RW"/>
                 </register>
                 <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
@@ -1422,8 +1356,7 @@
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
                 <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF" value="0x1"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -1449,12 +1382,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1"/>
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1"/>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
                 <register caption="Stack Pointer Low" initval="0xFF" name="SPL" offset="0xD" rw="RW" size="1"/>
                 <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
@@ -1480,12 +1411,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1531,250 +1460,189 @@
         <module caption="Event System" id="chip" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Multiplexer Channel 8" initval="0x00" name="CHANNEL8" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW"
-                              values="EVSYS_CHANNEL8"/>
+                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW" values="EVSYS_CHANNEL8"/>
                 </register>
                 <register caption="Multiplexer Channel 9" initval="0x00" name="CHANNEL9" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW"
-                              values="EVSYS_CHANNEL9"/>
+                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW" values="EVSYS_CHANNEL9"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW"
-                          size="1">
+                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW"
-                          size="1">
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B"
-                          rw="RW" size="1">
+                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW"
-                          size="1">
+                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW"
-                          size="1">
+                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F"
-                          rw="RW" size="1">
+                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW"
-                          size="1">
+                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW"
-                          size="1">
+                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW"
-                          size="1">
+                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 51 - OPAMP2 Disable" initval="0x00" name="USEROPAMP2DISABLE" offset="0x53"
-                          rw="RW" size="1">
+                <register caption="User 51 - OPAMP2 Disable" initval="0x00" name="USEROPAMP2DISABLE" offset="0x53" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 53 - OPAMP2 Drive" initval="0x00" name="USEROPAMP2DRIVE" offset="0x55" rw="RW"
-                          size="1">
+                <register caption="User 53 - OPAMP2 Drive" initval="0x00" name="USEROPAMP2DRIVE" offset="0x55" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 52 - OPAMP2 Dump" initval="0x00" name="USEROPAMP2DUMP" offset="0x54" rw="RW"
-                          size="1">
+                <register caption="User 52 - OPAMP2 Dump" initval="0x00" name="USEROPAMP2DUMP" offset="0x54" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 50 - OPAMP2 Enable" initval="0x00" name="USEROPAMP2ENABLE" offset="0x52" rw="RW"
-                          size="1">
+                <register caption="User 50 - OPAMP2 Enable" initval="0x00" name="USEROPAMP2ENABLE" offset="0x52" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW"
-                          size="1">
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 29 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3D" rw="RW"
-                          size="1">
+                <register caption="User 29 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 37 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x45" rw="RW"
-                          size="1">
+                <register caption="User 37 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x45" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 24 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x38" rw="RW"
-                          size="1">
+                <register caption="User 24 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x38" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1812,15 +1680,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1833,15 +1697,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
@@ -1890,15 +1750,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1911,15 +1767,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
@@ -1971,15 +1823,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1992,15 +1840,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x44"/>
@@ -2051,15 +1895,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2072,15 +1912,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x44"/>
@@ -2123,15 +1959,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2144,15 +1976,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port E Pin 0" name="PORTE_PIN0" value="0x40"/>
@@ -2198,15 +2026,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2219,15 +2043,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Port E Pin 0" name="PORTE_PIN0" value="0x40"/>
@@ -2270,15 +2090,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2291,15 +2107,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="OPAMP2 Ready" name="OPAMP2_READY" value="0x36"/>
@@ -2334,15 +2146,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2355,15 +2163,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="OPAMP2 Ready" name="OPAMP2_READY" value="0x36"/>
@@ -2398,15 +2202,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2419,15 +2219,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="OPAMP2 Ready" name="OPAMP2_READY" value="0x36"/>
@@ -2464,15 +2260,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2483,15 +2275,11 @@
                 <value caption="Timer/Counter D0 event 1" name="TCD0_CMPASET" value="0xB1"/>
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="OPAMP2 Ready" name="OPAMP2_READY" value="0x36"/>
@@ -2531,13 +2319,10 @@
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -2548,26 +2333,22 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -2593,8 +2374,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2688,8 +2468,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2736,10 +2515,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="Operational Amplifier System" id="amp_opamp_ctrl_avr_v1" name="OPAMP">
@@ -2759,19 +2536,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP0_MUXPOS"/>
+                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP0_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12"
-                          rw="RW" size="1">
+                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 0 Settle" initval="0x00" name="OP0SETTLE" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2788,19 +2560,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP1_MUXPOS"/>
+                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP1_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A"
-                          rw="RW" size="1">
+                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 1 Settle" initval="0x00" name="OP1SETTLE" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2817,19 +2584,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 2 Input Multiplexer" initval="0x00" name="OP2INMUX" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP2_MUXPOS"/>
+                <register caption="Op Amp 2 Input Multiplexer" initval="0x00" name="OP2INMUX" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP2_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 2 Resistor Ladder Multiplexer" initval="0x00" name="OP2RESMUX" offset="0x22"
-                          rw="RW" size="1">
+                <register caption="Op Amp 2 Resistor Ladder Multiplexer" initval="0x00" name="OP2RESMUX" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 2 Settle" initval="0x00" name="OP2SETTLE" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -3004,18 +2766,12 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
-                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW"
-                              values="PORTMUX_LUT4"/>
-                    <bitfield caption="CCL Look-Up Table 5 Signals" mask="0x20" name="LUT5" rw="RW"
-                              values="PORTMUX_LUT5"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW" values="PORTMUX_LUT4"/>
+                    <bitfield caption="CCL Look-Up Table 5 Signals" mask="0x20" name="LUT5" rw="RW" values="PORTMUX_LUT5"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -3056,12 +2812,9 @@
                     <bitfield caption="USART4 Signals" mask="0x3" name="USART4" rw="RW" values="PORTMUX_USART4"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
-                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW"
-                              values="PORTMUX_ZCD1"/>
-                    <bitfield caption="Zero Cross Detector 2 Output" mask="0x4" name="ZCD2" rw="RW"
-                              values="PORTMUX_ZCD2"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW" values="PORTMUX_ZCD1"/>
+                    <bitfield caption="Zero Cross Detector 2 Output" mask="0x4" name="ZCD2" rw="RW" values="PORTMUX_ZCD2"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -3270,12 +3023,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -3367,8 +3118,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -3464,8 +3214,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -3583,8 +3332,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -3620,13 +3368,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -3720,18 +3466,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -3874,17 +3617,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -3899,12 +3639,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -3916,10 +3653,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -4022,17 +3757,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -4047,19 +3779,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -4082,8 +3810,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -4101,8 +3828,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB64.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB64.xml
index 7dacb886..9abeb549 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB64.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB64.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR64DB64" package="QFN64" pinout="QFN64" speedmax="32000000" tempmax="125" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR64DB64" package="QFN64" pinout="QFN64" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR64DB64" family="AVR8" architecture="AVR8X" avr-family="AVR DB">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0200" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x2000" start="0x6000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x10000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -115,20 +106,17 @@
                         <signal function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal function="CCL_IN" group="LUT1_IN" index="2" pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
-                                pad="PC6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL_IN" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL_IN" group="LUT3_IN" index="1" pad="PF1"/>
@@ -137,14 +125,12 @@
                         <signal function="CCL_IN" group="LUT4_IN" index="0" pad="PB0"/>
                         <signal function="CCL_IN" group="LUT4_IN" index="1" pad="PB1"/>
                         <signal function="CCL_IN" group="LUT4_IN" index="2" pad="PB2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT4" function="CCL_ALT" group="LUT4_OUT" index="0"
-                                pad="PB6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT4" function="CCL_ALT" group="LUT4_OUT" index="0" pad="PB6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT4" function="CCL" group="LUT4_OUT" index="0" pad="PB3"/>
                         <signal function="CCL_IN" group="LUT5_IN" index="0" pad="PG0"/>
                         <signal function="CCL_IN" group="LUT5_IN" index="1" pad="PG1"/>
                         <signal function="CCL_IN" group="LUT5_IN" index="2" pad="PG2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT5" function="CCL_ALT" group="LUT5_OUT" index="0"
-                                pad="PG6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT5" function="CCL_ALT" group="LUT5_OUT" index="0" pad="PG6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT5" function="CCL" group="LUT5_OUT" index="0" pad="PG3"/>
                     </signals>
                 </instance>
@@ -192,32 +178,19 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS_ALT" group="EVOUT" index="1"
-                                pad="PB7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS_ALT" group="EVOUT" index="4"
-                                pad="PE7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS_ALT" group="EVOUT" index="6"
-                                pad="PG7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS" group="EVOUT" index="6"
-                                pad="PG2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS_ALT" group="EVOUT" index="1" pad="PB7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2" pad="PC7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS_ALT" group="EVOUT" index="4" pad="PE7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4" pad="PE2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS_ALT" group="EVOUT" index="6" pad="PG7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTG" function="EVSYS" group="EVOUT" index="6" pad="PG2"/>
                     </signals>
                 </instance>
             </module>
@@ -540,22 +513,16 @@
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOA" pad="PB4"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOB" index="1"
-                                pad="PG5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOB" index="1" pad="PG5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOB" index="1" pad="PB5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOC" index="2"
-                                pad="PG6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOC" index="2" pad="PG6"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOC" index="2" pad="PB6"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOD" index="3"
-                                pad="PG7"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT3" group="WOD" index="3" pad="PG7"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT" group="WOD" index="3" pad="PB7"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
@@ -843,28 +810,23 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_WINDOW_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                     </mode>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
                     <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
-                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R"
-                              values="AC_WINSTATE"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xc0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -874,8 +836,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -938,10 +899,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -961,12 +920,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -1101,23 +1058,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -1202,64 +1154,46 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 4 Control B" initval="0x00" name="LUT4CTRLB" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 5 Control B" initval="0x00" name="LUT5CTRLB" offset="0x1d" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 4 Control C" initval="0x00" name="LUT4CTRLC" offset="0x1a" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 5 Control C" initval="0x00" name="LUT5CTRLC" offset="0x1e" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -1293,20 +1227,14 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Control 1" initval="0x00" name="INTCTRL1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW"
-                              values="CCL_INTMODE4"/>
-                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW"
-                              values="CCL_INTMODE5"/>
+                    <bitfield caption="Interrupt Mode for LUT4" mask="0x3" name="INTMODE4" rw="RW" values="CCL_INTMODE4"/>
+                    <bitfield caption="Interrupt Mode for LUT5" mask="0xc" name="INTMODE5" rw="RW" values="CCL_INTMODE5"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x3f" name="INT" rw="RW"/>
@@ -1432,17 +1360,14 @@
                 </register>
                 <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Enable" mask="0x1" name="CFDEN" rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                     <bitfield caption="Clock Failure Detect Test" mask="0x2" name="CFDTST" rw="W"/>
                 </register>
-                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x1" name="CFD" rw="RW"/>
                     <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x1" name="CFD" rw="RW"/>
                 </register>
                 <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
@@ -1530,8 +1455,7 @@
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
                 <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF" value="0x1"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -1557,12 +1481,10 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW"
-                          size="1"/>
+                <register caption="Extended Z-pointer Register" initval="0x00" name="RAMPZ" offset="0xB" rw="RW" size="1"/>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
                 <register caption="Stack Pointer Low" initval="0xFF" name="SPL" offset="0xD" rw="RW" size="1"/>
                 <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
@@ -1588,12 +1510,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1639,266 +1559,201 @@
         <module caption="Event System" id="chip" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW"
-                              values="EVSYS_CHANNEL6"/>
+                    <bitfield caption="Channel 6 generator select" mask="0xff" name="CHANNEL6" rw="RW" values="EVSYS_CHANNEL6"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW"
-                              values="EVSYS_CHANNEL7"/>
+                    <bitfield caption="Channel 7 generator select" mask="0xff" name="CHANNEL7" rw="RW" values="EVSYS_CHANNEL7"/>
                 </register>
                 <register caption="Multiplexer Channel 8" initval="0x00" name="CHANNEL8" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW"
-                              values="EVSYS_CHANNEL8"/>
+                    <bitfield caption="Channel 8 generator select" mask="0xff" name="CHANNEL8" rw="RW" values="EVSYS_CHANNEL8"/>
                 </register>
                 <register caption="Multiplexer Channel 9" initval="0x00" name="CHANNEL9" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW"
-                              values="EVSYS_CHANNEL9"/>
+                    <bitfield caption="Channel 9 generator select" mask="0xff" name="CHANNEL9" rw="RW" values="EVSYS_CHANNEL9"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW"
-                          size="1">
+                <register caption="User 8 - CCL4 Event A" initval="0x00" name="USERCCLLUT4A" offset="0x28" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User 9 - CCL4 Event B" initval="0x00" name="USERCCLLUT4B" offset="0x29" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User 10 - CCL5 Event A" initval="0x00" name="USERCCLLUT5A" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User 11 - CCL5 Event B" initval="0x00" name="USERCCLLUT5B" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW"
-                          size="1">
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 14 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 14 - EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 17 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 17 - EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 19 - EVOUTG" initval="0x00" name="USEREVSYSEVOUTG" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 19 - EVOUTG" initval="0x00" name="USEREVSYSEVOUTG" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B"
-                          rw="RW" size="1">
+                <register caption="User 43 - OPAMP0 Disable" initval="0x00" name="USEROPAMP0DISABLE" offset="0x4B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW"
-                          size="1">
+                <register caption="User 45 - OPAMP0 Drive" initval="0x00" name="USEROPAMP0DRIVE" offset="0x4D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW"
-                          size="1">
+                <register caption="User 44 - OPAMP0 Dump" initval="0x00" name="USEROPAMP0DUMP" offset="0x4C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW"
-                          size="1">
+                <register caption="User 42 - OPAMP0 Enable" initval="0x00" name="USEROPAMP0ENABLE" offset="0x4A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F"
-                          rw="RW" size="1">
+                <register caption="User 47 - OPAMP1 Disable" initval="0x00" name="USEROPAMP1DISABLE" offset="0x4F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW"
-                          size="1">
+                <register caption="User 49 - OPAMP1 Drive" initval="0x00" name="USEROPAMP1DRIVE" offset="0x51" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW"
-                          size="1">
+                <register caption="User 48 - OPAMP1 Dump" initval="0x00" name="USEROPAMP1DUMP" offset="0x50" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW"
-                          size="1">
+                <register caption="User 46 - OPAMP1 Enable" initval="0x00" name="USEROPAMP1ENABLE" offset="0x4E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 51 - OPAMP2 Disable" initval="0x00" name="USEROPAMP2DISABLE" offset="0x53"
-                          rw="RW" size="1">
+                <register caption="User 51 - OPAMP2 Disable" initval="0x00" name="USEROPAMP2DISABLE" offset="0x53" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 53 - OPAMP2 Drive" initval="0x00" name="USEROPAMP2DRIVE" offset="0x55" rw="RW"
-                          size="1">
+                <register caption="User 53 - OPAMP2 Drive" initval="0x00" name="USEROPAMP2DRIVE" offset="0x55" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 52 - OPAMP2 Dump" initval="0x00" name="USEROPAMP2DUMP" offset="0x54" rw="RW"
-                          size="1">
+                <register caption="User 52 - OPAMP2 Dump" initval="0x00" name="USEROPAMP2DUMP" offset="0x54" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 50 - OPAMP2 Enable" initval="0x00" name="USEROPAMP2ENABLE" offset="0x52" rw="RW"
-                          size="1">
+                <register caption="User 50 - OPAMP2 Enable" initval="0x00" name="USEROPAMP2ENABLE" offset="0x52" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW"
-                          size="1">
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x3A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x3B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 28 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3C" rw="RW"
-                          size="1">
+                <register caption="User 28 - TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x3C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 29 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3D" rw="RW"
-                          size="1">
+                <register caption="User 29 - TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x3D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x3E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x3F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x40" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x41" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x42" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x43" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 36 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x44" rw="RW"
-                          size="1">
+                <register caption="User 36 - TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x44" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 37 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x45" rw="RW"
-                          size="1">
+                <register caption="User 37 - TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x45" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 38 - TCB4 Event A" initval="0x00" name="USERTCB4CAPT" offset="0x46" rw="RW"
-                          size="1">
+                <register caption="User 38 - TCB4 Event A" initval="0x00" name="USERTCB4CAPT" offset="0x46" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 39 - TCB4 Event B" initval="0x00" name="USERTCB4COUNT" offset="0x47" rw="RW"
-                          size="1">
+                <register caption="User 39 - TCB4 Event B" initval="0x00" name="USERTCB4COUNT" offset="0x47" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x48" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x49" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 22 - USART2" initval="0x00" name="USERUSART2IRDA" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 23 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 23 - USART3" initval="0x00" name="USERUSART3IRDA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 24 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x38" rw="RW"
-                          size="1">
+                <register caption="User 24 - USART4" initval="0x00" name="USERUSART4IRDA" offset="0x38" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 25 - USART5" initval="0x00" name="USERUSART5IRDA" offset="0x39" rw="RW"
-                          size="1">
+                <register caption="User 25 - USART5" initval="0x00" name="USERUSART5IRDA" offset="0x39" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1936,15 +1791,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1957,15 +1808,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2019,15 +1866,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2040,15 +1883,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2105,15 +1944,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2126,15 +1961,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2188,15 +2019,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2209,15 +2036,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2263,15 +2086,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2284,15 +2103,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2345,15 +2160,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2366,15 +2177,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2424,15 +2231,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2445,15 +2248,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2499,15 +2298,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2520,15 +2315,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2574,15 +2365,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2595,15 +2382,11 @@
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
                 <value caption="Zero Cross Detect 1 out" name="ZCD1" value="0x31"/>
                 <value caption="Zero Cross Detect 2 out" name="ZCD2" value="0x32"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2643,15 +2426,11 @@
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
                 <value caption="SPI 1 SCK" name="SPI1_SCK" value="0x69"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -2662,15 +2441,11 @@
                 <value caption="Timer/Counter D0 event 1" name="TCD0_CMPASET" value="0xB1"/>
                 <value caption="Timer/Counter D0 event 2" name="TCD0_CMPBSET" value="0xB2"/>
                 <value caption="Timer/Counter D0 event 3" name="TCD0_PROGEV" value="0xB3"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF"
-                       value="0x88"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
                 <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
                 <value caption="Timer/Counter B3 overflow" name="TCB3_OVF" value="0xA7"/>
                 <value caption="Timer/Counter B4 capture" name="TCB4_CAPT" value="0xA8"/>
@@ -2713,13 +2488,10 @@
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -2730,26 +2502,22 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -2775,8 +2543,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -2870,8 +2637,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -2918,10 +2684,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="Operational Amplifier System" id="amp_opamp_ctrl_avr_v1" name="OPAMP">
@@ -2941,19 +2705,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP0_MUXPOS"/>
+                <register caption="Op Amp 0 Input Multiplexer" initval="0x00" name="OP0INMUX" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP0_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12"
-                          rw="RW" size="1">
+                <register caption="Op Amp 0 Resistor Ladder Multiplexer" initval="0x00" name="OP0RESMUX" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 0 Settle" initval="0x00" name="OP0SETTLE" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2970,19 +2729,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP1_MUXPOS"/>
+                <register caption="Op Amp 1 Input Multiplexer" initval="0x00" name="OP1INMUX" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP1_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A"
-                          rw="RW" size="1">
+                <register caption="Op Amp 1 Resistor Ladder Multiplexer" initval="0x00" name="OP1RESMUX" offset="0x1A" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 1 Settle" initval="0x00" name="OP1SETTLE" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -2999,19 +2753,14 @@
                     <bitfield caption="Output Mode" mask="0xc" name="OUTMODE" rw="RW" values="OPAMP_OUTMODE"/>
                     <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTBY" rw="RW"/>
                 </register>
-                <register caption="Op Amp 2 Input Multiplexer" initval="0x00" name="OP2INMUX" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW"
-                              values="OPAMP_MUXNEG"/>
-                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW"
-                              values="OPAMP_OP2_MUXPOS"/>
+                <register caption="Op Amp 2 Input Multiplexer" initval="0x00" name="OP2INMUX" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Negative Input Multiplexer" mask="0x70" name="MUXNEG" rw="RW" values="OPAMP_MUXNEG"/>
+                    <bitfield caption="Positive Input Multiplexer" mask="0x7" name="MUXPOS" rw="RW" values="OPAMP_OP2_MUXPOS"/>
                 </register>
-                <register caption="Op Amp 2 Resistor Ladder Multiplexer" initval="0x00" name="OP2RESMUX" offset="0x22"
-                          rw="RW" size="1">
+                <register caption="Op Amp 2 Resistor Ladder Multiplexer" initval="0x00" name="OP2RESMUX" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Multiplexer Bottom" mask="0x1c" name="MUXBOT" rw="RW" values="OPAMP_MUXBOT"/>
                     <bitfield caption="Multiplexer Top" mask="0x3" name="MUXTOP" rw="RW" values="OPAMP_MUXTOP"/>
-                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW"
-                              values="OPAMP_MUXWIP"/>
+                    <bitfield caption="Multiplexer Wiper selector" mask="0xe0" name="MUXWIP" rw="RW" values="OPAMP_MUXWIP"/>
                 </register>
                 <register caption="Op Amp 2 Settle" initval="0x00" name="OP2SETTLE" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Settle Time" mask="0x7f" name="SETTLE" rw="RW"/>
@@ -3186,18 +2935,12 @@
                     <bitfield caption="Analog Comparator 2 Output" mask="0x4" name="AC2" rw="RW" values="PORTMUX_AC2"/>
                 </register>
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
-                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW"
-                              values="PORTMUX_LUT4"/>
-                    <bitfield caption="CCL Look-Up Table 5 Signals" mask="0x20" name="LUT5" rw="RW"
-                              values="PORTMUX_LUT5"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 4 Signals" mask="0x10" name="LUT4" rw="RW" values="PORTMUX_LUT4"/>
+                    <bitfield caption="CCL Look-Up Table 5 Signals" mask="0x20" name="LUT5" rw="RW" values="PORTMUX_LUT5"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -3241,12 +2984,9 @@
                     <bitfield caption="USART5 Signals" mask="0xc" name="USART5" rw="RW" values="PORTMUX_USART5"/>
                 </register>
                 <register caption="ZCD route A" initval="0x00" name="ZCDROUTEA" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW"
-                              values="PORTMUX_ZCD0"/>
-                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW"
-                              values="PORTMUX_ZCD1"/>
-                    <bitfield caption="Zero Cross Detector 2 Output" mask="0x4" name="ZCD2" rw="RW"
-                              values="PORTMUX_ZCD2"/>
+                    <bitfield caption="Zero Cross Detector 0 Output" mask="0x1" name="ZCD0" rw="RW" values="PORTMUX_ZCD0"/>
+                    <bitfield caption="Zero Cross Detector 1 Output" mask="0x2" name="ZCD1" rw="RW" values="PORTMUX_ZCD1"/>
+                    <bitfield caption="Zero Cross Detector 2 Output" mask="0x4" name="ZCD2" rw="RW" values="PORTMUX_ZCD2"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -3468,12 +3208,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -3565,8 +3303,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -3662,8 +3399,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -3781,8 +3517,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -3818,13 +3553,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -3918,18 +3651,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -4072,17 +3802,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -4097,12 +3824,9 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -4114,10 +3838,8 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW"
-                                  values="TWI_DEFAULT_INPUTLVL"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="Input Voltage Transition Level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_DEFAULT_INPUTLVL"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Host Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -4220,17 +3942,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -4245,19 +3964,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -4280,8 +3995,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -4299,8 +4013,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD14.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD14.xml
index 5fc8b031..348d5dd2 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD14.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD14.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR64DD14" package="SOIC14" pinout="SOIC14MVIO" speedmax="32000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR64DD14" package="SOIC14" pinout="SOIC14MVIO" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR64DD14" family="AVR8" architecture="AVR8X" avr-family="AVR DD">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x2000" start="0x6000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x10000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -64,21 +55,16 @@
                 <instance name="CCL">
                     <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
                     <signals>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0"
-                                pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1"
-                                pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1"
-                                pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2" pad="PC2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0" pad="PD6"/>
                     </signals>
                 </instance>
             </module>
@@ -124,12 +110,9 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
@@ -274,10 +257,8 @@
                 <instance name="TCD0">
                     <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0B80"/>
                     <signals>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3"
-                                pad="PD5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2" pad="PD4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3" pad="PD5"/>
                     </signals>
                 </instance>
             </module>
@@ -435,18 +416,15 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW"/>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
@@ -460,8 +438,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -508,10 +485,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -531,12 +506,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -671,23 +644,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -758,44 +726,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -820,14 +776,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -938,17 +890,14 @@
                 </register>
                 <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Enable" mask="0x1" name="CFDEN" rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                     <bitfield caption="Clock Failure Detect Test" mask="0x2" name="CFDTST" rw="W"/>
                 </register>
-                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x1" name="CFD" rw="RW"/>
                     <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x1" name="CFD" rw="RW"/>
                 </register>
                 <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
@@ -1036,8 +985,7 @@
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
                 <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF" value="0x1"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -1063,8 +1011,7 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1092,12 +1039,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1143,134 +1088,102 @@
         <module caption="Event System" id="chip" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW"
-                          size="1">
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1296,15 +1209,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1338,15 +1247,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1385,15 +1290,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1432,15 +1333,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1474,15 +1371,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1516,15 +1409,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1563,13 +1452,10 @@
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1580,28 +1466,23 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
-                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW"
-                              values="FUSE_UPDIPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW" values="FUSE_UPDIPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1627,8 +1508,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -1726,8 +1606,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -1774,10 +1653,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_avr_v2_port" name="PORT">
@@ -1873,14 +1750,10 @@
         <module caption="Port Multiplexer" id="chip" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2045,12 +1918,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2142,8 +2013,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2239,8 +2109,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2358,8 +2227,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2395,13 +2263,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2494,18 +2360,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2648,17 +2511,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -2672,8 +2532,7 @@
             <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Fast-mode Plus Enable" mask="0x2" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
-                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                     <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
                     <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
                 </register>
@@ -2683,8 +2542,7 @@
                 <register caption="Dual Mode Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
                     <bitfield caption="Fast-mode Plus Enable" mask="0x2" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
-                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                     <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
                 </register>
                 <register caption="Host Address" initval="0x00" name="MADDR" offset="0x7" rw="RW" size="1">
@@ -2771,8 +2629,7 @@
             </value-group>
             <value-group caption="Debug Run select" name="TWI_DBGRUN">
                 <value caption="The peripheral is halted in Break Debug mode and ignores events" name="HALT" value="0"/>
-                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted"
-                       name="RUN" value="1"/>
+                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted" name="RUN" value="1"/>
             </value-group>
             <value-group caption="Inactive Bus Time-Out select" name="TWI_TIMEOUT">
                 <value caption="Bus time-out disabled. I2C." name="DISABLED" value="0"/>
@@ -2787,10 +2644,8 @@
             <value-group caption="Command select" name="TWI_MCMD">
                 <value caption="No action" name="NOACT" value="0"/>
                 <value caption="Execute Acknowledge Action followed by repeated Start." name="REPSTART" value="1"/>
-                <value caption="DIR=0: Execute Acknowledge Action followed by a byte read operation. DIR=1: Execute"
-                       name="RECVTRANS" value="2"/>
-                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP"
-                       value="3"/>
+                <value caption="DIR=0: Execute Acknowledge Action followed by a byte read operation. DIR=1: Execute" name="RECVTRANS" value="2"/>
+                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP" value="3"/>
             </value-group>
             <value-group caption="Bus State select" name="TWI_BUSSTATE">
                 <value caption="Unknown bus state" name="UNKNOWN" value="0"/>
@@ -2808,17 +2663,14 @@
                 <value caption="Address detection generated the interrupt on APIF flag" name="ADR" value="1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2833,19 +2685,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -2868,8 +2716,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2887,8 +2734,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD20.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD20.xml
index 0046a36a..c1521ab0 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD20.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD20.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR64DD20" package="QFN20" pinout="QFN20MVIO" speedmax="32000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR64DD20" package="QFN20" pinout="QFN20MVIO" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR64DD20" family="AVR8" architecture="AVR8X" avr-family="AVR DD">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x2000" start="0x6000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x10000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -71,27 +62,20 @@
                 <instance name="CCL">
                     <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
                     <signals>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0"
-                                pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1"
-                                pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="2"
-                                pad="PA2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="2" pad="PA2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1"
-                                pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2" pad="PC2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0" pad="PD6"/>
                     </signals>
                 </instance>
             </module>
@@ -138,16 +122,11 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT1" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT1" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
@@ -314,14 +293,11 @@
                     <signals>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOA" pad="PA4"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOB" index="1"
-                                pad="PA5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOB" index="1" pad="PA5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2"
-                                pad="PD4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2" pad="PD4"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3"
-                                pad="PD5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3" pad="PD5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
                 </instance>
@@ -493,18 +469,15 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW"/>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
@@ -518,8 +491,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -566,10 +538,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -589,12 +559,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -729,23 +697,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -816,44 +779,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -878,14 +829,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -996,17 +943,14 @@
                 </register>
                 <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Enable" mask="0x1" name="CFDEN" rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                     <bitfield caption="Clock Failure Detect Test" mask="0x2" name="CFDTST" rw="W"/>
                 </register>
-                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x1" name="CFD" rw="RW"/>
                     <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x1" name="CFD" rw="RW"/>
                 </register>
                 <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
@@ -1094,8 +1038,7 @@
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
                 <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF" value="0x1"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -1121,8 +1064,7 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1150,12 +1092,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1201,134 +1141,102 @@
         <module caption="Event System" id="chip" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW"
-                          size="1">
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1354,15 +1262,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1402,15 +1306,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1455,15 +1355,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1502,15 +1398,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1544,15 +1436,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1586,15 +1474,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1633,13 +1517,10 @@
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1650,28 +1531,23 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
-                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW"
-                              values="FUSE_UPDIPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW" values="FUSE_UPDIPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1697,8 +1573,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -1796,8 +1671,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -1844,10 +1718,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_avr_v2_port" name="PORT">
@@ -1943,14 +1815,10 @@
         <module caption="Port Multiplexer" id="chip" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2115,12 +1983,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2212,8 +2078,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2309,8 +2174,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2428,8 +2292,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2465,13 +2328,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2564,18 +2425,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2718,17 +2576,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -2742,8 +2597,7 @@
             <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Fast-mode Plus Enable" mask="0x2" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
-                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                     <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
                     <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
                 </register>
@@ -2753,8 +2607,7 @@
                 <register caption="Dual Mode Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
                     <bitfield caption="Fast-mode Plus Enable" mask="0x2" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
-                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                     <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
                 </register>
                 <register caption="Host Address" initval="0x00" name="MADDR" offset="0x7" rw="RW" size="1">
@@ -2841,8 +2694,7 @@
             </value-group>
             <value-group caption="Debug Run select" name="TWI_DBGRUN">
                 <value caption="The peripheral is halted in Break Debug mode and ignores events" name="HALT" value="0"/>
-                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted"
-                       name="RUN" value="1"/>
+                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted" name="RUN" value="1"/>
             </value-group>
             <value-group caption="Inactive Bus Time-Out select" name="TWI_TIMEOUT">
                 <value caption="Bus time-out disabled. I2C." name="DISABLED" value="0"/>
@@ -2857,10 +2709,8 @@
             <value-group caption="Command select" name="TWI_MCMD">
                 <value caption="No action" name="NOACT" value="0"/>
                 <value caption="Execute Acknowledge Action followed by repeated Start." name="REPSTART" value="1"/>
-                <value caption="DIR=0: Execute Acknowledge Action followed by a byte read operation. DIR=1: Execute"
-                       name="RECVTRANS" value="2"/>
-                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP"
-                       value="3"/>
+                <value caption="DIR=0: Execute Acknowledge Action followed by a byte read operation. DIR=1: Execute" name="RECVTRANS" value="2"/>
+                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP" value="3"/>
             </value-group>
             <value-group caption="Bus State select" name="TWI_BUSSTATE">
                 <value caption="Unknown bus state" name="UNKNOWN" value="0"/>
@@ -2878,17 +2728,14 @@
                 <value caption="Address detection generated the interrupt on APIF flag" name="ADR" value="1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2903,19 +2750,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -2938,8 +2781,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2957,8 +2799,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD28.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD28.xml
index 487eeac3..89c42cd3 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD28.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD28.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR64DD28" package="SOIC28" pinout="SOIC28MVIO" speedmax="32000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR64DD28" package="SOIC28" pinout="SOIC28MVIO" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR64DD28" family="AVR8" architecture="AVR8X" avr-family="AVR DD">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x2000" start="0x6000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x10000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -79,36 +70,26 @@
                 <instance name="CCL">
                     <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
                     <signals>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0"
-                                pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1"
-                                pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="2"
-                                pad="PA2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="2" pad="PA2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="0"
-                                pad="PC0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1"
-                                pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2" pad="PC2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="1"
-                                pad="PD1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="2"
-                                pad="PD2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="2" pad="PD2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
@@ -160,18 +141,12 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT1" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT1" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
@@ -356,16 +331,12 @@
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOA" pad="PA4"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOB" index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOB" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2"
-                                pad="PD4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2" pad="PD4"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3"
-                                pad="PD5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3" pad="PD5"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
                 </instance>
@@ -538,18 +509,15 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW"/>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
@@ -563,8 +531,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -611,10 +578,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -634,12 +599,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -774,23 +737,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -861,44 +819,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -923,14 +869,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -1041,17 +983,14 @@
                 </register>
                 <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Enable" mask="0x1" name="CFDEN" rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                     <bitfield caption="Clock Failure Detect Test" mask="0x2" name="CFDTST" rw="W"/>
                 </register>
-                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x1" name="CFD" rw="RW"/>
                     <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x1" name="CFD" rw="RW"/>
                 </register>
                 <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
@@ -1139,8 +1078,7 @@
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
                 <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF" value="0x1"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -1166,8 +1104,7 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1195,12 +1132,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1246,134 +1181,102 @@
         <module caption="Event System" id="chip" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW"
-                          size="1">
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1399,15 +1302,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1447,15 +1346,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1500,15 +1395,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1551,15 +1442,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1597,15 +1484,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1641,15 +1524,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1690,13 +1569,10 @@
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1707,28 +1583,23 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
-                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW"
-                              values="FUSE_UPDIPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW" values="FUSE_UPDIPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1754,8 +1625,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -1853,8 +1723,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -1901,10 +1770,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_avr_v2_port" name="PORT">
@@ -2000,14 +1867,10 @@
         <module caption="Port Multiplexer" id="chip" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2177,12 +2040,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2274,8 +2135,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2371,8 +2231,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2490,8 +2349,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2527,13 +2385,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2626,18 +2482,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2780,17 +2633,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -2804,8 +2654,7 @@
             <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Fast-mode Plus Enable" mask="0x2" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
-                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                     <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
                     <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
                 </register>
@@ -2815,8 +2664,7 @@
                 <register caption="Dual Mode Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
                     <bitfield caption="Fast-mode Plus Enable" mask="0x2" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
-                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                     <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
                 </register>
                 <register caption="Host Address" initval="0x00" name="MADDR" offset="0x7" rw="RW" size="1">
@@ -2903,8 +2751,7 @@
             </value-group>
             <value-group caption="Debug Run select" name="TWI_DBGRUN">
                 <value caption="The peripheral is halted in Break Debug mode and ignores events" name="HALT" value="0"/>
-                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted"
-                       name="RUN" value="1"/>
+                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted" name="RUN" value="1"/>
             </value-group>
             <value-group caption="Inactive Bus Time-Out select" name="TWI_TIMEOUT">
                 <value caption="Bus time-out disabled. I2C." name="DISABLED" value="0"/>
@@ -2919,10 +2766,8 @@
             <value-group caption="Command select" name="TWI_MCMD">
                 <value caption="No action" name="NOACT" value="0"/>
                 <value caption="Execute Acknowledge Action followed by repeated Start." name="REPSTART" value="1"/>
-                <value caption="DIR=0: Execute Acknowledge Action followed by a byte read operation. DIR=1: Execute"
-                       name="RECVTRANS" value="2"/>
-                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP"
-                       value="3"/>
+                <value caption="DIR=0: Execute Acknowledge Action followed by a byte read operation. DIR=1: Execute" name="RECVTRANS" value="2"/>
+                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP" value="3"/>
             </value-group>
             <value-group caption="Bus State select" name="TWI_BUSSTATE">
                 <value caption="Unknown bus state" name="UNKNOWN" value="0"/>
@@ -2940,17 +2785,14 @@
                 <value caption="Address detection generated the interrupt on APIF flag" name="ADR" value="1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2965,19 +2807,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3000,8 +2838,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3019,8 +2856,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD32.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD32.xml
index 142ab2c5..df1cf485 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD32.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DD32.xml
@@ -1,32 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR64DD32" package="QFN32" pinout="QFN32MVIO" speedmax="32000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="AVR64DD32" package="QFN32" pinout="QFN32MVIO" speedmax="32000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR64DD32" family="AVR8" architecture="AVR8X" avr-family="AVR DD">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x1" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x1" rw="RW" size="0x10" start="0x00001050" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x2000" start="0x6000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000"
-                                start="0x00008000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001080" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x1" rw="RW" size="0x4" start="0x00001040" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x200" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001080" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x10000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x200" rw="RW" size="0x10000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -83,36 +74,26 @@
                 <instance name="CCL">
                     <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
                     <signals>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0"
-                                pad="PA0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1"
-                                pad="PA1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="2"
-                                pad="PA2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_IN" index="2" pad="PA2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT1" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="0"
-                                pad="PC0"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1"
-                                pad="PC1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT1" group="LUT1_IN" index="2" pad="PC2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="1"
-                                pad="PD1"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="2"
-                                pad="PD2"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_IN" index="2" pad="PD2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT1" group="LUT2_OUT" index="0" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
@@ -166,20 +147,13 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT1" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5"
-                                pad="PF7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT1" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT1" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS_ALT1" group="EVOUT" index="5" pad="PF7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -374,20 +348,14 @@
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOA" pad="PA4"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOA" pad="PF0"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOA" pad="PA4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOB" index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1"
-                                pad="PF1"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOB" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOB" index="1" pad="PF1"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOB" index="1" pad="PA5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOC" index="2" pad="PD4"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOC" index="2" pad="PF2"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOC" index="2" pad="PA6"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT4" group="WOD" index="3" pad="PD5"/>
+                        <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0_ALT2" group="WOD" index="3" pad="PF3"/>
                         <signal field="PORTMUX.TCDROUTEA.TCD0" function="TCD0" group="WOD" index="3" pad="PA7"/>
                     </signals>
                 </instance>
@@ -560,18 +528,15 @@
                 <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL">
                         <bitfield caption="Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
-                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW"
-                                  values="AC_NORMAL_INTMODE"/>
+                        <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
                     </mode>
                     <mode name="WINDOW"/>
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x7" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMPIF" rw="RW"/>
@@ -585,8 +550,7 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Shortest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
                 <value caption="Power profile 2" name="PROFILE2" value="0x2"/>
             </value-group>
@@ -633,10 +597,8 @@
                     <bitfield caption="Clock Pre-scaler" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
-                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"
-                              values="ADC_SAMPDLY"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW" values="ADC_SAMPDLY"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
@@ -656,12 +618,10 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x08" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x7f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -796,23 +756,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -883,44 +838,32 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x9" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0xd" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0xa" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0xe" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0xb" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xff" name="TRUTH" rw="RW"/>
@@ -945,14 +888,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0xf" name="INT" rw="RW"/>
@@ -1063,17 +1002,14 @@
                 </register>
                 <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Enable" mask="0x1" name="CFDEN" rw="RW"/>
-                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="Clock Failure Detect Source" mask="0xc" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                     <bitfield caption="Clock Failure Detect Test" mask="0x2" name="CFDTST" rw="W"/>
                 </register>
-                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Enable" mask="0x1" name="CFD" rw="RW"/>
                     <bitfield caption="Interrupt type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detect Interrupt Flag" mask="0x1" name="CFD" rw="RW"/>
                 </register>
                 <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
@@ -1161,8 +1097,7 @@
             </value-group>
             <value-group caption="Source select" name="CLKCTRL_SOURCE">
                 <value caption="High frequency internal oscillator as PLL source" name="OSCHF" value="0x0"/>
-                <value caption="High frequency external clock or external high frequency oscillator as PLL source"
-                       name="XOSCHF" value="0x1"/>
+                <value caption="High frequency external clock or external high frequency oscillator as PLL source" name="XOSCHF" value="0x1"/>
             </value-group>
             <value-group caption="Start-up Time Select select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF cycles" name="256" value="0x0"/>
@@ -1188,8 +1123,7 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" initval="0x3F" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1217,12 +1151,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1268,134 +1200,102 @@
         <module caption="Event System" id="chip" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel select" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="Software Event B" initval="0x00" name="SWEVENTB" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W"
-                              values="EVSYS_SWEVENTB"/>
+                    <bitfield caption="Software event on channel select" mask="0x3" name="SWEVENTB" rw="W" values="EVSYS_SWEVENTB"/>
                 </register>
                 <register caption="User 12 - ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User 0 - CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User 1 - CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User 2 - CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User 3 - CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User 4 - CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User 5 - CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User 6 - CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User 7 - CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User 13 - EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User 15 - EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User 16 - EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW"
-                          size="1">
+                <register caption="User 18 - EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2C" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User 26 - TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User 27 - TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x30" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User 30 - TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x31" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User 31 - TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x32" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User 32 - TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x33" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW"
-                          size="1">
+                <register caption="User 33 - TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x34" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW"
-                          size="1">
+                <register caption="User 34 - TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x35" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW"
-                          size="1">
+                <register caption="User 35 - TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x36" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW"
-                          size="1">
+                <register caption="User 40 - TCD0 Event A" initval="0x00" name="USERTCD0INPUTA" offset="0x37" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW"
-                          size="1">
+                <register caption="User 41 - TCD0 Event B" initval="0x00" name="USERTCD0INPUTB" offset="0x38" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW"
-                          size="1">
+                <register caption="User 20 - USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2D" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User 21 - USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="User channel select" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
@@ -1421,15 +1321,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1469,15 +1365,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1522,15 +1414,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1573,15 +1461,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1619,15 +1503,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1667,15 +1547,11 @@
                 <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF"
-                       value="0x80"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1720,13 +1596,10 @@
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
                 <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
@@ -1737,28 +1610,23 @@
                     <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
-                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW"
-                              values="FUSE_UPDIPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW" values="FUSE_UPDIPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x08" name="SYSCFG1" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW"
-                              values="FUSE_MVSYSCFG"/>
+                    <bitfield caption="MVIO System Configuration" mask="0x18" name="MVSYSCFG" rw="RW" values="FUSE_MVSYSCFG"/>
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="BOD disabled" name="DISABLE" value="0x00"/>
                 <value caption="BOD enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="BOD enabled in sampled mode" name="SAMPLE" value="0x02"/>
-                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running."
-                       name="ENABLEWAIT" value="0x03"/>
+                <value caption="BOD enabled in continuous mode. Execution is halted at wake-up until BOD is running." name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
                 <value caption="1.9V" name="BODLEVEL0" value="0x00"/>
@@ -1784,8 +1652,7 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
                 <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
@@ -1883,8 +1750,7 @@
                     <bitfield caption="Application Code Write Protect" mask="0x1" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Application Data Write Protect" mask="0x4" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x2" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW"
-                              values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
                     <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x06" rw="RW" size="2"/>
@@ -1931,10 +1797,8 @@
                 <value caption="No Error" name="NOERROR" value="0x0"/>
                 <value caption="Write command not selected" name="ILLEGALCMD" value="0x1"/>
                 <value caption="Write to section not allowed" name="ILLEGALSADDR" value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT"
-                       value="0x3"/>
-                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG"
-                       value="0x4"/>
+                <value caption="Selecting new write command while write command already seleted" name="DOUBLESELECT" value="0x3"/>
+                <value caption="Starting a new programming operation before previous is completed" name="ONGOINGPROG" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_avr_v2_port" name="PORT">
@@ -2030,14 +1894,10 @@
         <module caption="Port Multiplexer" id="chip" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
                 <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x01" rw="RW" size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW"
-                              values="PORTMUX_LUT2"/>
-                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW"
-                              values="PORTMUX_LUT3"/>
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+                    <bitfield caption="CCL Look-Up Table 3 Signals" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
                 <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
@@ -2207,12 +2067,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2304,8 +2162,7 @@
                     <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="VREGCTRL" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW"
-                              values="SLPCTRL_HTLLEN"/>
+                    <bitfield caption="High Temperature Low Leakage Enable" mask="0x10" name="HTLLEN" rw="RW" values="SLPCTRL_HTLLEN"/>
                     <bitfield caption="Performance Mode" mask="0x7" name="PMODE" rw="RW" values="SLPCTRL_PMODE"/>
                 </register>
             </register-group>
@@ -2401,8 +2258,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2520,8 +2376,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2557,13 +2412,11 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2656,18 +2509,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2810,17 +2660,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x00"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x01"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x02"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x03"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x03"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x04"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x05"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x06"/>
@@ -2834,8 +2681,7 @@
             <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Fast-mode Plus Enable" mask="0x2" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
-                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                     <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
                     <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
                 </register>
@@ -2845,8 +2691,7 @@
                 <register caption="Dual Mode Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
                     <bitfield caption="Fast-mode Plus Enable" mask="0x2" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
-                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                     <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
                 </register>
                 <register caption="Host Address" initval="0x00" name="MADDR" offset="0x7" rw="RW" size="1">
@@ -2933,8 +2778,7 @@
             </value-group>
             <value-group caption="Debug Run select" name="TWI_DBGRUN">
                 <value caption="The peripheral is halted in Break Debug mode and ignores events" name="HALT" value="0"/>
-                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted"
-                       name="RUN" value="1"/>
+                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted" name="RUN" value="1"/>
             </value-group>
             <value-group caption="Inactive Bus Time-Out select" name="TWI_TIMEOUT">
                 <value caption="Bus time-out disabled. I2C." name="DISABLED" value="0"/>
@@ -2949,10 +2793,8 @@
             <value-group caption="Command select" name="TWI_MCMD">
                 <value caption="No action" name="NOACT" value="0"/>
                 <value caption="Execute Acknowledge Action followed by repeated Start." name="REPSTART" value="1"/>
-                <value caption="DIR=0: Execute Acknowledge Action followed by a byte read operation. DIR=1: Execute"
-                       name="RECVTRANS" value="2"/>
-                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP"
-                       value="3"/>
+                <value caption="DIR=0: Execute Acknowledge Action followed by a byte read operation. DIR=1: Execute" name="RECVTRANS" value="2"/>
+                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP" value="3"/>
             </value-group>
             <value-group caption="Bus State select" name="TWI_BUSSTATE">
                 <value caption="Unknown bus state" name="UNKNOWN" value="0"/>
@@ -2970,17 +2812,14 @@
                 <value caption="Address detection generated the interrupt on APIF flag" name="ADR" value="1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2995,19 +2834,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Host Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Host Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -3030,8 +2865,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -3049,8 +2883,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/E-SERIES/AVR64EA28.xml b/src/Targets/TargetDescriptionFiles/AVR8/E-SERIES/AVR64EA28.xml
index 616ec01f..9368b7ec 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/E-SERIES/AVR64EA28.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/E-SERIES/AVR64EA28.xml
@@ -1,119 +1,31 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR64EA28"
-                 package="SOIC28"
-                 pinout="SOIC28"
-                 speedmax="20000000"
-                 tempmax="125"
-                 tempmin="-40"
-                 vccmax="5.5"
-                 vccmin="1.8"/>
+        <variant ordercode="AVR64EA28" package="SOIC28" pinout="SOIC28" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR64EA28" family="AVR8" architecture="AVR8X" avr-family="AVR EA">
         <address-spaces>
-            <address-space endianness="little"
-                           id="data"
-                           name="data"
-                           size="0x10000"
-                           start="0x0000">
-                <memory-segment exec="0"
-                                name="IO"
-                                rw="RW"
-                                size="0x103F"
-                                start="0x00"
-                                type="io"/>
-                <memory-segment exec="0"
-                                name="LOCKBITS"
-                                pagesize="0x4"
-                                rw="RW"
-                                size="0x04"
-                                start="0x1040"
-                                type="lockbits"/>
-                <memory-segment exec="0"
-                                name="FUSES"
-                                pagesize="0x8"
-                                rw="RW"
-                                size="0x10"
-                                start="0x1050"
-                                type="fuses"/>
-                <memory-segment exec="0"
-                                name="USER_SIGNATURES"
-                                pagesize="0x40"
-                                rw="RW"
-                                size="0x40"
-                                start="0x1080"
-                                type="user_signatures"/>
-                <memory-segment exec="0"
-                                name="SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x03"
-                                start="0x1100"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="PROD_SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x7D"
-                                start="0x1103"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="EEPROM"
-                                pagesize="0x8"
-                                rw="RW"
-                                size="0x200"
-                                start="0x1400"
-                                type="eeprom"/>
-                <memory-segment exec="0"
-                                name="INTERNAL_SRAM"
-                                rw="RW"
-                                size="0x1800"
-                                start="0x6800"
-                                type="ram"/>
-                <memory-segment exec="0"
-                                name="MAPPED_PROGMEM"
-                                pagesize="0x80"
-                                rw="RW"
-                                size="0x8000"
-                                start="0x8000"
-                                type="other"/>
+            <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+                <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00" type="io"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x4" rw="RW" size="0x04" start="0x1040" type="lockbits"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x8" rw="RW" size="0x10" start="0x1050" type="fuses"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40" start="0x1080" type="user_signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x03" start="0x1100" type="signatures"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x1103" type="signatures"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x8" rw="RW" size="0x200" start="0x1400" type="eeprom"/>
+                <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1800" start="0x6800" type="ram"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x8000" type="other"/>
             </address-space>
-            <address-space endianness="little"
-                           id="prog"
-                           name="prog"
-                           size="0x10000"
-                           start="0x0000">
-                <memory-segment exec="1"
-                                name="PROGMEM"
-                                pagesize="0x80"
-                                rw="RW"
-                                size="0x10000"
-                                start="0x00"
-                                type="flash"/>
-                <memory-segment exec="1"
-                                name="PROGMEM_NRWW"
-                                pagesize="0x80"
-                                rw="RW"
-                                size="0x2000"
-                                start="0x00"
-                                type="flash"/>
-                <memory-segment exec="1"
-                                name="PROGMEM_RWW"
-                                pagesize="0x80"
-                                rw="RW"
-                                size="0xE000"
-                                start="0x2000"
-                                type="flash"/>
+            <address-space endianness="little" id="prog" name="prog" size="0x10000" start="0x0000">
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0x10000" start="0x00" type="flash"/>
+                <memory-segment exec="1" name="PROGMEM_NRWW" pagesize="0x80" rw="RW" size="0x2000" start="0x00" type="flash"/>
+                <memory-segment exec="1" name="PROGMEM_RWW" pagesize="0x80" rw="RW" size="0xE000" start="0x2000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
             <module id="cmp_control_v8" name="AC">
                 <instance name="AC0">
-                    <register-group address-space="data"
-                                    name="AC0"
-                                    name-in-module="AC"
-                                    offset="0x0680"/>
+                    <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
                     <signals>
                         <signal function="AINN" group="AINN" index="0" pad="PD3"/>
                         <signal function="AINN" group="AINN" index="1" pad="PD0"/>
@@ -122,17 +34,11 @@
                         <signal function="AINP" group="AINP" index="0" pad="PD2"/>
                         <signal function="AINP" group="AINP" index="3" pad="PD6"/>
                         <signal function="AINP" group="AINP" index="4" pad="PC3"/>
-                        <signal field="PORTMUX.ACROUTEA.AC0"
-                                function="DEFAULT"
-                                group="OUT"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ACROUTEA.AC0" function="DEFAULT" group="OUT" pad="PA7"/>
                     </signals>
                 </instance>
                 <instance name="AC1">
-                    <register-group address-space="data"
-                                    name="AC1"
-                                    name-in-module="AC"
-                                    offset="0x0688"/>
+                    <register-group address-space="data" name="AC1" name-in-module="AC" offset="0x0688"/>
                     <signals>
                         <signal function="AINN" group="AINN" index="0" pad="PD5"/>
                         <signal function="AINN" group="AINN" index="1" pad="PD0"/>
@@ -142,19 +48,13 @@
                         <signal function="AINP" group="AINP" index="2" pad="PD4"/>
                         <signal function="AINP" group="AINP" index="3" pad="PD6"/>
                         <signal function="AINP" group="AINP" index="4" pad="PC3"/>
-                        <signal field="PORTMUX.ACROUTEA.AC1"
-                                function="DEFAULT"
-                                group="OUT"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ACROUTEA.AC1" function="DEFAULT" group="OUT" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
             <module id="adc_12b_diff_ctrl_avr_v2" name="ADC">
                 <instance name="ADC0">
-                    <register-group address-space="data"
-                                    name="ADC0"
-                                    name-in-module="ADC"
-                                    offset="0x0600"/>
+                    <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
                     <signals>
                         <signal function="AINN" group="AINN" index="0" pad="PD0"/>
                         <signal function="AINN" group="AINN" index="1" pad="PD1"/>
@@ -201,18 +101,12 @@
             </module>
             <module id="bor_lvd_ctrl_avr_v2" name="BOD">
                 <instance name="BOD">
-                    <register-group address-space="data"
-                                    name="BOD"
-                                    name-in-module="BOD"
-                                    offset="0x00A0"/>
+                    <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x00A0"/>
                 </instance>
             </module>
             <module id="cla_ccl_v1" name="CCL">
                 <instance name="CCL">
-                    <register-group address-space="data"
-                                    name="CCL"
-                                    name-in-module="CCL"
-                                    offset="0x01C0"/>
+                    <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
                     <signals>
                         <signal function="IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="IN" group="LUT0_IN" index="1" pad="PA1"/>
@@ -225,35 +119,17 @@
                         <signal function="IN" group="LUT2_IN" index="2" pad="PD2"/>
                         <signal function="IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="IN" group="LUT3_IN" index="1" pad="PF1"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="ALT1"
-                                group="LUT0_OUT"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="DEFAULT"
-                                group="LUT0_OUT"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="DEFAULT"
-                                group="LUT1_OUT"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="ALT1"
-                                group="LUT2_OUT"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="DEFAULT"
-                                group="LUT2_OUT"
-                                pad="PD3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="ALT1" group="LUT0_OUT" pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="DEFAULT" group="LUT0_OUT" pad="PA3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="DEFAULT" group="LUT1_OUT" pad="PC3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="ALT1" group="LUT2_OUT" pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="DEFAULT" group="LUT2_OUT" pad="PD3"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrea" name="CLKCTRL">
                 <instance name="CLKCTRL">
-                    <register-group address-space="data"
-                                    name="CLKCTRL"
-                                    name-in-module="CLKCTRL"
-                                    offset="0x0060"/>
+                    <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
                     <signals>
                         <signal function="EXTCLK" group="EXTCLK" pad="PA0"/>
                         <signal function="OUT" group="CLKOUT" pad="PA7"/>
@@ -266,10 +142,7 @@
             </module>
             <module id="cpu_avr_xt_v1" name="CPU">
                 <instance name="CPU">
-                    <register-group address-space="data"
-                                    name="CPU"
-                                    name-in-module="CPU"
-                                    offset="0x0030"/>
+                    <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V4S"/>
                     </parameters>
@@ -277,26 +150,17 @@
             </module>
             <module id="int_8bit_v3" name="CPUINT">
                 <instance name="CPUINT">
-                    <register-group address-space="data"
-                                    name="CPUINT"
-                                    name-in-module="CPUINT"
-                                    offset="0x0110"/>
+                    <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
                 </instance>
             </module>
             <module id="math_pdi_crc_v1" name="CRCSCAN">
                 <instance name="CRCSCAN">
-                    <register-group address-space="data"
-                                    name="CRCSCAN"
-                                    name-in-module="CRCSCAN"
-                                    offset="0x0120"/>
+                    <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
                 </instance>
             </module>
             <module id="dac_nbit_ctrl_avr_v6" name="DAC">
                 <instance name="DAC0">
-                    <register-group address-space="data"
-                                    name="DAC0"
-                                    name-in-module="DAC"
-                                    offset="0x06A0"/>
+                    <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
                     <signals>
                         <signal function="VOUT" group="OUT" pad="PD6"/>
                     </signals>
@@ -304,82 +168,40 @@
             </module>
             <module id="avrea" name="EVSYS">
                 <instance name="EVSYS">
-                    <register-group address-space="data"
-                                    name="EVSYS"
-                                    name-in-module="EVSYS"
-                                    offset="0x0200"/>
+                    <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="ALT1"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="DEFAULT"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC"
-                                function="DEFAULT"
-                                group="EVOUT"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="ALT1"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="DEFAULT"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF"
-                                function="ALT1"
-                                group="EVOUT"
-                                index="5"
-                                pad="PF7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="ALT1" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="DEFAULT" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="DEFAULT" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="ALT1" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="DEFAULT" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="ALT1" group="EVOUT" index="5" pad="PF7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrea" name="FUSE">
                 <instance name="FUSE">
-                    <register-group address-space="data"
-                                    name="FUSE"
-                                    name-in-module="FUSE"
-                                    offset="0x1050"/>
+                    <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1050"/>
                 </instance>
             </module>
             <module id="avrea" name="GPR">
                 <instance name="GPR">
-                    <register-group address-space="data"
-                                    name="GPR"
-                                    name-in-module="GPR"
-                                    offset="0x001C"/>
+                    <register-group address-space="data" name="GPR" name-in-module="GPR" offset="0x001C"/>
                 </instance>
             </module>
             <module id="avrea" name="LOCK">
                 <instance name="LOCK">
-                    <register-group address-space="data"
-                                    name="LOCK"
-                                    name-in-module="LOCK"
-                                    offset="0x1040"/>
+                    <register-group address-space="data" name="LOCK" name-in-module="LOCK" offset="0x1040"/>
                 </instance>
             </module>
             <module id="nvm_ctrl_avr_v3" name="NVMCTRL">
                 <instance name="NVMCTRL">
-                    <register-group address-space="data"
-                                    name="NVMCTRL"
-                                    name-in-module="NVMCTRL"
-                                    offset="0x1000"/>
+                    <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v3" name="PORT">
                 <instance name="PORTA">
-                    <register-group address-space="data"
-                                    name="PORTA"
-                                    name-in-module="PORT"
-                                    offset="0x0400"/>
+                    <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
@@ -392,10 +214,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC">
-                    <register-group address-space="data"
-                                    name="PORTC"
-                                    name-in-module="PORT"
-                                    offset="0x0440"/>
+                    <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
@@ -404,10 +223,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD">
-                    <register-group address-space="data"
-                                    name="PORTD"
-                                    name-in-module="PORT"
-                                    offset="0x0460"/>
+                    <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
@@ -420,10 +236,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF">
-                    <register-group address-space="data"
-                                    name="PORTF"
-                                    name-in-module="PORT"
-                                    offset="0x04A0"/>
+                    <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PF0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PF1"/>
@@ -434,18 +247,12 @@
             </module>
             <module id="avrea" name="PORTMUX">
                 <instance name="PORTMUX">
-                    <register-group address-space="data"
-                                    name="PORTMUX"
-                                    name-in-module="PORTMUX"
-                                    offset="0x05E0"/>
+                    <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
                 </instance>
             </module>
             <module id="rst_integration_avr_v2" name="RSTCTRL">
                 <instance name="RSTCTRL">
-                    <register-group address-space="data"
-                                    name="RSTCTRL"
-                                    name-in-module="RSTCTRL"
-                                    offset="0x0040"/>
+                    <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
                     <signals>
                         <signal function="OTHER" group="RESET" pad="PF6"/>
                     </signals>
@@ -453,504 +260,179 @@
             </module>
             <module id="tmr_16b_rtc_avr_v2" name="RTC">
                 <instance name="RTC">
-                    <register-group address-space="data"
-                                    name="RTC"
-                                    name-in-module="RTC"
-                                    offset="0x0140"/>
+                    <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
                 </instance>
             </module>
             <module id="avrea" name="SIGROW">
                 <instance name="SIGROW">
-                    <register-group address-space="data"
-                                    name="SIGROW"
-                                    name-in-module="SIGROW"
-                                    offset="0x1100"/>
+                    <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
                 </instance>
             </module>
             <module id="clk_sleep_ctrl_avr_v1" name="SLPCTRL">
                 <instance name="SLPCTRL">
-                    <register-group address-space="data"
-                                    name="SLPCTRL"
-                                    name-in-module="SLPCTRL"
-                                    offset="0x0050"/>
+                    <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
                 </instance>
             </module>
             <module id="spi_8bit_v2" name="SPI">
                 <instance name="SPI0">
-                    <register-group address-space="data"
-                                    name="SPI0"
-                                    name-in-module="SPI"
-                                    offset="0x0940"/>
+                    <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0940"/>
                     <signals>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT3"
-                                group="MISO"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT3"
-                                group="MOSI"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT3"
-                                group="SCK"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT3"
-                                group="SS"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT4"
-                                group="MISO"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT4"
-                                group="MOSI"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT4"
-                                group="SCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT4"
-                                group="SS"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT5"
-                                group="MISO"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT5"
-                                group="MOSI"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT5"
-                                group="SCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT5"
-                                group="SS"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT6"
-                                group="MISO"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT6"
-                                group="MOSI"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT6"
-                                group="SCK"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT6"
-                                group="SS"
-                                pad="PF7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="DEFAULT"
-                                group="MISO"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="DEFAULT"
-                                group="MOSI"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="DEFAULT"
-                                group="SCK"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="DEFAULT"
-                                group="SS"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT3" group="MISO" pad="PA1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT3" group="MOSI" pad="PA0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT3" group="SCK" pad="PC0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT3" group="SS" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT4" group="MISO" pad="PD5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT4" group="MOSI" pad="PD4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT4" group="SCK" pad="PD6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT4" group="SS" pad="PD7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT5" group="MISO" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT5" group="MOSI" pad="PC0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT5" group="SCK" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT5" group="SS" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT6" group="MISO" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT6" group="MOSI" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT6" group="SCK" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT6" group="SS" pad="PF7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="DEFAULT" group="MISO" pad="PA5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="DEFAULT" group="MOSI" pad="PA4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="DEFAULT" group="SCK" pad="PA6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="DEFAULT" group="SS" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrea" name="SYSCFG">
                 <instance name="SYSCFG">
-                    <register-group address-space="data"
-                                    name="SYSCFG"
-                                    name-in-module="SYSCFG"
-                                    offset="0x0F00"/>
+                    <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
                 </instance>
             </module>
             <module id="tmr_16b_pwm_v1" name="TCA">
                 <instance name="TCA0">
-                    <register-group address-space="data"
-                                    name="TCA0"
-                                    name-in-module="TCA"
-                                    offset="0x0A00"/>
+                    <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
                     <signals>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT2"
-                                group="WO"
-                                index="0"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT2"
-                                group="WO"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT2"
-                                group="WO"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT2"
-                                group="WO"
-                                index="3"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="0"
-                                pad="PD0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="1"
-                                pad="PD1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="2"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="3"
-                                pad="PD3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="4"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="5"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT5"
-                                group="WO"
-                                index="0"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT5"
-                                group="WO"
-                                index="1"
-                                pad="PF1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="3"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="4"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="5"
-                                pad="PA5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT2" group="WO" index="0" pad="PC0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT2" group="WO" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT2" group="WO" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT2" group="WO" index="3" pad="PC3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="0" pad="PD0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="1" pad="PD1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="2" pad="PD2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="3" pad="PD3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="4" pad="PD4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="5" pad="PD5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT5" group="WO" index="0" pad="PF0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT5" group="WO" index="1" pad="PF1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="3" pad="PA3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="4" pad="PA4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="5" pad="PA5"/>
                     </signals>
                 </instance>
             </module>
             <module id="tmr_16b_capture_v1" name="TCB">
                 <instance name="TCB0">
-                    <register-group address-space="data"
-                                    name="TCB0"
-                                    name-in-module="TCB"
-                                    offset="0x0B00"/>
+                    <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0B00"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="0"
-                                pad="PA2"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB0" function="DEFAULT" group="WO" index="0" pad="PA2"/>
                     </signals>
                 </instance>
                 <instance name="TCB1">
-                    <register-group address-space="data"
-                                    name="TCB1"
-                                    name-in-module="TCB"
-                                    offset="0x0B10"/>
+                    <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0B10"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB1"
-                                function="DEFAULT"
-                                group="WO"
-                                index="0"
-                                pad="PA3"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB1" function="DEFAULT" group="WO" index="0" pad="PA3"/>
                     </signals>
                 </instance>
                 <instance name="TCB2">
-                    <register-group address-space="data"
-                                    name="TCB2"
-                                    name-in-module="TCB"
-                                    offset="0x0B20"/>
+                    <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0B20"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB2"
-                                function="DEFAULT"
-                                group="WO"
-                                index="0"
-                                pad="PC0"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB2" function="DEFAULT" group="WO" index="0" pad="PC0"/>
                     </signals>
                 </instance>
             </module>
             <module id="i2c_8bit_avr_v3" name="TWI">
                 <instance name="TWI0">
-                    <register-group address-space="data"
-                                    name="TWI0"
-                                    name-in-module="TWI"
-                                    offset="0x0900"/>
+                    <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0900"/>
                     <signals>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT1"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT1"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT2"
-                                group="SCL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT2"
-                                group="SDA"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT3"
-                                group="SCL"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT3"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT3"
-                                group="SDA"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT3"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="DEFAULT"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="DEFAULT"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="DEFAULT"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="DEFAULT"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT1" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT1" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT2" group="SCL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT2" group="SDA" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT3" group="SCL" pad="PA1"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT3" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT3" group="SDA" pad="PA0"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT3" group="SDA_DUAL" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="DEFAULT" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="DEFAULT" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="DEFAULT" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="DEFAULT" group="SDA_DUAL" pad="PC2"/>
                     </signals>
                 </instance>
             </module>
             <module id="uart_autobd_v4" name="USART">
                 <instance name="USART0">
-                    <register-group address-space="data"
-                                    name="USART0"
-                                    name-in-module="USART"
-                                    offset="0x0800"/>
+                    <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT1"
-                                group="RXD"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT1"
-                                group="TXD"
-                                index="1"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT1"
-                                group="XCK"
-                                index="1"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT1"
-                                group="XDIR"
-                                index="1"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT2"
-                                group="RXD"
-                                index="2"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT2"
-                                group="TXD"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT3"
-                                group="RXD"
-                                index="3"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT3"
-                                group="TXD"
-                                index="3"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT3"
-                                group="XCK"
-                                index="3"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT3"
-                                group="XDIR"
-                                index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT4"
-                                group="RXD"
-                                index="4"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT4"
-                                group="TXD"
-                                index="4"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT4"
-                                group="XCK"
-                                index="4"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="DEFAULT"
-                                group="RXD"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="DEFAULT"
-                                group="TXD"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="DEFAULT"
-                                group="XCK"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="DEFAULT"
-                                group="XDIR"
-                                pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT1" group="RXD" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT1" group="TXD" index="1" pad="PA4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT1" group="XCK" index="1" pad="PA6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT1" group="XDIR" index="1" pad="PA7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT2" group="RXD" index="2" pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT2" group="TXD" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT3" group="RXD" index="3" pad="PD5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT3" group="TXD" index="3" pad="PD4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT3" group="XCK" index="3" pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT3" group="XDIR" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT4" group="RXD" index="4" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT4" group="TXD" index="4" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT4" group="XCK" index="4" pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="DEFAULT" group="RXD" pad="PA1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="DEFAULT" group="TXD" pad="PA0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="DEFAULT" group="XCK" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="DEFAULT" group="XDIR" pad="PA3"/>
                     </signals>
                 </instance>
                 <instance name="USART1">
-                    <register-group address-space="data"
-                                    name="USART1"
-                                    name-in-module="USART"
-                                    offset="0x0820"/>
+                    <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="ALT2"
-                                group="RXD"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="ALT2"
-                                group="TXD"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="DEFAULT"
-                                group="RXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="DEFAULT"
-                                group="TXD"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="DEFAULT"
-                                group="XCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="DEFAULT"
-                                group="XDIR"
-                                pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="ALT2" group="RXD" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="ALT2" group="TXD" pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="DEFAULT" group="RXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="DEFAULT" group="TXD" pad="PC0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="DEFAULT" group="XCK" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="DEFAULT" group="XDIR" pad="PC3"/>
                     </signals>
                 </instance>
                 <instance name="USART2">
-                    <register-group address-space="data"
-                                    name="USART2"
-                                    name-in-module="USART"
-                                    offset="0x0840"/>
+                    <register-group address-space="data" name="USART2" name-in-module="USART" offset="0x0840"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART2"
-                                function="DEFAULT"
-                                group="RXD"
-                                pad="PF1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART2"
-                                function="DEFAULT"
-                                group="TXD"
-                                pad="PF0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART2" function="DEFAULT" group="RXD" pad="PF1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART2" function="DEFAULT" group="TXD" pad="PF0"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrea" name="USERROW">
                 <instance name="USERROW">
-                    <register-group address-space="data"
-                                    name="USERROW"
-                                    name-in-module="USERROW"
-                                    offset="0x1080"/>
+                    <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1080"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v3_vport" name="VPORT">
                 <instance name="VPORTA">
-                    <register-group address-space="data"
-                                    name="VPORTA"
-                                    name-in-module="VPORT"
-                                    offset="0x0000"/>
+                    <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
                 </instance>
                 <instance name="VPORTC">
-                    <register-group address-space="data"
-                                    name="VPORTC"
-                                    name-in-module="VPORT"
-                                    offset="0x0008"/>
+                    <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
                 </instance>
                 <instance name="VPORTD">
-                    <register-group address-space="data"
-                                    name="VPORTD"
-                                    name-in-module="VPORT"
-                                    offset="0x000C"/>
+                    <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
                 </instance>
                 <instance name="VPORTF">
-                    <register-group address-space="data"
-                                    name="VPORTF"
-                                    name-in-module="VPORT"
-                                    offset="0x0014"/>
+                    <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
                 </instance>
             </module>
             <module id="avrea" name="VREF">
                 <instance name="VREF">
-                    <register-group address-space="data"
-                                    name="VREF"
-                                    name-in-module="VREF"
-                                    offset="0x00B0"/>
+                    <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00B0"/>
                     <signals>
                         <signal function="VREF" group="VREFA" pad="PD7"/>
                     </signals>
@@ -958,10 +440,7 @@
             </module>
             <module id="wdt_windowed_v2" name="WDT">
                 <instance name="WDT">
-                    <register-group address-space="data"
-                                    name="WDT"
-                                    name-in-module="WDT"
-                                    offset="0x0100"/>
+                    <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
                 </instance>
             </module>
         </peripherals>
@@ -1031,113 +510,36 @@
     <modules>
         <module caption="Analog Comparator" id="cmp_control_v8" name="AC">
             <register-group caption="Analog Comparator" name="AC" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Hysteresis Mode"
-                              mask="0x06"
-                              name="HYSMODE"
-                              rw="RW"
-                              values="AC_HYSMODE"/>
-                    <bitfield caption="Power profile"
-                              mask="0x18"
-                              name="POWER"
-                              rw="RW"
-                              values="AC_POWER"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Power profile" mask="0x18" name="POWER" rw="RW" values="AC_POWER"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Window selection mode"
-                              mask="0x03"
-                              name="WINSEL"
-                              rw="RW"
-                              values="AC_WINSEL"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Window selection mode" mask="0x03" name="WINSEL" rw="RW" values="AC_WINSEL"/>
                 </register>
-                <register caption="Mux Control A"
-                          initval="0x00"
-                          name="MUXCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input MUX Selection"
-                              mask="0x07"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection"
-                              mask="0x38"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="AC_MUXPOS"/>
-                    <bitfield caption="AC Output Initial Value"
-                              mask="0x40"
-                              name="INITVAL"
-                              rw="RW"
-                              values="AC_INITVAL"/>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Negative Input MUX Selection" mask="0x07" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+                    <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
                 </register>
-                <register caption="DAC Voltage Reference"
-                          initval="0xFF"
-                          name="DACREF"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="DAC Voltage Reference" initval="0xFF" name="DACREF" offset="0x5" rw="RW" size="1">
                     <bitfield caption="DACREF" mask="0xFF" name="DACREF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="AC.CTRLB.WINSEL" value="0x0"/>
                     <mode name="WINDOW" qualifier="AC.CTRLB.WINSEL" value="0x1 0x2"/>
                     <bitfield caption="Interrupt Enable" mask="0x01" name="CMP" rw="RW"/>
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="INTMODE"
-                              rw="RW"
-                              values="AC_NORMAL_INTMODE"/>
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x30"
-                              modes="WINDOW"
-                              name="INTMODE"
-                              rw="RW"
-                              values="AC_WINDOW_INTMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" modes="NORMAL" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" modes="WINDOW" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Comparator Interrupt Flag"
-                              mask="0x01"
-                              name="CMPIF"
-                              rw="RW"/>
-                    <bitfield caption="Analog Comparator State"
-                              mask="0x10"
-                              name="CMPSTATE"
-                              rw="R"/>
-                    <bitfield caption="Analog Comparator Window State"
-                              mask="0xC0"
-                              name="WINSTATE"
-                              rw="R"
-                              values="AC_WINSTATE"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x01" name="CMPIF" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xC0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -1147,41 +549,23 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Fastest response time, highest consumption"
-                       name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Fastest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
             </value-group>
             <value-group caption="Window selection mode" name="AC_WINSEL">
                 <value caption="Window function disabled" name="DISABLED" value="0x0"/>
-                <value caption="Select ACn+1 as upper limit in window compare"
-                       name="UPSEL1"
-                       value="0x1"/>
+                <value caption="Select ACn+1 as upper limit in window compare" name="UPSEL1" value="0x1"/>
             </value-group>
             <value-group caption="Interrupt Mode select" name="AC_NORMAL_INTMODE">
-                <value caption="Positive and negative inputs crosses"
-                       name="BOTHEDGE"
-                       value="0x0"/>
-                <value caption="Positive input goes below negative input"
-                       name="NEGEDGE"
-                       value="0x2"/>
-                <value caption="Positive input goes above negative input"
-                       name="POSEDGE"
-                       value="0x3"/>
+                <value caption="Positive and negative inputs crosses" name="BOTHEDGE" value="0x0"/>
+                <value caption="Positive input goes below negative input" name="NEGEDGE" value="0x2"/>
+                <value caption="Positive input goes above negative input" name="POSEDGE" value="0x3"/>
             </value-group>
             <value-group caption="Interrupt Mode select" name="AC_WINDOW_INTMODE">
-                <value caption="Window interrupt when input above both references"
-                       name="ABOVE"
-                       value="0x0"/>
-                <value caption="Window interrupt when input betweeen references"
-                       name="INSIDE"
-                       value="0x1"/>
-                <value caption="Window interrupt when input below both references"
-                       name="BELOW"
-                       value="0x2"/>
-                <value caption="Window interrupt when input outside reference"
-                       name="OUTSIDE"
-                       value="0x3"/>
+                <value caption="Window interrupt when input above both references" name="ABOVE" value="0x0"/>
+                <value caption="Window interrupt when input betweeen references" name="INSIDE" value="0x1"/>
+                <value caption="Window interrupt when input below both references" name="BELOW" value="0x2"/>
+                <value caption="Window interrupt when input outside reference" name="OUTSIDE" value="0x3"/>
             </value-group>
             <value-group caption="AC Output Initial Value select" name="AC_INITVAL">
                 <value caption="Output initialized to 0" name="LOW" value="0x0"/>
@@ -1207,313 +591,94 @@
                 <value caption="Below window" name="BELOW" value="0x2"/>
             </value-group>
         </module>
-        <module caption="Analog to Digital Converter"
-                id="adc_12b_diff_ctrl_avr_v2"
-                name="ADC">
+        <module caption="Analog to Digital Converter" id="adc_12b_diff_ctrl_avr_v2" name="ADC">
             <register-group caption="Analog to Digital Converter" name="ADC" size="0x40">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="ADC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Low Latency" mask="0x20" name="LOWLAT" rw="RW"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Prescaler Value"
-                              mask="0x0F"
-                              name="PRESC"
-                              rw="RW"
-                              values="ADC_PRESC"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Prescaler Value" mask="0x0F" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="ADC_REFSEL"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Window Comparator Mode"
-                              mask="0x07"
-                              name="WINCM"
-                              rw="RW"
-                              values="ADC_WINCM"/>
-                    <bitfield caption="Window Mode Source"
-                              mask="0x08"
-                              name="WINSRC"
-                              rw="RW"
-                              values="ADC_WINSRC"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x07" name="WINCM" rw="RW" values="ADC_WINCM"/>
+                    <bitfield caption="Window Mode Source" mask="0x08" name="WINSRC" rw="RW" values="ADC_WINSRC"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Result Ready Interrupt Enable"
-                              mask="0x01"
-                              name="RESRDY"
-                              rw="RW"/>
-                    <bitfield caption="Sample Ready Interrupt Enable"
-                              mask="0x02"
-                              name="SAMPRDY"
-                              rw="RW"/>
-                    <bitfield caption="Window Comparator Interrupt Enable"
-                              mask="0x04"
-                              name="WCMP"
-                              rw="RW"/>
-                    <bitfield caption="Result Overwrite Interrupt Enable"
-                              mask="0x08"
-                              name="RESOVR"
-                              rw="RW"/>
-                    <bitfield caption="Sample Overwrite Interrupt Enable"
-                              mask="0x10"
-                              name="SAMPOVR"
-                              rw="RW"/>
-                    <bitfield caption="Trigger Overrun Interrupt Enable"
-                              mask="0x20"
-                              name="TRIGOVR"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x01" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Sample Ready Interrupt Enable" mask="0x02" name="SAMPRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x04" name="WCMP" rw="RW"/>
+                    <bitfield caption="Result Overwrite Interrupt Enable" mask="0x08" name="RESOVR" rw="RW"/>
+                    <bitfield caption="Sample Overwrite Interrupt Enable" mask="0x10" name="SAMPOVR" rw="RW"/>
+                    <bitfield caption="Trigger Overrun Interrupt Enable" mask="0x20" name="TRIGOVR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Result Ready Interrupt Flag"
-                              mask="0x01"
-                              name="RESRDY"
-                              rw="RW"/>
-                    <bitfield caption="Sample Ready Interrupt Flag"
-                              mask="0x02"
-                              name="SAMPRDY"
-                              rw="RW"/>
-                    <bitfield caption="Window Comparator Interrupt Flag"
-                              mask="0x04"
-                              name="WCMP"
-                              rw="RW"/>
-                    <bitfield caption="Result Overwrite Interrupt Flag"
-                              mask="0x08"
-                              name="RESOVR"
-                              rw="RW"/>
-                    <bitfield caption="Sample Overwrite Interrupt Flag"
-                              mask="0x10"
-                              name="SAMPOVR"
-                              rw="RW"/>
-                    <bitfield caption="Trigger Overrun Interrupt Flag"
-                              mask="0x20"
-                              name="TRIGOVR"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Flag" mask="0x01" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Sample Ready Interrupt Flag" mask="0x02" name="SAMPRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Flag" mask="0x04" name="WCMP" rw="RW"/>
+                    <bitfield caption="Result Overwrite Interrupt Flag" mask="0x08" name="RESOVR" rw="RW"/>
+                    <bitfield caption="Sample Overwrite Interrupt Flag" mask="0x10" name="SAMPOVR" rw="RW"/>
+                    <bitfield caption="Trigger Overrun Interrupt Flag" mask="0x20" name="TRIGOVR" rw="RW"/>
                 </register>
-                <register caption="Status register"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x06"
-                          rw="R"
-                          size="1">
+                <register caption="Status register" initval="0x00" name="STATUS" offset="0x06" rw="R" size="1">
                     <bitfield caption="ADC Busy" mask="0x01" name="ADCBUSY" rw="R"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Run in Debug Mode" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x08" rw="RW" size="1">
                     <bitfield caption="Sample Duration" mask="0xFF" name="SAMPDUR" rw="RW"/>
                 </register>
-                <register caption="Control F"
-                          initval="0x00"
-                          name="CTRLF"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sample numbers"
-                              mask="0x0F"
-                              name="SAMPNUM"
-                              rw="RW"
-                              values="ADC_SAMPNUM"/>
+                <register caption="Control F" initval="0x00" name="CTRLF" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Sample numbers" mask="0x0F" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
                     <bitfield caption="Left Adjust" mask="0x10" name="LEFTADJ" rw="RW"/>
                     <bitfield caption="Free-Running mode" mask="0x20" name="FREERUN" rw="RW"/>
-                    <bitfield caption="Sign Chopping"
-                              mask="0x40"
-                              name="CHOPPING"
-                              rw="RW"
-                              values="ADC_CHOPPING"/>
+                    <bitfield caption="Sign Chopping" mask="0x40" name="CHOPPING" rw="RW" values="ADC_CHOPPING"/>
                 </register>
-                <register caption="Command register"
-                          initval="0x00"
-                          name="COMMAND"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Start command"
-                              mask="0x07"
-                              name="START"
-                              rw="RW"
-                              values="ADC_START"/>
-                    <bitfield caption="Mode"
-                              mask="0x70"
-                              name="MODE"
-                              rw="RW"
-                              values="ADC_MODE"/>
+                <register caption="Command register" initval="0x00" name="COMMAND" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Start command" mask="0x07" name="START" rw="RW" values="ADC_START"/>
+                    <bitfield caption="Mode" mask="0x70" name="MODE" rw="RW" values="ADC_MODE"/>
                     <bitfield caption="Differential mode" mask="0x80" name="DIFF" rw="RW"/>
                 </register>
-                <register caption="PGA Control"
-                          initval="0x00"
-                          name="PGACTRL"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="PGA Control" initval="0x00" name="PGACTRL" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="PGA Enable" mask="0x01" name="PGAEN" rw="RW"/>
-                    <bitfield caption="PGA BIAS Select"
-                              mask="0x18"
-                              name="PGABIASSEL"
-                              rw="RW"
-                              values="ADC_PGABIASSEL"/>
-                    <bitfield caption="Gain"
-                              mask="0xE0"
-                              name="GAIN"
-                              rw="RW"
-                              values="ADC_GAIN"/>
+                    <bitfield caption="PGA BIAS Select" mask="0x18" name="PGABIASSEL" rw="RW" values="ADC_PGABIASSEL"/>
+                    <bitfield caption="Gain" mask="0xE0" name="GAIN" rw="RW" values="ADC_GAIN"/>
                 </register>
-                <register caption="Positive Input Multiplexer"
-                          initval="0x00"
-                          name="MUXPOS"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x3F"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="ADC_MUXPOS"/>
-                    <bitfield caption="VIA"
-                              mask="0xC0"
-                              name="VIA"
-                              rw="RW"
-                              values="ADC_VIA"/>
+                <register caption="Positive Input Multiplexer" initval="0x00" name="MUXPOS" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x3F" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+                    <bitfield caption="VIA" mask="0xC0" name="VIA" rw="RW" values="ADC_VIA"/>
                 </register>
-                <register caption="Negative Input Multiplexer"
-                          initval="0x00"
-                          name="MUXNEG"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x3F"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="ADC_MUXNEG"/>
-                    <bitfield caption="VIA"
-                              mask="0xC0"
-                              name="VIA"
-                              rw="RW"
-                              values="ADC_VIA"/>
+                <register caption="Negative Input Multiplexer" initval="0x00" name="MUXNEG" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x3F" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
+                    <bitfield caption="VIA" mask="0xC0" name="VIA" rw="RW" values="ADC_VIA"/>
                 </register>
-                <register caption="Result"
-                          initval="0x00000000"
-                          name="RESULT"
-                          offset="0x10"
-                          rw="R"
-                          size="4"/>
-                <register caption="Sample"
-                          initval="0x0000"
-                          name="SAMPLE"
-                          offset="0x14"
-                          rw="R"
-                          size="2"/>
-                <register caption="Temporary Data 0"
-                          initval="0x00"
-                          name="TEMP0"
-                          offset="0x18"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Temporary Data 1"
-                          initval="0x00"
-                          name="TEMP1"
-                          offset="0x19"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Temporary Data 2"
-                          initval="0x00"
-                          name="TEMP2"
-                          offset="0x1A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Window Low Threshold"
-                          initval="0x0000"
-                          name="WINLT"
-                          offset="0x1C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Window High Threshold"
-                          initval="0x0000"
-                          name="WINHT"
-                          offset="0x1E"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Result" initval="0x00000000" name="RESULT" offset="0x10" rw="R" size="4"/>
+                <register caption="Sample" initval="0x0000" name="SAMPLE" offset="0x14" rw="R" size="2"/>
+                <register caption="Temporary Data 0" initval="0x00" name="TEMP0" offset="0x18" rw="RW" size="1"/>
+                <register caption="Temporary Data 1" initval="0x00" name="TEMP1" offset="0x19" rw="RW" size="1"/>
+                <register caption="Temporary Data 2" initval="0x00" name="TEMP2" offset="0x1A" rw="RW" size="1"/>
+                <register caption="Window Low Threshold" initval="0x0000" name="WINLT" offset="0x1C" rw="RW" size="2"/>
+                <register caption="Window High Threshold" initval="0x0000" name="WINHT" offset="0x1E" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Mode select" name="ADC_MODE">
-                <value caption="Single Conversion with 8-bit resolution"
-                       name="SINGLE_8BIT"
-                       value="0x00"/>
-                <value caption="Single Conversion with 12-bit resolution"
-                       name="SINGLE_12BIT"
-                       value="0x01"/>
-                <value caption="Series with accumulation, separate trigger for every 12-bit conversion"
-                       name="SERIES"
-                       value="0x02"/>
-                <value caption="Series with accumulation and scaling, separate trigger for every 12-bit conversion"
-                       name="SERIES_SCALING"
-                       value="0x03"/>
-                <value caption="Burst with accumulation, one trigger will run SAMPNUM 12-bit conversions"
-                       name="BURST"
-                       value="0x04"/>
-                <value caption="Burst with accumulation and scaling, one trigger will run SAMPNUM 12-bit conversions"
-                       name="BURST_SCALING"
-                       value="0x05"/>
+                <value caption="Single Conversion with 8-bit resolution" name="SINGLE_8BIT" value="0x00"/>
+                <value caption="Single Conversion with 12-bit resolution" name="SINGLE_12BIT" value="0x01"/>
+                <value caption="Series with accumulation, separate trigger for every 12-bit conversion" name="SERIES" value="0x02"/>
+                <value caption="Series with accumulation and scaling, separate trigger for every 12-bit conversion" name="SERIES_SCALING" value="0x03"/>
+                <value caption="Burst with accumulation, one trigger will run SAMPNUM 12-bit conversions" name="BURST" value="0x04"/>
+                <value caption="Burst with accumulation and scaling, one trigger will run SAMPNUM 12-bit conversions" name="BURST_SCALING" value="0x05"/>
             </value-group>
             <value-group caption="Start command select" name="ADC_START">
                 <value caption="Stop an ongoing conversion" name="STOP" value="0x00"/>
-                <value caption="Start a conversion immediately. This will be set back to STOP when the first conversion is done, unless Free-Running mode is enabled"
-                       name="IMMEDIATE"
-                       value="0x01"/>
-                <value caption="Start when MUXPOS register is written"
-                       name="MUXPOS_WRITE"
-                       value="0x02"/>
-                <value caption="Start when MUXNEG register is written"
-                       name="MUXNEG_WRITE"
-                       value="0x03"/>
-                <value caption="Start when an event is received"
-                       name="EVENT_TRIGGER"
-                       value="0x04"/>
+                <value caption="Start a conversion immediately. This will be set back to STOP when the first conversion is done, unless Free-Running mode is enabled" name="IMMEDIATE" value="0x01"/>
+                <value caption="Start when MUXPOS register is written" name="MUXPOS_WRITE" value="0x02"/>
+                <value caption="Start when MUXNEG register is written" name="MUXNEG_WRITE" value="0x03"/>
+                <value caption="Start when an event is received" name="EVENT_TRIGGER" value="0x04"/>
             </value-group>
             <value-group caption="Prescaler Value select" name="ADC_PRESC">
                 <value caption="System clock divided by 2" name="DIV2" value="0x00"/>
@@ -1549,12 +714,8 @@
                 <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
             </value-group>
             <value-group caption="Window Mode Source select" name="ADC_WINSRC">
-                <value caption="Result register used as Window Comparator Source"
-                       name="RESULT"
-                       value="0x0"/>
-                <value caption="Sample register used as Window Comparator Source"
-                       name="SAMPLE"
-                       value="0x1"/>
+                <value caption="Result register used as Window Comparator Source" name="RESULT" value="0x0"/>
+                <value caption="Sample register used as Window Comparator Source" name="SAMPLE" value="0x1"/>
             </value-group>
             <value-group caption="Sign Chopping select" name="ADC_CHOPPING">
                 <value caption="Sign Chopping Disabled" name="DISABLE" value="0x0"/>
@@ -1600,9 +761,7 @@
                 <value caption="AC1 DAC reference" name="DACREF1" value="0x3A"/>
             </value-group>
             <value-group caption="VIA select" name="ADC_VIA">
-                <value caption="Inputs connected directly to ADC"
-                       name="DIRECT"
-                       value="0x0"/>
+                <value caption="Inputs connected directly to ADC" name="DIRECT" value="0x0"/>
                 <value caption="Inputs connected via PGA" name="PGA" value="0x1"/>
             </value-group>
             <value-group caption="Analog Channel Selection Bits" name="ADC_MUXPOS">
@@ -1640,112 +799,40 @@
             </value-group>
             <value-group caption="PGA BIAS Select" name="ADC_PGABIASSEL">
                 <value caption="100% BIAS current." name="100PCT" value="0x0"/>
-                <value caption="75% BIAS current. Usable for CLK_ADC&lt;4.5MHz"
-                       name="75PCT"
-                       value="0x1"/>
-                <value caption="50% BIAS current. Usable for CLK_ADC&lt;3MHz"
-                       name="50PCT"
-                       value="0x2"/>
-                <value caption="25% BIAS current. Usable for CLK_ADC&lt;1.5MHz"
-                       name="25PCT"
-                       value="0x3"/>
+                <value caption="75% BIAS current. Usable for CLK_ADC&lt;4.5MHz" name="75PCT" value="0x1"/>
+                <value caption="50% BIAS current. Usable for CLK_ADC&lt;3MHz" name="50PCT" value="0x2"/>
+                <value caption="25% BIAS current. Usable for CLK_ADC&lt;1.5MHz" name="25PCT" value="0x3"/>
             </value-group>
         </module>
         <module caption="Bod interface" id="bor_lvd_ctrl_avr_v2" name="BOD">
             <register-group caption="Bod interface" name="BOD" size="0x10">
-                <register caption="Control A"
-                          initval="0x01"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Operation in sleep mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="BOD_SLEEP"/>
-                    <bitfield caption="Operation in active mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="R"
-                              values="BOD_ACTIVE"/>
-                    <bitfield caption="Sample frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="R"
-                              values="BOD_SAMPFREQ"/>
+                <register caption="Control A" initval="0x01" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in sleep mode" mask="0x03" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                    <bitfield caption="Operation in active mode" mask="0x0C" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bod level"
-                              mask="0x07"
-                              name="LVL"
-                              rw="R"
-                              values="BOD_LVL"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x07" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor Control"
-                          initval="0x00"
-                          name="VLMCTRLA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level"
-                              mask="0x03"
-                              name="VLMLVL"
-                              rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x03" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor interrrupt enable"
-                              mask="0x01"
-                              name="VLMIE"
-                              rw="RW"/>
-                    <bitfield caption="Configuration"
-                              mask="0x06"
-                              name="VLMCFG"
-                              rw="RW"
-                              values="BOD_VLMCFG"/>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x01" name="VLMIE" rw="RW"/>
+                    <bitfield caption="Configuration" mask="0x06" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor interrupt flag"
-                              mask="0x01"
-                              name="VLMIF"
-                              rw="RW"/>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x01" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor status"
-                              mask="0x01"
-                              name="VLMS"
-                              rw="R"
-                              values="BOD_VLMS"/>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x01" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
                 <value caption="Disabled" name="DISABLE" value="0x00"/>
                 <value caption="Enabled in continuous mode" name="ENABLED" value="0x01"/>
                 <value caption="Enabled in sampled mode" name="SAMPLED" value="0x02"/>
-                <value caption="Enabled in continuous mode. Execution halted at wake-up until BOD is running"
-                       name="ENABLEWAIT"
-                       value="0x03"/>
+                <value caption="Enabled in continuous mode. Execution halted at wake-up until BOD is running" name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
                 <value caption="Sampling frequency is 128 Hz" name="128HZ" value="0x0"/>
@@ -1757,9 +844,7 @@
                 <value caption="Enabled in sampled mode" name="SAMPLE" value="0x02"/>
             </value-group>
             <value-group caption="Bod level select" name="BOD_LVL">
-                <value caption="BOD Disabled during normal operation"
-                       name="BODLEVEL0"
-                       value="0x00"/>
+                <value caption="BOD Disabled during normal operation" name="BODLEVEL0" value="0x00"/>
                 <value caption="1.9 V" name="BODLEVEL1" value="0x01"/>
                 <value caption="2.7 V" name="BODLEVEL2" value="0x02"/>
                 <value caption="4.5 V" name="BODLEVEL3" value="0x03"/>
@@ -1770,338 +855,103 @@
                 <value caption="VDD crosses VLM threshold" name="BOTH" value="0x02"/>
             </value-group>
             <value-group caption="Voltage level monitor status select" name="BOD_VLMS">
-                <value caption="The voltage is above the VLM threshold level"
-                       name="ABOVE"
-                       value="0x0"/>
-                <value caption="The voltage is below the VLM threshold level"
-                       name="BELOW"
-                       value="0x1"/>
+                <value caption="The voltage is above the VLM threshold level" name="ABOVE" value="0x0"/>
+                <value caption="The voltage is below the VLM threshold level" name="BELOW" value="0x1"/>
             </value-group>
             <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
                 <value caption="VLM Disabled" name="OFF" value="0x0"/>
-                <value caption="VLM threshold 5% above BOD level"
-                       name="5ABOVE"
-                       value="0x1"/>
-                <value caption="VLM threshold 15% above BOD level"
-                       name="15ABOVE"
-                       value="0x2"/>
-                <value caption="VLM threshold 25% above BOD level"
-                       name="25ABOVE"
-                       value="0x3"/>
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x1"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x2"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x3"/>
             </value-group>
         </module>
         <module caption="Configurable Custom Logic" id="cla_ccl_v1" name="CCL">
             <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Sequential Control 0"
-                          initval="0x00"
-                          name="SEQCTRL0"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Sequential Control 1"
-                          initval="0x00"
-                          name="SEQCTRL1"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Interrupt Control 0"
-                          initval="0x00"
-                          name="INTCTRL0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode for LUT0"
-                              mask="0x03"
-                              name="INTMODE0"
-                              rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1"
-                              mask="0x0C"
-                              name="INTMODE1"
-                              rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2"
-                              mask="0x30"
-                              name="INTMODE2"
-                              rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3"
-                              mask="0xC0"
-                              name="INTMODE3"
-                              rw="RW"
-                              values="CCL_INTMODE3"/>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x03" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0x0C" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xC0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x0F" name="INT" rw="RW"/>
                 </register>
-                <register caption="LUT 0 Control A"
-                          initval="0x00"
-                          name="LUT0CTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 0 Control A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 0 Control B"
-                          initval="0x00"
-                          name="LUT0CTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 0 Control C"
-                          initval="0x00"
-                          name="LUT0CTRLC"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 0"
-                          initval="0x00"
-                          name="TRUTH0"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 1 Control A"
-                          initval="0x00"
-                          name="LUT1CTRLA"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 1 Control A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 1 Control B"
-                          initval="0x00"
-                          name="LUT1CTRLB"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 1 Control C"
-                          initval="0x00"
-                          name="LUT1CTRLC"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 1"
-                          initval="0x00"
-                          name="TRUTH1"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 2 Control A"
-                          initval="0x00"
-                          name="LUT2CTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 2 Control A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 2 Control B"
-                          initval="0x00"
-                          name="LUT2CTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 2 Control C"
-                          initval="0x00"
-                          name="LUT2CTRLC"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 2"
-                          initval="0x00"
-                          name="TRUTH2"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 3 Control A"
-                          initval="0x00"
-                          name="LUT3CTRLA"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 3 Control A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 3 Control B"
-                          initval="0x00"
-                          name="LUT3CTRLB"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 3 Control C"
-                          initval="0x00"
-                          name="LUT3CTRLC"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 3"
-                          initval="0x00"
-                          name="TRUTH3"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
             </register-group>
@@ -2132,13 +982,9 @@
             <value-group caption="Clock Source Selection" name="CCL_CLKSRC">
                 <value caption="Peripheral Clock" name="CLKPER" value="0x0"/>
                 <value caption="INSEL2 selection" name="IN2" value="0x1"/>
-                <value caption="Internal High Frequency oscillator"
-                       name="OSCHF"
-                       value="0x4"/>
+                <value caption="Internal High Frequency oscillator" name="OSCHF" value="0x4"/>
                 <value caption="Internal 32.768 kHz oscillator" name="OSC32K" value="0x5"/>
-                <value caption="Internal 32.768 kHz oscillator divided by 32"
-                       name="OSC1K"
-                       value="0x6"/>
+                <value caption="Internal 32.768 kHz oscillator divided by 32" name="OSC1K" value="0x6"/>
             </value-group>
             <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
                 <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
@@ -2152,9 +998,7 @@
             <value-group caption="LUT Input 0 Source Selection" name="CCL_INSEL0">
                 <value caption="Masked input" name="MASK" value="0x0"/>
                 <value caption="Feedback input" name="FEEDBACK" value="0x1"/>
-                <value caption="Output from LUT[n+1] as input source"
-                       name="LINK"
-                       value="0x2"/>
+                <value caption="Output from LUT[n+1] as input source" name="LINK" value="0x2"/>
                 <value caption="Event A as input source" name="EVENTA" value="0x3"/>
                 <value caption="Event B as input source" name="EVENTB" value="0x4"/>
                 <value caption="IN0 input source" name="IO" value="0x5"/>
@@ -2168,9 +1012,7 @@
             <value-group caption="LUT Input 1 Source Selection" name="CCL_INSEL1">
                 <value caption="Masked input" name="MASK" value="0x0"/>
                 <value caption="Feedback input" name="FEEDBACK" value="0x1"/>
-                <value caption="Output from LUT[n+1] as input source"
-                       name="LINK"
-                       value="0x2"/>
+                <value caption="Output from LUT[n+1] as input source" name="LINK" value="0x2"/>
                 <value caption="Event A as input source" name="EVENTA" value="0x3"/>
                 <value caption="Event B as input source" name="EVENTB" value="0x4"/>
                 <value caption="IN0 input source" name="IO" value="0x5"/>
@@ -2184,9 +1026,7 @@
             <value-group caption="LUT Input 2 Source Selection" name="CCL_INSEL2">
                 <value caption="Masked input" name="MASK" value="0x0"/>
                 <value caption="Feedback input" name="FEEDBACK" value="0x1"/>
-                <value caption="Output from LUT[n+1] as input source"
-                       name="LINK"
-                       value="0x2"/>
+                <value caption="Output from LUT[n+1] as input source" name="LINK" value="0x2"/>
                 <value caption="Event A as input source" name="EVENTA" value="0x3"/>
                 <value caption="Event B as input source" name="EVENTB" value="0x4"/>
                 <value caption="IN0 input source" name="IO" value="0x5"/>
@@ -2207,174 +1047,62 @@
         </module>
         <module caption="Clock controller" id="avrea" name="CLKCTRL">
             <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
-                <register caption="MCLK Control A"
-                          initval="0x00"
-                          name="MCLKCTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="CLKCTRL_CLKSEL"/>
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock select" mask="0x07" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
                     <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
                 </register>
-                <register caption="MCLK Control B"
-                          initval="0x11"
-                          name="MCLKCTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Control B" initval="0x11" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Prescaler enable" mask="0x01" name="PEN" rw="RW"/>
-                    <bitfield caption="Prescaler division"
-                              mask="0x1E"
-                              name="PDIV"
-                              rw="RW"
-                              values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler division" mask="0x1E" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
                 </register>
-                <register caption="MCLK Control C"
-                          initval="0x00"
-                          name="MCLKCTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Enable"
-                              mask="0x01"
-                              name="CFDEN"
-                              rw="RW"/>
+                <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Enable" mask="0x01" name="CFDEN" rw="RW"/>
                     <bitfield caption="CFD Test" mask="0x02" name="CFDTST" rw="RW"/>
-                    <bitfield caption="CFD Source"
-                              mask="0x0C"
-                              name="CFDSRC"
-                              rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="CFD Source" mask="0x0C" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                 </register>
-                <register caption="MCLK Interrupt Control"
-                          initval="0x00"
-                          name="MCLKINTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Interrupt Enable" mask="0x01" name="CFD" rw="RW"/>
-                    <bitfield caption="Interrupt Type"
-                              mask="0x80"
-                              name="INTTYPE"
-                              rw="RW"
-                              values="CLKCTRL_INTTYPE"/>
+                    <bitfield caption="Interrupt Type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags"
-                          initval="0x00"
-                          name="MCLKINTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detected" mask="0x01" name="CFD" rw="RW"/>
                 </register>
-                <register caption="MCLK Status"
-                          initval="0x00"
-                          name="MCLKSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="System Oscillator changing"
-                              mask="0x01"
-                              name="SOSC"
-                              rw="R"/>
-                    <bitfield caption="High frequency oscillator status"
-                              mask="0x02"
-                              name="OSCHFS"
-                              rw="R"/>
-                    <bitfield caption="32KHz oscillator status"
-                              mask="0x04"
-                              name="OSC32KS"
-                              rw="R"/>
-                    <bitfield caption="32.768 kHz Crystal Oscillator status"
-                              mask="0x08"
-                              name="XOSC32KS"
-                              rw="R"/>
-                    <bitfield caption="External Clock status / XOSCHF status"
-                              mask="0x10"
-                              name="EXTS"
-                              rw="R"/>
+                <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="System Oscillator changing" mask="0x01" name="SOSC" rw="R"/>
+                    <bitfield caption="High frequency oscillator status" mask="0x02" name="OSCHFS" rw="R"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x04" name="OSC32KS" rw="R"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x08" name="XOSC32KS" rw="R"/>
+                    <bitfield caption="External Clock status / XOSCHF status" mask="0x10" name="EXTS" rw="R"/>
                 </register>
-                <register caption="MCLK Timebase"
-                          initval="0x00"
-                          name="MCLKTIMEBASE"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Timebase" initval="0x00" name="MCLKTIMEBASE" offset="0x06" rw="RW" size="1">
                     <bitfield caption="Timebase" mask="0x1F" name="TIMEBASE" rw="RW"/>
                 </register>
-                <register caption="OSCHF Control A"
-                          initval="0x0C"
-                          name="OSCHFCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Automatic Oscillator Tune"
-                              mask="0x03"
-                              name="AUTOTUNE"
-                              rw="RW"
-                              values="CLKCTRL_AUTOTUNE"/>
+                <register caption="OSCHF Control A" initval="0x0C" name="OSCHFCTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Automatic Oscillator Tune" mask="0x03" name="AUTOTUNE" rw="RW" values="CLKCTRL_AUTOTUNE"/>
                     <bitfield caption="Run in standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSCHF Tune"
-                          initval="0x00"
-                          name="OSCHFTUNE"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Tune" initval="0x00" name="OSCHFTUNE" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Oscillator Tune" mask="0xFF" name="TUNE" rw="RW"/>
                 </register>
-                <register caption="OSC32K Control A"
-                          initval="0x00"
-                          name="OSC32KCTRLA"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC32K Control A"
-                          initval="0x00"
-                          name="XOSC32KCTRLA"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Low power mode" mask="0x02" name="LPMODE" rw="RW"/>
                     <bitfield caption="Select" mask="0x04" name="SEL" rw="RW"/>
-                    <bitfield caption="Crystal startup time"
-                              mask="0x30"
-                              name="CSUT"
-                              rw="RW"
-                              values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSCHF Control A"
-                          initval="0x00"
-                          name="XOSCHFCTRLA"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSCHF Control A" initval="0x00" name="XOSCHFCTRLA" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Source Select"
-                              mask="0x02"
-                              name="SELHF"
-                              rw="RW"
-                              values="CLKCTRL_SELHF"/>
-                    <bitfield caption="Start-Up Time"
-                              mask="0x30"
-                              name="CSUTHF"
-                              rw="RW"
-                              values="CLKCTRL_CSUTHF"/>
+                    <bitfield caption="Source Select" mask="0x02" name="SELHF" rw="RW" values="CLKCTRL_SELHF"/>
+                    <bitfield caption="Start-Up Time" mask="0x30" name="CSUTHF" rw="RW" values="CLKCTRL_CSUTHF"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Clock select" name="CLKCTRL_CLKSEL">
-                <value caption="Internal high-frequency oscillator"
-                       name="OSCHF"
-                       value="0x0"/>
+                <value caption="Internal high-frequency oscillator" name="OSCHF" value="0x0"/>
                 <value caption="Internal 32.768 kHz oscillator" name="OSC32K" value="0x1"/>
                 <value caption="32.768 kHz crystal oscillator" name="XOSC32K" value="0x2"/>
                 <value caption="External clock" name="EXTCLK" value="0x3"/>
@@ -2394,9 +1122,7 @@
             </value-group>
             <value-group caption="CFD Source select" name="CLKCTRL_CFDSRC">
                 <value caption="Main Clock" name="CLKMAIN" value="0x0"/>
-                <value caption="High Frequency Crystal Oscillator"
-                       name="XOSCHF"
-                       value="0x1"/>
+                <value caption="High Frequency Crystal Oscillator" name="XOSCHF" value="0x1"/>
                 <value caption="32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x2"/>
             </value-group>
             <value-group caption="Interrupt Type select" name="CLKCTRL_INTTYPE">
@@ -2405,9 +1131,7 @@
             </value-group>
             <value-group caption="Automatic Oscillator Tune select" name="CLKCTRL_AUTOTUNE">
                 <value caption="Disabled" name="OFF" value="0x0"/>
-                <value caption="Tune against 32.768 kHz Crystal Oscillator"
-                       name="XOSC32K"
-                       value="0x1"/>
+                <value caption="Tune against 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x1"/>
             </value-group>
             <value-group caption="Start-Up Time select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF Cycles" name="256CYC" value="0x0"/>
@@ -2427,44 +1151,19 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection"
-                          initval="0x00"
-                          name="CCP"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCP signature"
-                              mask="0xFF"
-                              name="CCP"
-                              rw="RW"
-                              values="CPU_CCP"/>
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Stack Pointer"
-                          initval="0x7FFF"
-                          name="SP"
-                          offset="0xD"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Status Register"
-                          initval="0x00"
-                          name="SREG"
-                          offset="0xF"
-                          rw="RW"
-                          size="1">
+                <register caption="Stack Pointer" initval="0x7FFF" name="SP" offset="0xD" rw="RW" size="2"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
                     <bitfield caption="Carry Flag" mask="0x01" name="C" rw="RW"/>
                     <bitfield caption="Zero Flag" mask="0x02" name="Z" rw="RW"/>
                     <bitfield caption="Negative Flag" mask="0x04" name="N" rw="RW"/>
-                    <bitfield caption="Two's Complement Overflow Flag"
-                              mask="0x08"
-                              name="V"
-                              rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V" rw="RW"/>
                     <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
                     <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
                     <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
-                    <bitfield caption="Global Interrupt Enable Flag"
-                              mask="0x80"
-                              name="I"
-                              rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="CCP signature select" name="CPU_CCP">
@@ -2474,570 +1173,169 @@
         </module>
         <module caption="Interrupt Controller" id="int_8bit_v3" name="CPUINT">
             <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Round-robin Scheduling Enable"
-                              mask="0x01"
-                              name="LVL0RR"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x01" name="LVL0RR" rw="RW"/>
                     <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
-                    <bitfield caption="Interrupt Vector Select"
-                              mask="0x40"
-                              name="IVSEL"
-                              rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Level 0 Interrupt Executing"
-                              mask="0x01"
-                              name="LVL0EX"
-                              rw="R"/>
-                    <bitfield caption="Level 1 Interrupt Executing"
-                              mask="0x02"
-                              name="LVL1EX"
-                              rw="R"/>
-                    <bitfield caption="Non-maskable Interrupt Executing"
-                              mask="0x80"
-                              name="NMIEX"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x01" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x02" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority"
-                          initval="0x00"
-                          name="LVL0PRI"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Level Priority"
-                              mask="0xFF"
-                              name="LVL0PRI"
-                              rw="RW"/>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xFF" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector"
-                          initval="0x00"
-                          name="LVL1VEC"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Vector with High Priority"
-                              mask="0xFF"
-                              name="LVL1VEC"
-                              rw="RW"/>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xFF" name="LVL1VEC" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="CRCSCAN" id="math_pdi_crc_v1" name="CRCSCAN">
             <register-group caption="CRCSCAN" name="CRCSCAN" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable CRC scan" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Enable NMI Trigger" mask="0x02" name="NMIEN" rw="RW"/>
                     <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CRC Source"
-                              mask="0x03"
-                              name="SRC"
-                              rw="RW"
-                              values="CRCSCAN_SRC"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x03" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
                 </register>
-                <register caption="Status"
-                          initval="0x02"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="CRC Busy" mask="0x01" name="BUSY" rw="R"/>
                     <bitfield caption="CRC Ok" mask="0x02" name="OK" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="CRC Source select" name="CRCSCAN_SRC">
                 <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
-                <value caption="CRC on boot and appl section of flash"
-                       name="APPLICATION"
-                       value="0x1"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
                 <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
             </value-group>
         </module>
-        <module caption="Digital to Analog Converter"
-                id="dac_nbit_ctrl_avr_v6"
-                name="DAC">
+        <module caption="Digital to Analog Converter" id="dac_nbit_ctrl_avr_v6" name="DAC">
             <register-group caption="Digital to Analog Converter" name="DAC" size="0x10">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="DAC Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Output Buffer Range"
-                              mask="0x30"
-                              name="OUTRANGE"
-                              rw="RW"
-                              values="DAC_OUTRANGE"/>
+                    <bitfield caption="Output Buffer Range" mask="0x30" name="OUTRANGE" rw="RW" values="DAC_OUTRANGE"/>
                     <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="DATA Register"
-                          name="DATA"
-                          offset="0x2"
-                          rw="RW"
-                          size="2">
+                <register caption="DATA Register" name="DATA" offset="0x2" rw="RW" size="2">
                     <bitfield caption="Data" mask="0xFFC0" name="DATA" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Output Buffer Range select" name="DAC_OUTRANGE">
-                <value caption="Output buffer automatically choose best range"
-                       name="AUTO"
-                       value="0x0"/>
-                <value caption="Output buffer configured to low range"
-                       name="LOW"
-                       value="0x2"/>
-                <value caption="Output buffer configured to high range"
-                       name="HIGH"
-                       value="0x3"/>
+                <value caption="Output buffer automatically choose best range" name="AUTO" value="0x0"/>
+                <value caption="Output buffer configured to low range" name="LOW" value="0x2"/>
+                <value caption="Output buffer configured to high range" name="HIGH" value="0x3"/>
             </value-group>
         </module>
         <module caption="Event System" id="avrea" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Software Event A"
-                          initval="0x00"
-                          name="SWEVENTA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0xFF"
-                              name="SWEVENTA"
-                              rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0xFF" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
-                <register caption="Multiplexer Channel 0"
-                          initval="0x00"
-                          name="CHANNEL0"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="Multiplexer Channel 1"
-                          initval="0x00"
-                          name="CHANNEL1"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="Multiplexer Channel 2"
-                          initval="0x00"
-                          name="CHANNEL2"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="Multiplexer Channel 3"
-                          initval="0x00"
-                          name="CHANNEL3"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="Multiplexer Channel 4"
-                          initval="0x00"
-                          name="CHANNEL4"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="Multiplexer Channel 5"
-                          initval="0x00"
-                          name="CHANNEL5"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="CCL0 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT0A"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL0 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT0B"
-                          offset="0x21"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL1 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT1A"
-                          offset="0x22"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL1 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT1B"
-                          offset="0x23"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL2 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT2A"
-                          offset="0x24"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL2 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT2B"
-                          offset="0x25"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL3 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT3A"
-                          offset="0x26"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL3 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT3B"
-                          offset="0x27"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="ADC0"
-                          initval="0x00"
-                          name="USERADC0START"
-                          offset="0x28"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="EVOUTA"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTA"
-                          offset="0x29"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="EVOUTC"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTC"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="EVOUTD"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTD"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="EVOUTF"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTF"
-                          offset="0x2E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="USART0"
-                          initval="0x00"
-                          name="USERUSART0IRDA"
-                          offset="0x2F"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="USART1"
-                          initval="0x00"
-                          name="USERUSART1IRDA"
-                          offset="0x30"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="USART1" initval="0x00" name="USERUSART1IRDA" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="USART2"
-                          initval="0x00"
-                          name="USERUSART2IRDA"
-                          offset="0x31"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="USART2" initval="0x00" name="USERUSART2IRDA" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCA0 Event A"
-                          initval="0x00"
-                          name="USERTCA0CNTA"
-                          offset="0x32"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCA0 Event B"
-                          initval="0x00"
-                          name="USERTCA0CNTB"
-                          offset="0x33"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCA1 Event A"
-                          initval="0x00"
-                          name="USERTCA1CNTA"
-                          offset="0x34"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCA1 Event B"
-                          initval="0x00"
-                          name="USERTCA1CNTB"
-                          offset="0x35"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB0 Event A"
-                          initval="0x00"
-                          name="USERTCB0CAPT"
-                          offset="0x36"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB0 Event B"
-                          initval="0x00"
-                          name="USERTCB0COUNT"
-                          offset="0x37"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB1 Event A"
-                          initval="0x00"
-                          name="USERTCB1CAPT"
-                          offset="0x38"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x38" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB1 Event B"
-                          initval="0x00"
-                          name="USERTCB1COUNT"
-                          offset="0x39"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x39" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB2 Event A"
-                          initval="0x00"
-                          name="USERTCB2CAPT"
-                          offset="0x3A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x3A" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB2 Event B"
-                          initval="0x00"
-                          name="USERTCB2COUNT"
-                          offset="0x3B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x3B" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB3 Event A"
-                          initval="0x00"
-                          name="USERTCB3CAPT"
-                          offset="0x3C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x3C" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB3 Event B"
-                          initval="0x00"
-                          name="USERTCB3COUNT"
-                          offset="0x3D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x3D" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
             <value-group caption="Channel generator select" name="EVSYS_CHANNEL">
@@ -3045,24 +1343,12 @@
                 <value caption="UPDI SYNCH character" name="UPDI_SYNCH" value="0x1"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer Event 0"
-                       name="RTC_PITEV0"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer Event 1"
-                       name="RTC_PITEV1"
-                       value="0x9"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer Event 0" name="RTC_PITEV0" value="0x8"/>
+                <value caption="Periodic Interrupt Timer Event 1" name="RTC_PITEV1" value="0x9"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x21"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RES" value="0x24"/>
@@ -3080,36 +1366,16 @@
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow"
-                       name="TCA1_OVF_LUNF"
-                       value="0x88"/>
-                <value caption="Timer/Counter A1 high byte timer underflow"
-                       name="TCA1_HUNF"
-                       value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0"
-                       name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1"
-                       name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2"
-                       name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
+                <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3131,153 +1397,50 @@
             </value-group>
             <value-group caption="User channel select" name="EVSYS_USER">
                 <value caption="Off, No Eventsys Channel connected" name="OFF" value="0x0"/>
-                <value caption="Connect user to event channel 0"
-                       name="CHANNEL0"
-                       value="0x1"/>
-                <value caption="Connect user to event channel 1"
-                       name="CHANNEL1"
-                       value="0x2"/>
-                <value caption="Connect user to event channel 2"
-                       name="CHANNEL2"
-                       value="0x3"/>
-                <value caption="Connect user to event channel 3"
-                       name="CHANNEL3"
-                       value="0x4"/>
-                <value caption="Connect user to event channel 4"
-                       name="CHANNEL4"
-                       value="0x5"/>
-                <value caption="Connect user to event channel 5"
-                       name="CHANNEL5"
-                       value="0x6"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
             </value-group>
         </module>
         <module caption="Fuses" id="avrea" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Watchdog Configuration"
-                          initval="0x00"
-                          name="WDTCFG"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Watchdog Timeout Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="FUSE_WINDOW"/>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
-                <register caption="BOD Configuration"
-                          initval="0x00"
-                          name="BODCFG"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="BOD Operation in Sleep Mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="FUSE_SLEEP"/>
-                    <bitfield caption="BOD Operation in Active Mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="RW"
-                              values="FUSE_ACTIVE"/>
-                    <bitfield caption="BOD Sample Frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Level"
-                              mask="0xE0"
-                              name="LVL"
-                              rw="RW"
-                              values="FUSE_LVL"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x03" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x0C" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Level" mask="0xE0" name="LVL" rw="RW" values="FUSE_LVL"/>
                 </register>
-                <register caption="Oscillator Configuration"
-                          initval="0x00"
-                          name="OSCCFG"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="High-frequency Oscillator Frequency"
-                              mask="0x08"
-                              name="OSCHFFRQ"
-                              rw="RW"
-                              values="FUSE_OSCHFFRQ"/>
+                <register caption="Oscillator Configuration" initval="0x00" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="High-frequency Oscillator Frequency" mask="0x08" name="OSCHFFRQ" rw="RW" values="FUSE_OSCHFFRQ"/>
                 </register>
-                <register caption="System Configuration 0"
-                          initval="0xD0"
-                          name="SYSCFG0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="EEPROM Save"
-                              mask="0x01"
-                              name="EESAVE"
-                              rw="RW"
-                              values="FUSE_EESAVE"/>
-                    <bitfield caption="Reset Pin Configuration"
-                              mask="0x08"
-                              name="RSTPINCFG"
-                              rw="RW"
-                              values="FUSE_RSTPINCFG"/>
-                    <bitfield caption="UPDI Pin Configuration"
-                              mask="0x10"
-                              name="UPDIPINCFG"
-                              rw="RW"
-                              values="FUSE_UPDIPINCFG"/>
-                    <bitfield caption="CRC Select"
-                              mask="0x20"
-                              name="CRCSEL"
-                              rw="RW"
-                              values="FUSE_CRCSEL"/>
-                    <bitfield caption="CRC Source"
-                              mask="0xC0"
-                              name="CRCSRC"
-                              rw="RW"
-                              values="FUSE_CRCSRC"/>
+                <register caption="System Configuration 0" initval="0xD0" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="EEPROM Save" mask="0x01" name="EESAVE" rw="RW" values="FUSE_EESAVE"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x08" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW" values="FUSE_UPDIPINCFG"/>
+                    <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
+                    <bitfield caption="CRC Source" mask="0xC0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                 </register>
-                <register caption="System Configuration 1"
-                          initval="0x07"
-                          name="SYSCFG1"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Startup Time"
-                              mask="0x07"
-                              name="SUT"
-                              rw="RW"
-                              values="FUSE_SUT"/>
+                <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x07" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
-                <register caption="Code Section Size"
-                          initval="0x00"
-                          name="CODESIZE"
-                          offset="0x7"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Boot Section Size"
-                          initval="0x00"
-                          name="BOOTSIZE"
-                          offset="0x8"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
+                <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="Disabled" name="DISABLE" value="0x00"/>
                 <value caption="Enabled in continuous mode" name="ENABLED" value="0x01"/>
                 <value caption="Enabled in sampled mode" name="SAMPLED" value="0x02"/>
-                <value caption="Enabled in continuous mode. Execution halted at wake-up until BOD is running"
-                       name="ENABLEWAIT"
-                       value="0x03"/>
+                <value caption="Enabled in continuous mode. Execution halted at wake-up until BOD is running" name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
-                <value caption="BOD Disabled during normal operation"
-                       name="BODLEVEL0"
-                       value="0x00"/>
+                <value caption="BOD Disabled during normal operation" name="BODLEVEL0" value="0x00"/>
                 <value caption="1.9 V" name="BODLEVEL1" value="0x01"/>
                 <value caption="2.7 V" name="BODLEVEL2" value="0x02"/>
                 <value caption="4.5 V" name="BODLEVEL3" value="0x03"/>
@@ -3291,8 +1454,7 @@
                 <value caption="Enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="Enabled in sampled mode" name="SAMPLE" value="0x02"/>
             </value-group>
-            <value-group caption="High-frequency Oscillator Frequency select"
-                         name="FUSE_OSCHFFRQ">
+            <value-group caption="High-frequency Oscillator Frequency select" name="FUSE_OSCHFFRQ">
                 <value caption="OSCHF running at 20 MHz" name="20M" value="0x0"/>
                 <value caption="OSCHF running at 16 MHz" name="16M" value="0x1"/>
             </value-group>
@@ -3301,22 +1463,14 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)"
-                       name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
-                <value caption="CRC of application code and boot sections"
-                       name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="EEPROM Save select" name="FUSE_EESAVE">
-                <value caption="EEPROM content is erased during chip erase"
-                       name="DISABLE"
-                       value="0x0"/>
-                <value caption="EEPROM content is preserved during chip erase"
-                       name="ENABLE"
-                       value="0x1"/>
+                <value caption="EEPROM content is erased during chip erase" name="DISABLE" value="0x0"/>
+                <value caption="EEPROM content is preserved during chip erase" name="ENABLE" value="0x1"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
                 <value caption="No External Reset" name="NONE" value="0x0"/>
@@ -3367,41 +1521,16 @@
         </module>
         <module caption="General Purpose Registers" id="avrea" name="GPR">
             <register-group caption="General Purpose Registers" name="GPR" size="0x4">
-                <register caption="General Purpose Register 0"
-                          name="GPR0"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 1"
-                          name="GPR1"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 2"
-                          name="GPR2"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 3"
-                          name="GPR3"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
+                <register caption="General Purpose Register 0" name="GPR0" offset="0x00" rw="RW" size="1"/>
+                <register caption="General Purpose Register 1" name="GPR1" offset="0x01" rw="RW" size="1"/>
+                <register caption="General Purpose Register 2" name="GPR2" offset="0x02" rw="RW" size="1"/>
+                <register caption="General Purpose Register 3" name="GPR3" offset="0x03" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Lockbits" id="avrea" name="LOCK">
             <register-group caption="Lockbits" name="LOCK" size="0x4">
-                <register caption="Lock Key Bits"
-                          initval="0x5CC5C55C"
-                          name="KEY"
-                          offset="0x0"
-                          rw="RW"
-                          size="4">
-                    <bitfield caption="Lock Key"
-                              mask="0xFFFFFFFF"
-                              name="KEY"
-                              rw="RW"
-                              values="LOCK_KEY"/>
+                <register caption="Lock Key Bits" initval="0x5CC5C55C" name="KEY" offset="0x0" rw="RW" size="4">
+                    <bitfield caption="Lock Key" mask="0xFFFFFFFF" name="KEY" rw="RW" values="LOCK_KEY"/>
                 </register>
             </register-group>
             <value-group caption="Lock Key select" name="LOCK_KEY">
@@ -3409,92 +1538,34 @@
                 <value caption="Read and write lock" name="RWLOCK" value="0xA33A3AA3"/>
             </value-group>
         </module>
-        <module caption="Non-volatile Memory Controller"
-                id="nvm_ctrl_avr_v3"
-                name="NVMCTRL">
+        <module caption="Non-volatile Memory Controller" id="nvm_ctrl_avr_v3" name="NVMCTRL">
             <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x40">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x7F"
-                              name="CMD"
-                              rw="RW"
-                              values="NVMCTRL_CMD"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x30"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Application Code Write Protect"
-                              mask="0x01"
-                              name="APPCODEWP"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x30" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Application Code Write Protect" mask="0x01" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x02" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Application Data Write Protect"
-                              mask="0x04"
-                              name="APPDATAWP"
-                              rw="RW"/>
+                    <bitfield caption="Application Data Write Protect" mask="0x04" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="EEPROM Write Protect" mask="0x08" name="EEWP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space"
-                              mask="0x30"
-                              name="FLMAP"
-                              rw="RW"
-                              values="NVMCTRL_FLMAP"/>
-                    <bitfield caption="Flash Mapping Lock"
-                              mask="0x80"
-                              name="FLMAPLOCK"
-                              rw="RW"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x04" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                     <bitfield caption="Flash Ready" mask="0x02" name="FLREADY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x05" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                     <bitfield caption="Flash Ready" mask="0x02" name="FLREADY" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x06"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x06" rw="R" size="1">
                     <bitfield caption="EEPROM busy" mask="0x01" name="EEBUSY" rw="R"/>
                     <bitfield caption="Flash busy" mask="0x02" name="FLBUSY" rw="R"/>
-                    <bitfield caption="Write error"
-                              mask="0x70"
-                              name="ERROR"
-                              rw="R"
-                              values="NVMCTRL_ERROR"/>
+                    <bitfield caption="Write error" mask="0x70" name="ERROR" rw="R" values="NVMCTRL_ERROR"/>
                 </register>
-                <register caption="Data"
-                          initval="0x0000"
-                          name="DATA"
-                          offset="0x08"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Address"
-                          initval="0x00000000"
-                          name="ADDR"
-                          offset="0x0C"
-                          rw="RW"
-                          size="4"/>
+                <register caption="Data" initval="0x0000" name="DATA" offset="0x08" rw="RW" size="2"/>
+                <register caption="Address" initval="0x00000000" name="ADDR" offset="0x0C" rw="RW" size="4"/>
             </register-group>
             <value-group caption="Command select" name="NVMCTRL_CMD">
                 <value caption="No Command" name="NOCMD" value="0x00"/>
@@ -3513,9 +1584,7 @@
                 <value caption="EEPROM Page Erase" name="EEPER" value="0x17"/>
                 <value caption="EEPROM Page Buffer Clear" name="EEPBCLR" value="0x1F"/>
                 <value caption="Chip Erase Command (UPDI only)" name="CHER" value="0x20"/>
-                <value caption="EEPROM Erase Command (UPDI only)"
-                       name="EECHER"
-                       value="0x30"/>
+                <value caption="EEPROM Erase Command (UPDI only)" name="EECHER" value="0x30"/>
             </value-group>
             <value-group caption="Flash Mapping in Data space select" name="NVMCTRL_FLMAP">
                 <value caption="Flash section 0, 0 - 32KB" name="SECTION0" value="0x0"/>
@@ -3525,294 +1594,88 @@
             </value-group>
             <value-group caption="Write error select" name="NVMCTRL_ERROR">
                 <value caption="No Error" name="NOERROR" value="0x0"/>
-                <value caption="Attempt to program write protected area"
-                       name="WRITEPROTECT"
-                       value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted"
-                       name="CMDCOLLISION"
-                       value="0x3"/>
-                <value caption="Address cannot be written with selected command"
-                       name="WRONGSECTION"
-                       value="0x4"/>
+                <value caption="Attempt to program write protected area" name="WRITEPROTECT" value="0x2"/>
+                <value caption="Selecting new write command while write command already seleted" name="CMDCOLLISION" value="0x3"/>
+                <value caption="Address cannot be written with selected command" name="WRONGSECTION" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_avr_v3" name="PORT">
             <register-group caption="I/O Ports" name="PORT" size="0x20">
-                <register caption="Data Direction"
-                          initval="0x00"
-                          name="DIR"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Set"
-                          initval="0x00"
-                          name="DIRSET"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Clear"
-                          initval="0x00"
-                          name="DIRCLR"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Toggle"
-                          initval="0x00"
-                          name="DIRTGL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          initval="0x00"
-                          name="OUT"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Set"
-                          initval="0x00"
-                          name="OUTSET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Clear"
-                          initval="0x00"
-                          name="OUTCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Toggle"
-                          initval="0x00"
-                          name="OUTTGL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          initval="0x00"
-                          name="IN"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" initval="0x00" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Set" initval="0x00" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" initval="0x00" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" initval="0x00" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Output Value" initval="0x00" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Set" initval="0x00" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Clear" initval="0x00" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" initval="0x00" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Input Value" initval="0x00" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
-                <register caption="Port Control"
-                          initval="0x00"
-                          name="PORTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Slew Rate Limit Enable" mask="0x01" name="SRL" rw="RW"/>
                 </register>
-                <register caption="Pin Control Config"
-                          initval="0x00"
-                          name="PINCONFIG"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin Control Config" initval="0x00" name="PINCONFIG" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin Control Update"
-                          initval="0x00"
-                          name="PINCTRLUPD"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Pin Control Set"
-                          initval="0x00"
-                          name="PINCTRLSET"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Pin Control Clear"
-                          initval="0x00"
-                          name="PINCTRLCLR"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Pin 0 Control"
-                          initval="0x00"
-                          name="PIN0CTRL"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin Control Update" initval="0x00" name="PINCTRLUPD" offset="0x0C" rw="RW" size="1"/>
+                <register caption="Pin Control Set" initval="0x00" name="PINCTRLSET" offset="0x0D" rw="RW" size="1"/>
+                <register caption="Pin Control Clear" initval="0x00" name="PINCTRLCLR" offset="0x0E" rw="RW" size="1"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 1 Control"
-                          initval="0x00"
-                          name="PIN1CTRL"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 2 Control"
-                          initval="0x00"
-                          name="PIN2CTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 3 Control"
-                          initval="0x00"
-                          name="PIN3CTRL"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 4 Control"
-                          initval="0x00"
-                          name="PIN4CTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 5 Control"
-                          initval="0x00"
-                          name="PIN5CTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 6 Control"
-                          initval="0x00"
-                          name="PIN6CTRL"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 7 Control"
-                          initval="0x00"
-                          name="PIN7CTRL"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Event Generation Control"
-                          initval="0x00"
-                          name="EVGENCTRL"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Generator 0 Select"
-                              mask="0x07"
-                              name="EVGEN0SEL"
-                              rw="RW"
-                              values="PORT_EVGEN0SEL"/>
-                    <bitfield caption="Event Generator 1 Select"
-                              mask="0x70"
-                              name="EVGEN1SEL"
-                              rw="RW"
-                              values="PORT_EVGEN1SEL"/>
+                <register caption="Event Generation Control" initval="0x00" name="EVGENCTRL" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Event Generator 0 Select" mask="0x07" name="EVGEN0SEL" rw="RW" values="PORT_EVGEN0SEL"/>
+                    <bitfield caption="Event Generator 1 Select" mask="0x70" name="EVGEN1SEL" rw="RW" values="PORT_EVGEN1SEL"/>
                 </register>
             </register-group>
             <value-group caption="Event Generator 0 Select" name="PORT_EVGEN0SEL">
@@ -3840,177 +1703,52 @@
                 <value caption="TTL Input level" name="TTL" value="0x1"/>
             </value-group>
             <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
-                <value caption="Interrupt disabled but input buffer enabled"
-                       name="INTDISABLE"
-                       value="0x0"/>
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
                 <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
                 <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
                 <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
-                <value caption="Digital Input Buffer disabled"
-                       name="INPUT_DISABLE"
-                       value="0x4"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
                 <value caption="Sense low Level" name="LEVEL" value="0x5"/>
             </value-group>
         </module>
         <module caption="Port Multiplexer" id="avrea" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x20">
-                <register caption="EVSYS route A"
-                          initval="0x00"
-                          name="EVSYSROUTEA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Output A"
-                              mask="0x01"
-                              name="EVOUTA"
-                              rw="RW"
-                              values="PORTMUX_EVOUTA"/>
-                    <bitfield caption="Event Output D"
-                              mask="0x08"
-                              name="EVOUTD"
-                              rw="RW"
-                              values="PORTMUX_EVOUTD"/>
-                    <bitfield caption="Event Output F"
-                              mask="0x20"
-                              name="EVOUTF"
-                              rw="RW"
-                              values="PORTMUX_EVOUTF"/>
+                <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Event Output A" mask="0x01" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output D" mask="0x08" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
                 </register>
-                <register caption="CCL route A"
-                          initval="0x00"
-                          name="CCLROUTEA"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals"
-                              mask="0x01"
-                              name="LUT0"
-                              rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals"
-                              mask="0x02"
-                              name="LUT1"
-                              rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals"
-                              mask="0x04"
-                              name="LUT2"
-                              rw="RW"
-                              values="PORTMUX_LUT2"/>
+                <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x01" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x02" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x04" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
                 </register>
-                <register caption="USART route A"
-                          initval="0x00"
-                          name="USARTROUTEA"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="USART0 Routing"
-                              mask="0x07"
-                              name="USART0"
-                              rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="USART1 Routing"
-                              mask="0x18"
-                              name="USART1"
-                              rw="RW"
-                              values="PORTMUX_USART1"/>
+                <register caption="USART route A" initval="0x00" name="USARTROUTEA" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="USART0 Routing" mask="0x07" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="USART1 Routing" mask="0x18" name="USART1" rw="RW" values="PORTMUX_USART1"/>
                 </register>
-                <register caption="USART route B"
-                          initval="0x00"
-                          name="USARTROUTEB"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="USART2 Routing"
-                              mask="0x30"
-                              name="USART2"
-                              rw="RW"
-                              values="PORTMUX_USART2"/>
+                <register caption="USART route B" initval="0x00" name="USARTROUTEB" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="USART2 Routing" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
                 </register>
-                <register caption="SPI route A"
-                          initval="0x00"
-                          name="SPIROUTEA"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI0 Signals"
-                              mask="0x07"
-                              name="SPI0"
-                              rw="RW"
-                              values="PORTMUX_SPI0"/>
+                <register caption="SPI route A" initval="0x00" name="SPIROUTEA" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="SPI0 Signals" mask="0x07" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                 </register>
-                <register caption="TWI route A"
-                          initval="0x00"
-                          name="TWIROUTEA"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TWI0 Signals"
-                              mask="0x03"
-                              name="TWI0"
-                              rw="RW"
-                              values="PORTMUX_TWI0"/>
+                <register caption="TWI route A" initval="0x00" name="TWIROUTEA" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="TWI0 Signals" mask="0x03" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="TCA route A"
-                          initval="0x00"
-                          name="TCAROUTEA"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCA0 Signals"
-                              mask="0x07"
-                              name="TCA0"
-                              rw="RW"
-                              values="PORTMUX_TCA0"/>
-                    <bitfield caption="TCA1 Signals"
-                              mask="0x38"
-                              name="TCA1"
-                              rw="RW"
-                              values="PORTMUX_TCA1"/>
+                <register caption="TCA route A" initval="0x00" name="TCAROUTEA" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="TCA0 Signals" mask="0x07" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
+                    <bitfield caption="TCA1 Signals" mask="0x38" name="TCA1" rw="RW" values="PORTMUX_TCA1"/>
                 </register>
-                <register caption="TCB route A"
-                          initval="0x00"
-                          name="TCBROUTEA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCB0 Output"
-                              mask="0x01"
-                              name="TCB0"
-                              rw="RW"
-                              values="PORTMUX_TCB0"/>
-                    <bitfield caption="TCB1 Output"
-                              mask="0x02"
-                              name="TCB1"
-                              rw="RW"
-                              values="PORTMUX_TCB1"/>
-                    <bitfield caption="TCB2 Output"
-                              mask="0x04"
-                              name="TCB2"
-                              rw="RW"
-                              values="PORTMUX_TCB2"/>
-                    <bitfield caption="TCB3 Output"
-                              mask="0x08"
-                              name="TCB3"
-                              rw="RW"
-                              values="PORTMUX_TCB3"/>
+                <register caption="TCB route A" initval="0x00" name="TCBROUTEA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="TCB0 Output" mask="0x01" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="TCB1 Output" mask="0x02" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+                    <bitfield caption="TCB2 Output" mask="0x04" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
+                    <bitfield caption="TCB3 Output" mask="0x08" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
                 </register>
-                <register caption="AC route A"
-                          initval="0x00"
-                          name="ACROUTEA"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Comparator 0 Output"
-                              mask="0x01"
-                              name="AC0"
-                              rw="RW"
-                              values="PORTMUX_AC0"/>
-                    <bitfield caption="Analog Comparator 1 Output"
-                              mask="0x02"
-                              name="AC1"
-                              rw="RW"
-                              values="PORTMUX_AC1"/>
+                <register caption="AC route A" initval="0x00" name="ACROUTEA" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator 0 Output" mask="0x01" name="AC0" rw="RW" values="PORTMUX_AC0"/>
+                    <bitfield caption="Analog Comparator 1 Output" mask="0x02" name="AC1" rw="RW" values="PORTMUX_AC1"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -4090,225 +1828,81 @@
                 <value caption="Not connected to any pins" name="NONE" value="0x3"/>
             </value-group>
         </module>
-        <module caption="Reset controller"
-                id="rst_integration_avr_v2"
-                name="RSTCTRL">
+        <module caption="Reset controller" id="rst_integration_avr_v2" name="RSTCTRL">
             <register-group caption="Reset controller" name="RSTCTRL" size="0x10">
-                <register caption="Reset Flags"
-                          initval="0x00"
-                          name="RSTFR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Power on Reset flag" mask="0x01" name="PORF" rw="RW"/>
-                    <bitfield caption="Brown out detector Reset flag"
-                              mask="0x02"
-                              name="BORF"
-                              rw="RW"/>
+                    <bitfield caption="Brown out detector Reset flag" mask="0x02" name="BORF" rw="RW"/>
                     <bitfield caption="External Reset flag" mask="0x04" name="EXTRF" rw="RW"/>
                     <bitfield caption="Watch dog Reset flag" mask="0x08" name="WDRF" rw="RW"/>
                     <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
                     <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
                 </register>
-                <register caption="Software Reset"
-                          initval="0x00"
-                          name="SWRR"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Software Reset Enable" mask="0x01" name="SWRE" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Real-Time Counter" id="tmr_16b_rtc_avr_v2" name="RTC">
             <register-group caption="Real-Time Counter" name="RTC" size="0x20">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="RTCEN" rw="RW"/>
                     <bitfield caption="Correction enable" mask="0x04" name="CORREN" rw="RW"/>
-                    <bitfield caption="Prescaling Factor"
-                              mask="0x78"
-                              name="PRESCALER"
-                              rw="RW"
-                              values="RTC_PRESCALER"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
                     <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x01"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLABUSY"
-                              rw="R"/>
-                    <bitfield caption="Count Synchronization Busy Flag"
-                              mask="0x02"
-                              name="CNTBUSY"
-                              rw="R"/>
-                    <bitfield caption="Period Synchronization Busy Flag"
-                              mask="0x04"
-                              name="PERBUSY"
-                              rw="R"/>
-                    <bitfield caption="Comparator Synchronization Busy Flag"
-                              mask="0x08"
-                              name="CMPBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x02" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x04" name="PERBUSY" rw="R"/>
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x08" name="CMPBUSY" rw="R"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt enable"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt Flag"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Temporary"
-                          name="TEMP"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Debug control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Calibration"
-                          initval="0x00"
-                          name="CALIB"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Error Correction Value"
-                              mask="0x7F"
-                              name="ERROR"
-                              rw="RW"/>
-                    <bitfield caption="Error Correction Sign Bit"
-                              mask="0x80"
-                              name="SIGN"
-                              rw="RW"/>
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7F" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
                 </register>
-                <register caption="Clock Select"
-                          initval="0x00"
-                          name="CLKSEL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Select"
-                              mask="0x03"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="RTC_CLKSEL"/>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x03" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
                 </register>
                 <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
-                <register caption="Period"
-                          initval="0xFFFF"
-                          name="PER"
-                          offset="0x0A"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
                 <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
-                <register caption="PIT Control A"
-                          initval="0x00"
-                          name="PITCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="PITEN" rw="RW"/>
-                    <bitfield caption="Period"
-                              mask="0x78"
-                              name="PERIOD"
-                              rw="RW"
-                              values="RTC_PERIOD"/>
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
                 </register>
-                <register caption="PIT Status"
-                          initval="0x00"
-                          name="PITSTATUS"
-                          offset="0x11"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLBUSY"
-                              rw="R"/>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLBUSY" rw="R"/>
                 </register>
-                <register caption="PIT Interrupt Control"
-                          initval="0x00"
-                          name="PITINTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags"
-                          initval="0x00"
-                          name="PITINTFLAGS"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Debug control"
-                          initval="0x00"
-                          name="PITDBGCTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Event Generation Control A"
-                          initval="0x00"
-                          name="PITEVGENCTRLA"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Generation 0 Select"
-                              mask="0x0F"
-                              name="EVGEN0SEL"
-                              rw="RW"
-                              values="RTC_EVGEN0SEL"/>
-                    <bitfield caption="Event Generation 1 Select"
-                              mask="0xF0"
-                              name="EVGEN1SEL"
-                              rw="RW"
-                              values="RTC_EVGEN1SEL"/>
+                <register caption="PIT Event Generation Control A" initval="0x00" name="PITEVGENCTRLA" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Event Generation 0 Select" mask="0x0F" name="EVGEN0SEL" rw="RW" values="RTC_EVGEN0SEL"/>
+                    <bitfield caption="Event Generation 1 Select" mask="0xF0" name="EVGEN1SEL" rw="RW" values="RTC_EVGEN1SEL"/>
                 </register>
             </register-group>
             <value-group caption="Clock Select" name="RTC_CLKSEL">
                 <value caption="Internal 32.768 kHz Oscillator" name="OSC32K" value="0x0"/>
-                <value caption="Internal 32.768 kHz Oscillator Divided by 32"
-                       name="OSC1K"
-                       value="0x1"/>
+                <value caption="Internal 32.768 kHz Oscillator Divided by 32" name="OSC1K" value="0x1"/>
                 <value caption="32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x2"/>
                 <value caption="External Clock" name="EXTCLK" value="0x3"/>
             </value-group>
@@ -4384,129 +1978,34 @@
         </module>
         <module caption="Signature row" id="avrea" name="SIGROW">
             <register-group caption="Signature row" name="SIGROW" size="0x40">
-                <register caption="Device ID Byte 0"
-                          name="DEVICEID0"
-                          offset="0x00"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 1"
-                          name="DEVICEID1"
-                          offset="0x01"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 2"
-                          name="DEVICEID2"
-                          offset="0x02"
-                          rw="R"
-                          size="1"/>
-                <register caption="Temperature Calibration 0"
-                          name="TEMPSENSE0"
-                          offset="0x04"
-                          rw="R"
-                          size="2"/>
-                <register caption="Temperature Calibration 1"
-                          name="TEMPSENSE1"
-                          offset="0x06"
-                          rw="R"
-                          size="2"/>
-                <register caption="Serial Number Byte 0"
-                          name="SERNUM0"
-                          offset="0x10"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 1"
-                          name="SERNUM1"
-                          offset="0x11"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 2"
-                          name="SERNUM2"
-                          offset="0x12"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 3"
-                          name="SERNUM3"
-                          offset="0x13"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 4"
-                          name="SERNUM4"
-                          offset="0x14"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 5"
-                          name="SERNUM5"
-                          offset="0x15"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 6"
-                          name="SERNUM6"
-                          offset="0x16"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 7"
-                          name="SERNUM7"
-                          offset="0x17"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 8"
-                          name="SERNUM8"
-                          offset="0x18"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 9"
-                          name="SERNUM9"
-                          offset="0x19"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 10"
-                          name="SERNUM10"
-                          offset="0x1A"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 11"
-                          name="SERNUM11"
-                          offset="0x1B"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 12"
-                          name="SERNUM12"
-                          offset="0x1C"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 13"
-                          name="SERNUM13"
-                          offset="0x1D"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 14"
-                          name="SERNUM14"
-                          offset="0x1E"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 15"
-                          name="SERNUM15"
-                          offset="0x1F"
-                          rw="R"
-                          size="1"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Temperature Calibration 0" name="TEMPSENSE0" offset="0x04" rw="R" size="2"/>
+                <register caption="Temperature Calibration 1" name="TEMPSENSE1" offset="0x06" rw="R" size="2"/>
+                <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x10" rw="R" size="1"/>
+                <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x11" rw="R" size="1"/>
+                <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x12" rw="R" size="1"/>
+                <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x13" rw="R" size="1"/>
+                <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x14" rw="R" size="1"/>
+                <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x15" rw="R" size="1"/>
+                <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x16" rw="R" size="1"/>
+                <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x17" rw="R" size="1"/>
+                <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x18" rw="R" size="1"/>
+                <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x19" rw="R" size="1"/>
+                <register caption="Serial Number Byte 10" name="SERNUM10" offset="0x1A" rw="R" size="1"/>
+                <register caption="Serial Number Byte 11" name="SERNUM11" offset="0x1B" rw="R" size="1"/>
+                <register caption="Serial Number Byte 12" name="SERNUM12" offset="0x1C" rw="R" size="1"/>
+                <register caption="Serial Number Byte 13" name="SERNUM13" offset="0x1D" rw="R" size="1"/>
+                <register caption="Serial Number Byte 14" name="SERNUM14" offset="0x1E" rw="R" size="1"/>
+                <register caption="Serial Number Byte 15" name="SERNUM15" offset="0x1F" rw="R" size="1"/>
             </register-group>
         </module>
-        <module caption="Sleep Controller"
-                id="clk_sleep_ctrl_avr_v1"
-                name="SLPCTRL">
+        <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v1" name="SLPCTRL">
             <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Sleep enable" mask="0x01" name="SEN" rw="RW"/>
-                    <bitfield caption="Sleep mode"
-                              mask="0x06"
-                              name="SMODE"
-                              rw="RW"
-                              values="SLPCTRL_SMODE"/>
+                    <bitfield caption="Sleep mode" mask="0x06" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
             </register-group>
             <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
@@ -4517,110 +2016,36 @@
         </module>
         <module caption="Serial Peripheral Interface" id="spi_8bit_v2" name="SPI">
             <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable Module" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Prescaler"
-                              mask="0x06"
-                              name="PRESC"
-                              rw="RW"
-                              values="SPI_PRESC"/>
+                    <bitfield caption="Prescaler" mask="0x06" name="PRESC" rw="RW" values="SPI_PRESC"/>
                     <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
-                    <bitfield caption="Host Operation Enable"
-                              mask="0x20"
-                              name="MASTER"
-                              rw="RW"/>
+                    <bitfield caption="Host Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
                     <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI Mode"
-                              mask="0x03"
-                              name="MODE"
-                              rw="RW"
-                              values="SPI_MODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="SPI Mode" mask="0x03" name="MODE" rw="RW" values="SPI_MODE"/>
                     <bitfield caption="SPI Select Disable" mask="0x04" name="SSD" rw="RW"/>
-                    <bitfield caption="Buffer Mode Wait for Receive"
-                              mask="0x40"
-                              name="BUFWR"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Mode Wait for Receive" mask="0x40" name="BUFWR" rw="RW"/>
                     <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Enable" mask="0x01" name="IE" rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Enable"
-                              mask="0x10"
-                              name="SSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <mode name="DEFAULT" qualifier="SPI.CTRLB.BUFEN" value="0"/>
                     <mode name="BUFFERED" qualifier="SPI.CTRLB.BUFEN" value="1"/>
-                    <bitfield caption="Buffer Overflow"
-                              mask="0x01"
-                              modes="BUFFERED"
-                              name="BUFOVF"
-                              rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Flag"
-                              mask="0x10"
-                              modes="BUFFERED"
-                              name="SSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Flag"
-                              mask="0x20"
-                              modes="BUFFERED"
-                              name="DREIF"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Flag"
-                              mask="0x40"
-                              modes="BUFFERED"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              modes="BUFFERED"
-                              name="RXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Write Collision"
-                              mask="0x40"
-                              modes="DEFAULT"
-                              name="WRCOL"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt Flag"
-                              mask="0x80"
-                              modes="DEFAULT"
-                              name="IF"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Overflow" mask="0x01" modes="BUFFERED" name="BUFOVF" rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Flag" mask="0x10" modes="BUFFERED" name="SSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" modes="BUFFERED" name="DREIF" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" modes="BUFFERED" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" modes="BUFFERED" name="RXCIF" rw="RW"/>
+                    <bitfield caption="Write Collision" mask="0x40" modes="DEFAULT" name="WRCOL" rw="RW"/>
+                    <bitfield caption="Interrupt Flag" mask="0x80" modes="DEFAULT" name="IF" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
             </register-group>
@@ -4639,548 +2064,154 @@
         </module>
         <module caption="System Configuration Registers" id="avrea" name="SYSCFG">
             <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
-                <register caption="Revision ID"
-                          name="REVID"
-                          offset="0x01"
-                          rw="R"
-                          size="1">
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="R" size="1">
                     <bitfield caption="Minor Revision" mask="0x0F" name="MINOR" rw="R"/>
                     <bitfield caption="Major Revision" mask="0xF0" name="MAJOR" rw="R"/>
                 </register>
-                <register caption="OCD Message Control"
-                          name="OCDMCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="OCD Message Control" name="OCDMCTRL" offset="0x04" rw="RW" size="1">
                     <bitfield caption="OCD Message" mask="0xFF" name="OCDM" rw="RW"/>
                 </register>
-                <register caption="OCD Message Status"
-                          initval="0x00"
-                          name="OCDMSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="OCD Message Status" initval="0x00" name="OCDMSTATUS" offset="0x05" rw="RW" size="1">
                     <bitfield caption="OCD Message Valid" mask="0x01" name="VALID" rw="RW"/>
                 </register>
             </register-group>
         </module>
-        <module caption="16-bit Timer/Counter Type A"
-                id="tmr_16b_pwm_v1"
-                name="TCA">
+        <module caption="16-bit Timer/Counter Type A" id="tmr_16b_pwm_v1" name="TCA">
             <register-group caption="16-bit Timer/Counter Type A" name="TCA" size="0x40">
-                <mode caption="Single Mode"
-                      name="SINGLE"
-                      qualifier="TCA.SINGLE.CTRLD.SPLITM"
-                      value="0"/>
-                <mode caption="Split Mode"
-                      name="SPLIT"
-                      qualifier="TCA.SPLIT.CTRLD.SPLITM"
-                      value="1"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <mode caption="Single Mode" name="SINGLE" qualifier="TCA.SINGLE.CTRLD.SPLITM" value="0"/>
+                <mode caption="Split Mode" name="SPLIT" qualifier="TCA.SPLIT.CTRLD.SPLITM" value="1"/>
+                <register caption="Control A" initval="0x00" modes="SINGLE" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x07"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                <register caption="Control B" initval="0x00" modes="SINGLE" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                     <bitfield caption="Auto Lock Update" mask="0x08" name="ALUPD" rw="RW"/>
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare 0 Waveform Output Value"
-                              mask="0x01"
-                              name="CMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Waveform Output Value"
-                              mask="0x02"
-                              name="CMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Waveform Output Value"
-                              mask="0x04"
-                              name="CMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SINGLE" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x01" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x02" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x04" name="CMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SINGLE" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Control E Clear" initval="0x00" modes="SINGLE" name="CTRLECLR" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Direction"
-                              mask="0x01"
-                              name="DIR"
-                              rw="RW"
-                              values="TCA_SINGLE_DIR"/>
+                <register caption="Control E Set" initval="0x00" modes="SINGLE" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control F Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Clear" initval="0x00" modes="SINGLE" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Control F Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFSET"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Set" initval="0x00" modes="SINGLE" name="CTRLFSET" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="EVCTRL"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Count on Event Input A"
-                              mask="0x01"
-                              name="CNTAEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action A"
-                              mask="0x0E"
-                              name="EVACTA"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTA"/>
-                    <bitfield caption="Count on Event Input B"
-                              mask="0x10"
-                              name="CNTBEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action B"
-                              mask="0xE0"
-                              name="EVACTB"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTB"/>
+                <register caption="Event Control" initval="0x00" modes="SINGLE" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input A" mask="0x01" name="CNTAEI" rw="RW"/>
+                    <bitfield caption="Event Action A" mask="0x0E" name="EVACTA" rw="RW" values="TCA_SINGLE_EVACTA"/>
+                    <bitfield caption="Count on Event Input B" mask="0x10" name="CNTBEI" rw="RW"/>
+                    <bitfield caption="Event Action B" mask="0xE0" name="EVACTB" rw="RW" values="TCA_SINGLE_EVACTB"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" modes="SINGLE" name="INTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" modes="SINGLE" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SINGLE" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary data for 16-bit Access"
-                          modes="SINGLE"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          modes="SINGLE"
-                          name="CNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period"
-                          modes="SINGLE"
-                          name="PER"
-                          offset="0x26"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0"
-                          modes="SINGLE"
-                          name="CMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1"
-                          modes="SINGLE"
-                          name="CMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2"
-                          modes="SINGLE"
-                          name="CMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period Buffer"
-                          modes="SINGLE"
-                          name="PERBUF"
-                          offset="0x36"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0 Buffer"
-                          modes="SINGLE"
-                          name="CMP0BUF"
-                          offset="0x38"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1 Buffer"
-                          modes="SINGLE"
-                          name="CMP1BUF"
-                          offset="0x3A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2 Buffer"
-                          modes="SINGLE"
-                          name="CMP2BUF"
-                          offset="0x3C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary data for 16-bit Access" modes="SINGLE" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Count" modes="SINGLE" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Period" modes="SINGLE" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Compare 0" modes="SINGLE" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 1" modes="SINGLE" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 2" modes="SINGLE" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Period Buffer" modes="SINGLE" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" modes="SINGLE" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" modes="SINGLE" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" modes="SINGLE" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" modes="SPLIT" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Enable"
-                              mask="0x01"
-                              name="LCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Enable"
-                              mask="0x02"
-                              name="LCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Enable"
-                              mask="0x04"
-                              name="LCMP2EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Enable"
-                              mask="0x10"
-                              name="HCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Enable"
-                              mask="0x20"
-                              name="HCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Enable"
-                              mask="0x40"
-                              name="HCMP2EN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" modes="SPLIT" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Enable" mask="0x01" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x02" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x04" name="LCMP2EN" rw="RW"/>
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Output Value"
-                              mask="0x01"
-                              name="LCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Output Value"
-                              mask="0x02"
-                              name="LCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Output Value"
-                              mask="0x04"
-                              name="LCMP2OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Output Value"
-                              mask="0x10"
-                              name="HCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Output Value"
-                              mask="0x20"
-                              name="HCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Output Value"
-                              mask="0x40"
-                              name="HCMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SPLIT" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x01" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x02" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x04" name="LCMP2OV" rw="RW"/>
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SPLIT" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Clear" initval="0x00" modes="SPLIT" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Set" initval="0x00" modes="SPLIT" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Enable"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Enable"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Enable"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Enable"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Enable"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" modes="SPLIT" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Flag"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Flag"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Flag"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Flag"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Flag"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" modes="SPLIT" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SPLIT" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Low Count"
-                          modes="SPLIT"
-                          name="LCNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Count"
-                          modes="SPLIT"
-                          name="HCNT"
-                          offset="0x21"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Period"
-                          modes="SPLIT"
-                          name="LPER"
-                          offset="0x26"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Period"
-                          modes="SPLIT"
-                          name="HPER"
-                          offset="0x27"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP0"
-                          offset="0x29"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP1"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP2"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Low Count" modes="SPLIT" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="High Count" modes="SPLIT" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="Low Period" modes="SPLIT" name="LPER" offset="0x26" rw="RW" size="1"/>
+                <register caption="High Period" modes="SPLIT" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
             </register-group>
             <value-group caption="Clock Selection" name="TCA_SINGLE_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5197,12 +2228,8 @@
                 <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
                 <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
                 <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
-                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM"
-                       name="DSBOTH"
-                       value="0x06"/>
-                <value caption="Dual Slope PWM, overflow on BOTTOM"
-                       name="DSBOTTOM"
-                       value="0x07"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
             </value-group>
             <value-group caption="Command select" name="TCA_SINGLE_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
@@ -5215,31 +2242,17 @@
                 <value caption="Count down" name="DOWN" value="0x1"/>
             </value-group>
             <value-group caption="Event Action A select" name="TCA_SINGLE_EVACTA">
-                <value caption="Count on positive edge event"
-                       name="CNT_POSEDGE"
-                       value="0x00"/>
+                <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
-                <value caption="Count on prescaled clock while event line is 1."
-                       name="CNT_HIGHLVL"
-                       value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
+                <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
-                <value caption="Restart counter at positive edge event"
-                       name="RESTART_POSEDGE"
-                       value="0x04"/>
-                <value caption="Restart counter on any edge event"
-                       name="RESTART_ANYEDGE"
-                       value="0x05"/>
-                <value caption="Restart counter while event line is 1."
-                       name="RESTART_HIGHLVL"
-                       value="0x06"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+                <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
+                <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
+                <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
             </value-group>
             <value-group caption="Clock Selection" name="TCA_SPLIT_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5259,107 +2272,46 @@
             </value-group>
             <value-group caption="Command Enable select" name="TCA_SPLIT_CMDEN">
                 <value caption="None" name="NONE" value="0x0"/>
-                <value caption="Both low byte and high byte counter"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Both low byte and high byte counter" name="BOTH" value="0x3"/>
             </value-group>
         </module>
         <module caption="16-bit Timer Type B" id="tmr_16b_capture_v1" name="TCB">
             <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Select"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCB_CLKSEL"/>
+                    <bitfield caption="Clock Select" mask="0x0E" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
                     <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
                     <bitfield caption="Cascade two timers" mask="0x20" name="CASCADE" rw="RW"/>
                     <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control Register B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Timer Mode"
-                              mask="0x07"
-                              name="CNTMODE"
-                              rw="RW"
-                              values="TCB_CNTMODE"/>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Timer Mode" mask="0x07" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
                     <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
                     <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
                     <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Event Input Enable" mask="0x01" name="CAPTEI" rw="RW"/>
                     <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
-                    <bitfield caption="Input Capture Noise Cancellation Filter"
-                              mask="0x40"
-                              name="FILTER"
-                              rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
                     <bitfield caption="Run" mask="0x01" name="RUN" rw="R"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Value"
-                          name="TEMP"
-                          offset="0x9"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          initval="0x0000"
-                          name="CNT"
-                          offset="0xA"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare or Capture"
-                          name="CCMP"
-                          offset="0xC"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock Select" name="TCB_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5372,137 +2324,46 @@
                 <value caption="Periodic Interrupt" name="INT" value="0x00"/>
                 <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
                 <value caption="Input Capture Event" name="CAPT" value="0x02"/>
-                <value caption="Input Capture Frequency measurement"
-                       name="FRQ"
-                       value="0x03"/>
-                <value caption="Input Capture Pulse-Width measurement"
-                       name="PW"
-                       value="0x04"/>
-                <value caption="Input Capture Frequency and Pulse-Width measurement"
-                       name="FRQPW"
-                       value="0x05"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
                 <value caption="Single Shot" name="SINGLE" value="0x06"/>
                 <value caption="8-bit PWM" name="PWM8" value="0x07"/>
             </value-group>
         </module>
         <module caption="Two-Wire Interface" id="i2c_8bit_avr_v3" name="TWI">
             <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Fast-mode Enable"
-                              mask="0x01"
-                              name="FMEN"
-                              rw="RW"
-                              values="TWI_FMEN"/>
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="SDA Setup Time"
-                              mask="0x10"
-                              name="SDASETUP"
-                              rw="RW"
-                              values="TWI_SDASETUP"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Fast-mode Enable" mask="0x01" name="FMEN" rw="RW" values="TWI_FMEN"/>
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Dual Mode Control"
-                          initval="0x00"
-                          name="DUALCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
+                <register caption="Dual Mode Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Debug Run"
-                              mask="0x01"
-                              name="DBGRUN"
-                              rw="RW"
-                              values="TWI_DBGRUN"/>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW" values="TWI_DBGRUN"/>
                 </register>
-                <register caption="Host Control A"
-                          initval="0x00"
-                          name="MCTRLA"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Inactive Bus Time-Out"
-                              mask="0x0C"
-                              name="TIMEOUT"
-                              rw="RW"
-                              values="TWI_TIMEOUT"/>
+                    <bitfield caption="Inactive Bus Time-Out" mask="0x0C" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
                     <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
-                    <bitfield caption="Write Interrupt Enable"
-                              mask="0x40"
-                              name="WIEN"
-                              rw="RW"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
                     <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
                 </register>
-                <register caption="Host Control B"
-                          initval="0x00"
-                          name="MCTRLB"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="MCMD"
-                              rw="RW"
-                              values="TWI_MCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Host Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                     <bitfield caption="Flush" mask="0x08" name="FLUSH" rw="RW"/>
                 </register>
-                <register caption="Host STATUS"
-                          initval="0x00"
-                          name="MSTATUS"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bus State"
-                              mask="0x03"
-                              name="BUSSTATE"
-                              rw="RW"
-                              values="TWI_BUSSTATE"/>
+                <register caption="Host STATUS" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
@@ -5510,155 +2371,73 @@
                     <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
                     <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
                 </register>
-                <register caption="Host Baud Rate"
-                          initval="0x00"
-                          name="MBAUD"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Baud Rate" initval="0x00" name="MBAUD" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Baud Rate" mask="0xFF" name="BAUD" rw="RW"/>
                 </register>
-                <register caption="Host Address"
-                          initval="0x00"
-                          name="MADDR"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Address" initval="0x00" name="MADDR" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Host Data"
-                          initval="0x00"
-                          name="MDATA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Data" initval="0x00" name="MDATA" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Control A"
-                          initval="0x00"
-                          name="SCTRLA"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Address Recognition Mode"
-                              mask="0x04"
-                              name="PMEN"
-                              rw="RW"/>
+                    <bitfield caption="Address Recognition Mode" mask="0x04" name="PMEN" rw="RW"/>
                     <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Enable"
-                              mask="0x40"
-                              name="APIEN"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
                     <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
                 </register>
-                <register caption="Client Control B"
-                          initval="0x00"
-                          name="SCTRLB"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="SCMD"
-                              rw="RW"
-                              values="TWI_SCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Client Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                 </register>
-                <register caption="Client Status"
-                          initval="0x00"
-                          name="SSTATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Address or Stop"
-                              mask="0x01"
-                              name="AP"
-                              rw="RW"
-                              values="TWI_AP"/>
+                <register caption="Client Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Address or Stop" mask="0x01" name="AP" rw="RW" values="TWI_AP"/>
                     <bitfield caption="Read/Write Direction" mask="0x02" name="DIR" rw="RW"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Collision" mask="0x08" name="COLL" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
                     <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Flag"
-                              mask="0x40"
-                              name="APIF"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
                     <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
                 </register>
-                <register caption="Client Address"
-                          initval="0x00"
-                          name="SADDR"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address" initval="0x00" name="SADDR" offset="0xC" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Client Data"
-                          initval="0x00"
-                          name="SDATA"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Data" initval="0x00" name="SDATA" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Address Mask"
-                          initval="0x00"
-                          name="SADDRMASK"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address Mask" initval="0x00" name="SADDRMASK" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Address Mask Enable" mask="0x01" name="ADDREN" rw="RW"/>
                     <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Fast-mode Enable select" name="TWI_FMEN">
-                <value caption="SCL duty cycle operating according to Sm specification"
-                       name="OFF"
-                       value="0x0"/>
-                <value caption="SCL duty cycle operating according to Fm specification"
-                       name="ON"
-                       value="0x1"/>
+                <value caption="SCL duty cycle operating according to Sm specification" name="OFF" value="0x0"/>
+                <value caption="SCL duty cycle operating according to Fm specification" name="ON" value="0x1"/>
             </value-group>
             <value-group caption="Fast-mode Plus Enable select" name="TWI_FMPEN">
-                <value caption="Operating in Standard-mode or Fast-mode"
-                       name="OFF"
-                       value="0x0"/>
+                <value caption="Operating in Standard-mode or Fast-mode" name="OFF" value="0x0"/>
                 <value caption="Operating in Fast-mode Plus" name="ON" value="0x1"/>
             </value-group>
             <value-group caption="Input voltage transition level select" name="TWI_INPUTLVL">
                 <value caption="I2C input voltage transition level" name="I2C" value="0x0"/>
-                <value caption="SMBus 3.0 input voltage transition level"
-                       name="SMBUS"
-                       value="0x1"/>
+                <value caption="SMBus 3.0 input voltage transition level" name="SMBUS" value="0x1"/>
             </value-group>
             <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
                 <value caption="No SDA Hold Delay" name="OFF" value="0x0"/>
                 <value caption="Short SDA hold time" name="50NS" value="0x1"/>
-                <value caption="Meets SMBUS 2.0 specification under typical conditions"
-                       name="300NS"
-                       value="0x2"/>
-                <value caption="Meets SMBUS 2.0 specificaiton across all corners"
-                       name="500NS"
-                       value="0x3"/>
+                <value caption="Meets SMBUS 2.0 specification under typical conditions" name="300NS" value="0x2"/>
+                <value caption="Meets SMBUS 2.0 specificaiton across all corners" name="500NS" value="0x3"/>
             </value-group>
             <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
                 <value caption="SDA setup time is four clock cycles" name="4CYC" value="0"/>
                 <value caption="SDA setup time is eight clock cycle" name="8CYC" value="1"/>
             </value-group>
             <value-group caption="Debug Run select" name="TWI_DBGRUN">
-                <value caption="The peripheral is halted in Break Debug mode and ignores events"
-                       name="HALT"
-                       value="0"/>
-                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted"
-                       name="RUN"
-                       value="1"/>
+                <value caption="The peripheral is halted in Break Debug mode and ignores events" name="HALT" value="0"/>
+                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted" name="RUN" value="1"/>
             </value-group>
             <value-group caption="Inactive Bus Time-Out select" name="TWI_TIMEOUT">
                 <value caption="Bus time-out disabled. I2C." name="DISABLED" value="0"/>
@@ -5672,15 +2451,9 @@
             </value-group>
             <value-group caption="Command select" name="TWI_MCMD">
                 <value caption="No action" name="NOACT" value="0"/>
-                <value caption="Execute Acknowledge Action followed by repeated Start."
-                       name="REPSTART"
-                       value="1"/>
-                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR."
-                       name="RECVTRANS"
-                       value="2"/>
-                <value caption="Execute Acknowledge Action followed by issuing a Stop condition."
-                       name="STOP"
-                       value="3"/>
+                <value caption="Execute Acknowledge Action followed by repeated Start." name="REPSTART" value="1"/>
+                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR." name="RECVTRANS" value="2"/>
+                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP" value="3"/>
             </value-group>
             <value-group caption="Bus State select" name="TWI_BUSSTATE">
                 <value caption="Unknown bus state" name="UNKNOWN" value="0"/>
@@ -5691,254 +2464,81 @@
             <value-group caption="Command select" name="TWI_SCMD">
                 <value caption="No Action" name="NOACT" value="0"/>
                 <value caption="Complete transaction" name="COMPTRANS" value="2"/>
-                <value caption="Used in response to an interrupt"
-                       name="RESPONSE"
-                       value="3"/>
+                <value caption="Used in response to an interrupt" name="RESPONSE" value="3"/>
             </value-group>
             <value-group caption="Address or Stop select" name="TWI_AP">
-                <value caption="A Stop condition generated the interrupt on APIF flag"
-                       name="STOP"
-                       value="0"/>
-                <value caption="Address detection generated the interrupt on APIF flag"
-                       name="ADR"
-                       value="1"/>
+                <value caption="A Stop condition generated the interrupt on APIF flag" name="STOP" value="0"/>
+                <value caption="Address detection generated the interrupt on APIF flag" name="ADR" value="1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                            name="USART"
-                            size="0x10">
-                <register caption="Receive Data Low Byte"
-                          initval="0x00"
-                          name="RXDATAL"
-                          offset="0x0"
-                          rw="R"
-                          size="1">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xFF" name="DATA" rw="R"/>
                 </register>
-                <register caption="Receive Data High Byte"
-                          initval="0x00"
-                          name="RXDATAH"
-                          offset="0x1"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="Receiver Data Register"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="R"/>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Receiver Data Register" mask="0x01" name="DATA8" rw="R"/>
                     <bitfield caption="Parity Error" mask="0x02" name="PERR" rw="R"/>
                     <bitfield caption="Frame Error" mask="0x04" name="FERR" rw="R"/>
                     <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Transmit Data Low Byte"
-                          initval="0x00"
-                          name="TXDATAL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register"
-                              mask="0xFF"
-                              name="DATA"
-                              rw="RW"/>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Transmit Data High Byte"
-                          initval="0x00"
-                          name="TXDATAH"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="RW"/>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x01" name="DATA8" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Wait For Break" mask="0x01" name="WFB" rw="RW"/>
                     <bitfield caption="Break Detected Flag" mask="0x02" name="BDF" rw="RW"/>
-                    <bitfield caption="Inconsistent Sync Field Interrupt Flag"
-                              mask="0x08"
-                              name="ISFIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Start Interrupt"
-                              mask="0x10"
-                              name="RXSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Flag"
-                              mask="0x20"
-                              name="DREIF"
-                              rw="R"/>
-                    <bitfield caption="Transmit Interrupt Flag"
-                              mask="0x40"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x08" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="RS485 Mode internal transmitter"
-                              mask="0x01"
-                              name="RS485"
-                              rw="RW"
-                              values="USART_RS485"/>
-                    <bitfield caption="Auto-baud Error Interrupt Enable"
-                              mask="0x04"
-                              name="ABEIE"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x01" name="RS485" rw="RW" values="USART_RS485"/>
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x04" name="ABEIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x08" name="LBME" rw="RW"/>
-                    <bitfield caption="Receiver Start Frame Interrupt Enable"
-                              mask="0x10"
-                              name="RXSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transmit Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multi-processor Communication Mode"
-                              mask="0x01"
-                              name="MPCM"
-                              rw="RW"/>
-                    <bitfield caption="Receiver Mode"
-                              mask="0x06"
-                              name="RXMODE"
-                              rw="RW"
-                              values="USART_RXMODE"/>
-                    <bitfield caption="Open Drain Mode Enable"
-                              mask="0x08"
-                              name="ODME"
-                              rw="RW"/>
-                    <bitfield caption="Start Frame Detection Enable"
-                              mask="0x10"
-                              name="SFDEN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x06" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x08" name="ODME" rw="RW"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
                     <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
                     <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x03"
-                          name="CTRLC"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="USART.CTRLC.CMODE" value="0x00 0x01 0x02"/>
                     <mode name="MSPI" qualifier="USART.CTRLC.CMODE" value="0x03"/>
-                    <bitfield caption="Communication Mode"
-                              mask="0xC0"
-                              name="CMODE"
-                              rw="RW"
-                              values="USART_CMODE"/>
-                    <bitfield caption="SPI Host Mode, Clock Phase"
-                              mask="0x02"
-                              modes="MSPI"
-                              name="UCPHA"
-                              rw="RW"/>
-                    <bitfield caption="SPI Host Mode, Data Order"
-                              mask="0x04"
-                              modes="MSPI"
-                              name="UDORD"
-                              rw="RW"/>
-                    <bitfield caption="Character Size"
-                              mask="0x07"
-                              modes="NORMAL"
-                              name="CHSIZE"
-                              rw="RW"
-                              values="USART_NORMAL_CHSIZE"/>
-                    <bitfield caption="Stop Bit Mode"
-                              mask="0x08"
-                              modes="NORMAL"
-                              name="SBMODE"
-                              rw="RW"
-                              values="USART_NORMAL_SBMODE"/>
-                    <bitfield caption="Parity Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="PMODE"
-                              rw="RW"
-                              values="USART_NORMAL_PMODE"/>
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" rw="RW" values="USART_CMODE"/>
+                    <bitfield caption="SPI Host Mode, Clock Phase" mask="0x02" modes="MSPI" name="UCPHA" rw="RW"/>
+                    <bitfield caption="SPI Host Mode, Data Order" mask="0x04" modes="MSPI" name="UDORD" rw="RW"/>
+                    <bitfield caption="Character Size" mask="0x07" modes="NORMAL" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" modes="NORMAL" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" modes="NORMAL" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
                 </register>
-                <register caption="Baud Rate"
-                          initval="0x0000"
-                          name="BAUD"
-                          offset="0x8"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Auto Baud Window"
-                              mask="0xC0"
-                              name="ABW"
-                              rw="RW"
-                              values="USART_ABW"/>
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xC0" name="ABW" rw="RW" values="USART_ABW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="IrDA Event Input Enable"
-                              mask="0x01"
-                              name="IREI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x01" name="IREI" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control"
-                          initval="0x00"
-                          name="TXPLCTRL"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xFF" name="TXPL" rw="RW"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control"
-                          initval="0x00"
-                          name="RXPLCTRL"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7F" name="RXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -5963,12 +2563,8 @@
                 <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
                 <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
                 <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
-                <value caption="Character size: 9 bit read low byte first"
-                       name="9BITL"
-                       value="0x06"/>
-                <value caption="Character size: 9 bit read high byte first"
-                       name="9BITH"
-                       value="0x07"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
             </value-group>
             <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
                 <value caption="No Parity" name="DISABLED" value="0x00"/>
@@ -5988,384 +2584,90 @@
         </module>
         <module caption="User Row" id="avrea" name="USERROW">
             <register-group caption="User Row" name="USERROW" size="0x40">
-                <register caption="User Row Byte 0"
-                          name="USERROW0"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 1"
-                          name="USERROW1"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 2"
-                          name="USERROW2"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 3"
-                          name="USERROW3"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 4"
-                          name="USERROW4"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 5"
-                          name="USERROW5"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 6"
-                          name="USERROW6"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 7"
-                          name="USERROW7"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 8"
-                          name="USERROW8"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 9"
-                          name="USERROW9"
-                          offset="0x09"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 10"
-                          name="USERROW10"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 11"
-                          name="USERROW11"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 12"
-                          name="USERROW12"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 13"
-                          name="USERROW13"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 14"
-                          name="USERROW14"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 15"
-                          name="USERROW15"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 16"
-                          name="USERROW16"
-                          offset="0x10"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 17"
-                          name="USERROW17"
-                          offset="0x11"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 18"
-                          name="USERROW18"
-                          offset="0x12"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 19"
-                          name="USERROW19"
-                          offset="0x13"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 20"
-                          name="USERROW20"
-                          offset="0x14"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 21"
-                          name="USERROW21"
-                          offset="0x15"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 22"
-                          name="USERROW22"
-                          offset="0x16"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 23"
-                          name="USERROW23"
-                          offset="0x17"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 24"
-                          name="USERROW24"
-                          offset="0x18"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 25"
-                          name="USERROW25"
-                          offset="0x19"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 26"
-                          name="USERROW26"
-                          offset="0x1A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 27"
-                          name="USERROW27"
-                          offset="0x1B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 28"
-                          name="USERROW28"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 29"
-                          name="USERROW29"
-                          offset="0x1D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 30"
-                          name="USERROW30"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 31"
-                          name="USERROW31"
-                          offset="0x1F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 32"
-                          name="USERROW32"
-                          offset="0x20"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 33"
-                          name="USERROW33"
-                          offset="0x21"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 34"
-                          name="USERROW34"
-                          offset="0x22"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 35"
-                          name="USERROW35"
-                          offset="0x23"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 36"
-                          name="USERROW36"
-                          offset="0x24"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 37"
-                          name="USERROW37"
-                          offset="0x25"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 38"
-                          name="USERROW38"
-                          offset="0x26"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 39"
-                          name="USERROW39"
-                          offset="0x27"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 40"
-                          name="USERROW40"
-                          offset="0x28"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 41"
-                          name="USERROW41"
-                          offset="0x29"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 42"
-                          name="USERROW42"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 43"
-                          name="USERROW43"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 44"
-                          name="USERROW44"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 45"
-                          name="USERROW45"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 46"
-                          name="USERROW46"
-                          offset="0x2E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 47"
-                          name="USERROW47"
-                          offset="0x2F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 48"
-                          name="USERROW48"
-                          offset="0x30"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 49"
-                          name="USERROW49"
-                          offset="0x31"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 50"
-                          name="USERROW50"
-                          offset="0x32"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 51"
-                          name="USERROW51"
-                          offset="0x33"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 52"
-                          name="USERROW52"
-                          offset="0x34"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 53"
-                          name="USERROW53"
-                          offset="0x35"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 54"
-                          name="USERROW54"
-                          offset="0x36"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 55"
-                          name="USERROW55"
-                          offset="0x37"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 56"
-                          name="USERROW56"
-                          offset="0x38"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 57"
-                          name="USERROW57"
-                          offset="0x39"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 58"
-                          name="USERROW58"
-                          offset="0x3A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 59"
-                          name="USERROW59"
-                          offset="0x3B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 60"
-                          name="USERROW60"
-                          offset="0x3C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 61"
-                          name="USERROW61"
-                          offset="0x3D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 62"
-                          name="USERROW62"
-                          offset="0x3E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 63"
-                          name="USERROW63"
-                          offset="0x3F"
-                          rw="RW"
-                          size="1"/>
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+                <register caption="User Row Byte 32" name="USERROW32" offset="0x20" rw="RW" size="1"/>
+                <register caption="User Row Byte 33" name="USERROW33" offset="0x21" rw="RW" size="1"/>
+                <register caption="User Row Byte 34" name="USERROW34" offset="0x22" rw="RW" size="1"/>
+                <register caption="User Row Byte 35" name="USERROW35" offset="0x23" rw="RW" size="1"/>
+                <register caption="User Row Byte 36" name="USERROW36" offset="0x24" rw="RW" size="1"/>
+                <register caption="User Row Byte 37" name="USERROW37" offset="0x25" rw="RW" size="1"/>
+                <register caption="User Row Byte 38" name="USERROW38" offset="0x26" rw="RW" size="1"/>
+                <register caption="User Row Byte 39" name="USERROW39" offset="0x27" rw="RW" size="1"/>
+                <register caption="User Row Byte 40" name="USERROW40" offset="0x28" rw="RW" size="1"/>
+                <register caption="User Row Byte 41" name="USERROW41" offset="0x29" rw="RW" size="1"/>
+                <register caption="User Row Byte 42" name="USERROW42" offset="0x2A" rw="RW" size="1"/>
+                <register caption="User Row Byte 43" name="USERROW43" offset="0x2B" rw="RW" size="1"/>
+                <register caption="User Row Byte 44" name="USERROW44" offset="0x2C" rw="RW" size="1"/>
+                <register caption="User Row Byte 45" name="USERROW45" offset="0x2D" rw="RW" size="1"/>
+                <register caption="User Row Byte 46" name="USERROW46" offset="0x2E" rw="RW" size="1"/>
+                <register caption="User Row Byte 47" name="USERROW47" offset="0x2F" rw="RW" size="1"/>
+                <register caption="User Row Byte 48" name="USERROW48" offset="0x30" rw="RW" size="1"/>
+                <register caption="User Row Byte 49" name="USERROW49" offset="0x31" rw="RW" size="1"/>
+                <register caption="User Row Byte 50" name="USERROW50" offset="0x32" rw="RW" size="1"/>
+                <register caption="User Row Byte 51" name="USERROW51" offset="0x33" rw="RW" size="1"/>
+                <register caption="User Row Byte 52" name="USERROW52" offset="0x34" rw="RW" size="1"/>
+                <register caption="User Row Byte 53" name="USERROW53" offset="0x35" rw="RW" size="1"/>
+                <register caption="User Row Byte 54" name="USERROW54" offset="0x36" rw="RW" size="1"/>
+                <register caption="User Row Byte 55" name="USERROW55" offset="0x37" rw="RW" size="1"/>
+                <register caption="User Row Byte 56" name="USERROW56" offset="0x38" rw="RW" size="1"/>
+                <register caption="User Row Byte 57" name="USERROW57" offset="0x39" rw="RW" size="1"/>
+                <register caption="User Row Byte 58" name="USERROW58" offset="0x3A" rw="RW" size="1"/>
+                <register caption="User Row Byte 59" name="USERROW59" offset="0x3B" rw="RW" size="1"/>
+                <register caption="User Row Byte 60" name="USERROW60" offset="0x3C" rw="RW" size="1"/>
+                <register caption="User Row Byte 61" name="USERROW61" offset="0x3D" rw="RW" size="1"/>
+                <register caption="User Row Byte 62" name="USERROW62" offset="0x3E" rw="RW" size="1"/>
+                <register caption="User Row Byte 63" name="USERROW63" offset="0x3F" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Virtual Ports" id="gpio_ports_avr_v3_vport" name="VPORT">
             <register-group caption="Virtual Ports" name="VPORT" size="0x4">
-                <register caption="Data Direction"
-                          initval="0x00"
-                          name="DIR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          initval="0x00"
-                          name="OUT"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          initval="0x00"
-                          name="IN"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" initval="0x00" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Output Value" initval="0x00" name="OUT" offset="0x1" rw="RW" size="1"/>
+                <register caption="Input Value" initval="0x00" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Voltage reference" id="avrea" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
-                <register caption="DAC0 Reference"
-                          initval="0x00"
-                          name="DAC0REF"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="DAC0 Reference" initval="0x00" name="DAC0REF" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="AC Reference"
-                          initval="0x00"
-                          name="ACREF"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="AC Reference" initval="0x00" name="ACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
             </register-group>
@@ -6380,33 +2682,12 @@
         </module>
         <module caption="Watch-Dog Timer" id="wdt_windowed_v2" name="WDT">
             <register-group caption="Watch-Dog Timer" name="WDT" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="WDT_PERIOD"/>
-                    <bitfield caption="Window"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="WDT_WINDOW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x0F" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xF0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Syncronization busy"
-                              mask="0x01"
-                              name="SYNCBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY" rw="R"/>
                     <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/E-SERIES/AVR64EA32.xml b/src/Targets/TargetDescriptionFiles/AVR8/E-SERIES/AVR64EA32.xml
index 72798766..d3b6b2b5 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/E-SERIES/AVR64EA32.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/E-SERIES/AVR64EA32.xml
@@ -1,119 +1,31 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR64EA32"
-                 package="VQFN32"
-                 pinout="QFN32"
-                 speedmax="20000000"
-                 tempmax="125"
-                 tempmin="-40"
-                 vccmax="5.5"
-                 vccmin="1.8"/>
+        <variant ordercode="AVR64EA32" package="VQFN32" pinout="QFN32" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR64EA32" family="AVR8" architecture="AVR8X" avr-family="AVR EA">
         <address-spaces>
-            <address-space endianness="little"
-                           id="data"
-                           name="data"
-                           size="0x10000"
-                           start="0x0000">
-                <memory-segment exec="0"
-                                name="IO"
-                                rw="RW"
-                                size="0x103F"
-                                start="0x00"
-                                type="io"/>
-                <memory-segment exec="0"
-                                name="LOCKBITS"
-                                pagesize="0x4"
-                                rw="RW"
-                                size="0x04"
-                                start="0x1040"
-                                type="lockbits"/>
-                <memory-segment exec="0"
-                                name="FUSES"
-                                pagesize="0x8"
-                                rw="RW"
-                                size="0x10"
-                                start="0x1050"
-                                type="fuses"/>
-                <memory-segment exec="0"
-                                name="USER_SIGNATURES"
-                                pagesize="0x40"
-                                rw="RW"
-                                size="0x40"
-                                start="0x1080"
-                                type="user_signatures"/>
-                <memory-segment exec="0"
-                                name="SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x03"
-                                start="0x1100"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="PROD_SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x7D"
-                                start="0x1103"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="EEPROM"
-                                pagesize="0x8"
-                                rw="RW"
-                                size="0x200"
-                                start="0x1400"
-                                type="eeprom"/>
-                <memory-segment exec="0"
-                                name="INTERNAL_SRAM"
-                                rw="RW"
-                                size="0x1800"
-                                start="0x6800"
-                                type="ram"/>
-                <memory-segment exec="0"
-                                name="MAPPED_PROGMEM"
-                                pagesize="0x80"
-                                rw="RW"
-                                size="0x8000"
-                                start="0x8000"
-                                type="other"/>
+            <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+                <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00" type="io"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x4" rw="RW" size="0x04" start="0x1040" type="lockbits"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x8" rw="RW" size="0x10" start="0x1050" type="fuses"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40" start="0x1080" type="user_signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x03" start="0x1100" type="signatures"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x1103" type="signatures"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x8" rw="RW" size="0x200" start="0x1400" type="eeprom"/>
+                <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1800" start="0x6800" type="ram"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x8000" type="other"/>
             </address-space>
-            <address-space endianness="little"
-                           id="prog"
-                           name="prog"
-                           size="0x10000"
-                           start="0x0000">
-                <memory-segment exec="1"
-                                name="PROGMEM"
-                                pagesize="0x80"
-                                rw="RW"
-                                size="0x10000"
-                                start="0x00"
-                                type="flash"/>
-                <memory-segment exec="1"
-                                name="PROGMEM_NRWW"
-                                pagesize="0x80"
-                                rw="RW"
-                                size="0x2000"
-                                start="0x00"
-                                type="flash"/>
-                <memory-segment exec="1"
-                                name="PROGMEM_RWW"
-                                pagesize="0x80"
-                                rw="RW"
-                                size="0xE000"
-                                start="0x2000"
-                                type="flash"/>
+            <address-space endianness="little" id="prog" name="prog" size="0x10000" start="0x0000">
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0x10000" start="0x00" type="flash"/>
+                <memory-segment exec="1" name="PROGMEM_NRWW" pagesize="0x80" rw="RW" size="0x2000" start="0x00" type="flash"/>
+                <memory-segment exec="1" name="PROGMEM_RWW" pagesize="0x80" rw="RW" size="0xE000" start="0x2000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
             <module id="cmp_control_v8" name="AC">
                 <instance name="AC0">
-                    <register-group address-space="data"
-                                    name="AC0"
-                                    name-in-module="AC"
-                                    offset="0x0680"/>
+                    <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
                     <signals>
                         <signal function="AINN" group="AINN" index="0" pad="PD3"/>
                         <signal function="AINN" group="AINN" index="1" pad="PD0"/>
@@ -122,17 +34,11 @@
                         <signal function="AINP" group="AINP" index="0" pad="PD2"/>
                         <signal function="AINP" group="AINP" index="3" pad="PD6"/>
                         <signal function="AINP" group="AINP" index="4" pad="PC3"/>
-                        <signal field="PORTMUX.ACROUTEA.AC0"
-                                function="DEFAULT"
-                                group="OUT"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ACROUTEA.AC0" function="DEFAULT" group="OUT" pad="PA7"/>
                     </signals>
                 </instance>
                 <instance name="AC1">
-                    <register-group address-space="data"
-                                    name="AC1"
-                                    name-in-module="AC"
-                                    offset="0x0688"/>
+                    <register-group address-space="data" name="AC1" name-in-module="AC" offset="0x0688"/>
                     <signals>
                         <signal function="AINN" group="AINN" index="0" pad="PD5"/>
                         <signal function="AINN" group="AINN" index="1" pad="PD0"/>
@@ -142,19 +48,13 @@
                         <signal function="AINP" group="AINP" index="2" pad="PD4"/>
                         <signal function="AINP" group="AINP" index="3" pad="PD6"/>
                         <signal function="AINP" group="AINP" index="4" pad="PC3"/>
-                        <signal field="PORTMUX.ACROUTEA.AC1"
-                                function="DEFAULT"
-                                group="OUT"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ACROUTEA.AC1" function="DEFAULT" group="OUT" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
             <module id="adc_12b_diff_ctrl_avr_v2" name="ADC">
                 <instance name="ADC0">
-                    <register-group address-space="data"
-                                    name="ADC0"
-                                    name-in-module="ADC"
-                                    offset="0x0600"/>
+                    <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
                     <signals>
                         <signal function="AINN" group="AINN" index="0" pad="PD0"/>
                         <signal function="AINN" group="AINN" index="1" pad="PD1"/>
@@ -209,18 +109,12 @@
             </module>
             <module id="bor_lvd_ctrl_avr_v2" name="BOD">
                 <instance name="BOD">
-                    <register-group address-space="data"
-                                    name="BOD"
-                                    name-in-module="BOD"
-                                    offset="0x00A0"/>
+                    <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x00A0"/>
                 </instance>
             </module>
             <module id="cla_ccl_v1" name="CCL">
                 <instance name="CCL">
-                    <register-group address-space="data"
-                                    name="CCL"
-                                    name-in-module="CCL"
-                                    offset="0x01C0"/>
+                    <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
                     <signals>
                         <signal function="IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="IN" group="LUT0_IN" index="1" pad="PA1"/>
@@ -234,39 +128,18 @@
                         <signal function="IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="IN" group="LUT3_IN" index="1" pad="PF1"/>
                         <signal function="IN" group="LUT3_IN" index="2" pad="PF2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="ALT1"
-                                group="LUT0_OUT"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="DEFAULT"
-                                group="LUT0_OUT"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="DEFAULT"
-                                group="LUT1_OUT"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="ALT1"
-                                group="LUT2_OUT"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="DEFAULT"
-                                group="LUT2_OUT"
-                                pad="PD3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3"
-                                function="DEFAULT"
-                                group="LUT3_OUT"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="ALT1" group="LUT0_OUT" pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="DEFAULT" group="LUT0_OUT" pad="PA3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="DEFAULT" group="LUT1_OUT" pad="PC3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="ALT1" group="LUT2_OUT" pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="DEFAULT" group="LUT2_OUT" pad="PD3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="DEFAULT" group="LUT3_OUT" pad="PF3"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrea" name="CLKCTRL">
                 <instance name="CLKCTRL">
-                    <register-group address-space="data"
-                                    name="CLKCTRL"
-                                    name-in-module="CLKCTRL"
-                                    offset="0x0060"/>
+                    <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
                     <signals>
                         <signal function="EXTCLK" group="EXTCLK" pad="PA0"/>
                         <signal function="OUT" group="CLKOUT" pad="PA7"/>
@@ -279,10 +152,7 @@
             </module>
             <module id="cpu_avr_xt_v1" name="CPU">
                 <instance name="CPU">
-                    <register-group address-space="data"
-                                    name="CPU"
-                                    name-in-module="CPU"
-                                    offset="0x0030"/>
+                    <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V4S"/>
                     </parameters>
@@ -290,26 +160,17 @@
             </module>
             <module id="int_8bit_v3" name="CPUINT">
                 <instance name="CPUINT">
-                    <register-group address-space="data"
-                                    name="CPUINT"
-                                    name-in-module="CPUINT"
-                                    offset="0x0110"/>
+                    <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
                 </instance>
             </module>
             <module id="math_pdi_crc_v1" name="CRCSCAN">
                 <instance name="CRCSCAN">
-                    <register-group address-space="data"
-                                    name="CRCSCAN"
-                                    name-in-module="CRCSCAN"
-                                    offset="0x0120"/>
+                    <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
                 </instance>
             </module>
             <module id="dac_nbit_ctrl_avr_v6" name="DAC">
                 <instance name="DAC0">
-                    <register-group address-space="data"
-                                    name="DAC0"
-                                    name-in-module="DAC"
-                                    offset="0x06A0"/>
+                    <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
                     <signals>
                         <signal function="VOUT" group="OUT" pad="PD6"/>
                     </signals>
@@ -317,87 +178,41 @@
             </module>
             <module id="avrea" name="EVSYS">
                 <instance name="EVSYS">
-                    <register-group address-space="data"
-                                    name="EVSYS"
-                                    name-in-module="EVSYS"
-                                    offset="0x0200"/>
+                    <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="ALT1"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="DEFAULT"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC"
-                                function="DEFAULT"
-                                group="EVOUT"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="ALT1"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="DEFAULT"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF"
-                                function="ALT1"
-                                group="EVOUT"
-                                index="5"
-                                pad="PF7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF"
-                                function="DEFAULT"
-                                group="EVOUT"
-                                index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="ALT1" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="DEFAULT" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="DEFAULT" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="ALT1" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="DEFAULT" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="ALT1" group="EVOUT" index="5" pad="PF7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="DEFAULT" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrea" name="FUSE">
                 <instance name="FUSE">
-                    <register-group address-space="data"
-                                    name="FUSE"
-                                    name-in-module="FUSE"
-                                    offset="0x1050"/>
+                    <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1050"/>
                 </instance>
             </module>
             <module id="avrea" name="GPR">
                 <instance name="GPR">
-                    <register-group address-space="data"
-                                    name="GPR"
-                                    name-in-module="GPR"
-                                    offset="0x001C"/>
+                    <register-group address-space="data" name="GPR" name-in-module="GPR" offset="0x001C"/>
                 </instance>
             </module>
             <module id="avrea" name="LOCK">
                 <instance name="LOCK">
-                    <register-group address-space="data"
-                                    name="LOCK"
-                                    name-in-module="LOCK"
-                                    offset="0x1040"/>
+                    <register-group address-space="data" name="LOCK" name-in-module="LOCK" offset="0x1040"/>
                 </instance>
             </module>
             <module id="nvm_ctrl_avr_v3" name="NVMCTRL">
                 <instance name="NVMCTRL">
-                    <register-group address-space="data"
-                                    name="NVMCTRL"
-                                    name-in-module="NVMCTRL"
-                                    offset="0x1000"/>
+                    <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v3" name="PORT">
                 <instance name="PORTA">
-                    <register-group address-space="data"
-                                    name="PORTA"
-                                    name-in-module="PORT"
-                                    offset="0x0400"/>
+                    <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
@@ -410,10 +225,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC">
-                    <register-group address-space="data"
-                                    name="PORTC"
-                                    name-in-module="PORT"
-                                    offset="0x0440"/>
+                    <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
@@ -422,10 +234,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD">
-                    <register-group address-space="data"
-                                    name="PORTD"
-                                    name-in-module="PORT"
-                                    offset="0x0460"/>
+                    <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
@@ -438,10 +247,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF">
-                    <register-group address-space="data"
-                                    name="PORTF"
-                                    name-in-module="PORT"
-                                    offset="0x04A0"/>
+                    <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PF0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PF1"/>
@@ -456,18 +262,12 @@
             </module>
             <module id="avrea" name="PORTMUX">
                 <instance name="PORTMUX">
-                    <register-group address-space="data"
-                                    name="PORTMUX"
-                                    name-in-module="PORTMUX"
-                                    offset="0x05E0"/>
+                    <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
                 </instance>
             </module>
             <module id="rst_integration_avr_v2" name="RSTCTRL">
                 <instance name="RSTCTRL">
-                    <register-group address-space="data"
-                                    name="RSTCTRL"
-                                    name-in-module="RSTCTRL"
-                                    offset="0x0040"/>
+                    <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
                     <signals>
                         <signal function="OTHER" group="RESET" pad="PF6"/>
                     </signals>
@@ -475,550 +275,189 @@
             </module>
             <module id="tmr_16b_rtc_avr_v2" name="RTC">
                 <instance name="RTC">
-                    <register-group address-space="data"
-                                    name="RTC"
-                                    name-in-module="RTC"
-                                    offset="0x0140"/>
+                    <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
                 </instance>
             </module>
             <module id="avrea" name="SIGROW">
                 <instance name="SIGROW">
-                    <register-group address-space="data"
-                                    name="SIGROW"
-                                    name-in-module="SIGROW"
-                                    offset="0x1100"/>
+                    <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
                 </instance>
             </module>
             <module id="clk_sleep_ctrl_avr_v1" name="SLPCTRL">
                 <instance name="SLPCTRL">
-                    <register-group address-space="data"
-                                    name="SLPCTRL"
-                                    name-in-module="SLPCTRL"
-                                    offset="0x0050"/>
+                    <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
                 </instance>
             </module>
             <module id="spi_8bit_v2" name="SPI">
                 <instance name="SPI0">
-                    <register-group address-space="data"
-                                    name="SPI0"
-                                    name-in-module="SPI"
-                                    offset="0x0940"/>
+                    <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0940"/>
                     <signals>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT3"
-                                group="MISO"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT3"
-                                group="MOSI"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT3"
-                                group="SCK"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT3"
-                                group="SS"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT4"
-                                group="MISO"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT4"
-                                group="MOSI"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT4"
-                                group="SCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT4"
-                                group="SS"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT5"
-                                group="MISO"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT5"
-                                group="MOSI"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT5"
-                                group="SCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT5"
-                                group="SS"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT6"
-                                group="MISO"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT6"
-                                group="MOSI"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT6"
-                                group="SCK"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT6"
-                                group="SS"
-                                pad="PF7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="DEFAULT"
-                                group="MISO"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="DEFAULT"
-                                group="MOSI"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="DEFAULT"
-                                group="SCK"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="DEFAULT"
-                                group="SS"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT3" group="MISO" pad="PA1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT3" group="MOSI" pad="PA0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT3" group="SCK" pad="PC0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT3" group="SS" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT4" group="MISO" pad="PD5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT4" group="MOSI" pad="PD4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT4" group="SCK" pad="PD6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT4" group="SS" pad="PD7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT5" group="MISO" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT5" group="MOSI" pad="PC0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT5" group="SCK" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT5" group="SS" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT6" group="MISO" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT6" group="MOSI" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT6" group="SCK" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT6" group="SS" pad="PF7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="DEFAULT" group="MISO" pad="PA5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="DEFAULT" group="MOSI" pad="PA4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="DEFAULT" group="SCK" pad="PA6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="DEFAULT" group="SS" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrea" name="SYSCFG">
                 <instance name="SYSCFG">
-                    <register-group address-space="data"
-                                    name="SYSCFG"
-                                    name-in-module="SYSCFG"
-                                    offset="0x0F00"/>
+                    <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
                 </instance>
             </module>
             <module id="tmr_16b_pwm_v1" name="TCA">
                 <instance name="TCA0">
-                    <register-group address-space="data"
-                                    name="TCA0"
-                                    name-in-module="TCA"
-                                    offset="0x0A00"/>
+                    <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
                     <signals>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT2"
-                                group="WO"
-                                index="0"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT2"
-                                group="WO"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT2"
-                                group="WO"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT2"
-                                group="WO"
-                                index="3"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="0"
-                                pad="PD0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="1"
-                                pad="PD1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="2"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="3"
-                                pad="PD3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="4"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="5"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT5"
-                                group="WO"
-                                index="0"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT5"
-                                group="WO"
-                                index="1"
-                                pad="PF1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT5"
-                                group="WO"
-                                index="2"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT5"
-                                group="WO"
-                                index="3"
-                                pad="PF3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT5"
-                                group="WO"
-                                index="4"
-                                pad="PF4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT5"
-                                group="WO"
-                                index="5"
-                                pad="PF5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="3"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="4"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="5"
-                                pad="PA5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT2" group="WO" index="0" pad="PC0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT2" group="WO" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT2" group="WO" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT2" group="WO" index="3" pad="PC3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="0" pad="PD0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="1" pad="PD1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="2" pad="PD2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="3" pad="PD3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="4" pad="PD4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="5" pad="PD5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT5" group="WO" index="0" pad="PF0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT5" group="WO" index="1" pad="PF1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT5" group="WO" index="2" pad="PF2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT5" group="WO" index="3" pad="PF3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT5" group="WO" index="4" pad="PF4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT5" group="WO" index="5" pad="PF5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="3" pad="PA3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="4" pad="PA4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="5" pad="PA5"/>
                     </signals>
                 </instance>
             </module>
             <module id="tmr_16b_capture_v1" name="TCB">
                 <instance name="TCB0">
-                    <register-group address-space="data"
-                                    name="TCB0"
-                                    name-in-module="TCB"
-                                    offset="0x0B00"/>
+                    <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0B00"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB0"
-                                function="ALT1"
-                                group="WO"
-                                index="0"
-                                pad="PF4"/>
-                        <signal field="PORTMUX.TCBROUTEA.TCB0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="0"
-                                pad="PA2"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB0" function="ALT1" group="WO" index="0" pad="PF4"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB0" function="DEFAULT" group="WO" index="0" pad="PA2"/>
                     </signals>
                 </instance>
                 <instance name="TCB1">
-                    <register-group address-space="data"
-                                    name="TCB1"
-                                    name-in-module="TCB"
-                                    offset="0x0B10"/>
+                    <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0B10"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB1"
-                                function="ALT1"
-                                group="WO"
-                                index="0"
-                                pad="PF5"/>
-                        <signal field="PORTMUX.TCBROUTEA.TCB1"
-                                function="DEFAULT"
-                                group="WO"
-                                index="0"
-                                pad="PA3"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB1" function="ALT1" group="WO" index="0" pad="PF5"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB1" function="DEFAULT" group="WO" index="0" pad="PA3"/>
                     </signals>
                 </instance>
                 <instance name="TCB2">
-                    <register-group address-space="data"
-                                    name="TCB2"
-                                    name-in-module="TCB"
-                                    offset="0x0B20"/>
+                    <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0B20"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB2"
-                                function="DEFAULT"
-                                group="WO"
-                                index="0"
-                                pad="PC0"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB2" function="DEFAULT" group="WO" index="0" pad="PC0"/>
                     </signals>
                 </instance>
             </module>
             <module id="i2c_8bit_avr_v3" name="TWI">
                 <instance name="TWI0">
-                    <register-group address-space="data"
-                                    name="TWI0"
-                                    name-in-module="TWI"
-                                    offset="0x0900"/>
+                    <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0900"/>
                     <signals>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT1"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT1"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT2"
-                                group="SCL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT2"
-                                group="SDA"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT3"
-                                group="SCL"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT3"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT3"
-                                group="SDA"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT3"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="DEFAULT"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="DEFAULT"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="DEFAULT"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="DEFAULT"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT1" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT1" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT2" group="SCL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT2" group="SDA" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT3" group="SCL" pad="PA1"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT3" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT3" group="SDA" pad="PA0"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT3" group="SDA_DUAL" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="DEFAULT" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="DEFAULT" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="DEFAULT" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="DEFAULT" group="SDA_DUAL" pad="PC2"/>
                     </signals>
                 </instance>
             </module>
             <module id="uart_autobd_v4" name="USART">
                 <instance name="USART0">
-                    <register-group address-space="data"
-                                    name="USART0"
-                                    name-in-module="USART"
-                                    offset="0x0800"/>
+                    <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT1"
-                                group="RXD"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT1"
-                                group="TXD"
-                                index="1"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT1"
-                                group="XCK"
-                                index="1"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT1"
-                                group="XDIR"
-                                index="1"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT2"
-                                group="RXD"
-                                index="2"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT2"
-                                group="TXD"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT3"
-                                group="RXD"
-                                index="3"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT3"
-                                group="TXD"
-                                index="3"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT3"
-                                group="XCK"
-                                index="3"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT3"
-                                group="XDIR"
-                                index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT4"
-                                group="RXD"
-                                index="4"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT4"
-                                group="TXD"
-                                index="4"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT4"
-                                group="XCK"
-                                index="4"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="DEFAULT"
-                                group="RXD"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="DEFAULT"
-                                group="TXD"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="DEFAULT"
-                                group="XCK"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="DEFAULT"
-                                group="XDIR"
-                                pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT1" group="RXD" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT1" group="TXD" index="1" pad="PA4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT1" group="XCK" index="1" pad="PA6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT1" group="XDIR" index="1" pad="PA7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT2" group="RXD" index="2" pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT2" group="TXD" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT3" group="RXD" index="3" pad="PD5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT3" group="TXD" index="3" pad="PD4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT3" group="XCK" index="3" pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT3" group="XDIR" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT4" group="RXD" index="4" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT4" group="TXD" index="4" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT4" group="XCK" index="4" pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="DEFAULT" group="RXD" pad="PA1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="DEFAULT" group="TXD" pad="PA0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="DEFAULT" group="XCK" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="DEFAULT" group="XDIR" pad="PA3"/>
                     </signals>
                 </instance>
                 <instance name="USART1">
-                    <register-group address-space="data"
-                                    name="USART1"
-                                    name-in-module="USART"
-                                    offset="0x0820"/>
+                    <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="ALT2"
-                                group="RXD"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="ALT2"
-                                group="TXD"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="DEFAULT"
-                                group="RXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="DEFAULT"
-                                group="TXD"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="DEFAULT"
-                                group="XCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="DEFAULT"
-                                group="XDIR"
-                                pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="ALT2" group="RXD" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="ALT2" group="TXD" pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="DEFAULT" group="RXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="DEFAULT" group="TXD" pad="PC0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="DEFAULT" group="XCK" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="DEFAULT" group="XDIR" pad="PC3"/>
                     </signals>
                 </instance>
                 <instance name="USART2">
-                    <register-group address-space="data"
-                                    name="USART2"
-                                    name-in-module="USART"
-                                    offset="0x0840"/>
+                    <register-group address-space="data" name="USART2" name-in-module="USART" offset="0x0840"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART2"
-                                function="ALT1"
-                                group="RXD"
-                                pad="PF5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART2"
-                                function="ALT1"
-                                group="TXD"
-                                pad="PF4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART2"
-                                function="DEFAULT"
-                                group="RXD"
-                                pad="PF1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART2"
-                                function="DEFAULT"
-                                group="TXD"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART2"
-                                function="DEFAULT"
-                                group="XCK"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART2"
-                                function="DEFAULT"
-                                group="XDIR"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART2" function="ALT1" group="RXD" pad="PF5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART2" function="ALT1" group="TXD" pad="PF4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART2" function="DEFAULT" group="RXD" pad="PF1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART2" function="DEFAULT" group="TXD" pad="PF0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART2" function="DEFAULT" group="XCK" pad="PF2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART2" function="DEFAULT" group="XDIR" pad="PF3"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrea" name="USERROW">
                 <instance name="USERROW">
-                    <register-group address-space="data"
-                                    name="USERROW"
-                                    name-in-module="USERROW"
-                                    offset="0x1080"/>
+                    <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1080"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v3_vport" name="VPORT">
                 <instance name="VPORTA">
-                    <register-group address-space="data"
-                                    name="VPORTA"
-                                    name-in-module="VPORT"
-                                    offset="0x0000"/>
+                    <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
                 </instance>
                 <instance name="VPORTC">
-                    <register-group address-space="data"
-                                    name="VPORTC"
-                                    name-in-module="VPORT"
-                                    offset="0x0008"/>
+                    <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
                 </instance>
                 <instance name="VPORTD">
-                    <register-group address-space="data"
-                                    name="VPORTD"
-                                    name-in-module="VPORT"
-                                    offset="0x000C"/>
+                    <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
                 </instance>
                 <instance name="VPORTF">
-                    <register-group address-space="data"
-                                    name="VPORTF"
-                                    name-in-module="VPORT"
-                                    offset="0x0014"/>
+                    <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
                 </instance>
             </module>
             <module id="avrea" name="VREF">
                 <instance name="VREF">
-                    <register-group address-space="data"
-                                    name="VREF"
-                                    name-in-module="VREF"
-                                    offset="0x00B0"/>
+                    <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00B0"/>
                     <signals>
                         <signal function="VREF" group="VREFA" pad="PD7"/>
                     </signals>
@@ -1026,10 +465,7 @@
             </module>
             <module id="wdt_windowed_v2" name="WDT">
                 <instance name="WDT">
-                    <register-group address-space="data"
-                                    name="WDT"
-                                    name-in-module="WDT"
-                                    offset="0x0100"/>
+                    <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
                 </instance>
             </module>
         </peripherals>
@@ -1099,113 +535,36 @@
     <modules>
         <module caption="Analog Comparator" id="cmp_control_v8" name="AC">
             <register-group caption="Analog Comparator" name="AC" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Hysteresis Mode"
-                              mask="0x06"
-                              name="HYSMODE"
-                              rw="RW"
-                              values="AC_HYSMODE"/>
-                    <bitfield caption="Power profile"
-                              mask="0x18"
-                              name="POWER"
-                              rw="RW"
-                              values="AC_POWER"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Power profile" mask="0x18" name="POWER" rw="RW" values="AC_POWER"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Window selection mode"
-                              mask="0x03"
-                              name="WINSEL"
-                              rw="RW"
-                              values="AC_WINSEL"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Window selection mode" mask="0x03" name="WINSEL" rw="RW" values="AC_WINSEL"/>
                 </register>
-                <register caption="Mux Control A"
-                          initval="0x00"
-                          name="MUXCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input MUX Selection"
-                              mask="0x07"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection"
-                              mask="0x38"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="AC_MUXPOS"/>
-                    <bitfield caption="AC Output Initial Value"
-                              mask="0x40"
-                              name="INITVAL"
-                              rw="RW"
-                              values="AC_INITVAL"/>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Negative Input MUX Selection" mask="0x07" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+                    <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
                 </register>
-                <register caption="DAC Voltage Reference"
-                          initval="0xFF"
-                          name="DACREF"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="DAC Voltage Reference" initval="0xFF" name="DACREF" offset="0x5" rw="RW" size="1">
                     <bitfield caption="DACREF" mask="0xFF" name="DACREF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="AC.CTRLB.WINSEL" value="0x0"/>
                     <mode name="WINDOW" qualifier="AC.CTRLB.WINSEL" value="0x1 0x2"/>
                     <bitfield caption="Interrupt Enable" mask="0x01" name="CMP" rw="RW"/>
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="INTMODE"
-                              rw="RW"
-                              values="AC_NORMAL_INTMODE"/>
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x30"
-                              modes="WINDOW"
-                              name="INTMODE"
-                              rw="RW"
-                              values="AC_WINDOW_INTMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" modes="NORMAL" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" modes="WINDOW" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Comparator Interrupt Flag"
-                              mask="0x01"
-                              name="CMPIF"
-                              rw="RW"/>
-                    <bitfield caption="Analog Comparator State"
-                              mask="0x10"
-                              name="CMPSTATE"
-                              rw="R"/>
-                    <bitfield caption="Analog Comparator Window State"
-                              mask="0xC0"
-                              name="WINSTATE"
-                              rw="R"
-                              values="AC_WINSTATE"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x01" name="CMPIF" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xC0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -1215,41 +574,23 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Fastest response time, highest consumption"
-                       name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Fastest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
             </value-group>
             <value-group caption="Window selection mode" name="AC_WINSEL">
                 <value caption="Window function disabled" name="DISABLED" value="0x0"/>
-                <value caption="Select ACn+1 as upper limit in window compare"
-                       name="UPSEL1"
-                       value="0x1"/>
+                <value caption="Select ACn+1 as upper limit in window compare" name="UPSEL1" value="0x1"/>
             </value-group>
             <value-group caption="Interrupt Mode select" name="AC_NORMAL_INTMODE">
-                <value caption="Positive and negative inputs crosses"
-                       name="BOTHEDGE"
-                       value="0x0"/>
-                <value caption="Positive input goes below negative input"
-                       name="NEGEDGE"
-                       value="0x2"/>
-                <value caption="Positive input goes above negative input"
-                       name="POSEDGE"
-                       value="0x3"/>
+                <value caption="Positive and negative inputs crosses" name="BOTHEDGE" value="0x0"/>
+                <value caption="Positive input goes below negative input" name="NEGEDGE" value="0x2"/>
+                <value caption="Positive input goes above negative input" name="POSEDGE" value="0x3"/>
             </value-group>
             <value-group caption="Interrupt Mode select" name="AC_WINDOW_INTMODE">
-                <value caption="Window interrupt when input above both references"
-                       name="ABOVE"
-                       value="0x0"/>
-                <value caption="Window interrupt when input betweeen references"
-                       name="INSIDE"
-                       value="0x1"/>
-                <value caption="Window interrupt when input below both references"
-                       name="BELOW"
-                       value="0x2"/>
-                <value caption="Window interrupt when input outside reference"
-                       name="OUTSIDE"
-                       value="0x3"/>
+                <value caption="Window interrupt when input above both references" name="ABOVE" value="0x0"/>
+                <value caption="Window interrupt when input betweeen references" name="INSIDE" value="0x1"/>
+                <value caption="Window interrupt when input below both references" name="BELOW" value="0x2"/>
+                <value caption="Window interrupt when input outside reference" name="OUTSIDE" value="0x3"/>
             </value-group>
             <value-group caption="AC Output Initial Value select" name="AC_INITVAL">
                 <value caption="Output initialized to 0" name="LOW" value="0x0"/>
@@ -1275,313 +616,94 @@
                 <value caption="Below window" name="BELOW" value="0x2"/>
             </value-group>
         </module>
-        <module caption="Analog to Digital Converter"
-                id="adc_12b_diff_ctrl_avr_v2"
-                name="ADC">
+        <module caption="Analog to Digital Converter" id="adc_12b_diff_ctrl_avr_v2" name="ADC">
             <register-group caption="Analog to Digital Converter" name="ADC" size="0x40">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="ADC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Low Latency" mask="0x20" name="LOWLAT" rw="RW"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Prescaler Value"
-                              mask="0x0F"
-                              name="PRESC"
-                              rw="RW"
-                              values="ADC_PRESC"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Prescaler Value" mask="0x0F" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="ADC_REFSEL"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Window Comparator Mode"
-                              mask="0x07"
-                              name="WINCM"
-                              rw="RW"
-                              values="ADC_WINCM"/>
-                    <bitfield caption="Window Mode Source"
-                              mask="0x08"
-                              name="WINSRC"
-                              rw="RW"
-                              values="ADC_WINSRC"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x07" name="WINCM" rw="RW" values="ADC_WINCM"/>
+                    <bitfield caption="Window Mode Source" mask="0x08" name="WINSRC" rw="RW" values="ADC_WINSRC"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Result Ready Interrupt Enable"
-                              mask="0x01"
-                              name="RESRDY"
-                              rw="RW"/>
-                    <bitfield caption="Sample Ready Interrupt Enable"
-                              mask="0x02"
-                              name="SAMPRDY"
-                              rw="RW"/>
-                    <bitfield caption="Window Comparator Interrupt Enable"
-                              mask="0x04"
-                              name="WCMP"
-                              rw="RW"/>
-                    <bitfield caption="Result Overwrite Interrupt Enable"
-                              mask="0x08"
-                              name="RESOVR"
-                              rw="RW"/>
-                    <bitfield caption="Sample Overwrite Interrupt Enable"
-                              mask="0x10"
-                              name="SAMPOVR"
-                              rw="RW"/>
-                    <bitfield caption="Trigger Overrun Interrupt Enable"
-                              mask="0x20"
-                              name="TRIGOVR"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x01" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Sample Ready Interrupt Enable" mask="0x02" name="SAMPRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x04" name="WCMP" rw="RW"/>
+                    <bitfield caption="Result Overwrite Interrupt Enable" mask="0x08" name="RESOVR" rw="RW"/>
+                    <bitfield caption="Sample Overwrite Interrupt Enable" mask="0x10" name="SAMPOVR" rw="RW"/>
+                    <bitfield caption="Trigger Overrun Interrupt Enable" mask="0x20" name="TRIGOVR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Result Ready Interrupt Flag"
-                              mask="0x01"
-                              name="RESRDY"
-                              rw="RW"/>
-                    <bitfield caption="Sample Ready Interrupt Flag"
-                              mask="0x02"
-                              name="SAMPRDY"
-                              rw="RW"/>
-                    <bitfield caption="Window Comparator Interrupt Flag"
-                              mask="0x04"
-                              name="WCMP"
-                              rw="RW"/>
-                    <bitfield caption="Result Overwrite Interrupt Flag"
-                              mask="0x08"
-                              name="RESOVR"
-                              rw="RW"/>
-                    <bitfield caption="Sample Overwrite Interrupt Flag"
-                              mask="0x10"
-                              name="SAMPOVR"
-                              rw="RW"/>
-                    <bitfield caption="Trigger Overrun Interrupt Flag"
-                              mask="0x20"
-                              name="TRIGOVR"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Flag" mask="0x01" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Sample Ready Interrupt Flag" mask="0x02" name="SAMPRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Flag" mask="0x04" name="WCMP" rw="RW"/>
+                    <bitfield caption="Result Overwrite Interrupt Flag" mask="0x08" name="RESOVR" rw="RW"/>
+                    <bitfield caption="Sample Overwrite Interrupt Flag" mask="0x10" name="SAMPOVR" rw="RW"/>
+                    <bitfield caption="Trigger Overrun Interrupt Flag" mask="0x20" name="TRIGOVR" rw="RW"/>
                 </register>
-                <register caption="Status register"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x06"
-                          rw="R"
-                          size="1">
+                <register caption="Status register" initval="0x00" name="STATUS" offset="0x06" rw="R" size="1">
                     <bitfield caption="ADC Busy" mask="0x01" name="ADCBUSY" rw="R"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Run in Debug Mode" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x08" rw="RW" size="1">
                     <bitfield caption="Sample Duration" mask="0xFF" name="SAMPDUR" rw="RW"/>
                 </register>
-                <register caption="Control F"
-                          initval="0x00"
-                          name="CTRLF"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sample numbers"
-                              mask="0x0F"
-                              name="SAMPNUM"
-                              rw="RW"
-                              values="ADC_SAMPNUM"/>
+                <register caption="Control F" initval="0x00" name="CTRLF" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Sample numbers" mask="0x0F" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
                     <bitfield caption="Left Adjust" mask="0x10" name="LEFTADJ" rw="RW"/>
                     <bitfield caption="Free-Running mode" mask="0x20" name="FREERUN" rw="RW"/>
-                    <bitfield caption="Sign Chopping"
-                              mask="0x40"
-                              name="CHOPPING"
-                              rw="RW"
-                              values="ADC_CHOPPING"/>
+                    <bitfield caption="Sign Chopping" mask="0x40" name="CHOPPING" rw="RW" values="ADC_CHOPPING"/>
                 </register>
-                <register caption="Command register"
-                          initval="0x00"
-                          name="COMMAND"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Start command"
-                              mask="0x07"
-                              name="START"
-                              rw="RW"
-                              values="ADC_START"/>
-                    <bitfield caption="Mode"
-                              mask="0x70"
-                              name="MODE"
-                              rw="RW"
-                              values="ADC_MODE"/>
+                <register caption="Command register" initval="0x00" name="COMMAND" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Start command" mask="0x07" name="START" rw="RW" values="ADC_START"/>
+                    <bitfield caption="Mode" mask="0x70" name="MODE" rw="RW" values="ADC_MODE"/>
                     <bitfield caption="Differential mode" mask="0x80" name="DIFF" rw="RW"/>
                 </register>
-                <register caption="PGA Control"
-                          initval="0x00"
-                          name="PGACTRL"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="PGA Control" initval="0x00" name="PGACTRL" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="PGA Enable" mask="0x01" name="PGAEN" rw="RW"/>
-                    <bitfield caption="PGA BIAS Select"
-                              mask="0x18"
-                              name="PGABIASSEL"
-                              rw="RW"
-                              values="ADC_PGABIASSEL"/>
-                    <bitfield caption="Gain"
-                              mask="0xE0"
-                              name="GAIN"
-                              rw="RW"
-                              values="ADC_GAIN"/>
+                    <bitfield caption="PGA BIAS Select" mask="0x18" name="PGABIASSEL" rw="RW" values="ADC_PGABIASSEL"/>
+                    <bitfield caption="Gain" mask="0xE0" name="GAIN" rw="RW" values="ADC_GAIN"/>
                 </register>
-                <register caption="Positive Input Multiplexer"
-                          initval="0x00"
-                          name="MUXPOS"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x3F"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="ADC_MUXPOS"/>
-                    <bitfield caption="VIA"
-                              mask="0xC0"
-                              name="VIA"
-                              rw="RW"
-                              values="ADC_VIA"/>
+                <register caption="Positive Input Multiplexer" initval="0x00" name="MUXPOS" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x3F" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+                    <bitfield caption="VIA" mask="0xC0" name="VIA" rw="RW" values="ADC_VIA"/>
                 </register>
-                <register caption="Negative Input Multiplexer"
-                          initval="0x00"
-                          name="MUXNEG"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x3F"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="ADC_MUXNEG"/>
-                    <bitfield caption="VIA"
-                              mask="0xC0"
-                              name="VIA"
-                              rw="RW"
-                              values="ADC_VIA"/>
+                <register caption="Negative Input Multiplexer" initval="0x00" name="MUXNEG" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x3F" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
+                    <bitfield caption="VIA" mask="0xC0" name="VIA" rw="RW" values="ADC_VIA"/>
                 </register>
-                <register caption="Result"
-                          initval="0x00000000"
-                          name="RESULT"
-                          offset="0x10"
-                          rw="R"
-                          size="4"/>
-                <register caption="Sample"
-                          initval="0x0000"
-                          name="SAMPLE"
-                          offset="0x14"
-                          rw="R"
-                          size="2"/>
-                <register caption="Temporary Data 0"
-                          initval="0x00"
-                          name="TEMP0"
-                          offset="0x18"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Temporary Data 1"
-                          initval="0x00"
-                          name="TEMP1"
-                          offset="0x19"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Temporary Data 2"
-                          initval="0x00"
-                          name="TEMP2"
-                          offset="0x1A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Window Low Threshold"
-                          initval="0x0000"
-                          name="WINLT"
-                          offset="0x1C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Window High Threshold"
-                          initval="0x0000"
-                          name="WINHT"
-                          offset="0x1E"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Result" initval="0x00000000" name="RESULT" offset="0x10" rw="R" size="4"/>
+                <register caption="Sample" initval="0x0000" name="SAMPLE" offset="0x14" rw="R" size="2"/>
+                <register caption="Temporary Data 0" initval="0x00" name="TEMP0" offset="0x18" rw="RW" size="1"/>
+                <register caption="Temporary Data 1" initval="0x00" name="TEMP1" offset="0x19" rw="RW" size="1"/>
+                <register caption="Temporary Data 2" initval="0x00" name="TEMP2" offset="0x1A" rw="RW" size="1"/>
+                <register caption="Window Low Threshold" initval="0x0000" name="WINLT" offset="0x1C" rw="RW" size="2"/>
+                <register caption="Window High Threshold" initval="0x0000" name="WINHT" offset="0x1E" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Mode select" name="ADC_MODE">
-                <value caption="Single Conversion with 8-bit resolution"
-                       name="SINGLE_8BIT"
-                       value="0x00"/>
-                <value caption="Single Conversion with 12-bit resolution"
-                       name="SINGLE_12BIT"
-                       value="0x01"/>
-                <value caption="Series with accumulation, separate trigger for every 12-bit conversion"
-                       name="SERIES"
-                       value="0x02"/>
-                <value caption="Series with accumulation and scaling, separate trigger for every 12-bit conversion"
-                       name="SERIES_SCALING"
-                       value="0x03"/>
-                <value caption="Burst with accumulation, one trigger will run SAMPNUM 12-bit conversions"
-                       name="BURST"
-                       value="0x04"/>
-                <value caption="Burst with accumulation and scaling, one trigger will run SAMPNUM 12-bit conversions"
-                       name="BURST_SCALING"
-                       value="0x05"/>
+                <value caption="Single Conversion with 8-bit resolution" name="SINGLE_8BIT" value="0x00"/>
+                <value caption="Single Conversion with 12-bit resolution" name="SINGLE_12BIT" value="0x01"/>
+                <value caption="Series with accumulation, separate trigger for every 12-bit conversion" name="SERIES" value="0x02"/>
+                <value caption="Series with accumulation and scaling, separate trigger for every 12-bit conversion" name="SERIES_SCALING" value="0x03"/>
+                <value caption="Burst with accumulation, one trigger will run SAMPNUM 12-bit conversions" name="BURST" value="0x04"/>
+                <value caption="Burst with accumulation and scaling, one trigger will run SAMPNUM 12-bit conversions" name="BURST_SCALING" value="0x05"/>
             </value-group>
             <value-group caption="Start command select" name="ADC_START">
                 <value caption="Stop an ongoing conversion" name="STOP" value="0x00"/>
-                <value caption="Start a conversion immediately. This will be set back to STOP when the first conversion is done, unless Free-Running mode is enabled"
-                       name="IMMEDIATE"
-                       value="0x01"/>
-                <value caption="Start when MUXPOS register is written"
-                       name="MUXPOS_WRITE"
-                       value="0x02"/>
-                <value caption="Start when MUXNEG register is written"
-                       name="MUXNEG_WRITE"
-                       value="0x03"/>
-                <value caption="Start when an event is received"
-                       name="EVENT_TRIGGER"
-                       value="0x04"/>
+                <value caption="Start a conversion immediately. This will be set back to STOP when the first conversion is done, unless Free-Running mode is enabled" name="IMMEDIATE" value="0x01"/>
+                <value caption="Start when MUXPOS register is written" name="MUXPOS_WRITE" value="0x02"/>
+                <value caption="Start when MUXNEG register is written" name="MUXNEG_WRITE" value="0x03"/>
+                <value caption="Start when an event is received" name="EVENT_TRIGGER" value="0x04"/>
             </value-group>
             <value-group caption="Prescaler Value select" name="ADC_PRESC">
                 <value caption="System clock divided by 2" name="DIV2" value="0x00"/>
@@ -1617,12 +739,8 @@
                 <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
             </value-group>
             <value-group caption="Window Mode Source select" name="ADC_WINSRC">
-                <value caption="Result register used as Window Comparator Source"
-                       name="RESULT"
-                       value="0x0"/>
-                <value caption="Sample register used as Window Comparator Source"
-                       name="SAMPLE"
-                       value="0x1"/>
+                <value caption="Result register used as Window Comparator Source" name="RESULT" value="0x0"/>
+                <value caption="Sample register used as Window Comparator Source" name="SAMPLE" value="0x1"/>
             </value-group>
             <value-group caption="Sign Chopping select" name="ADC_CHOPPING">
                 <value caption="Sign Chopping Disabled" name="DISABLE" value="0x0"/>
@@ -1672,9 +790,7 @@
                 <value caption="AC1 DAC reference" name="DACREF1" value="0x3A"/>
             </value-group>
             <value-group caption="VIA select" name="ADC_VIA">
-                <value caption="Inputs connected directly to ADC"
-                       name="DIRECT"
-                       value="0x0"/>
+                <value caption="Inputs connected directly to ADC" name="DIRECT" value="0x0"/>
                 <value caption="Inputs connected via PGA" name="PGA" value="0x1"/>
             </value-group>
             <value-group caption="Analog Channel Selection Bits" name="ADC_MUXPOS">
@@ -1716,112 +832,40 @@
             </value-group>
             <value-group caption="PGA BIAS Select" name="ADC_PGABIASSEL">
                 <value caption="100% BIAS current." name="100PCT" value="0x0"/>
-                <value caption="75% BIAS current. Usable for CLK_ADC&lt;4.5MHz"
-                       name="75PCT"
-                       value="0x1"/>
-                <value caption="50% BIAS current. Usable for CLK_ADC&lt;3MHz"
-                       name="50PCT"
-                       value="0x2"/>
-                <value caption="25% BIAS current. Usable for CLK_ADC&lt;1.5MHz"
-                       name="25PCT"
-                       value="0x3"/>
+                <value caption="75% BIAS current. Usable for CLK_ADC&lt;4.5MHz" name="75PCT" value="0x1"/>
+                <value caption="50% BIAS current. Usable for CLK_ADC&lt;3MHz" name="50PCT" value="0x2"/>
+                <value caption="25% BIAS current. Usable for CLK_ADC&lt;1.5MHz" name="25PCT" value="0x3"/>
             </value-group>
         </module>
         <module caption="Bod interface" id="bor_lvd_ctrl_avr_v2" name="BOD">
             <register-group caption="Bod interface" name="BOD" size="0x10">
-                <register caption="Control A"
-                          initval="0x01"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Operation in sleep mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="BOD_SLEEP"/>
-                    <bitfield caption="Operation in active mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="R"
-                              values="BOD_ACTIVE"/>
-                    <bitfield caption="Sample frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="R"
-                              values="BOD_SAMPFREQ"/>
+                <register caption="Control A" initval="0x01" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in sleep mode" mask="0x03" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                    <bitfield caption="Operation in active mode" mask="0x0C" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bod level"
-                              mask="0x07"
-                              name="LVL"
-                              rw="R"
-                              values="BOD_LVL"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x07" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor Control"
-                          initval="0x00"
-                          name="VLMCTRLA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level"
-                              mask="0x03"
-                              name="VLMLVL"
-                              rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x03" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor interrrupt enable"
-                              mask="0x01"
-                              name="VLMIE"
-                              rw="RW"/>
-                    <bitfield caption="Configuration"
-                              mask="0x06"
-                              name="VLMCFG"
-                              rw="RW"
-                              values="BOD_VLMCFG"/>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x01" name="VLMIE" rw="RW"/>
+                    <bitfield caption="Configuration" mask="0x06" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor interrupt flag"
-                              mask="0x01"
-                              name="VLMIF"
-                              rw="RW"/>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x01" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor status"
-                              mask="0x01"
-                              name="VLMS"
-                              rw="R"
-                              values="BOD_VLMS"/>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x01" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
                 <value caption="Disabled" name="DISABLE" value="0x00"/>
                 <value caption="Enabled in continuous mode" name="ENABLED" value="0x01"/>
                 <value caption="Enabled in sampled mode" name="SAMPLED" value="0x02"/>
-                <value caption="Enabled in continuous mode. Execution halted at wake-up until BOD is running"
-                       name="ENABLEWAIT"
-                       value="0x03"/>
+                <value caption="Enabled in continuous mode. Execution halted at wake-up until BOD is running" name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
                 <value caption="Sampling frequency is 128 Hz" name="128HZ" value="0x0"/>
@@ -1833,9 +877,7 @@
                 <value caption="Enabled in sampled mode" name="SAMPLE" value="0x02"/>
             </value-group>
             <value-group caption="Bod level select" name="BOD_LVL">
-                <value caption="BOD Disabled during normal operation"
-                       name="BODLEVEL0"
-                       value="0x00"/>
+                <value caption="BOD Disabled during normal operation" name="BODLEVEL0" value="0x00"/>
                 <value caption="1.9 V" name="BODLEVEL1" value="0x01"/>
                 <value caption="2.7 V" name="BODLEVEL2" value="0x02"/>
                 <value caption="4.5 V" name="BODLEVEL3" value="0x03"/>
@@ -1846,338 +888,103 @@
                 <value caption="VDD crosses VLM threshold" name="BOTH" value="0x02"/>
             </value-group>
             <value-group caption="Voltage level monitor status select" name="BOD_VLMS">
-                <value caption="The voltage is above the VLM threshold level"
-                       name="ABOVE"
-                       value="0x0"/>
-                <value caption="The voltage is below the VLM threshold level"
-                       name="BELOW"
-                       value="0x1"/>
+                <value caption="The voltage is above the VLM threshold level" name="ABOVE" value="0x0"/>
+                <value caption="The voltage is below the VLM threshold level" name="BELOW" value="0x1"/>
             </value-group>
             <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
                 <value caption="VLM Disabled" name="OFF" value="0x0"/>
-                <value caption="VLM threshold 5% above BOD level"
-                       name="5ABOVE"
-                       value="0x1"/>
-                <value caption="VLM threshold 15% above BOD level"
-                       name="15ABOVE"
-                       value="0x2"/>
-                <value caption="VLM threshold 25% above BOD level"
-                       name="25ABOVE"
-                       value="0x3"/>
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x1"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x2"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x3"/>
             </value-group>
         </module>
         <module caption="Configurable Custom Logic" id="cla_ccl_v1" name="CCL">
             <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Sequential Control 0"
-                          initval="0x00"
-                          name="SEQCTRL0"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Sequential Control 1"
-                          initval="0x00"
-                          name="SEQCTRL1"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Interrupt Control 0"
-                          initval="0x00"
-                          name="INTCTRL0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode for LUT0"
-                              mask="0x03"
-                              name="INTMODE0"
-                              rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1"
-                              mask="0x0C"
-                              name="INTMODE1"
-                              rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2"
-                              mask="0x30"
-                              name="INTMODE2"
-                              rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3"
-                              mask="0xC0"
-                              name="INTMODE3"
-                              rw="RW"
-                              values="CCL_INTMODE3"/>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x03" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0x0C" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xC0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x0F" name="INT" rw="RW"/>
                 </register>
-                <register caption="LUT 0 Control A"
-                          initval="0x00"
-                          name="LUT0CTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 0 Control A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 0 Control B"
-                          initval="0x00"
-                          name="LUT0CTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 0 Control C"
-                          initval="0x00"
-                          name="LUT0CTRLC"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 0"
-                          initval="0x00"
-                          name="TRUTH0"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 1 Control A"
-                          initval="0x00"
-                          name="LUT1CTRLA"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 1 Control A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 1 Control B"
-                          initval="0x00"
-                          name="LUT1CTRLB"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 1 Control C"
-                          initval="0x00"
-                          name="LUT1CTRLC"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 1"
-                          initval="0x00"
-                          name="TRUTH1"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 2 Control A"
-                          initval="0x00"
-                          name="LUT2CTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 2 Control A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 2 Control B"
-                          initval="0x00"
-                          name="LUT2CTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 2 Control C"
-                          initval="0x00"
-                          name="LUT2CTRLC"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 2"
-                          initval="0x00"
-                          name="TRUTH2"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 3 Control A"
-                          initval="0x00"
-                          name="LUT3CTRLA"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 3 Control A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 3 Control B"
-                          initval="0x00"
-                          name="LUT3CTRLB"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 3 Control C"
-                          initval="0x00"
-                          name="LUT3CTRLC"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 3"
-                          initval="0x00"
-                          name="TRUTH3"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
             </register-group>
@@ -2208,13 +1015,9 @@
             <value-group caption="Clock Source Selection" name="CCL_CLKSRC">
                 <value caption="Peripheral Clock" name="CLKPER" value="0x0"/>
                 <value caption="INSEL2 selection" name="IN2" value="0x1"/>
-                <value caption="Internal High Frequency oscillator"
-                       name="OSCHF"
-                       value="0x4"/>
+                <value caption="Internal High Frequency oscillator" name="OSCHF" value="0x4"/>
                 <value caption="Internal 32.768 kHz oscillator" name="OSC32K" value="0x5"/>
-                <value caption="Internal 32.768 kHz oscillator divided by 32"
-                       name="OSC1K"
-                       value="0x6"/>
+                <value caption="Internal 32.768 kHz oscillator divided by 32" name="OSC1K" value="0x6"/>
             </value-group>
             <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
                 <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
@@ -2228,9 +1031,7 @@
             <value-group caption="LUT Input 0 Source Selection" name="CCL_INSEL0">
                 <value caption="Masked input" name="MASK" value="0x0"/>
                 <value caption="Feedback input" name="FEEDBACK" value="0x1"/>
-                <value caption="Output from LUT[n+1] as input source"
-                       name="LINK"
-                       value="0x2"/>
+                <value caption="Output from LUT[n+1] as input source" name="LINK" value="0x2"/>
                 <value caption="Event A as input source" name="EVENTA" value="0x3"/>
                 <value caption="Event B as input source" name="EVENTB" value="0x4"/>
                 <value caption="IN0 input source" name="IO" value="0x5"/>
@@ -2244,9 +1045,7 @@
             <value-group caption="LUT Input 1 Source Selection" name="CCL_INSEL1">
                 <value caption="Masked input" name="MASK" value="0x0"/>
                 <value caption="Feedback input" name="FEEDBACK" value="0x1"/>
-                <value caption="Output from LUT[n+1] as input source"
-                       name="LINK"
-                       value="0x2"/>
+                <value caption="Output from LUT[n+1] as input source" name="LINK" value="0x2"/>
                 <value caption="Event A as input source" name="EVENTA" value="0x3"/>
                 <value caption="Event B as input source" name="EVENTB" value="0x4"/>
                 <value caption="IN0 input source" name="IO" value="0x5"/>
@@ -2260,9 +1059,7 @@
             <value-group caption="LUT Input 2 Source Selection" name="CCL_INSEL2">
                 <value caption="Masked input" name="MASK" value="0x0"/>
                 <value caption="Feedback input" name="FEEDBACK" value="0x1"/>
-                <value caption="Output from LUT[n+1] as input source"
-                       name="LINK"
-                       value="0x2"/>
+                <value caption="Output from LUT[n+1] as input source" name="LINK" value="0x2"/>
                 <value caption="Event A as input source" name="EVENTA" value="0x3"/>
                 <value caption="Event B as input source" name="EVENTB" value="0x4"/>
                 <value caption="IN0 input source" name="IO" value="0x5"/>
@@ -2283,174 +1080,62 @@
         </module>
         <module caption="Clock controller" id="avrea" name="CLKCTRL">
             <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
-                <register caption="MCLK Control A"
-                          initval="0x00"
-                          name="MCLKCTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="CLKCTRL_CLKSEL"/>
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock select" mask="0x07" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
                     <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
                 </register>
-                <register caption="MCLK Control B"
-                          initval="0x11"
-                          name="MCLKCTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Control B" initval="0x11" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Prescaler enable" mask="0x01" name="PEN" rw="RW"/>
-                    <bitfield caption="Prescaler division"
-                              mask="0x1E"
-                              name="PDIV"
-                              rw="RW"
-                              values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler division" mask="0x1E" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
                 </register>
-                <register caption="MCLK Control C"
-                          initval="0x00"
-                          name="MCLKCTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Enable"
-                              mask="0x01"
-                              name="CFDEN"
-                              rw="RW"/>
+                <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Enable" mask="0x01" name="CFDEN" rw="RW"/>
                     <bitfield caption="CFD Test" mask="0x02" name="CFDTST" rw="RW"/>
-                    <bitfield caption="CFD Source"
-                              mask="0x0C"
-                              name="CFDSRC"
-                              rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="CFD Source" mask="0x0C" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                 </register>
-                <register caption="MCLK Interrupt Control"
-                          initval="0x00"
-                          name="MCLKINTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Interrupt Enable" mask="0x01" name="CFD" rw="RW"/>
-                    <bitfield caption="Interrupt Type"
-                              mask="0x80"
-                              name="INTTYPE"
-                              rw="RW"
-                              values="CLKCTRL_INTTYPE"/>
+                    <bitfield caption="Interrupt Type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags"
-                          initval="0x00"
-                          name="MCLKINTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detected" mask="0x01" name="CFD" rw="RW"/>
                 </register>
-                <register caption="MCLK Status"
-                          initval="0x00"
-                          name="MCLKSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="System Oscillator changing"
-                              mask="0x01"
-                              name="SOSC"
-                              rw="R"/>
-                    <bitfield caption="High frequency oscillator status"
-                              mask="0x02"
-                              name="OSCHFS"
-                              rw="R"/>
-                    <bitfield caption="32KHz oscillator status"
-                              mask="0x04"
-                              name="OSC32KS"
-                              rw="R"/>
-                    <bitfield caption="32.768 kHz Crystal Oscillator status"
-                              mask="0x08"
-                              name="XOSC32KS"
-                              rw="R"/>
-                    <bitfield caption="External Clock status / XOSCHF status"
-                              mask="0x10"
-                              name="EXTS"
-                              rw="R"/>
+                <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="System Oscillator changing" mask="0x01" name="SOSC" rw="R"/>
+                    <bitfield caption="High frequency oscillator status" mask="0x02" name="OSCHFS" rw="R"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x04" name="OSC32KS" rw="R"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x08" name="XOSC32KS" rw="R"/>
+                    <bitfield caption="External Clock status / XOSCHF status" mask="0x10" name="EXTS" rw="R"/>
                 </register>
-                <register caption="MCLK Timebase"
-                          initval="0x00"
-                          name="MCLKTIMEBASE"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Timebase" initval="0x00" name="MCLKTIMEBASE" offset="0x06" rw="RW" size="1">
                     <bitfield caption="Timebase" mask="0x1F" name="TIMEBASE" rw="RW"/>
                 </register>
-                <register caption="OSCHF Control A"
-                          initval="0x0C"
-                          name="OSCHFCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Automatic Oscillator Tune"
-                              mask="0x03"
-                              name="AUTOTUNE"
-                              rw="RW"
-                              values="CLKCTRL_AUTOTUNE"/>
+                <register caption="OSCHF Control A" initval="0x0C" name="OSCHFCTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Automatic Oscillator Tune" mask="0x03" name="AUTOTUNE" rw="RW" values="CLKCTRL_AUTOTUNE"/>
                     <bitfield caption="Run in standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSCHF Tune"
-                          initval="0x00"
-                          name="OSCHFTUNE"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Tune" initval="0x00" name="OSCHFTUNE" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Oscillator Tune" mask="0xFF" name="TUNE" rw="RW"/>
                 </register>
-                <register caption="OSC32K Control A"
-                          initval="0x00"
-                          name="OSC32KCTRLA"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC32K Control A"
-                          initval="0x00"
-                          name="XOSC32KCTRLA"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Low power mode" mask="0x02" name="LPMODE" rw="RW"/>
                     <bitfield caption="Select" mask="0x04" name="SEL" rw="RW"/>
-                    <bitfield caption="Crystal startup time"
-                              mask="0x30"
-                              name="CSUT"
-                              rw="RW"
-                              values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSCHF Control A"
-                          initval="0x00"
-                          name="XOSCHFCTRLA"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSCHF Control A" initval="0x00" name="XOSCHFCTRLA" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Source Select"
-                              mask="0x02"
-                              name="SELHF"
-                              rw="RW"
-                              values="CLKCTRL_SELHF"/>
-                    <bitfield caption="Start-Up Time"
-                              mask="0x30"
-                              name="CSUTHF"
-                              rw="RW"
-                              values="CLKCTRL_CSUTHF"/>
+                    <bitfield caption="Source Select" mask="0x02" name="SELHF" rw="RW" values="CLKCTRL_SELHF"/>
+                    <bitfield caption="Start-Up Time" mask="0x30" name="CSUTHF" rw="RW" values="CLKCTRL_CSUTHF"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Clock select" name="CLKCTRL_CLKSEL">
-                <value caption="Internal high-frequency oscillator"
-                       name="OSCHF"
-                       value="0x0"/>
+                <value caption="Internal high-frequency oscillator" name="OSCHF" value="0x0"/>
                 <value caption="Internal 32.768 kHz oscillator" name="OSC32K" value="0x1"/>
                 <value caption="32.768 kHz crystal oscillator" name="XOSC32K" value="0x2"/>
                 <value caption="External clock" name="EXTCLK" value="0x3"/>
@@ -2470,9 +1155,7 @@
             </value-group>
             <value-group caption="CFD Source select" name="CLKCTRL_CFDSRC">
                 <value caption="Main Clock" name="CLKMAIN" value="0x0"/>
-                <value caption="High Frequency Crystal Oscillator"
-                       name="XOSCHF"
-                       value="0x1"/>
+                <value caption="High Frequency Crystal Oscillator" name="XOSCHF" value="0x1"/>
                 <value caption="32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x2"/>
             </value-group>
             <value-group caption="Interrupt Type select" name="CLKCTRL_INTTYPE">
@@ -2481,9 +1164,7 @@
             </value-group>
             <value-group caption="Automatic Oscillator Tune select" name="CLKCTRL_AUTOTUNE">
                 <value caption="Disabled" name="OFF" value="0x0"/>
-                <value caption="Tune against 32.768 kHz Crystal Oscillator"
-                       name="XOSC32K"
-                       value="0x1"/>
+                <value caption="Tune against 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x1"/>
             </value-group>
             <value-group caption="Start-Up Time select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF Cycles" name="256CYC" value="0x0"/>
@@ -2503,44 +1184,19 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection"
-                          initval="0x00"
-                          name="CCP"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCP signature"
-                              mask="0xFF"
-                              name="CCP"
-                              rw="RW"
-                              values="CPU_CCP"/>
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Stack Pointer"
-                          initval="0x7FFF"
-                          name="SP"
-                          offset="0xD"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Status Register"
-                          initval="0x00"
-                          name="SREG"
-                          offset="0xF"
-                          rw="RW"
-                          size="1">
+                <register caption="Stack Pointer" initval="0x7FFF" name="SP" offset="0xD" rw="RW" size="2"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
                     <bitfield caption="Carry Flag" mask="0x01" name="C" rw="RW"/>
                     <bitfield caption="Zero Flag" mask="0x02" name="Z" rw="RW"/>
                     <bitfield caption="Negative Flag" mask="0x04" name="N" rw="RW"/>
-                    <bitfield caption="Two's Complement Overflow Flag"
-                              mask="0x08"
-                              name="V"
-                              rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V" rw="RW"/>
                     <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
                     <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
                     <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
-                    <bitfield caption="Global Interrupt Enable Flag"
-                              mask="0x80"
-                              name="I"
-                              rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="CCP signature select" name="CPU_CCP">
@@ -2550,570 +1206,169 @@
         </module>
         <module caption="Interrupt Controller" id="int_8bit_v3" name="CPUINT">
             <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Round-robin Scheduling Enable"
-                              mask="0x01"
-                              name="LVL0RR"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x01" name="LVL0RR" rw="RW"/>
                     <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
-                    <bitfield caption="Interrupt Vector Select"
-                              mask="0x40"
-                              name="IVSEL"
-                              rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Level 0 Interrupt Executing"
-                              mask="0x01"
-                              name="LVL0EX"
-                              rw="R"/>
-                    <bitfield caption="Level 1 Interrupt Executing"
-                              mask="0x02"
-                              name="LVL1EX"
-                              rw="R"/>
-                    <bitfield caption="Non-maskable Interrupt Executing"
-                              mask="0x80"
-                              name="NMIEX"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x01" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x02" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority"
-                          initval="0x00"
-                          name="LVL0PRI"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Level Priority"
-                              mask="0xFF"
-                              name="LVL0PRI"
-                              rw="RW"/>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xFF" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector"
-                          initval="0x00"
-                          name="LVL1VEC"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Vector with High Priority"
-                              mask="0xFF"
-                              name="LVL1VEC"
-                              rw="RW"/>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xFF" name="LVL1VEC" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="CRCSCAN" id="math_pdi_crc_v1" name="CRCSCAN">
             <register-group caption="CRCSCAN" name="CRCSCAN" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable CRC scan" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Enable NMI Trigger" mask="0x02" name="NMIEN" rw="RW"/>
                     <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CRC Source"
-                              mask="0x03"
-                              name="SRC"
-                              rw="RW"
-                              values="CRCSCAN_SRC"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x03" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
                 </register>
-                <register caption="Status"
-                          initval="0x02"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="CRC Busy" mask="0x01" name="BUSY" rw="R"/>
                     <bitfield caption="CRC Ok" mask="0x02" name="OK" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="CRC Source select" name="CRCSCAN_SRC">
                 <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
-                <value caption="CRC on boot and appl section of flash"
-                       name="APPLICATION"
-                       value="0x1"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
                 <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
             </value-group>
         </module>
-        <module caption="Digital to Analog Converter"
-                id="dac_nbit_ctrl_avr_v6"
-                name="DAC">
+        <module caption="Digital to Analog Converter" id="dac_nbit_ctrl_avr_v6" name="DAC">
             <register-group caption="Digital to Analog Converter" name="DAC" size="0x10">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="DAC Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Output Buffer Range"
-                              mask="0x30"
-                              name="OUTRANGE"
-                              rw="RW"
-                              values="DAC_OUTRANGE"/>
+                    <bitfield caption="Output Buffer Range" mask="0x30" name="OUTRANGE" rw="RW" values="DAC_OUTRANGE"/>
                     <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="DATA Register"
-                          name="DATA"
-                          offset="0x2"
-                          rw="RW"
-                          size="2">
+                <register caption="DATA Register" name="DATA" offset="0x2" rw="RW" size="2">
                     <bitfield caption="Data" mask="0xFFC0" name="DATA" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Output Buffer Range select" name="DAC_OUTRANGE">
-                <value caption="Output buffer automatically choose best range"
-                       name="AUTO"
-                       value="0x0"/>
-                <value caption="Output buffer configured to low range"
-                       name="LOW"
-                       value="0x2"/>
-                <value caption="Output buffer configured to high range"
-                       name="HIGH"
-                       value="0x3"/>
+                <value caption="Output buffer automatically choose best range" name="AUTO" value="0x0"/>
+                <value caption="Output buffer configured to low range" name="LOW" value="0x2"/>
+                <value caption="Output buffer configured to high range" name="HIGH" value="0x3"/>
             </value-group>
         </module>
         <module caption="Event System" id="avrea" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Software Event A"
-                          initval="0x00"
-                          name="SWEVENTA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0xFF"
-                              name="SWEVENTA"
-                              rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0xFF" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
-                <register caption="Multiplexer Channel 0"
-                          initval="0x00"
-                          name="CHANNEL0"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="Multiplexer Channel 1"
-                          initval="0x00"
-                          name="CHANNEL1"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="Multiplexer Channel 2"
-                          initval="0x00"
-                          name="CHANNEL2"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="Multiplexer Channel 3"
-                          initval="0x00"
-                          name="CHANNEL3"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="Multiplexer Channel 4"
-                          initval="0x00"
-                          name="CHANNEL4"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="Multiplexer Channel 5"
-                          initval="0x00"
-                          name="CHANNEL5"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="CCL0 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT0A"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL0 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT0B"
-                          offset="0x21"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL1 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT1A"
-                          offset="0x22"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL1 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT1B"
-                          offset="0x23"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL2 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT2A"
-                          offset="0x24"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL2 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT2B"
-                          offset="0x25"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL3 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT3A"
-                          offset="0x26"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL3 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT3B"
-                          offset="0x27"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="ADC0"
-                          initval="0x00"
-                          name="USERADC0START"
-                          offset="0x28"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="EVOUTA"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTA"
-                          offset="0x29"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="EVOUTC"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTC"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="EVOUTD"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTD"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="EVOUTF"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTF"
-                          offset="0x2E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="USART0"
-                          initval="0x00"
-                          name="USERUSART0IRDA"
-                          offset="0x2F"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="USART1"
-                          initval="0x00"
-                          name="USERUSART1IRDA"
-                          offset="0x30"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="USART1" initval="0x00" name="USERUSART1IRDA" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="USART2"
-                          initval="0x00"
-                          name="USERUSART2IRDA"
-                          offset="0x31"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="USART2" initval="0x00" name="USERUSART2IRDA" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCA0 Event A"
-                          initval="0x00"
-                          name="USERTCA0CNTA"
-                          offset="0x32"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCA0 Event B"
-                          initval="0x00"
-                          name="USERTCA0CNTB"
-                          offset="0x33"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCA1 Event A"
-                          initval="0x00"
-                          name="USERTCA1CNTA"
-                          offset="0x34"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCA1 Event B"
-                          initval="0x00"
-                          name="USERTCA1CNTB"
-                          offset="0x35"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB0 Event A"
-                          initval="0x00"
-                          name="USERTCB0CAPT"
-                          offset="0x36"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB0 Event B"
-                          initval="0x00"
-                          name="USERTCB0COUNT"
-                          offset="0x37"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB1 Event A"
-                          initval="0x00"
-                          name="USERTCB1CAPT"
-                          offset="0x38"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x38" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB1 Event B"
-                          initval="0x00"
-                          name="USERTCB1COUNT"
-                          offset="0x39"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x39" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB2 Event A"
-                          initval="0x00"
-                          name="USERTCB2CAPT"
-                          offset="0x3A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x3A" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB2 Event B"
-                          initval="0x00"
-                          name="USERTCB2COUNT"
-                          offset="0x3B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x3B" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB3 Event A"
-                          initval="0x00"
-                          name="USERTCB3CAPT"
-                          offset="0x3C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x3C" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB3 Event B"
-                          initval="0x00"
-                          name="USERTCB3COUNT"
-                          offset="0x3D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x3D" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
             <value-group caption="Channel generator select" name="EVSYS_CHANNEL">
@@ -3121,24 +1376,12 @@
                 <value caption="UPDI SYNCH character" name="UPDI_SYNCH" value="0x1"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer Event 0"
-                       name="RTC_PITEV0"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer Event 1"
-                       name="RTC_PITEV1"
-                       value="0x9"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer Event 0" name="RTC_PITEV0" value="0x8"/>
+                <value caption="Periodic Interrupt Timer Event 1" name="RTC_PITEV1" value="0x9"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x21"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RES" value="0x24"/>
@@ -3156,36 +1399,16 @@
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow"
-                       name="TCA1_OVF_LUNF"
-                       value="0x88"/>
-                <value caption="Timer/Counter A1 high byte timer underflow"
-                       name="TCA1_HUNF"
-                       value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0"
-                       name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1"
-                       name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2"
-                       name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
+                <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3207,153 +1430,50 @@
             </value-group>
             <value-group caption="User channel select" name="EVSYS_USER">
                 <value caption="Off, No Eventsys Channel connected" name="OFF" value="0x0"/>
-                <value caption="Connect user to event channel 0"
-                       name="CHANNEL0"
-                       value="0x1"/>
-                <value caption="Connect user to event channel 1"
-                       name="CHANNEL1"
-                       value="0x2"/>
-                <value caption="Connect user to event channel 2"
-                       name="CHANNEL2"
-                       value="0x3"/>
-                <value caption="Connect user to event channel 3"
-                       name="CHANNEL3"
-                       value="0x4"/>
-                <value caption="Connect user to event channel 4"
-                       name="CHANNEL4"
-                       value="0x5"/>
-                <value caption="Connect user to event channel 5"
-                       name="CHANNEL5"
-                       value="0x6"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
             </value-group>
         </module>
         <module caption="Fuses" id="avrea" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Watchdog Configuration"
-                          initval="0x00"
-                          name="WDTCFG"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Watchdog Timeout Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="FUSE_WINDOW"/>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
-                <register caption="BOD Configuration"
-                          initval="0x00"
-                          name="BODCFG"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="BOD Operation in Sleep Mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="FUSE_SLEEP"/>
-                    <bitfield caption="BOD Operation in Active Mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="RW"
-                              values="FUSE_ACTIVE"/>
-                    <bitfield caption="BOD Sample Frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Level"
-                              mask="0xE0"
-                              name="LVL"
-                              rw="RW"
-                              values="FUSE_LVL"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x03" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x0C" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Level" mask="0xE0" name="LVL" rw="RW" values="FUSE_LVL"/>
                 </register>
-                <register caption="Oscillator Configuration"
-                          initval="0x00"
-                          name="OSCCFG"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="High-frequency Oscillator Frequency"
-                              mask="0x08"
-                              name="OSCHFFRQ"
-                              rw="RW"
-                              values="FUSE_OSCHFFRQ"/>
+                <register caption="Oscillator Configuration" initval="0x00" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="High-frequency Oscillator Frequency" mask="0x08" name="OSCHFFRQ" rw="RW" values="FUSE_OSCHFFRQ"/>
                 </register>
-                <register caption="System Configuration 0"
-                          initval="0xD0"
-                          name="SYSCFG0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="EEPROM Save"
-                              mask="0x01"
-                              name="EESAVE"
-                              rw="RW"
-                              values="FUSE_EESAVE"/>
-                    <bitfield caption="Reset Pin Configuration"
-                              mask="0x08"
-                              name="RSTPINCFG"
-                              rw="RW"
-                              values="FUSE_RSTPINCFG"/>
-                    <bitfield caption="UPDI Pin Configuration"
-                              mask="0x10"
-                              name="UPDIPINCFG"
-                              rw="RW"
-                              values="FUSE_UPDIPINCFG"/>
-                    <bitfield caption="CRC Select"
-                              mask="0x20"
-                              name="CRCSEL"
-                              rw="RW"
-                              values="FUSE_CRCSEL"/>
-                    <bitfield caption="CRC Source"
-                              mask="0xC0"
-                              name="CRCSRC"
-                              rw="RW"
-                              values="FUSE_CRCSRC"/>
+                <register caption="System Configuration 0" initval="0xD0" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="EEPROM Save" mask="0x01" name="EESAVE" rw="RW" values="FUSE_EESAVE"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x08" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW" values="FUSE_UPDIPINCFG"/>
+                    <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
+                    <bitfield caption="CRC Source" mask="0xC0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                 </register>
-                <register caption="System Configuration 1"
-                          initval="0x07"
-                          name="SYSCFG1"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Startup Time"
-                              mask="0x07"
-                              name="SUT"
-                              rw="RW"
-                              values="FUSE_SUT"/>
+                <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x07" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
-                <register caption="Code Section Size"
-                          initval="0x00"
-                          name="CODESIZE"
-                          offset="0x7"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Boot Section Size"
-                          initval="0x00"
-                          name="BOOTSIZE"
-                          offset="0x8"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
+                <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="Disabled" name="DISABLE" value="0x00"/>
                 <value caption="Enabled in continuous mode" name="ENABLED" value="0x01"/>
                 <value caption="Enabled in sampled mode" name="SAMPLED" value="0x02"/>
-                <value caption="Enabled in continuous mode. Execution halted at wake-up until BOD is running"
-                       name="ENABLEWAIT"
-                       value="0x03"/>
+                <value caption="Enabled in continuous mode. Execution halted at wake-up until BOD is running" name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
-                <value caption="BOD Disabled during normal operation"
-                       name="BODLEVEL0"
-                       value="0x00"/>
+                <value caption="BOD Disabled during normal operation" name="BODLEVEL0" value="0x00"/>
                 <value caption="1.9 V" name="BODLEVEL1" value="0x01"/>
                 <value caption="2.7 V" name="BODLEVEL2" value="0x02"/>
                 <value caption="4.5 V" name="BODLEVEL3" value="0x03"/>
@@ -3367,8 +1487,7 @@
                 <value caption="Enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="Enabled in sampled mode" name="SAMPLE" value="0x02"/>
             </value-group>
-            <value-group caption="High-frequency Oscillator Frequency select"
-                         name="FUSE_OSCHFFRQ">
+            <value-group caption="High-frequency Oscillator Frequency select" name="FUSE_OSCHFFRQ">
                 <value caption="OSCHF running at 20 MHz" name="20M" value="0x0"/>
                 <value caption="OSCHF running at 16 MHz" name="16M" value="0x1"/>
             </value-group>
@@ -3377,22 +1496,14 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)"
-                       name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
-                <value caption="CRC of application code and boot sections"
-                       name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="EEPROM Save select" name="FUSE_EESAVE">
-                <value caption="EEPROM content is erased during chip erase"
-                       name="DISABLE"
-                       value="0x0"/>
-                <value caption="EEPROM content is preserved during chip erase"
-                       name="ENABLE"
-                       value="0x1"/>
+                <value caption="EEPROM content is erased during chip erase" name="DISABLE" value="0x0"/>
+                <value caption="EEPROM content is preserved during chip erase" name="ENABLE" value="0x1"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
                 <value caption="No External Reset" name="NONE" value="0x0"/>
@@ -3443,41 +1554,16 @@
         </module>
         <module caption="General Purpose Registers" id="avrea" name="GPR">
             <register-group caption="General Purpose Registers" name="GPR" size="0x4">
-                <register caption="General Purpose Register 0"
-                          name="GPR0"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 1"
-                          name="GPR1"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 2"
-                          name="GPR2"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 3"
-                          name="GPR3"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
+                <register caption="General Purpose Register 0" name="GPR0" offset="0x00" rw="RW" size="1"/>
+                <register caption="General Purpose Register 1" name="GPR1" offset="0x01" rw="RW" size="1"/>
+                <register caption="General Purpose Register 2" name="GPR2" offset="0x02" rw="RW" size="1"/>
+                <register caption="General Purpose Register 3" name="GPR3" offset="0x03" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Lockbits" id="avrea" name="LOCK">
             <register-group caption="Lockbits" name="LOCK" size="0x4">
-                <register caption="Lock Key Bits"
-                          initval="0x5CC5C55C"
-                          name="KEY"
-                          offset="0x0"
-                          rw="RW"
-                          size="4">
-                    <bitfield caption="Lock Key"
-                              mask="0xFFFFFFFF"
-                              name="KEY"
-                              rw="RW"
-                              values="LOCK_KEY"/>
+                <register caption="Lock Key Bits" initval="0x5CC5C55C" name="KEY" offset="0x0" rw="RW" size="4">
+                    <bitfield caption="Lock Key" mask="0xFFFFFFFF" name="KEY" rw="RW" values="LOCK_KEY"/>
                 </register>
             </register-group>
             <value-group caption="Lock Key select" name="LOCK_KEY">
@@ -3485,92 +1571,34 @@
                 <value caption="Read and write lock" name="RWLOCK" value="0xA33A3AA3"/>
             </value-group>
         </module>
-        <module caption="Non-volatile Memory Controller"
-                id="nvm_ctrl_avr_v3"
-                name="NVMCTRL">
+        <module caption="Non-volatile Memory Controller" id="nvm_ctrl_avr_v3" name="NVMCTRL">
             <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x40">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x7F"
-                              name="CMD"
-                              rw="RW"
-                              values="NVMCTRL_CMD"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x30"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Application Code Write Protect"
-                              mask="0x01"
-                              name="APPCODEWP"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x30" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Application Code Write Protect" mask="0x01" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x02" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Application Data Write Protect"
-                              mask="0x04"
-                              name="APPDATAWP"
-                              rw="RW"/>
+                    <bitfield caption="Application Data Write Protect" mask="0x04" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="EEPROM Write Protect" mask="0x08" name="EEWP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space"
-                              mask="0x30"
-                              name="FLMAP"
-                              rw="RW"
-                              values="NVMCTRL_FLMAP"/>
-                    <bitfield caption="Flash Mapping Lock"
-                              mask="0x80"
-                              name="FLMAPLOCK"
-                              rw="RW"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x04" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                     <bitfield caption="Flash Ready" mask="0x02" name="FLREADY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x05" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                     <bitfield caption="Flash Ready" mask="0x02" name="FLREADY" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x06"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x06" rw="R" size="1">
                     <bitfield caption="EEPROM busy" mask="0x01" name="EEBUSY" rw="R"/>
                     <bitfield caption="Flash busy" mask="0x02" name="FLBUSY" rw="R"/>
-                    <bitfield caption="Write error"
-                              mask="0x70"
-                              name="ERROR"
-                              rw="R"
-                              values="NVMCTRL_ERROR"/>
+                    <bitfield caption="Write error" mask="0x70" name="ERROR" rw="R" values="NVMCTRL_ERROR"/>
                 </register>
-                <register caption="Data"
-                          initval="0x0000"
-                          name="DATA"
-                          offset="0x08"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Address"
-                          initval="0x00000000"
-                          name="ADDR"
-                          offset="0x0C"
-                          rw="RW"
-                          size="4"/>
+                <register caption="Data" initval="0x0000" name="DATA" offset="0x08" rw="RW" size="2"/>
+                <register caption="Address" initval="0x00000000" name="ADDR" offset="0x0C" rw="RW" size="4"/>
             </register-group>
             <value-group caption="Command select" name="NVMCTRL_CMD">
                 <value caption="No Command" name="NOCMD" value="0x00"/>
@@ -3589,9 +1617,7 @@
                 <value caption="EEPROM Page Erase" name="EEPER" value="0x17"/>
                 <value caption="EEPROM Page Buffer Clear" name="EEPBCLR" value="0x1F"/>
                 <value caption="Chip Erase Command (UPDI only)" name="CHER" value="0x20"/>
-                <value caption="EEPROM Erase Command (UPDI only)"
-                       name="EECHER"
-                       value="0x30"/>
+                <value caption="EEPROM Erase Command (UPDI only)" name="EECHER" value="0x30"/>
             </value-group>
             <value-group caption="Flash Mapping in Data space select" name="NVMCTRL_FLMAP">
                 <value caption="Flash section 0, 0 - 32KB" name="SECTION0" value="0x0"/>
@@ -3601,294 +1627,88 @@
             </value-group>
             <value-group caption="Write error select" name="NVMCTRL_ERROR">
                 <value caption="No Error" name="NOERROR" value="0x0"/>
-                <value caption="Attempt to program write protected area"
-                       name="WRITEPROTECT"
-                       value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted"
-                       name="CMDCOLLISION"
-                       value="0x3"/>
-                <value caption="Address cannot be written with selected command"
-                       name="WRONGSECTION"
-                       value="0x4"/>
+                <value caption="Attempt to program write protected area" name="WRITEPROTECT" value="0x2"/>
+                <value caption="Selecting new write command while write command already seleted" name="CMDCOLLISION" value="0x3"/>
+                <value caption="Address cannot be written with selected command" name="WRONGSECTION" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_avr_v3" name="PORT">
             <register-group caption="I/O Ports" name="PORT" size="0x20">
-                <register caption="Data Direction"
-                          initval="0x00"
-                          name="DIR"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Set"
-                          initval="0x00"
-                          name="DIRSET"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Clear"
-                          initval="0x00"
-                          name="DIRCLR"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Toggle"
-                          initval="0x00"
-                          name="DIRTGL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          initval="0x00"
-                          name="OUT"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Set"
-                          initval="0x00"
-                          name="OUTSET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Clear"
-                          initval="0x00"
-                          name="OUTCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Toggle"
-                          initval="0x00"
-                          name="OUTTGL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          initval="0x00"
-                          name="IN"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" initval="0x00" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Set" initval="0x00" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" initval="0x00" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" initval="0x00" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Output Value" initval="0x00" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Set" initval="0x00" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Clear" initval="0x00" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" initval="0x00" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Input Value" initval="0x00" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
-                <register caption="Port Control"
-                          initval="0x00"
-                          name="PORTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Slew Rate Limit Enable" mask="0x01" name="SRL" rw="RW"/>
                 </register>
-                <register caption="Pin Control Config"
-                          initval="0x00"
-                          name="PINCONFIG"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin Control Config" initval="0x00" name="PINCONFIG" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin Control Update"
-                          initval="0x00"
-                          name="PINCTRLUPD"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Pin Control Set"
-                          initval="0x00"
-                          name="PINCTRLSET"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Pin Control Clear"
-                          initval="0x00"
-                          name="PINCTRLCLR"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Pin 0 Control"
-                          initval="0x00"
-                          name="PIN0CTRL"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin Control Update" initval="0x00" name="PINCTRLUPD" offset="0x0C" rw="RW" size="1"/>
+                <register caption="Pin Control Set" initval="0x00" name="PINCTRLSET" offset="0x0D" rw="RW" size="1"/>
+                <register caption="Pin Control Clear" initval="0x00" name="PINCTRLCLR" offset="0x0E" rw="RW" size="1"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 1 Control"
-                          initval="0x00"
-                          name="PIN1CTRL"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 2 Control"
-                          initval="0x00"
-                          name="PIN2CTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 3 Control"
-                          initval="0x00"
-                          name="PIN3CTRL"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 4 Control"
-                          initval="0x00"
-                          name="PIN4CTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 5 Control"
-                          initval="0x00"
-                          name="PIN5CTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 6 Control"
-                          initval="0x00"
-                          name="PIN6CTRL"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 7 Control"
-                          initval="0x00"
-                          name="PIN7CTRL"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Event Generation Control"
-                          initval="0x00"
-                          name="EVGENCTRL"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Generator 0 Select"
-                              mask="0x07"
-                              name="EVGEN0SEL"
-                              rw="RW"
-                              values="PORT_EVGEN0SEL"/>
-                    <bitfield caption="Event Generator 1 Select"
-                              mask="0x70"
-                              name="EVGEN1SEL"
-                              rw="RW"
-                              values="PORT_EVGEN1SEL"/>
+                <register caption="Event Generation Control" initval="0x00" name="EVGENCTRL" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Event Generator 0 Select" mask="0x07" name="EVGEN0SEL" rw="RW" values="PORT_EVGEN0SEL"/>
+                    <bitfield caption="Event Generator 1 Select" mask="0x70" name="EVGEN1SEL" rw="RW" values="PORT_EVGEN1SEL"/>
                 </register>
             </register-group>
             <value-group caption="Event Generator 0 Select" name="PORT_EVGEN0SEL">
@@ -3916,177 +1736,52 @@
                 <value caption="TTL Input level" name="TTL" value="0x1"/>
             </value-group>
             <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
-                <value caption="Interrupt disabled but input buffer enabled"
-                       name="INTDISABLE"
-                       value="0x0"/>
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
                 <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
                 <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
                 <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
-                <value caption="Digital Input Buffer disabled"
-                       name="INPUT_DISABLE"
-                       value="0x4"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
                 <value caption="Sense low Level" name="LEVEL" value="0x5"/>
             </value-group>
         </module>
         <module caption="Port Multiplexer" id="avrea" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x20">
-                <register caption="EVSYS route A"
-                          initval="0x00"
-                          name="EVSYSROUTEA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Output A"
-                              mask="0x01"
-                              name="EVOUTA"
-                              rw="RW"
-                              values="PORTMUX_EVOUTA"/>
-                    <bitfield caption="Event Output D"
-                              mask="0x08"
-                              name="EVOUTD"
-                              rw="RW"
-                              values="PORTMUX_EVOUTD"/>
-                    <bitfield caption="Event Output F"
-                              mask="0x20"
-                              name="EVOUTF"
-                              rw="RW"
-                              values="PORTMUX_EVOUTF"/>
+                <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Event Output A" mask="0x01" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output D" mask="0x08" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
                 </register>
-                <register caption="CCL route A"
-                          initval="0x00"
-                          name="CCLROUTEA"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals"
-                              mask="0x01"
-                              name="LUT0"
-                              rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals"
-                              mask="0x02"
-                              name="LUT1"
-                              rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals"
-                              mask="0x04"
-                              name="LUT2"
-                              rw="RW"
-                              values="PORTMUX_LUT2"/>
+                <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x01" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x02" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x04" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
                 </register>
-                <register caption="USART route A"
-                          initval="0x00"
-                          name="USARTROUTEA"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="USART0 Routing"
-                              mask="0x07"
-                              name="USART0"
-                              rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="USART1 Routing"
-                              mask="0x18"
-                              name="USART1"
-                              rw="RW"
-                              values="PORTMUX_USART1"/>
+                <register caption="USART route A" initval="0x00" name="USARTROUTEA" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="USART0 Routing" mask="0x07" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="USART1 Routing" mask="0x18" name="USART1" rw="RW" values="PORTMUX_USART1"/>
                 </register>
-                <register caption="USART route B"
-                          initval="0x00"
-                          name="USARTROUTEB"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="USART2 Routing"
-                              mask="0x30"
-                              name="USART2"
-                              rw="RW"
-                              values="PORTMUX_USART2"/>
+                <register caption="USART route B" initval="0x00" name="USARTROUTEB" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="USART2 Routing" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
                 </register>
-                <register caption="SPI route A"
-                          initval="0x00"
-                          name="SPIROUTEA"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI0 Signals"
-                              mask="0x07"
-                              name="SPI0"
-                              rw="RW"
-                              values="PORTMUX_SPI0"/>
+                <register caption="SPI route A" initval="0x00" name="SPIROUTEA" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="SPI0 Signals" mask="0x07" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                 </register>
-                <register caption="TWI route A"
-                          initval="0x00"
-                          name="TWIROUTEA"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TWI0 Signals"
-                              mask="0x03"
-                              name="TWI0"
-                              rw="RW"
-                              values="PORTMUX_TWI0"/>
+                <register caption="TWI route A" initval="0x00" name="TWIROUTEA" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="TWI0 Signals" mask="0x03" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="TCA route A"
-                          initval="0x00"
-                          name="TCAROUTEA"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCA0 Signals"
-                              mask="0x07"
-                              name="TCA0"
-                              rw="RW"
-                              values="PORTMUX_TCA0"/>
-                    <bitfield caption="TCA1 Signals"
-                              mask="0x38"
-                              name="TCA1"
-                              rw="RW"
-                              values="PORTMUX_TCA1"/>
+                <register caption="TCA route A" initval="0x00" name="TCAROUTEA" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="TCA0 Signals" mask="0x07" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
+                    <bitfield caption="TCA1 Signals" mask="0x38" name="TCA1" rw="RW" values="PORTMUX_TCA1"/>
                 </register>
-                <register caption="TCB route A"
-                          initval="0x00"
-                          name="TCBROUTEA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCB0 Output"
-                              mask="0x01"
-                              name="TCB0"
-                              rw="RW"
-                              values="PORTMUX_TCB0"/>
-                    <bitfield caption="TCB1 Output"
-                              mask="0x02"
-                              name="TCB1"
-                              rw="RW"
-                              values="PORTMUX_TCB1"/>
-                    <bitfield caption="TCB2 Output"
-                              mask="0x04"
-                              name="TCB2"
-                              rw="RW"
-                              values="PORTMUX_TCB2"/>
-                    <bitfield caption="TCB3 Output"
-                              mask="0x08"
-                              name="TCB3"
-                              rw="RW"
-                              values="PORTMUX_TCB3"/>
+                <register caption="TCB route A" initval="0x00" name="TCBROUTEA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="TCB0 Output" mask="0x01" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="TCB1 Output" mask="0x02" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+                    <bitfield caption="TCB2 Output" mask="0x04" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
+                    <bitfield caption="TCB3 Output" mask="0x08" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
                 </register>
-                <register caption="AC route A"
-                          initval="0x00"
-                          name="ACROUTEA"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Comparator 0 Output"
-                              mask="0x01"
-                              name="AC0"
-                              rw="RW"
-                              values="PORTMUX_AC0"/>
-                    <bitfield caption="Analog Comparator 1 Output"
-                              mask="0x02"
-                              name="AC1"
-                              rw="RW"
-                              values="PORTMUX_AC1"/>
+                <register caption="AC route A" initval="0x00" name="ACROUTEA" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator 0 Output" mask="0x01" name="AC0" rw="RW" values="PORTMUX_AC0"/>
+                    <bitfield caption="Analog Comparator 1 Output" mask="0x02" name="AC1" rw="RW" values="PORTMUX_AC1"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -4170,225 +1865,81 @@
                 <value caption="Not connected to any pins" name="NONE" value="0x3"/>
             </value-group>
         </module>
-        <module caption="Reset controller"
-                id="rst_integration_avr_v2"
-                name="RSTCTRL">
+        <module caption="Reset controller" id="rst_integration_avr_v2" name="RSTCTRL">
             <register-group caption="Reset controller" name="RSTCTRL" size="0x10">
-                <register caption="Reset Flags"
-                          initval="0x00"
-                          name="RSTFR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Power on Reset flag" mask="0x01" name="PORF" rw="RW"/>
-                    <bitfield caption="Brown out detector Reset flag"
-                              mask="0x02"
-                              name="BORF"
-                              rw="RW"/>
+                    <bitfield caption="Brown out detector Reset flag" mask="0x02" name="BORF" rw="RW"/>
                     <bitfield caption="External Reset flag" mask="0x04" name="EXTRF" rw="RW"/>
                     <bitfield caption="Watch dog Reset flag" mask="0x08" name="WDRF" rw="RW"/>
                     <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
                     <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
                 </register>
-                <register caption="Software Reset"
-                          initval="0x00"
-                          name="SWRR"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Software Reset Enable" mask="0x01" name="SWRE" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Real-Time Counter" id="tmr_16b_rtc_avr_v2" name="RTC">
             <register-group caption="Real-Time Counter" name="RTC" size="0x20">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="RTCEN" rw="RW"/>
                     <bitfield caption="Correction enable" mask="0x04" name="CORREN" rw="RW"/>
-                    <bitfield caption="Prescaling Factor"
-                              mask="0x78"
-                              name="PRESCALER"
-                              rw="RW"
-                              values="RTC_PRESCALER"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
                     <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x01"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLABUSY"
-                              rw="R"/>
-                    <bitfield caption="Count Synchronization Busy Flag"
-                              mask="0x02"
-                              name="CNTBUSY"
-                              rw="R"/>
-                    <bitfield caption="Period Synchronization Busy Flag"
-                              mask="0x04"
-                              name="PERBUSY"
-                              rw="R"/>
-                    <bitfield caption="Comparator Synchronization Busy Flag"
-                              mask="0x08"
-                              name="CMPBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x02" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x04" name="PERBUSY" rw="R"/>
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x08" name="CMPBUSY" rw="R"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt enable"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt Flag"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Temporary"
-                          name="TEMP"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Debug control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Calibration"
-                          initval="0x00"
-                          name="CALIB"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Error Correction Value"
-                              mask="0x7F"
-                              name="ERROR"
-                              rw="RW"/>
-                    <bitfield caption="Error Correction Sign Bit"
-                              mask="0x80"
-                              name="SIGN"
-                              rw="RW"/>
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7F" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
                 </register>
-                <register caption="Clock Select"
-                          initval="0x00"
-                          name="CLKSEL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Select"
-                              mask="0x03"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="RTC_CLKSEL"/>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x03" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
                 </register>
                 <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
-                <register caption="Period"
-                          initval="0xFFFF"
-                          name="PER"
-                          offset="0x0A"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
                 <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
-                <register caption="PIT Control A"
-                          initval="0x00"
-                          name="PITCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="PITEN" rw="RW"/>
-                    <bitfield caption="Period"
-                              mask="0x78"
-                              name="PERIOD"
-                              rw="RW"
-                              values="RTC_PERIOD"/>
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
                 </register>
-                <register caption="PIT Status"
-                          initval="0x00"
-                          name="PITSTATUS"
-                          offset="0x11"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLBUSY"
-                              rw="R"/>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLBUSY" rw="R"/>
                 </register>
-                <register caption="PIT Interrupt Control"
-                          initval="0x00"
-                          name="PITINTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags"
-                          initval="0x00"
-                          name="PITINTFLAGS"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Debug control"
-                          initval="0x00"
-                          name="PITDBGCTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Event Generation Control A"
-                          initval="0x00"
-                          name="PITEVGENCTRLA"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Generation 0 Select"
-                              mask="0x0F"
-                              name="EVGEN0SEL"
-                              rw="RW"
-                              values="RTC_EVGEN0SEL"/>
-                    <bitfield caption="Event Generation 1 Select"
-                              mask="0xF0"
-                              name="EVGEN1SEL"
-                              rw="RW"
-                              values="RTC_EVGEN1SEL"/>
+                <register caption="PIT Event Generation Control A" initval="0x00" name="PITEVGENCTRLA" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Event Generation 0 Select" mask="0x0F" name="EVGEN0SEL" rw="RW" values="RTC_EVGEN0SEL"/>
+                    <bitfield caption="Event Generation 1 Select" mask="0xF0" name="EVGEN1SEL" rw="RW" values="RTC_EVGEN1SEL"/>
                 </register>
             </register-group>
             <value-group caption="Clock Select" name="RTC_CLKSEL">
                 <value caption="Internal 32.768 kHz Oscillator" name="OSC32K" value="0x0"/>
-                <value caption="Internal 32.768 kHz Oscillator Divided by 32"
-                       name="OSC1K"
-                       value="0x1"/>
+                <value caption="Internal 32.768 kHz Oscillator Divided by 32" name="OSC1K" value="0x1"/>
                 <value caption="32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x2"/>
                 <value caption="External Clock" name="EXTCLK" value="0x3"/>
             </value-group>
@@ -4464,129 +2015,34 @@
         </module>
         <module caption="Signature row" id="avrea" name="SIGROW">
             <register-group caption="Signature row" name="SIGROW" size="0x40">
-                <register caption="Device ID Byte 0"
-                          name="DEVICEID0"
-                          offset="0x00"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 1"
-                          name="DEVICEID1"
-                          offset="0x01"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 2"
-                          name="DEVICEID2"
-                          offset="0x02"
-                          rw="R"
-                          size="1"/>
-                <register caption="Temperature Calibration 0"
-                          name="TEMPSENSE0"
-                          offset="0x04"
-                          rw="R"
-                          size="2"/>
-                <register caption="Temperature Calibration 1"
-                          name="TEMPSENSE1"
-                          offset="0x06"
-                          rw="R"
-                          size="2"/>
-                <register caption="Serial Number Byte 0"
-                          name="SERNUM0"
-                          offset="0x10"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 1"
-                          name="SERNUM1"
-                          offset="0x11"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 2"
-                          name="SERNUM2"
-                          offset="0x12"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 3"
-                          name="SERNUM3"
-                          offset="0x13"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 4"
-                          name="SERNUM4"
-                          offset="0x14"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 5"
-                          name="SERNUM5"
-                          offset="0x15"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 6"
-                          name="SERNUM6"
-                          offset="0x16"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 7"
-                          name="SERNUM7"
-                          offset="0x17"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 8"
-                          name="SERNUM8"
-                          offset="0x18"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 9"
-                          name="SERNUM9"
-                          offset="0x19"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 10"
-                          name="SERNUM10"
-                          offset="0x1A"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 11"
-                          name="SERNUM11"
-                          offset="0x1B"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 12"
-                          name="SERNUM12"
-                          offset="0x1C"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 13"
-                          name="SERNUM13"
-                          offset="0x1D"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 14"
-                          name="SERNUM14"
-                          offset="0x1E"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 15"
-                          name="SERNUM15"
-                          offset="0x1F"
-                          rw="R"
-                          size="1"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Temperature Calibration 0" name="TEMPSENSE0" offset="0x04" rw="R" size="2"/>
+                <register caption="Temperature Calibration 1" name="TEMPSENSE1" offset="0x06" rw="R" size="2"/>
+                <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x10" rw="R" size="1"/>
+                <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x11" rw="R" size="1"/>
+                <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x12" rw="R" size="1"/>
+                <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x13" rw="R" size="1"/>
+                <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x14" rw="R" size="1"/>
+                <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x15" rw="R" size="1"/>
+                <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x16" rw="R" size="1"/>
+                <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x17" rw="R" size="1"/>
+                <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x18" rw="R" size="1"/>
+                <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x19" rw="R" size="1"/>
+                <register caption="Serial Number Byte 10" name="SERNUM10" offset="0x1A" rw="R" size="1"/>
+                <register caption="Serial Number Byte 11" name="SERNUM11" offset="0x1B" rw="R" size="1"/>
+                <register caption="Serial Number Byte 12" name="SERNUM12" offset="0x1C" rw="R" size="1"/>
+                <register caption="Serial Number Byte 13" name="SERNUM13" offset="0x1D" rw="R" size="1"/>
+                <register caption="Serial Number Byte 14" name="SERNUM14" offset="0x1E" rw="R" size="1"/>
+                <register caption="Serial Number Byte 15" name="SERNUM15" offset="0x1F" rw="R" size="1"/>
             </register-group>
         </module>
-        <module caption="Sleep Controller"
-                id="clk_sleep_ctrl_avr_v1"
-                name="SLPCTRL">
+        <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v1" name="SLPCTRL">
             <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Sleep enable" mask="0x01" name="SEN" rw="RW"/>
-                    <bitfield caption="Sleep mode"
-                              mask="0x06"
-                              name="SMODE"
-                              rw="RW"
-                              values="SLPCTRL_SMODE"/>
+                    <bitfield caption="Sleep mode" mask="0x06" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
             </register-group>
             <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
@@ -4597,110 +2053,36 @@
         </module>
         <module caption="Serial Peripheral Interface" id="spi_8bit_v2" name="SPI">
             <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable Module" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Prescaler"
-                              mask="0x06"
-                              name="PRESC"
-                              rw="RW"
-                              values="SPI_PRESC"/>
+                    <bitfield caption="Prescaler" mask="0x06" name="PRESC" rw="RW" values="SPI_PRESC"/>
                     <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
-                    <bitfield caption="Host Operation Enable"
-                              mask="0x20"
-                              name="MASTER"
-                              rw="RW"/>
+                    <bitfield caption="Host Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
                     <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI Mode"
-                              mask="0x03"
-                              name="MODE"
-                              rw="RW"
-                              values="SPI_MODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="SPI Mode" mask="0x03" name="MODE" rw="RW" values="SPI_MODE"/>
                     <bitfield caption="SPI Select Disable" mask="0x04" name="SSD" rw="RW"/>
-                    <bitfield caption="Buffer Mode Wait for Receive"
-                              mask="0x40"
-                              name="BUFWR"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Mode Wait for Receive" mask="0x40" name="BUFWR" rw="RW"/>
                     <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Enable" mask="0x01" name="IE" rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Enable"
-                              mask="0x10"
-                              name="SSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <mode name="DEFAULT" qualifier="SPI.CTRLB.BUFEN" value="0"/>
                     <mode name="BUFFERED" qualifier="SPI.CTRLB.BUFEN" value="1"/>
-                    <bitfield caption="Buffer Overflow"
-                              mask="0x01"
-                              modes="BUFFERED"
-                              name="BUFOVF"
-                              rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Flag"
-                              mask="0x10"
-                              modes="BUFFERED"
-                              name="SSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Flag"
-                              mask="0x20"
-                              modes="BUFFERED"
-                              name="DREIF"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Flag"
-                              mask="0x40"
-                              modes="BUFFERED"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              modes="BUFFERED"
-                              name="RXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Write Collision"
-                              mask="0x40"
-                              modes="DEFAULT"
-                              name="WRCOL"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt Flag"
-                              mask="0x80"
-                              modes="DEFAULT"
-                              name="IF"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Overflow" mask="0x01" modes="BUFFERED" name="BUFOVF" rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Flag" mask="0x10" modes="BUFFERED" name="SSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" modes="BUFFERED" name="DREIF" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" modes="BUFFERED" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" modes="BUFFERED" name="RXCIF" rw="RW"/>
+                    <bitfield caption="Write Collision" mask="0x40" modes="DEFAULT" name="WRCOL" rw="RW"/>
+                    <bitfield caption="Interrupt Flag" mask="0x80" modes="DEFAULT" name="IF" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
             </register-group>
@@ -4719,548 +2101,154 @@
         </module>
         <module caption="System Configuration Registers" id="avrea" name="SYSCFG">
             <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
-                <register caption="Revision ID"
-                          name="REVID"
-                          offset="0x01"
-                          rw="R"
-                          size="1">
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="R" size="1">
                     <bitfield caption="Minor Revision" mask="0x0F" name="MINOR" rw="R"/>
                     <bitfield caption="Major Revision" mask="0xF0" name="MAJOR" rw="R"/>
                 </register>
-                <register caption="OCD Message Control"
-                          name="OCDMCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="OCD Message Control" name="OCDMCTRL" offset="0x04" rw="RW" size="1">
                     <bitfield caption="OCD Message" mask="0xFF" name="OCDM" rw="RW"/>
                 </register>
-                <register caption="OCD Message Status"
-                          initval="0x00"
-                          name="OCDMSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="OCD Message Status" initval="0x00" name="OCDMSTATUS" offset="0x05" rw="RW" size="1">
                     <bitfield caption="OCD Message Valid" mask="0x01" name="VALID" rw="RW"/>
                 </register>
             </register-group>
         </module>
-        <module caption="16-bit Timer/Counter Type A"
-                id="tmr_16b_pwm_v1"
-                name="TCA">
+        <module caption="16-bit Timer/Counter Type A" id="tmr_16b_pwm_v1" name="TCA">
             <register-group caption="16-bit Timer/Counter Type A" name="TCA" size="0x40">
-                <mode caption="Single Mode"
-                      name="SINGLE"
-                      qualifier="TCA.SINGLE.CTRLD.SPLITM"
-                      value="0"/>
-                <mode caption="Split Mode"
-                      name="SPLIT"
-                      qualifier="TCA.SPLIT.CTRLD.SPLITM"
-                      value="1"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <mode caption="Single Mode" name="SINGLE" qualifier="TCA.SINGLE.CTRLD.SPLITM" value="0"/>
+                <mode caption="Split Mode" name="SPLIT" qualifier="TCA.SPLIT.CTRLD.SPLITM" value="1"/>
+                <register caption="Control A" initval="0x00" modes="SINGLE" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x07"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                <register caption="Control B" initval="0x00" modes="SINGLE" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                     <bitfield caption="Auto Lock Update" mask="0x08" name="ALUPD" rw="RW"/>
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare 0 Waveform Output Value"
-                              mask="0x01"
-                              name="CMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Waveform Output Value"
-                              mask="0x02"
-                              name="CMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Waveform Output Value"
-                              mask="0x04"
-                              name="CMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SINGLE" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x01" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x02" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x04" name="CMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SINGLE" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Control E Clear" initval="0x00" modes="SINGLE" name="CTRLECLR" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Direction"
-                              mask="0x01"
-                              name="DIR"
-                              rw="RW"
-                              values="TCA_SINGLE_DIR"/>
+                <register caption="Control E Set" initval="0x00" modes="SINGLE" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control F Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Clear" initval="0x00" modes="SINGLE" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Control F Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFSET"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Set" initval="0x00" modes="SINGLE" name="CTRLFSET" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="EVCTRL"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Count on Event Input A"
-                              mask="0x01"
-                              name="CNTAEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action A"
-                              mask="0x0E"
-                              name="EVACTA"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTA"/>
-                    <bitfield caption="Count on Event Input B"
-                              mask="0x10"
-                              name="CNTBEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action B"
-                              mask="0xE0"
-                              name="EVACTB"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTB"/>
+                <register caption="Event Control" initval="0x00" modes="SINGLE" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input A" mask="0x01" name="CNTAEI" rw="RW"/>
+                    <bitfield caption="Event Action A" mask="0x0E" name="EVACTA" rw="RW" values="TCA_SINGLE_EVACTA"/>
+                    <bitfield caption="Count on Event Input B" mask="0x10" name="CNTBEI" rw="RW"/>
+                    <bitfield caption="Event Action B" mask="0xE0" name="EVACTB" rw="RW" values="TCA_SINGLE_EVACTB"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" modes="SINGLE" name="INTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" modes="SINGLE" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SINGLE" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary data for 16-bit Access"
-                          modes="SINGLE"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          modes="SINGLE"
-                          name="CNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period"
-                          modes="SINGLE"
-                          name="PER"
-                          offset="0x26"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0"
-                          modes="SINGLE"
-                          name="CMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1"
-                          modes="SINGLE"
-                          name="CMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2"
-                          modes="SINGLE"
-                          name="CMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period Buffer"
-                          modes="SINGLE"
-                          name="PERBUF"
-                          offset="0x36"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0 Buffer"
-                          modes="SINGLE"
-                          name="CMP0BUF"
-                          offset="0x38"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1 Buffer"
-                          modes="SINGLE"
-                          name="CMP1BUF"
-                          offset="0x3A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2 Buffer"
-                          modes="SINGLE"
-                          name="CMP2BUF"
-                          offset="0x3C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary data for 16-bit Access" modes="SINGLE" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Count" modes="SINGLE" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Period" modes="SINGLE" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Compare 0" modes="SINGLE" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 1" modes="SINGLE" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 2" modes="SINGLE" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Period Buffer" modes="SINGLE" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" modes="SINGLE" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" modes="SINGLE" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" modes="SINGLE" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" modes="SPLIT" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Enable"
-                              mask="0x01"
-                              name="LCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Enable"
-                              mask="0x02"
-                              name="LCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Enable"
-                              mask="0x04"
-                              name="LCMP2EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Enable"
-                              mask="0x10"
-                              name="HCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Enable"
-                              mask="0x20"
-                              name="HCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Enable"
-                              mask="0x40"
-                              name="HCMP2EN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" modes="SPLIT" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Enable" mask="0x01" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x02" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x04" name="LCMP2EN" rw="RW"/>
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Output Value"
-                              mask="0x01"
-                              name="LCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Output Value"
-                              mask="0x02"
-                              name="LCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Output Value"
-                              mask="0x04"
-                              name="LCMP2OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Output Value"
-                              mask="0x10"
-                              name="HCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Output Value"
-                              mask="0x20"
-                              name="HCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Output Value"
-                              mask="0x40"
-                              name="HCMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SPLIT" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x01" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x02" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x04" name="LCMP2OV" rw="RW"/>
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SPLIT" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Clear" initval="0x00" modes="SPLIT" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Set" initval="0x00" modes="SPLIT" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Enable"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Enable"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Enable"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Enable"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Enable"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" modes="SPLIT" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Flag"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Flag"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Flag"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Flag"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Flag"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" modes="SPLIT" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SPLIT" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Low Count"
-                          modes="SPLIT"
-                          name="LCNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Count"
-                          modes="SPLIT"
-                          name="HCNT"
-                          offset="0x21"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Period"
-                          modes="SPLIT"
-                          name="LPER"
-                          offset="0x26"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Period"
-                          modes="SPLIT"
-                          name="HPER"
-                          offset="0x27"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP0"
-                          offset="0x29"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP1"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP2"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Low Count" modes="SPLIT" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="High Count" modes="SPLIT" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="Low Period" modes="SPLIT" name="LPER" offset="0x26" rw="RW" size="1"/>
+                <register caption="High Period" modes="SPLIT" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
             </register-group>
             <value-group caption="Clock Selection" name="TCA_SINGLE_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5277,12 +2265,8 @@
                 <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
                 <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
                 <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
-                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM"
-                       name="DSBOTH"
-                       value="0x06"/>
-                <value caption="Dual Slope PWM, overflow on BOTTOM"
-                       name="DSBOTTOM"
-                       value="0x07"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
             </value-group>
             <value-group caption="Command select" name="TCA_SINGLE_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
@@ -5295,31 +2279,17 @@
                 <value caption="Count down" name="DOWN" value="0x1"/>
             </value-group>
             <value-group caption="Event Action A select" name="TCA_SINGLE_EVACTA">
-                <value caption="Count on positive edge event"
-                       name="CNT_POSEDGE"
-                       value="0x00"/>
+                <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
-                <value caption="Count on prescaled clock while event line is 1."
-                       name="CNT_HIGHLVL"
-                       value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
+                <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
-                <value caption="Restart counter at positive edge event"
-                       name="RESTART_POSEDGE"
-                       value="0x04"/>
-                <value caption="Restart counter on any edge event"
-                       name="RESTART_ANYEDGE"
-                       value="0x05"/>
-                <value caption="Restart counter while event line is 1."
-                       name="RESTART_HIGHLVL"
-                       value="0x06"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+                <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
+                <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
+                <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
             </value-group>
             <value-group caption="Clock Selection" name="TCA_SPLIT_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5339,107 +2309,46 @@
             </value-group>
             <value-group caption="Command Enable select" name="TCA_SPLIT_CMDEN">
                 <value caption="None" name="NONE" value="0x0"/>
-                <value caption="Both low byte and high byte counter"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Both low byte and high byte counter" name="BOTH" value="0x3"/>
             </value-group>
         </module>
         <module caption="16-bit Timer Type B" id="tmr_16b_capture_v1" name="TCB">
             <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Select"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCB_CLKSEL"/>
+                    <bitfield caption="Clock Select" mask="0x0E" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
                     <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
                     <bitfield caption="Cascade two timers" mask="0x20" name="CASCADE" rw="RW"/>
                     <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control Register B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Timer Mode"
-                              mask="0x07"
-                              name="CNTMODE"
-                              rw="RW"
-                              values="TCB_CNTMODE"/>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Timer Mode" mask="0x07" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
                     <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
                     <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
                     <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Event Input Enable" mask="0x01" name="CAPTEI" rw="RW"/>
                     <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
-                    <bitfield caption="Input Capture Noise Cancellation Filter"
-                              mask="0x40"
-                              name="FILTER"
-                              rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
                     <bitfield caption="Run" mask="0x01" name="RUN" rw="R"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Value"
-                          name="TEMP"
-                          offset="0x9"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          initval="0x0000"
-                          name="CNT"
-                          offset="0xA"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare or Capture"
-                          name="CCMP"
-                          offset="0xC"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock Select" name="TCB_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5452,137 +2361,46 @@
                 <value caption="Periodic Interrupt" name="INT" value="0x00"/>
                 <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
                 <value caption="Input Capture Event" name="CAPT" value="0x02"/>
-                <value caption="Input Capture Frequency measurement"
-                       name="FRQ"
-                       value="0x03"/>
-                <value caption="Input Capture Pulse-Width measurement"
-                       name="PW"
-                       value="0x04"/>
-                <value caption="Input Capture Frequency and Pulse-Width measurement"
-                       name="FRQPW"
-                       value="0x05"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
                 <value caption="Single Shot" name="SINGLE" value="0x06"/>
                 <value caption="8-bit PWM" name="PWM8" value="0x07"/>
             </value-group>
         </module>
         <module caption="Two-Wire Interface" id="i2c_8bit_avr_v3" name="TWI">
             <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Fast-mode Enable"
-                              mask="0x01"
-                              name="FMEN"
-                              rw="RW"
-                              values="TWI_FMEN"/>
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="SDA Setup Time"
-                              mask="0x10"
-                              name="SDASETUP"
-                              rw="RW"
-                              values="TWI_SDASETUP"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Fast-mode Enable" mask="0x01" name="FMEN" rw="RW" values="TWI_FMEN"/>
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Dual Mode Control"
-                          initval="0x00"
-                          name="DUALCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
+                <register caption="Dual Mode Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Debug Run"
-                              mask="0x01"
-                              name="DBGRUN"
-                              rw="RW"
-                              values="TWI_DBGRUN"/>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW" values="TWI_DBGRUN"/>
                 </register>
-                <register caption="Host Control A"
-                          initval="0x00"
-                          name="MCTRLA"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Inactive Bus Time-Out"
-                              mask="0x0C"
-                              name="TIMEOUT"
-                              rw="RW"
-                              values="TWI_TIMEOUT"/>
+                    <bitfield caption="Inactive Bus Time-Out" mask="0x0C" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
                     <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
-                    <bitfield caption="Write Interrupt Enable"
-                              mask="0x40"
-                              name="WIEN"
-                              rw="RW"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
                     <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
                 </register>
-                <register caption="Host Control B"
-                          initval="0x00"
-                          name="MCTRLB"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="MCMD"
-                              rw="RW"
-                              values="TWI_MCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Host Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                     <bitfield caption="Flush" mask="0x08" name="FLUSH" rw="RW"/>
                 </register>
-                <register caption="Host STATUS"
-                          initval="0x00"
-                          name="MSTATUS"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bus State"
-                              mask="0x03"
-                              name="BUSSTATE"
-                              rw="RW"
-                              values="TWI_BUSSTATE"/>
+                <register caption="Host STATUS" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
@@ -5590,155 +2408,73 @@
                     <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
                     <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
                 </register>
-                <register caption="Host Baud Rate"
-                          initval="0x00"
-                          name="MBAUD"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Baud Rate" initval="0x00" name="MBAUD" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Baud Rate" mask="0xFF" name="BAUD" rw="RW"/>
                 </register>
-                <register caption="Host Address"
-                          initval="0x00"
-                          name="MADDR"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Address" initval="0x00" name="MADDR" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Host Data"
-                          initval="0x00"
-                          name="MDATA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Data" initval="0x00" name="MDATA" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Control A"
-                          initval="0x00"
-                          name="SCTRLA"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Address Recognition Mode"
-                              mask="0x04"
-                              name="PMEN"
-                              rw="RW"/>
+                    <bitfield caption="Address Recognition Mode" mask="0x04" name="PMEN" rw="RW"/>
                     <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Enable"
-                              mask="0x40"
-                              name="APIEN"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
                     <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
                 </register>
-                <register caption="Client Control B"
-                          initval="0x00"
-                          name="SCTRLB"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="SCMD"
-                              rw="RW"
-                              values="TWI_SCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Client Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                 </register>
-                <register caption="Client Status"
-                          initval="0x00"
-                          name="SSTATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Address or Stop"
-                              mask="0x01"
-                              name="AP"
-                              rw="RW"
-                              values="TWI_AP"/>
+                <register caption="Client Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Address or Stop" mask="0x01" name="AP" rw="RW" values="TWI_AP"/>
                     <bitfield caption="Read/Write Direction" mask="0x02" name="DIR" rw="RW"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Collision" mask="0x08" name="COLL" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
                     <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Flag"
-                              mask="0x40"
-                              name="APIF"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
                     <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
                 </register>
-                <register caption="Client Address"
-                          initval="0x00"
-                          name="SADDR"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address" initval="0x00" name="SADDR" offset="0xC" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Client Data"
-                          initval="0x00"
-                          name="SDATA"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Data" initval="0x00" name="SDATA" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Address Mask"
-                          initval="0x00"
-                          name="SADDRMASK"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address Mask" initval="0x00" name="SADDRMASK" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Address Mask Enable" mask="0x01" name="ADDREN" rw="RW"/>
                     <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Fast-mode Enable select" name="TWI_FMEN">
-                <value caption="SCL duty cycle operating according to Sm specification"
-                       name="OFF"
-                       value="0x0"/>
-                <value caption="SCL duty cycle operating according to Fm specification"
-                       name="ON"
-                       value="0x1"/>
+                <value caption="SCL duty cycle operating according to Sm specification" name="OFF" value="0x0"/>
+                <value caption="SCL duty cycle operating according to Fm specification" name="ON" value="0x1"/>
             </value-group>
             <value-group caption="Fast-mode Plus Enable select" name="TWI_FMPEN">
-                <value caption="Operating in Standard-mode or Fast-mode"
-                       name="OFF"
-                       value="0x0"/>
+                <value caption="Operating in Standard-mode or Fast-mode" name="OFF" value="0x0"/>
                 <value caption="Operating in Fast-mode Plus" name="ON" value="0x1"/>
             </value-group>
             <value-group caption="Input voltage transition level select" name="TWI_INPUTLVL">
                 <value caption="I2C input voltage transition level" name="I2C" value="0x0"/>
-                <value caption="SMBus 3.0 input voltage transition level"
-                       name="SMBUS"
-                       value="0x1"/>
+                <value caption="SMBus 3.0 input voltage transition level" name="SMBUS" value="0x1"/>
             </value-group>
             <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
                 <value caption="No SDA Hold Delay" name="OFF" value="0x0"/>
                 <value caption="Short SDA hold time" name="50NS" value="0x1"/>
-                <value caption="Meets SMBUS 2.0 specification under typical conditions"
-                       name="300NS"
-                       value="0x2"/>
-                <value caption="Meets SMBUS 2.0 specificaiton across all corners"
-                       name="500NS"
-                       value="0x3"/>
+                <value caption="Meets SMBUS 2.0 specification under typical conditions" name="300NS" value="0x2"/>
+                <value caption="Meets SMBUS 2.0 specificaiton across all corners" name="500NS" value="0x3"/>
             </value-group>
             <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
                 <value caption="SDA setup time is four clock cycles" name="4CYC" value="0"/>
                 <value caption="SDA setup time is eight clock cycle" name="8CYC" value="1"/>
             </value-group>
             <value-group caption="Debug Run select" name="TWI_DBGRUN">
-                <value caption="The peripheral is halted in Break Debug mode and ignores events"
-                       name="HALT"
-                       value="0"/>
-                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted"
-                       name="RUN"
-                       value="1"/>
+                <value caption="The peripheral is halted in Break Debug mode and ignores events" name="HALT" value="0"/>
+                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted" name="RUN" value="1"/>
             </value-group>
             <value-group caption="Inactive Bus Time-Out select" name="TWI_TIMEOUT">
                 <value caption="Bus time-out disabled. I2C." name="DISABLED" value="0"/>
@@ -5752,15 +2488,9 @@
             </value-group>
             <value-group caption="Command select" name="TWI_MCMD">
                 <value caption="No action" name="NOACT" value="0"/>
-                <value caption="Execute Acknowledge Action followed by repeated Start."
-                       name="REPSTART"
-                       value="1"/>
-                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR."
-                       name="RECVTRANS"
-                       value="2"/>
-                <value caption="Execute Acknowledge Action followed by issuing a Stop condition."
-                       name="STOP"
-                       value="3"/>
+                <value caption="Execute Acknowledge Action followed by repeated Start." name="REPSTART" value="1"/>
+                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR." name="RECVTRANS" value="2"/>
+                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP" value="3"/>
             </value-group>
             <value-group caption="Bus State select" name="TWI_BUSSTATE">
                 <value caption="Unknown bus state" name="UNKNOWN" value="0"/>
@@ -5771,254 +2501,81 @@
             <value-group caption="Command select" name="TWI_SCMD">
                 <value caption="No Action" name="NOACT" value="0"/>
                 <value caption="Complete transaction" name="COMPTRANS" value="2"/>
-                <value caption="Used in response to an interrupt"
-                       name="RESPONSE"
-                       value="3"/>
+                <value caption="Used in response to an interrupt" name="RESPONSE" value="3"/>
             </value-group>
             <value-group caption="Address or Stop select" name="TWI_AP">
-                <value caption="A Stop condition generated the interrupt on APIF flag"
-                       name="STOP"
-                       value="0"/>
-                <value caption="Address detection generated the interrupt on APIF flag"
-                       name="ADR"
-                       value="1"/>
+                <value caption="A Stop condition generated the interrupt on APIF flag" name="STOP" value="0"/>
+                <value caption="Address detection generated the interrupt on APIF flag" name="ADR" value="1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                            name="USART"
-                            size="0x10">
-                <register caption="Receive Data Low Byte"
-                          initval="0x00"
-                          name="RXDATAL"
-                          offset="0x0"
-                          rw="R"
-                          size="1">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xFF" name="DATA" rw="R"/>
                 </register>
-                <register caption="Receive Data High Byte"
-                          initval="0x00"
-                          name="RXDATAH"
-                          offset="0x1"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="Receiver Data Register"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="R"/>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Receiver Data Register" mask="0x01" name="DATA8" rw="R"/>
                     <bitfield caption="Parity Error" mask="0x02" name="PERR" rw="R"/>
                     <bitfield caption="Frame Error" mask="0x04" name="FERR" rw="R"/>
                     <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Transmit Data Low Byte"
-                          initval="0x00"
-                          name="TXDATAL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register"
-                              mask="0xFF"
-                              name="DATA"
-                              rw="RW"/>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Transmit Data High Byte"
-                          initval="0x00"
-                          name="TXDATAH"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="RW"/>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x01" name="DATA8" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Wait For Break" mask="0x01" name="WFB" rw="RW"/>
                     <bitfield caption="Break Detected Flag" mask="0x02" name="BDF" rw="RW"/>
-                    <bitfield caption="Inconsistent Sync Field Interrupt Flag"
-                              mask="0x08"
-                              name="ISFIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Start Interrupt"
-                              mask="0x10"
-                              name="RXSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Flag"
-                              mask="0x20"
-                              name="DREIF"
-                              rw="R"/>
-                    <bitfield caption="Transmit Interrupt Flag"
-                              mask="0x40"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x08" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="RS485 Mode internal transmitter"
-                              mask="0x01"
-                              name="RS485"
-                              rw="RW"
-                              values="USART_RS485"/>
-                    <bitfield caption="Auto-baud Error Interrupt Enable"
-                              mask="0x04"
-                              name="ABEIE"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x01" name="RS485" rw="RW" values="USART_RS485"/>
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x04" name="ABEIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x08" name="LBME" rw="RW"/>
-                    <bitfield caption="Receiver Start Frame Interrupt Enable"
-                              mask="0x10"
-                              name="RXSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transmit Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multi-processor Communication Mode"
-                              mask="0x01"
-                              name="MPCM"
-                              rw="RW"/>
-                    <bitfield caption="Receiver Mode"
-                              mask="0x06"
-                              name="RXMODE"
-                              rw="RW"
-                              values="USART_RXMODE"/>
-                    <bitfield caption="Open Drain Mode Enable"
-                              mask="0x08"
-                              name="ODME"
-                              rw="RW"/>
-                    <bitfield caption="Start Frame Detection Enable"
-                              mask="0x10"
-                              name="SFDEN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x06" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x08" name="ODME" rw="RW"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
                     <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
                     <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x03"
-                          name="CTRLC"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="USART.CTRLC.CMODE" value="0x00 0x01 0x02"/>
                     <mode name="MSPI" qualifier="USART.CTRLC.CMODE" value="0x03"/>
-                    <bitfield caption="Communication Mode"
-                              mask="0xC0"
-                              name="CMODE"
-                              rw="RW"
-                              values="USART_CMODE"/>
-                    <bitfield caption="SPI Host Mode, Clock Phase"
-                              mask="0x02"
-                              modes="MSPI"
-                              name="UCPHA"
-                              rw="RW"/>
-                    <bitfield caption="SPI Host Mode, Data Order"
-                              mask="0x04"
-                              modes="MSPI"
-                              name="UDORD"
-                              rw="RW"/>
-                    <bitfield caption="Character Size"
-                              mask="0x07"
-                              modes="NORMAL"
-                              name="CHSIZE"
-                              rw="RW"
-                              values="USART_NORMAL_CHSIZE"/>
-                    <bitfield caption="Stop Bit Mode"
-                              mask="0x08"
-                              modes="NORMAL"
-                              name="SBMODE"
-                              rw="RW"
-                              values="USART_NORMAL_SBMODE"/>
-                    <bitfield caption="Parity Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="PMODE"
-                              rw="RW"
-                              values="USART_NORMAL_PMODE"/>
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" rw="RW" values="USART_CMODE"/>
+                    <bitfield caption="SPI Host Mode, Clock Phase" mask="0x02" modes="MSPI" name="UCPHA" rw="RW"/>
+                    <bitfield caption="SPI Host Mode, Data Order" mask="0x04" modes="MSPI" name="UDORD" rw="RW"/>
+                    <bitfield caption="Character Size" mask="0x07" modes="NORMAL" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" modes="NORMAL" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" modes="NORMAL" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
                 </register>
-                <register caption="Baud Rate"
-                          initval="0x0000"
-                          name="BAUD"
-                          offset="0x8"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Auto Baud Window"
-                              mask="0xC0"
-                              name="ABW"
-                              rw="RW"
-                              values="USART_ABW"/>
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xC0" name="ABW" rw="RW" values="USART_ABW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="IrDA Event Input Enable"
-                              mask="0x01"
-                              name="IREI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x01" name="IREI" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control"
-                          initval="0x00"
-                          name="TXPLCTRL"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xFF" name="TXPL" rw="RW"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control"
-                          initval="0x00"
-                          name="RXPLCTRL"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7F" name="RXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -6043,12 +2600,8 @@
                 <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
                 <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
                 <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
-                <value caption="Character size: 9 bit read low byte first"
-                       name="9BITL"
-                       value="0x06"/>
-                <value caption="Character size: 9 bit read high byte first"
-                       name="9BITH"
-                       value="0x07"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
             </value-group>
             <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
                 <value caption="No Parity" name="DISABLED" value="0x00"/>
@@ -6068,384 +2621,90 @@
         </module>
         <module caption="User Row" id="avrea" name="USERROW">
             <register-group caption="User Row" name="USERROW" size="0x40">
-                <register caption="User Row Byte 0"
-                          name="USERROW0"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 1"
-                          name="USERROW1"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 2"
-                          name="USERROW2"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 3"
-                          name="USERROW3"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 4"
-                          name="USERROW4"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 5"
-                          name="USERROW5"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 6"
-                          name="USERROW6"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 7"
-                          name="USERROW7"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 8"
-                          name="USERROW8"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 9"
-                          name="USERROW9"
-                          offset="0x09"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 10"
-                          name="USERROW10"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 11"
-                          name="USERROW11"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 12"
-                          name="USERROW12"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 13"
-                          name="USERROW13"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 14"
-                          name="USERROW14"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 15"
-                          name="USERROW15"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 16"
-                          name="USERROW16"
-                          offset="0x10"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 17"
-                          name="USERROW17"
-                          offset="0x11"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 18"
-                          name="USERROW18"
-                          offset="0x12"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 19"
-                          name="USERROW19"
-                          offset="0x13"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 20"
-                          name="USERROW20"
-                          offset="0x14"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 21"
-                          name="USERROW21"
-                          offset="0x15"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 22"
-                          name="USERROW22"
-                          offset="0x16"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 23"
-                          name="USERROW23"
-                          offset="0x17"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 24"
-                          name="USERROW24"
-                          offset="0x18"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 25"
-                          name="USERROW25"
-                          offset="0x19"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 26"
-                          name="USERROW26"
-                          offset="0x1A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 27"
-                          name="USERROW27"
-                          offset="0x1B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 28"
-                          name="USERROW28"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 29"
-                          name="USERROW29"
-                          offset="0x1D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 30"
-                          name="USERROW30"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 31"
-                          name="USERROW31"
-                          offset="0x1F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 32"
-                          name="USERROW32"
-                          offset="0x20"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 33"
-                          name="USERROW33"
-                          offset="0x21"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 34"
-                          name="USERROW34"
-                          offset="0x22"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 35"
-                          name="USERROW35"
-                          offset="0x23"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 36"
-                          name="USERROW36"
-                          offset="0x24"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 37"
-                          name="USERROW37"
-                          offset="0x25"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 38"
-                          name="USERROW38"
-                          offset="0x26"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 39"
-                          name="USERROW39"
-                          offset="0x27"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 40"
-                          name="USERROW40"
-                          offset="0x28"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 41"
-                          name="USERROW41"
-                          offset="0x29"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 42"
-                          name="USERROW42"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 43"
-                          name="USERROW43"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 44"
-                          name="USERROW44"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 45"
-                          name="USERROW45"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 46"
-                          name="USERROW46"
-                          offset="0x2E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 47"
-                          name="USERROW47"
-                          offset="0x2F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 48"
-                          name="USERROW48"
-                          offset="0x30"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 49"
-                          name="USERROW49"
-                          offset="0x31"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 50"
-                          name="USERROW50"
-                          offset="0x32"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 51"
-                          name="USERROW51"
-                          offset="0x33"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 52"
-                          name="USERROW52"
-                          offset="0x34"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 53"
-                          name="USERROW53"
-                          offset="0x35"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 54"
-                          name="USERROW54"
-                          offset="0x36"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 55"
-                          name="USERROW55"
-                          offset="0x37"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 56"
-                          name="USERROW56"
-                          offset="0x38"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 57"
-                          name="USERROW57"
-                          offset="0x39"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 58"
-                          name="USERROW58"
-                          offset="0x3A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 59"
-                          name="USERROW59"
-                          offset="0x3B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 60"
-                          name="USERROW60"
-                          offset="0x3C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 61"
-                          name="USERROW61"
-                          offset="0x3D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 62"
-                          name="USERROW62"
-                          offset="0x3E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 63"
-                          name="USERROW63"
-                          offset="0x3F"
-                          rw="RW"
-                          size="1"/>
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+                <register caption="User Row Byte 32" name="USERROW32" offset="0x20" rw="RW" size="1"/>
+                <register caption="User Row Byte 33" name="USERROW33" offset="0x21" rw="RW" size="1"/>
+                <register caption="User Row Byte 34" name="USERROW34" offset="0x22" rw="RW" size="1"/>
+                <register caption="User Row Byte 35" name="USERROW35" offset="0x23" rw="RW" size="1"/>
+                <register caption="User Row Byte 36" name="USERROW36" offset="0x24" rw="RW" size="1"/>
+                <register caption="User Row Byte 37" name="USERROW37" offset="0x25" rw="RW" size="1"/>
+                <register caption="User Row Byte 38" name="USERROW38" offset="0x26" rw="RW" size="1"/>
+                <register caption="User Row Byte 39" name="USERROW39" offset="0x27" rw="RW" size="1"/>
+                <register caption="User Row Byte 40" name="USERROW40" offset="0x28" rw="RW" size="1"/>
+                <register caption="User Row Byte 41" name="USERROW41" offset="0x29" rw="RW" size="1"/>
+                <register caption="User Row Byte 42" name="USERROW42" offset="0x2A" rw="RW" size="1"/>
+                <register caption="User Row Byte 43" name="USERROW43" offset="0x2B" rw="RW" size="1"/>
+                <register caption="User Row Byte 44" name="USERROW44" offset="0x2C" rw="RW" size="1"/>
+                <register caption="User Row Byte 45" name="USERROW45" offset="0x2D" rw="RW" size="1"/>
+                <register caption="User Row Byte 46" name="USERROW46" offset="0x2E" rw="RW" size="1"/>
+                <register caption="User Row Byte 47" name="USERROW47" offset="0x2F" rw="RW" size="1"/>
+                <register caption="User Row Byte 48" name="USERROW48" offset="0x30" rw="RW" size="1"/>
+                <register caption="User Row Byte 49" name="USERROW49" offset="0x31" rw="RW" size="1"/>
+                <register caption="User Row Byte 50" name="USERROW50" offset="0x32" rw="RW" size="1"/>
+                <register caption="User Row Byte 51" name="USERROW51" offset="0x33" rw="RW" size="1"/>
+                <register caption="User Row Byte 52" name="USERROW52" offset="0x34" rw="RW" size="1"/>
+                <register caption="User Row Byte 53" name="USERROW53" offset="0x35" rw="RW" size="1"/>
+                <register caption="User Row Byte 54" name="USERROW54" offset="0x36" rw="RW" size="1"/>
+                <register caption="User Row Byte 55" name="USERROW55" offset="0x37" rw="RW" size="1"/>
+                <register caption="User Row Byte 56" name="USERROW56" offset="0x38" rw="RW" size="1"/>
+                <register caption="User Row Byte 57" name="USERROW57" offset="0x39" rw="RW" size="1"/>
+                <register caption="User Row Byte 58" name="USERROW58" offset="0x3A" rw="RW" size="1"/>
+                <register caption="User Row Byte 59" name="USERROW59" offset="0x3B" rw="RW" size="1"/>
+                <register caption="User Row Byte 60" name="USERROW60" offset="0x3C" rw="RW" size="1"/>
+                <register caption="User Row Byte 61" name="USERROW61" offset="0x3D" rw="RW" size="1"/>
+                <register caption="User Row Byte 62" name="USERROW62" offset="0x3E" rw="RW" size="1"/>
+                <register caption="User Row Byte 63" name="USERROW63" offset="0x3F" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Virtual Ports" id="gpio_ports_avr_v3_vport" name="VPORT">
             <register-group caption="Virtual Ports" name="VPORT" size="0x4">
-                <register caption="Data Direction"
-                          initval="0x00"
-                          name="DIR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          initval="0x00"
-                          name="OUT"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          initval="0x00"
-                          name="IN"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" initval="0x00" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Output Value" initval="0x00" name="OUT" offset="0x1" rw="RW" size="1"/>
+                <register caption="Input Value" initval="0x00" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Voltage reference" id="avrea" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
-                <register caption="DAC0 Reference"
-                          initval="0x00"
-                          name="DAC0REF"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="DAC0 Reference" initval="0x00" name="DAC0REF" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="AC Reference"
-                          initval="0x00"
-                          name="ACREF"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="AC Reference" initval="0x00" name="ACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
             </register-group>
@@ -6460,33 +2719,12 @@
         </module>
         <module caption="Watch-Dog Timer" id="wdt_windowed_v2" name="WDT">
             <register-group caption="Watch-Dog Timer" name="WDT" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="WDT_PERIOD"/>
-                    <bitfield caption="Window"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="WDT_WINDOW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x0F" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xF0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Syncronization busy"
-                              mask="0x01"
-                              name="SYNCBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY" rw="R"/>
                     <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/E-SERIES/AVR64EA48.xml b/src/Targets/TargetDescriptionFiles/AVR8/E-SERIES/AVR64EA48.xml
index 54ecdc4f..67d7593f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/E-SERIES/AVR64EA48.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/E-SERIES/AVR64EA48.xml
@@ -1,119 +1,31 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AVR64EA48"
-                 package="VQFN48"
-                 pinout="QFN48"
-                 speedmax="20000000"
-                 tempmax="125"
-                 tempmin="-40"
-                 vccmax="5.5"
-                 vccmin="1.8"/>
+        <variant ordercode="AVR64EA48" package="VQFN48" pinout="QFN48" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="AVR64EA48" family="AVR8" architecture="AVR8X" avr-family="AVR EA">
         <address-spaces>
-            <address-space endianness="little"
-                           id="data"
-                           name="data"
-                           size="0x10000"
-                           start="0x0000">
-                <memory-segment exec="0"
-                                name="IO"
-                                rw="RW"
-                                size="0x103F"
-                                start="0x00"
-                                type="io"/>
-                <memory-segment exec="0"
-                                name="LOCKBITS"
-                                pagesize="0x4"
-                                rw="RW"
-                                size="0x04"
-                                start="0x1040"
-                                type="lockbits"/>
-                <memory-segment exec="0"
-                                name="FUSES"
-                                pagesize="0x8"
-                                rw="RW"
-                                size="0x10"
-                                start="0x1050"
-                                type="fuses"/>
-                <memory-segment exec="0"
-                                name="USER_SIGNATURES"
-                                pagesize="0x40"
-                                rw="RW"
-                                size="0x40"
-                                start="0x1080"
-                                type="user_signatures"/>
-                <memory-segment exec="0"
-                                name="SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x03"
-                                start="0x1100"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="PROD_SIGNATURES"
-                                pagesize="0x80"
-                                rw="R"
-                                size="0x7D"
-                                start="0x1103"
-                                type="signatures"/>
-                <memory-segment exec="0"
-                                name="EEPROM"
-                                pagesize="0x8"
-                                rw="RW"
-                                size="0x200"
-                                start="0x1400"
-                                type="eeprom"/>
-                <memory-segment exec="0"
-                                name="INTERNAL_SRAM"
-                                rw="RW"
-                                size="0x1800"
-                                start="0x6800"
-                                type="ram"/>
-                <memory-segment exec="0"
-                                name="MAPPED_PROGMEM"
-                                pagesize="0x80"
-                                rw="RW"
-                                size="0x8000"
-                                start="0x8000"
-                                type="other"/>
+            <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+                <memory-segment exec="0" name="IO" rw="RW" size="0x103F" start="0x00" type="io"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x4" rw="RW" size="0x04" start="0x1040" type="lockbits"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x8" rw="RW" size="0x10" start="0x1050" type="fuses"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40" start="0x1080" type="user_signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x03" start="0x1100" type="signatures"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x1103" type="signatures"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x8" rw="RW" size="0x200" start="0x1400" type="eeprom"/>
+                <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1800" start="0x6800" type="ram"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x8000" type="other"/>
             </address-space>
-            <address-space endianness="little"
-                           id="prog"
-                           name="prog"
-                           size="0x10000"
-                           start="0x0000">
-                <memory-segment exec="1"
-                                name="PROGMEM"
-                                pagesize="0x80"
-                                rw="RW"
-                                size="0x10000"
-                                start="0x00"
-                                type="flash"/>
-                <memory-segment exec="1"
-                                name="PROGMEM_NRWW"
-                                pagesize="0x80"
-                                rw="RW"
-                                size="0x2000"
-                                start="0x00"
-                                type="flash"/>
-                <memory-segment exec="1"
-                                name="PROGMEM_RWW"
-                                pagesize="0x80"
-                                rw="RW"
-                                size="0xE000"
-                                start="0x2000"
-                                type="flash"/>
+            <address-space endianness="little" id="prog" name="prog" size="0x10000" start="0x0000">
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0x10000" start="0x00" type="flash"/>
+                <memory-segment exec="1" name="PROGMEM_NRWW" pagesize="0x80" rw="RW" size="0x2000" start="0x00" type="flash"/>
+                <memory-segment exec="1" name="PROGMEM_RWW" pagesize="0x80" rw="RW" size="0xE000" start="0x2000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
             <module id="cmp_control_v8" name="AC">
                 <instance name="AC0">
-                    <register-group address-space="data"
-                                    name="AC0"
-                                    name-in-module="AC"
-                                    offset="0x0680"/>
+                    <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
                     <signals>
                         <signal function="AINN" group="AINN" index="0" pad="PD3"/>
                         <signal function="AINN" group="AINN" index="1" pad="PD0"/>
@@ -124,21 +36,12 @@
                         <signal function="AINP" group="AINP" index="2" pad="PE2"/>
                         <signal function="AINP" group="AINP" index="3" pad="PD6"/>
                         <signal function="AINP" group="AINP" index="4" pad="PC3"/>
-                        <signal field="PORTMUX.ACROUTEA.AC0"
-                                function="ALT1"
-                                group="OUT"
-                                pad="PC6"/>
-                        <signal field="PORTMUX.ACROUTEA.AC0"
-                                function="DEFAULT"
-                                group="OUT"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ACROUTEA.AC0" function="ALT1" group="OUT" pad="PC6"/>
+                        <signal field="PORTMUX.ACROUTEA.AC0" function="DEFAULT" group="OUT" pad="PA7"/>
                     </signals>
                 </instance>
                 <instance name="AC1">
-                    <register-group address-space="data"
-                                    name="AC1"
-                                    name-in-module="AC"
-                                    offset="0x0688"/>
+                    <register-group address-space="data" name="AC1" name-in-module="AC" offset="0x0688"/>
                     <signals>
                         <signal function="AINN" group="AINN" index="0" pad="PD5"/>
                         <signal function="AINN" group="AINN" index="1" pad="PD0"/>
@@ -148,23 +51,14 @@
                         <signal function="AINP" group="AINP" index="2" pad="PD4"/>
                         <signal function="AINP" group="AINP" index="3" pad="PD6"/>
                         <signal function="AINP" group="AINP" index="4" pad="PC3"/>
-                        <signal field="PORTMUX.ACROUTEA.AC1"
-                                function="ALT1"
-                                group="OUT"
-                                pad="PC6"/>
-                        <signal field="PORTMUX.ACROUTEA.AC1"
-                                function="DEFAULT"
-                                group="OUT"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.ACROUTEA.AC1" function="ALT1" group="OUT" pad="PC6"/>
+                        <signal field="PORTMUX.ACROUTEA.AC1" function="DEFAULT" group="OUT" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
             <module id="adc_12b_diff_ctrl_avr_v2" name="ADC">
                 <instance name="ADC0">
-                    <register-group address-space="data"
-                                    name="ADC0"
-                                    name-in-module="ADC"
-                                    offset="0x0600"/>
+                    <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
                     <signals>
                         <signal function="AINN" group="AINN" index="0" pad="PD0"/>
                         <signal function="AINN" group="AINN" index="1" pad="PD1"/>
@@ -227,18 +121,12 @@
             </module>
             <module id="bor_lvd_ctrl_avr_v2" name="BOD">
                 <instance name="BOD">
-                    <register-group address-space="data"
-                                    name="BOD"
-                                    name-in-module="BOD"
-                                    offset="0x00A0"/>
+                    <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x00A0"/>
                 </instance>
             </module>
             <module id="cla_ccl_v1" name="CCL">
                 <instance name="CCL">
-                    <register-group address-space="data"
-                                    name="CCL"
-                                    name-in-module="CCL"
-                                    offset="0x01C0"/>
+                    <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
                     <signals>
                         <signal function="IN" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="IN" group="LUT0_IN" index="1" pad="PA1"/>
@@ -252,43 +140,19 @@
                         <signal function="IN" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="IN" group="LUT3_IN" index="1" pad="PF1"/>
                         <signal function="IN" group="LUT3_IN" index="2" pad="PF2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="ALT1"
-                                group="LUT0_OUT"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0"
-                                function="DEFAULT"
-                                group="LUT0_OUT"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="ALT1"
-                                group="LUT1_OUT"
-                                pad="PC6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1"
-                                function="DEFAULT"
-                                group="LUT1_OUT"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="ALT1"
-                                group="LUT2_OUT"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2"
-                                function="DEFAULT"
-                                group="LUT2_OUT"
-                                pad="PD3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3"
-                                function="DEFAULT"
-                                group="LUT3_OUT"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="ALT1" group="LUT0_OUT" pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="DEFAULT" group="LUT0_OUT" pad="PA3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="ALT1" group="LUT1_OUT" pad="PC6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="DEFAULT" group="LUT1_OUT" pad="PC3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="ALT1" group="LUT2_OUT" pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="DEFAULT" group="LUT2_OUT" pad="PD3"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="DEFAULT" group="LUT3_OUT" pad="PF3"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrea" name="CLKCTRL">
                 <instance name="CLKCTRL">
-                    <register-group address-space="data"
-                                    name="CLKCTRL"
-                                    name-in-module="CLKCTRL"
-                                    offset="0x0060"/>
+                    <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
                     <signals>
                         <signal function="EXTCLK" group="EXTCLK" pad="PA0"/>
                         <signal function="OUT" group="CLKOUT" pad="PA7"/>
@@ -301,10 +165,7 @@
             </module>
             <module id="cpu_avr_xt_v1" name="CPU">
                 <instance name="CPU">
-                    <register-group address-space="data"
-                                    name="CPU"
-                                    name-in-module="CPU"
-                                    offset="0x0030"/>
+                    <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V4S"/>
                     </parameters>
@@ -312,26 +173,17 @@
             </module>
             <module id="int_8bit_v3" name="CPUINT">
                 <instance name="CPUINT">
-                    <register-group address-space="data"
-                                    name="CPUINT"
-                                    name-in-module="CPUINT"
-                                    offset="0x0110"/>
+                    <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
                 </instance>
             </module>
             <module id="math_pdi_crc_v1" name="CRCSCAN">
                 <instance name="CRCSCAN">
-                    <register-group address-space="data"
-                                    name="CRCSCAN"
-                                    name-in-module="CRCSCAN"
-                                    offset="0x0120"/>
+                    <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
                 </instance>
             </module>
             <module id="dac_nbit_ctrl_avr_v6" name="DAC">
                 <instance name="DAC0">
-                    <register-group address-space="data"
-                                    name="DAC0"
-                                    name-in-module="DAC"
-                                    offset="0x06A0"/>
+                    <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
                     <signals>
                         <signal function="VOUT" group="OUT" pad="PD6"/>
                     </signals>
@@ -339,102 +191,44 @@
             </module>
             <module id="avrea" name="EVSYS">
                 <instance name="EVSYS">
-                    <register-group address-space="data"
-                                    name="EVSYS"
-                                    name-in-module="EVSYS"
-                                    offset="0x0200"/>
+                    <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0200"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="ALT1"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA"
-                                function="DEFAULT"
-                                group="EVOUT"
-                                index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB"
-                                function="DEFAULT"
-                                group="EVOUT"
-                                index="1"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC"
-                                function="ALT1"
-                                group="EVOUT"
-                                index="2"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC"
-                                function="DEFAULT"
-                                group="EVOUT"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="ALT1"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD"
-                                function="DEFAULT"
-                                group="EVOUT"
-                                index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE"
-                                function="DEFAULT"
-                                group="EVOUT"
-                                index="4"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF"
-                                function="ALT1"
-                                group="EVOUT"
-                                index="5"
-                                pad="PF7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF"
-                                function="DEFAULT"
-                                group="EVOUT"
-                                index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="ALT1" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="DEFAULT" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="DEFAULT" group="EVOUT" index="1" pad="PB2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="ALT1" group="EVOUT" index="2" pad="PC7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="DEFAULT" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="ALT1" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="DEFAULT" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="DEFAULT" group="EVOUT" index="4" pad="PE2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="ALT1" group="EVOUT" index="5" pad="PF7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="DEFAULT" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrea" name="FUSE">
                 <instance name="FUSE">
-                    <register-group address-space="data"
-                                    name="FUSE"
-                                    name-in-module="FUSE"
-                                    offset="0x1050"/>
+                    <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1050"/>
                 </instance>
             </module>
             <module id="avrea" name="GPR">
                 <instance name="GPR">
-                    <register-group address-space="data"
-                                    name="GPR"
-                                    name-in-module="GPR"
-                                    offset="0x001C"/>
+                    <register-group address-space="data" name="GPR" name-in-module="GPR" offset="0x001C"/>
                 </instance>
             </module>
             <module id="avrea" name="LOCK">
                 <instance name="LOCK">
-                    <register-group address-space="data"
-                                    name="LOCK"
-                                    name-in-module="LOCK"
-                                    offset="0x1040"/>
+                    <register-group address-space="data" name="LOCK" name-in-module="LOCK" offset="0x1040"/>
                 </instance>
             </module>
             <module id="nvm_ctrl_avr_v3" name="NVMCTRL">
                 <instance name="NVMCTRL">
-                    <register-group address-space="data"
-                                    name="NVMCTRL"
-                                    name-in-module="NVMCTRL"
-                                    offset="0x1000"/>
+                    <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v3" name="PORT">
                 <instance name="PORTA">
-                    <register-group address-space="data"
-                                    name="PORTA"
-                                    name-in-module="PORT"
-                                    offset="0x0400"/>
+                    <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
@@ -447,10 +241,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB">
-                    <register-group address-space="data"
-                                    name="PORTB"
-                                    name-in-module="PORT"
-                                    offset="0x0420"/>
+                    <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
@@ -461,10 +252,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC">
-                    <register-group address-space="data"
-                                    name="PORTC"
-                                    name-in-module="PORT"
-                                    offset="0x0440"/>
+                    <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
@@ -477,10 +265,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD">
-                    <register-group address-space="data"
-                                    name="PORTD"
-                                    name-in-module="PORT"
-                                    offset="0x0460"/>
+                    <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
@@ -493,10 +278,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE">
-                    <register-group address-space="data"
-                                    name="PORTE"
-                                    name-in-module="PORT"
-                                    offset="0x0480"/>
+                    <register-group address-space="data" name="PORTE" name-in-module="PORT" offset="0x0480"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
@@ -505,10 +287,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF">
-                    <register-group address-space="data"
-                                    name="PORTF"
-                                    name-in-module="PORT"
-                                    offset="0x04A0"/>
+                    <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PF0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PF1"/>
@@ -523,18 +302,12 @@
             </module>
             <module id="avrea" name="PORTMUX">
                 <instance name="PORTMUX">
-                    <register-group address-space="data"
-                                    name="PORTMUX"
-                                    name-in-module="PORTMUX"
-                                    offset="0x05E0"/>
+                    <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
                 </instance>
             </module>
             <module id="rst_integration_avr_v2" name="RSTCTRL">
                 <instance name="RSTCTRL">
-                    <register-group address-space="data"
-                                    name="RSTCTRL"
-                                    name-in-module="RSTCTRL"
-                                    offset="0x0040"/>
+                    <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
                     <signals>
                         <signal function="OTHER" group="RESET" pad="PF6"/>
                     </signals>
@@ -542,776 +315,247 @@
             </module>
             <module id="tmr_16b_rtc_avr_v2" name="RTC">
                 <instance name="RTC">
-                    <register-group address-space="data"
-                                    name="RTC"
-                                    name-in-module="RTC"
-                                    offset="0x0140"/>
+                    <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
                 </instance>
             </module>
             <module id="avrea" name="SIGROW">
                 <instance name="SIGROW">
-                    <register-group address-space="data"
-                                    name="SIGROW"
-                                    name-in-module="SIGROW"
-                                    offset="0x1100"/>
+                    <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
                 </instance>
             </module>
             <module id="clk_sleep_ctrl_avr_v1" name="SLPCTRL">
                 <instance name="SLPCTRL">
-                    <register-group address-space="data"
-                                    name="SLPCTRL"
-                                    name-in-module="SLPCTRL"
-                                    offset="0x0050"/>
+                    <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
                 </instance>
             </module>
             <module id="spi_8bit_v2" name="SPI">
                 <instance name="SPI0">
-                    <register-group address-space="data"
-                                    name="SPI0"
-                                    name-in-module="SPI"
-                                    offset="0x0940"/>
+                    <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0940"/>
                     <signals>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT1"
-                                group="MISO"
-                                pad="PE1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT1"
-                                group="MOSI"
-                                pad="PE0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT1"
-                                group="SCK"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT1"
-                                group="SS"
-                                pad="PE3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT3"
-                                group="MISO"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT3"
-                                group="MOSI"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT3"
-                                group="SCK"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT3"
-                                group="SS"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT4"
-                                group="MISO"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT4"
-                                group="MOSI"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT4"
-                                group="SCK"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT4"
-                                group="SS"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT5"
-                                group="MISO"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT5"
-                                group="MOSI"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT5"
-                                group="SCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT5"
-                                group="SS"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT6"
-                                group="MISO"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT6"
-                                group="MOSI"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT6"
-                                group="SCK"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="ALT6"
-                                group="SS"
-                                pad="PF7"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="DEFAULT"
-                                group="MISO"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="DEFAULT"
-                                group="MOSI"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="DEFAULT"
-                                group="SCK"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.SPIROUTEA.SPI0"
-                                function="DEFAULT"
-                                group="SS"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT1" group="MISO" pad="PE1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT1" group="MOSI" pad="PE0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT1" group="SCK" pad="PE2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT1" group="SS" pad="PE3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT3" group="MISO" pad="PA1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT3" group="MOSI" pad="PA0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT3" group="SCK" pad="PC0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT3" group="SS" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT4" group="MISO" pad="PD5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT4" group="MOSI" pad="PD4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT4" group="SCK" pad="PD6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT4" group="SS" pad="PD7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT5" group="MISO" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT5" group="MOSI" pad="PC0"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT5" group="SCK" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT5" group="SS" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT6" group="MISO" pad="PC1"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT6" group="MOSI" pad="PC2"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT6" group="SCK" pad="PC3"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="ALT6" group="SS" pad="PF7"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="DEFAULT" group="MISO" pad="PA5"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="DEFAULT" group="MOSI" pad="PA4"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="DEFAULT" group="SCK" pad="PA6"/>
+                        <signal field="PORTMUX.SPIROUTEA.SPI0" function="DEFAULT" group="SS" pad="PA7"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrea" name="SYSCFG">
                 <instance name="SYSCFG">
-                    <register-group address-space="data"
-                                    name="SYSCFG"
-                                    name-in-module="SYSCFG"
-                                    offset="0x0F00"/>
+                    <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
                 </instance>
             </module>
             <module id="tmr_16b_pwm_v1" name="TCA">
                 <instance name="TCA0">
-                    <register-group address-space="data"
-                                    name="TCA0"
-                                    name-in-module="TCA"
-                                    offset="0x0A00"/>
+                    <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
                     <signals>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT1"
-                                group="WO"
-                                index="0"
-                                pad="PB0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT1"
-                                group="WO"
-                                index="1"
-                                pad="PB1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT1"
-                                group="WO"
-                                index="2"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT1"
-                                group="WO"
-                                index="3"
-                                pad="PB3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT1"
-                                group="WO"
-                                index="4"
-                                pad="PB4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT1"
-                                group="WO"
-                                index="5"
-                                pad="PB5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT2"
-                                group="WO"
-                                index="0"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT2"
-                                group="WO"
-                                index="1"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT2"
-                                group="WO"
-                                index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT2"
-                                group="WO"
-                                index="3"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT2"
-                                group="WO"
-                                index="4"
-                                pad="PC4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT2"
-                                group="WO"
-                                index="5"
-                                pad="PC5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="0"
-                                pad="PD0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="1"
-                                pad="PD1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="2"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="3"
-                                pad="PD3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="4"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT3"
-                                group="WO"
-                                index="5"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT4"
-                                group="WO"
-                                index="0"
-                                pad="PE0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT4"
-                                group="WO"
-                                index="1"
-                                pad="PE1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT4"
-                                group="WO"
-                                index="2"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT4"
-                                group="WO"
-                                index="3"
-                                pad="PE3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT5"
-                                group="WO"
-                                index="0"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT5"
-                                group="WO"
-                                index="1"
-                                pad="PF1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT5"
-                                group="WO"
-                                index="2"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT5"
-                                group="WO"
-                                index="3"
-                                pad="PF3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT5"
-                                group="WO"
-                                index="4"
-                                pad="PF4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="ALT5"
-                                group="WO"
-                                index="5"
-                                pad="PF5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="0"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="1"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="3"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="4"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="5"
-                                pad="PA5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT1" group="WO" index="0" pad="PB0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT1" group="WO" index="1" pad="PB1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT1" group="WO" index="2" pad="PB2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT1" group="WO" index="3" pad="PB3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT1" group="WO" index="4" pad="PB4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT1" group="WO" index="5" pad="PB5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT2" group="WO" index="0" pad="PC0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT2" group="WO" index="1" pad="PC1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT2" group="WO" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT2" group="WO" index="3" pad="PC3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT2" group="WO" index="4" pad="PC4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT2" group="WO" index="5" pad="PC5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="0" pad="PD0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="1" pad="PD1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="2" pad="PD2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="3" pad="PD3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="4" pad="PD4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT3" group="WO" index="5" pad="PD5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT4" group="WO" index="0" pad="PE0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT4" group="WO" index="1" pad="PE1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT4" group="WO" index="2" pad="PE2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT4" group="WO" index="3" pad="PE3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT5" group="WO" index="0" pad="PF0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT5" group="WO" index="1" pad="PF1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT5" group="WO" index="2" pad="PF2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT5" group="WO" index="3" pad="PF3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT5" group="WO" index="4" pad="PF4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="ALT5" group="WO" index="5" pad="PF5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="0" pad="PA0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="1" pad="PA1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="3" pad="PA3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="4" pad="PA4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA0" function="DEFAULT" group="WO" index="5" pad="PA5"/>
                     </signals>
                 </instance>
                 <instance name="TCA1">
-                    <register-group address-space="data"
-                                    name="TCA1"
-                                    name-in-module="TCA"
-                                    offset="0x0A40"/>
+                    <register-group address-space="data" name="TCA1" name-in-module="TCA" offset="0x0A40"/>
                     <signals>
-                        <signal field="PORTMUX.TCAROUTEA.TCA1"
-                                function="ALT1"
-                                group="WO"
-                                index="0"
-                                pad="PC4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA1"
-                                function="ALT1"
-                                group="WO"
-                                index="1"
-                                pad="PC5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA1"
-                                function="ALT1"
-                                group="WO"
-                                index="2"
-                                pad="PC6"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA1"
-                                function="ALT4"
-                                group="WO"
-                                index="0"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA1"
-                                function="ALT4"
-                                group="WO"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA1"
-                                function="ALT4"
-                                group="WO"
-                                index="2"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA1"
-                                function="ALT5"
-                                group="WO"
-                                index="0"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA1"
-                                function="ALT5"
-                                group="WO"
-                                index="1"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA1"
-                                function="ALT5"
-                                group="WO"
-                                index="2"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA1"
-                                function="DEFAULT"
-                                group="WO"
-                                index="0"
-                                pad="PB0"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA1"
-                                function="DEFAULT"
-                                group="WO"
-                                index="1"
-                                pad="PB1"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA1"
-                                function="DEFAULT"
-                                group="WO"
-                                index="2"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA1"
-                                function="DEFAULT"
-                                group="WO"
-                                index="3"
-                                pad="PB3"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA1"
-                                function="DEFAULT"
-                                group="WO"
-                                index="4"
-                                pad="PB4"/>
-                        <signal field="PORTMUX.TCAROUTEA.TCA1"
-                                function="DEFAULT"
-                                group="WO"
-                                index="5"
-                                pad="PB5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA1" function="ALT1" group="WO" index="0" pad="PC4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA1" function="ALT1" group="WO" index="1" pad="PC5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA1" function="ALT1" group="WO" index="2" pad="PC6"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA1" function="ALT4" group="WO" index="0" pad="PA4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA1" function="ALT4" group="WO" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA1" function="ALT4" group="WO" index="2" pad="PA6"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA1" function="ALT5" group="WO" index="0" pad="PD4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA1" function="ALT5" group="WO" index="1" pad="PD5"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA1" function="ALT5" group="WO" index="2" pad="PD6"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA1" function="DEFAULT" group="WO" index="0" pad="PB0"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA1" function="DEFAULT" group="WO" index="1" pad="PB1"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA1" function="DEFAULT" group="WO" index="2" pad="PB2"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA1" function="DEFAULT" group="WO" index="3" pad="PB3"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA1" function="DEFAULT" group="WO" index="4" pad="PB4"/>
+                        <signal field="PORTMUX.TCAROUTEA.TCA1" function="DEFAULT" group="WO" index="5" pad="PB5"/>
                     </signals>
                 </instance>
             </module>
             <module id="tmr_16b_capture_v1" name="TCB">
                 <instance name="TCB0">
-                    <register-group address-space="data"
-                                    name="TCB0"
-                                    name-in-module="TCB"
-                                    offset="0x0B00"/>
+                    <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0B00"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB0"
-                                function="ALT1"
-                                group="WO"
-                                index="0"
-                                pad="PF4"/>
-                        <signal field="PORTMUX.TCBROUTEA.TCB0"
-                                function="DEFAULT"
-                                group="WO"
-                                index="0"
-                                pad="PA2"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB0" function="ALT1" group="WO" index="0" pad="PF4"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB0" function="DEFAULT" group="WO" index="0" pad="PA2"/>
                     </signals>
                 </instance>
                 <instance name="TCB1">
-                    <register-group address-space="data"
-                                    name="TCB1"
-                                    name-in-module="TCB"
-                                    offset="0x0B10"/>
+                    <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0B10"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB1"
-                                function="ALT1"
-                                group="WO"
-                                index="0"
-                                pad="PF5"/>
-                        <signal field="PORTMUX.TCBROUTEA.TCB1"
-                                function="DEFAULT"
-                                group="WO"
-                                index="0"
-                                pad="PA3"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB1" function="ALT1" group="WO" index="0" pad="PF5"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB1" function="DEFAULT" group="WO" index="0" pad="PA3"/>
                     </signals>
                 </instance>
                 <instance name="TCB2">
-                    <register-group address-space="data"
-                                    name="TCB2"
-                                    name-in-module="TCB"
-                                    offset="0x0B20"/>
+                    <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0B20"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB2"
-                                function="ALT1"
-                                group="WO"
-                                index="0"
-                                pad="PB4"/>
-                        <signal field="PORTMUX.TCBROUTEA.TCB2"
-                                function="DEFAULT"
-                                group="WO"
-                                index="0"
-                                pad="PC0"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB2" function="ALT1" group="WO" index="0" pad="PB4"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB2" function="DEFAULT" group="WO" index="0" pad="PC0"/>
                     </signals>
                 </instance>
                 <instance name="TCB3">
-                    <register-group address-space="data"
-                                    name="TCB3"
-                                    name-in-module="TCB"
-                                    offset="0x0B30"/>
+                    <register-group address-space="data" name="TCB3" name-in-module="TCB" offset="0x0B30"/>
                     <signals>
-                        <signal field="PORTMUX.TCBROUTEA.TCB3"
-                                function="ALT1"
-                                group="WO"
-                                index="0"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.TCBROUTEA.TCB3"
-                                function="DEFAULT"
-                                group="WO"
-                                index="0"
-                                pad="PB5"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB3" function="ALT1" group="WO" index="0" pad="PC1"/>
+                        <signal field="PORTMUX.TCBROUTEA.TCB3" function="DEFAULT" group="WO" index="0" pad="PB5"/>
                     </signals>
                 </instance>
             </module>
             <module id="i2c_8bit_avr_v3" name="TWI">
                 <instance name="TWI0">
-                    <register-group address-space="data"
-                                    name="TWI0"
-                                    name-in-module="TWI"
-                                    offset="0x0900"/>
+                    <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0900"/>
                     <signals>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT1"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT1"
-                                group="SCL_DUAL"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT1"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT1"
-                                group="SDA_DUAL"
-                                pad="PC6"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT2"
-                                group="SCL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT2"
-                                group="SCL_DUAL"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT2"
-                                group="SDA"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT2"
-                                group="SDA_DUAL"
-                                pad="PC6"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT3"
-                                group="SCL"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT3"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT3"
-                                group="SDA"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="ALT3"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="DEFAULT"
-                                group="SCL"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="DEFAULT"
-                                group="SCL_DUAL"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="DEFAULT"
-                                group="SDA"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.TWIROUTEA.TWI0"
-                                function="DEFAULT"
-                                group="SDA_DUAL"
-                                pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT1" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT1" group="SCL_DUAL" pad="PC7"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT1" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT1" group="SDA_DUAL" pad="PC6"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT2" group="SCL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT2" group="SCL_DUAL" pad="PC7"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT2" group="SDA" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT2" group="SDA_DUAL" pad="PC6"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT3" group="SCL" pad="PA1"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT3" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT3" group="SDA" pad="PA0"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="ALT3" group="SDA_DUAL" pad="PC2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="DEFAULT" group="SCL" pad="PA3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="DEFAULT" group="SCL_DUAL" pad="PC3"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="DEFAULT" group="SDA" pad="PA2"/>
+                        <signal field="PORTMUX.TWIROUTEA.TWI0" function="DEFAULT" group="SDA_DUAL" pad="PC2"/>
                     </signals>
                 </instance>
             </module>
             <module id="uart_autobd_v4" name="USART">
                 <instance name="USART0">
-                    <register-group address-space="data"
-                                    name="USART0"
-                                    name-in-module="USART"
-                                    offset="0x0800"/>
+                    <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT1"
-                                group="RXD"
-                                index="1"
-                                pad="PA5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT1"
-                                group="TXD"
-                                index="1"
-                                pad="PA4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT1"
-                                group="XCK"
-                                index="1"
-                                pad="PA6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT1"
-                                group="XDIR"
-                                index="1"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT2"
-                                group="RXD"
-                                index="2"
-                                pad="PA3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT2"
-                                group="TXD"
-                                index="2"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT3"
-                                group="RXD"
-                                index="3"
-                                pad="PD5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT3"
-                                group="TXD"
-                                index="3"
-                                pad="PD4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT3"
-                                group="XCK"
-                                index="3"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT3"
-                                group="XDIR"
-                                index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT4"
-                                group="RXD"
-                                index="4"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT4"
-                                group="TXD"
-                                index="4"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="ALT4"
-                                group="XCK"
-                                index="4"
-                                pad="PC3"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="DEFAULT"
-                                group="RXD"
-                                pad="PA1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="DEFAULT"
-                                group="TXD"
-                                pad="PA0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="DEFAULT"
-                                group="XCK"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART0"
-                                function="DEFAULT"
-                                group="XDIR"
-                                pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT1" group="RXD" index="1" pad="PA5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT1" group="TXD" index="1" pad="PA4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT1" group="XCK" index="1" pad="PA6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT1" group="XDIR" index="1" pad="PA7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT2" group="RXD" index="2" pad="PA3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT2" group="TXD" index="2" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT3" group="RXD" index="3" pad="PD5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT3" group="TXD" index="3" pad="PD4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT3" group="XCK" index="3" pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT3" group="XDIR" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT4" group="RXD" index="4" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT4" group="TXD" index="4" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="ALT4" group="XCK" index="4" pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="DEFAULT" group="RXD" pad="PA1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="DEFAULT" group="TXD" pad="PA0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="DEFAULT" group="XCK" pad="PA2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART0" function="DEFAULT" group="XDIR" pad="PA3"/>
                     </signals>
                 </instance>
                 <instance name="USART1">
-                    <register-group address-space="data"
-                                    name="USART1"
-                                    name-in-module="USART"
-                                    offset="0x0820"/>
+                    <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="ALT1"
-                                group="RXD"
-                                pad="PC5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="ALT1"
-                                group="TXD"
-                                pad="PC4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="ALT1"
-                                group="XCK"
-                                pad="PC6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="ALT1"
-                                group="XDIR"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="ALT2"
-                                group="RXD"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="ALT2"
-                                group="TXD"
-                                pad="PD6"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="DEFAULT"
-                                group="RXD"
-                                pad="PC1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="DEFAULT"
-                                group="TXD"
-                                pad="PC0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="DEFAULT"
-                                group="XCK"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART1"
-                                function="DEFAULT"
-                                group="XDIR"
-                                pad="PC3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="ALT1" group="RXD" pad="PC5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="ALT1" group="TXD" pad="PC4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="ALT1" group="XCK" pad="PC6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="ALT1" group="XDIR" pad="PC7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="ALT2" group="RXD" pad="PD7"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="ALT2" group="TXD" pad="PD6"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="DEFAULT" group="RXD" pad="PC1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="DEFAULT" group="TXD" pad="PC0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="DEFAULT" group="XCK" pad="PC2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART1" function="DEFAULT" group="XDIR" pad="PC3"/>
                     </signals>
                 </instance>
                 <instance name="USART2">
-                    <register-group address-space="data"
-                                    name="USART2"
-                                    name-in-module="USART"
-                                    offset="0x0840"/>
+                    <register-group address-space="data" name="USART2" name-in-module="USART" offset="0x0840"/>
                     <signals>
-                        <signal field="PORTMUX.USARTROUTEA.USART2"
-                                function="ALT1"
-                                group="RXD"
-                                pad="PF5"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART2"
-                                function="ALT1"
-                                group="TXD"
-                                pad="PF4"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART2"
-                                function="DEFAULT"
-                                group="RXD"
-                                pad="PF1"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART2"
-                                function="DEFAULT"
-                                group="TXD"
-                                pad="PF0"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART2"
-                                function="DEFAULT"
-                                group="XCK"
-                                pad="PF2"/>
-                        <signal field="PORTMUX.USARTROUTEA.USART2"
-                                function="DEFAULT"
-                                group="XDIR"
-                                pad="PF3"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART2" function="ALT1" group="RXD" pad="PF5"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART2" function="ALT1" group="TXD" pad="PF4"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART2" function="DEFAULT" group="RXD" pad="PF1"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART2" function="DEFAULT" group="TXD" pad="PF0"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART2" function="DEFAULT" group="XCK" pad="PF2"/>
+                        <signal field="PORTMUX.USARTROUTEA.USART2" function="DEFAULT" group="XDIR" pad="PF3"/>
                     </signals>
                 </instance>
             </module>
             <module id="avrea" name="USERROW">
                 <instance name="USERROW">
-                    <register-group address-space="data"
-                                    name="USERROW"
-                                    name-in-module="USERROW"
-                                    offset="0x1080"/>
+                    <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1080"/>
                 </instance>
             </module>
             <module id="gpio_ports_avr_v3_vport" name="VPORT">
                 <instance name="VPORTA">
-                    <register-group address-space="data"
-                                    name="VPORTA"
-                                    name-in-module="VPORT"
-                                    offset="0x0000"/>
+                    <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
                 </instance>
                 <instance name="VPORTB">
-                    <register-group address-space="data"
-                                    name="VPORTB"
-                                    name-in-module="VPORT"
-                                    offset="0x0004"/>
+                    <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
                 </instance>
                 <instance name="VPORTC">
-                    <register-group address-space="data"
-                                    name="VPORTC"
-                                    name-in-module="VPORT"
-                                    offset="0x0008"/>
+                    <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
                 </instance>
                 <instance name="VPORTD">
-                    <register-group address-space="data"
-                                    name="VPORTD"
-                                    name-in-module="VPORT"
-                                    offset="0x000C"/>
+                    <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
                 </instance>
                 <instance name="VPORTE">
-                    <register-group address-space="data"
-                                    name="VPORTE"
-                                    name-in-module="VPORT"
-                                    offset="0x0010"/>
+                    <register-group address-space="data" name="VPORTE" name-in-module="VPORT" offset="0x0010"/>
                 </instance>
                 <instance name="VPORTF">
-                    <register-group address-space="data"
-                                    name="VPORTF"
-                                    name-in-module="VPORT"
-                                    offset="0x0014"/>
+                    <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
                 </instance>
             </module>
             <module id="avrea" name="VREF">
                 <instance name="VREF">
-                    <register-group address-space="data"
-                                    name="VREF"
-                                    name-in-module="VREF"
-                                    offset="0x00B0"/>
+                    <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00B0"/>
                     <signals>
                         <signal function="VREF" group="VREFA" pad="PD7"/>
                     </signals>
@@ -1319,10 +563,7 @@
             </module>
             <module id="wdt_windowed_v2" name="WDT">
                 <instance name="WDT">
-                    <register-group address-space="data"
-                                    name="WDT"
-                                    name-in-module="WDT"
-                                    offset="0x0100"/>
+                    <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
                 </instance>
             </module>
         </peripherals>
@@ -1404,113 +645,36 @@
     <modules>
         <module caption="Analog Comparator" id="cmp_control_v8" name="AC">
             <register-group caption="Analog Comparator" name="AC" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Hysteresis Mode"
-                              mask="0x06"
-                              name="HYSMODE"
-                              rw="RW"
-                              values="AC_HYSMODE"/>
-                    <bitfield caption="Power profile"
-                              mask="0x18"
-                              name="POWER"
-                              rw="RW"
-                              values="AC_POWER"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Power profile" mask="0x18" name="POWER" rw="RW" values="AC_POWER"/>
                     <bitfield caption="Output Pad Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Window selection mode"
-                              mask="0x03"
-                              name="WINSEL"
-                              rw="RW"
-                              values="AC_WINSEL"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Window selection mode" mask="0x03" name="WINSEL" rw="RW" values="AC_WINSEL"/>
                 </register>
-                <register caption="Mux Control A"
-                          initval="0x00"
-                          name="MUXCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Negative Input MUX Selection"
-                              mask="0x07"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection"
-                              mask="0x38"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="AC_MUXPOS"/>
-                    <bitfield caption="AC Output Initial Value"
-                              mask="0x40"
-                              name="INITVAL"
-                              rw="RW"
-                              values="AC_INITVAL"/>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Negative Input MUX Selection" mask="0x07" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x38" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+                    <bitfield caption="AC Output Initial Value" mask="0x40" name="INITVAL" rw="RW" values="AC_INITVAL"/>
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
                 </register>
-                <register caption="DAC Voltage Reference"
-                          initval="0xFF"
-                          name="DACREF"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="DAC Voltage Reference" initval="0xFF" name="DACREF" offset="0x5" rw="RW" size="1">
                     <bitfield caption="DACREF" mask="0xFF" name="DACREF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="AC.CTRLB.WINSEL" value="0x0"/>
                     <mode name="WINDOW" qualifier="AC.CTRLB.WINSEL" value="0x1 0x2"/>
                     <bitfield caption="Interrupt Enable" mask="0x01" name="CMP" rw="RW"/>
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="INTMODE"
-                              rw="RW"
-                              values="AC_NORMAL_INTMODE"/>
-                    <bitfield caption="Interrupt Mode"
-                              mask="0x30"
-                              modes="WINDOW"
-                              name="INTMODE"
-                              rw="RW"
-                              values="AC_WINDOW_INTMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" modes="NORMAL" name="INTMODE" rw="RW" values="AC_NORMAL_INTMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" modes="WINDOW" name="INTMODE" rw="RW" values="AC_WINDOW_INTMODE"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Comparator Interrupt Flag"
-                              mask="0x01"
-                              name="CMPIF"
-                              rw="RW"/>
-                    <bitfield caption="Analog Comparator State"
-                              mask="0x10"
-                              name="CMPSTATE"
-                              rw="R"/>
-                    <bitfield caption="Analog Comparator Window State"
-                              mask="0xC0"
-                              name="WINSTATE"
-                              rw="R"
-                              values="AC_WINSTATE"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x01" name="CMPIF" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="CMPSTATE" rw="R"/>
+                    <bitfield caption="Analog Comparator Window State" mask="0xC0" name="WINSTATE" rw="R" values="AC_WINSTATE"/>
                 </register>
             </register-group>
             <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
@@ -1520,41 +684,23 @@
                 <value caption="Large hysteresis" name="LARGE" value="0x03"/>
             </value-group>
             <value-group caption="Power profile select" name="AC_POWER">
-                <value caption="Power profile 0, Fastest response time, highest consumption"
-                       name="PROFILE0"
-                       value="0x0"/>
+                <value caption="Power profile 0, Fastest response time, highest consumption" name="PROFILE0" value="0x0"/>
                 <value caption="Power profile 1" name="PROFILE1" value="0x1"/>
             </value-group>
             <value-group caption="Window selection mode" name="AC_WINSEL">
                 <value caption="Window function disabled" name="DISABLED" value="0x0"/>
-                <value caption="Select ACn+1 as upper limit in window compare"
-                       name="UPSEL1"
-                       value="0x1"/>
+                <value caption="Select ACn+1 as upper limit in window compare" name="UPSEL1" value="0x1"/>
             </value-group>
             <value-group caption="Interrupt Mode select" name="AC_NORMAL_INTMODE">
-                <value caption="Positive and negative inputs crosses"
-                       name="BOTHEDGE"
-                       value="0x0"/>
-                <value caption="Positive input goes below negative input"
-                       name="NEGEDGE"
-                       value="0x2"/>
-                <value caption="Positive input goes above negative input"
-                       name="POSEDGE"
-                       value="0x3"/>
+                <value caption="Positive and negative inputs crosses" name="BOTHEDGE" value="0x0"/>
+                <value caption="Positive input goes below negative input" name="NEGEDGE" value="0x2"/>
+                <value caption="Positive input goes above negative input" name="POSEDGE" value="0x3"/>
             </value-group>
             <value-group caption="Interrupt Mode select" name="AC_WINDOW_INTMODE">
-                <value caption="Window interrupt when input above both references"
-                       name="ABOVE"
-                       value="0x0"/>
-                <value caption="Window interrupt when input betweeen references"
-                       name="INSIDE"
-                       value="0x1"/>
-                <value caption="Window interrupt when input below both references"
-                       name="BELOW"
-                       value="0x2"/>
-                <value caption="Window interrupt when input outside reference"
-                       name="OUTSIDE"
-                       value="0x3"/>
+                <value caption="Window interrupt when input above both references" name="ABOVE" value="0x0"/>
+                <value caption="Window interrupt when input betweeen references" name="INSIDE" value="0x1"/>
+                <value caption="Window interrupt when input below both references" name="BELOW" value="0x2"/>
+                <value caption="Window interrupt when input outside reference" name="OUTSIDE" value="0x3"/>
             </value-group>
             <value-group caption="AC Output Initial Value select" name="AC_INITVAL">
                 <value caption="Output initialized to 0" name="LOW" value="0x0"/>
@@ -1580,313 +726,94 @@
                 <value caption="Below window" name="BELOW" value="0x2"/>
             </value-group>
         </module>
-        <module caption="Analog to Digital Converter"
-                id="adc_12b_diff_ctrl_avr_v2"
-                name="ADC">
+        <module caption="Analog to Digital Converter" id="adc_12b_diff_ctrl_avr_v2" name="ADC">
             <register-group caption="Analog to Digital Converter" name="ADC" size="0x40">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="ADC Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Low Latency" mask="0x20" name="LOWLAT" rw="RW"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Prescaler Value"
-                              mask="0x0F"
-                              name="PRESC"
-                              rw="RW"
-                              values="ADC_PRESC"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Prescaler Value" mask="0x0F" name="PRESC" rw="RW" values="ADC_PRESC"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="ADC_REFSEL"/>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Window Comparator Mode"
-                              mask="0x07"
-                              name="WINCM"
-                              rw="RW"
-                              values="ADC_WINCM"/>
-                    <bitfield caption="Window Mode Source"
-                              mask="0x08"
-                              name="WINSRC"
-                              rw="RW"
-                              values="ADC_WINSRC"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x07" name="WINCM" rw="RW" values="ADC_WINCM"/>
+                    <bitfield caption="Window Mode Source" mask="0x08" name="WINSRC" rw="RW" values="ADC_WINSRC"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Result Ready Interrupt Enable"
-                              mask="0x01"
-                              name="RESRDY"
-                              rw="RW"/>
-                    <bitfield caption="Sample Ready Interrupt Enable"
-                              mask="0x02"
-                              name="SAMPRDY"
-                              rw="RW"/>
-                    <bitfield caption="Window Comparator Interrupt Enable"
-                              mask="0x04"
-                              name="WCMP"
-                              rw="RW"/>
-                    <bitfield caption="Result Overwrite Interrupt Enable"
-                              mask="0x08"
-                              name="RESOVR"
-                              rw="RW"/>
-                    <bitfield caption="Sample Overwrite Interrupt Enable"
-                              mask="0x10"
-                              name="SAMPOVR"
-                              rw="RW"/>
-                    <bitfield caption="Trigger Overrun Interrupt Enable"
-                              mask="0x20"
-                              name="TRIGOVR"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x01" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Sample Ready Interrupt Enable" mask="0x02" name="SAMPRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x04" name="WCMP" rw="RW"/>
+                    <bitfield caption="Result Overwrite Interrupt Enable" mask="0x08" name="RESOVR" rw="RW"/>
+                    <bitfield caption="Sample Overwrite Interrupt Enable" mask="0x10" name="SAMPOVR" rw="RW"/>
+                    <bitfield caption="Trigger Overrun Interrupt Enable" mask="0x20" name="TRIGOVR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Result Ready Interrupt Flag"
-                              mask="0x01"
-                              name="RESRDY"
-                              rw="RW"/>
-                    <bitfield caption="Sample Ready Interrupt Flag"
-                              mask="0x02"
-                              name="SAMPRDY"
-                              rw="RW"/>
-                    <bitfield caption="Window Comparator Interrupt Flag"
-                              mask="0x04"
-                              name="WCMP"
-                              rw="RW"/>
-                    <bitfield caption="Result Overwrite Interrupt Flag"
-                              mask="0x08"
-                              name="RESOVR"
-                              rw="RW"/>
-                    <bitfield caption="Sample Overwrite Interrupt Flag"
-                              mask="0x10"
-                              name="SAMPOVR"
-                              rw="RW"/>
-                    <bitfield caption="Trigger Overrun Interrupt Flag"
-                              mask="0x20"
-                              name="TRIGOVR"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Flag" mask="0x01" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Sample Ready Interrupt Flag" mask="0x02" name="SAMPRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Flag" mask="0x04" name="WCMP" rw="RW"/>
+                    <bitfield caption="Result Overwrite Interrupt Flag" mask="0x08" name="RESOVR" rw="RW"/>
+                    <bitfield caption="Sample Overwrite Interrupt Flag" mask="0x10" name="SAMPOVR" rw="RW"/>
+                    <bitfield caption="Trigger Overrun Interrupt Flag" mask="0x20" name="TRIGOVR" rw="RW"/>
                 </register>
-                <register caption="Status register"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x06"
-                          rw="R"
-                          size="1">
+                <register caption="Status register" initval="0x00" name="STATUS" offset="0x06" rw="R" size="1">
                     <bitfield caption="ADC Busy" mask="0x01" name="ADCBUSY" rw="R"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Run in Debug Mode" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Control E"
-                          initval="0x00"
-                          name="CTRLE"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x08" rw="RW" size="1">
                     <bitfield caption="Sample Duration" mask="0xFF" name="SAMPDUR" rw="RW"/>
                 </register>
-                <register caption="Control F"
-                          initval="0x00"
-                          name="CTRLF"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sample numbers"
-                              mask="0x0F"
-                              name="SAMPNUM"
-                              rw="RW"
-                              values="ADC_SAMPNUM"/>
+                <register caption="Control F" initval="0x00" name="CTRLF" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Sample numbers" mask="0x0F" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
                     <bitfield caption="Left Adjust" mask="0x10" name="LEFTADJ" rw="RW"/>
                     <bitfield caption="Free-Running mode" mask="0x20" name="FREERUN" rw="RW"/>
-                    <bitfield caption="Sign Chopping"
-                              mask="0x40"
-                              name="CHOPPING"
-                              rw="RW"
-                              values="ADC_CHOPPING"/>
+                    <bitfield caption="Sign Chopping" mask="0x40" name="CHOPPING" rw="RW" values="ADC_CHOPPING"/>
                 </register>
-                <register caption="Command register"
-                          initval="0x00"
-                          name="COMMAND"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Start command"
-                              mask="0x07"
-                              name="START"
-                              rw="RW"
-                              values="ADC_START"/>
-                    <bitfield caption="Mode"
-                              mask="0x70"
-                              name="MODE"
-                              rw="RW"
-                              values="ADC_MODE"/>
+                <register caption="Command register" initval="0x00" name="COMMAND" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Start command" mask="0x07" name="START" rw="RW" values="ADC_START"/>
+                    <bitfield caption="Mode" mask="0x70" name="MODE" rw="RW" values="ADC_MODE"/>
                     <bitfield caption="Differential mode" mask="0x80" name="DIFF" rw="RW"/>
                 </register>
-                <register caption="PGA Control"
-                          initval="0x00"
-                          name="PGACTRL"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="PGA Control" initval="0x00" name="PGACTRL" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="PGA Enable" mask="0x01" name="PGAEN" rw="RW"/>
-                    <bitfield caption="PGA BIAS Select"
-                              mask="0x18"
-                              name="PGABIASSEL"
-                              rw="RW"
-                              values="ADC_PGABIASSEL"/>
-                    <bitfield caption="Gain"
-                              mask="0xE0"
-                              name="GAIN"
-                              rw="RW"
-                              values="ADC_GAIN"/>
+                    <bitfield caption="PGA BIAS Select" mask="0x18" name="PGABIASSEL" rw="RW" values="ADC_PGABIASSEL"/>
+                    <bitfield caption="Gain" mask="0xE0" name="GAIN" rw="RW" values="ADC_GAIN"/>
                 </register>
-                <register caption="Positive Input Multiplexer"
-                          initval="0x00"
-                          name="MUXPOS"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x3F"
-                              name="MUXPOS"
-                              rw="RW"
-                              values="ADC_MUXPOS"/>
-                    <bitfield caption="VIA"
-                              mask="0xC0"
-                              name="VIA"
-                              rw="RW"
-                              values="ADC_VIA"/>
+                <register caption="Positive Input Multiplexer" initval="0x00" name="MUXPOS" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x3F" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+                    <bitfield caption="VIA" mask="0xC0" name="VIA" rw="RW" values="ADC_VIA"/>
                 </register>
-                <register caption="Negative Input Multiplexer"
-                          initval="0x00"
-                          name="MUXNEG"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Channel Selection Bits"
-                              mask="0x3F"
-                              name="MUXNEG"
-                              rw="RW"
-                              values="ADC_MUXNEG"/>
-                    <bitfield caption="VIA"
-                              mask="0xC0"
-                              name="VIA"
-                              rw="RW"
-                              values="ADC_VIA"/>
+                <register caption="Negative Input Multiplexer" initval="0x00" name="MUXNEG" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x3F" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
+                    <bitfield caption="VIA" mask="0xC0" name="VIA" rw="RW" values="ADC_VIA"/>
                 </register>
-                <register caption="Result"
-                          initval="0x00000000"
-                          name="RESULT"
-                          offset="0x10"
-                          rw="R"
-                          size="4"/>
-                <register caption="Sample"
-                          initval="0x0000"
-                          name="SAMPLE"
-                          offset="0x14"
-                          rw="R"
-                          size="2"/>
-                <register caption="Temporary Data 0"
-                          initval="0x00"
-                          name="TEMP0"
-                          offset="0x18"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Temporary Data 1"
-                          initval="0x00"
-                          name="TEMP1"
-                          offset="0x19"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Temporary Data 2"
-                          initval="0x00"
-                          name="TEMP2"
-                          offset="0x1A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Window Low Threshold"
-                          initval="0x0000"
-                          name="WINLT"
-                          offset="0x1C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Window High Threshold"
-                          initval="0x0000"
-                          name="WINHT"
-                          offset="0x1E"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Result" initval="0x00000000" name="RESULT" offset="0x10" rw="R" size="4"/>
+                <register caption="Sample" initval="0x0000" name="SAMPLE" offset="0x14" rw="R" size="2"/>
+                <register caption="Temporary Data 0" initval="0x00" name="TEMP0" offset="0x18" rw="RW" size="1"/>
+                <register caption="Temporary Data 1" initval="0x00" name="TEMP1" offset="0x19" rw="RW" size="1"/>
+                <register caption="Temporary Data 2" initval="0x00" name="TEMP2" offset="0x1A" rw="RW" size="1"/>
+                <register caption="Window Low Threshold" initval="0x0000" name="WINLT" offset="0x1C" rw="RW" size="2"/>
+                <register caption="Window High Threshold" initval="0x0000" name="WINHT" offset="0x1E" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Mode select" name="ADC_MODE">
-                <value caption="Single Conversion with 8-bit resolution"
-                       name="SINGLE_8BIT"
-                       value="0x00"/>
-                <value caption="Single Conversion with 12-bit resolution"
-                       name="SINGLE_12BIT"
-                       value="0x01"/>
-                <value caption="Series with accumulation, separate trigger for every 12-bit conversion"
-                       name="SERIES"
-                       value="0x02"/>
-                <value caption="Series with accumulation and scaling, separate trigger for every 12-bit conversion"
-                       name="SERIES_SCALING"
-                       value="0x03"/>
-                <value caption="Burst with accumulation, one trigger will run SAMPNUM 12-bit conversions"
-                       name="BURST"
-                       value="0x04"/>
-                <value caption="Burst with accumulation and scaling, one trigger will run SAMPNUM 12-bit conversions"
-                       name="BURST_SCALING"
-                       value="0x05"/>
+                <value caption="Single Conversion with 8-bit resolution" name="SINGLE_8BIT" value="0x00"/>
+                <value caption="Single Conversion with 12-bit resolution" name="SINGLE_12BIT" value="0x01"/>
+                <value caption="Series with accumulation, separate trigger for every 12-bit conversion" name="SERIES" value="0x02"/>
+                <value caption="Series with accumulation and scaling, separate trigger for every 12-bit conversion" name="SERIES_SCALING" value="0x03"/>
+                <value caption="Burst with accumulation, one trigger will run SAMPNUM 12-bit conversions" name="BURST" value="0x04"/>
+                <value caption="Burst with accumulation and scaling, one trigger will run SAMPNUM 12-bit conversions" name="BURST_SCALING" value="0x05"/>
             </value-group>
             <value-group caption="Start command select" name="ADC_START">
                 <value caption="Stop an ongoing conversion" name="STOP" value="0x00"/>
-                <value caption="Start a conversion immediately. This will be set back to STOP when the first conversion is done, unless Free-Running mode is enabled"
-                       name="IMMEDIATE"
-                       value="0x01"/>
-                <value caption="Start when MUXPOS register is written"
-                       name="MUXPOS_WRITE"
-                       value="0x02"/>
-                <value caption="Start when MUXNEG register is written"
-                       name="MUXNEG_WRITE"
-                       value="0x03"/>
-                <value caption="Start when an event is received"
-                       name="EVENT_TRIGGER"
-                       value="0x04"/>
+                <value caption="Start a conversion immediately. This will be set back to STOP when the first conversion is done, unless Free-Running mode is enabled" name="IMMEDIATE" value="0x01"/>
+                <value caption="Start when MUXPOS register is written" name="MUXPOS_WRITE" value="0x02"/>
+                <value caption="Start when MUXNEG register is written" name="MUXNEG_WRITE" value="0x03"/>
+                <value caption="Start when an event is received" name="EVENT_TRIGGER" value="0x04"/>
             </value-group>
             <value-group caption="Prescaler Value select" name="ADC_PRESC">
                 <value caption="System clock divided by 2" name="DIV2" value="0x00"/>
@@ -1922,12 +849,8 @@
                 <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
             </value-group>
             <value-group caption="Window Mode Source select" name="ADC_WINSRC">
-                <value caption="Result register used as Window Comparator Source"
-                       name="RESULT"
-                       value="0x0"/>
-                <value caption="Sample register used as Window Comparator Source"
-                       name="SAMPLE"
-                       value="0x1"/>
+                <value caption="Result register used as Window Comparator Source" name="RESULT" value="0x0"/>
+                <value caption="Sample register used as Window Comparator Source" name="SAMPLE" value="0x1"/>
             </value-group>
             <value-group caption="Sign Chopping select" name="ADC_CHOPPING">
                 <value caption="Sign Chopping Disabled" name="DISABLE" value="0x0"/>
@@ -1981,9 +904,7 @@
                 <value caption="AC1 DAC reference" name="DACREF1" value="0x3A"/>
             </value-group>
             <value-group caption="VIA select" name="ADC_VIA">
-                <value caption="Inputs connected directly to ADC"
-                       name="DIRECT"
-                       value="0x0"/>
+                <value caption="Inputs connected directly to ADC" name="DIRECT" value="0x0"/>
                 <value caption="Inputs connected via PGA" name="PGA" value="0x1"/>
             </value-group>
             <value-group caption="Analog Channel Selection Bits" name="ADC_MUXPOS">
@@ -2029,112 +950,40 @@
             </value-group>
             <value-group caption="PGA BIAS Select" name="ADC_PGABIASSEL">
                 <value caption="100% BIAS current." name="100PCT" value="0x0"/>
-                <value caption="75% BIAS current. Usable for CLK_ADC&lt;4.5MHz"
-                       name="75PCT"
-                       value="0x1"/>
-                <value caption="50% BIAS current. Usable for CLK_ADC&lt;3MHz"
-                       name="50PCT"
-                       value="0x2"/>
-                <value caption="25% BIAS current. Usable for CLK_ADC&lt;1.5MHz"
-                       name="25PCT"
-                       value="0x3"/>
+                <value caption="75% BIAS current. Usable for CLK_ADC&lt;4.5MHz" name="75PCT" value="0x1"/>
+                <value caption="50% BIAS current. Usable for CLK_ADC&lt;3MHz" name="50PCT" value="0x2"/>
+                <value caption="25% BIAS current. Usable for CLK_ADC&lt;1.5MHz" name="25PCT" value="0x3"/>
             </value-group>
         </module>
         <module caption="Bod interface" id="bor_lvd_ctrl_avr_v2" name="BOD">
             <register-group caption="Bod interface" name="BOD" size="0x10">
-                <register caption="Control A"
-                          initval="0x01"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Operation in sleep mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="BOD_SLEEP"/>
-                    <bitfield caption="Operation in active mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="R"
-                              values="BOD_ACTIVE"/>
-                    <bitfield caption="Sample frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="R"
-                              values="BOD_SAMPFREQ"/>
+                <register caption="Control A" initval="0x01" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in sleep mode" mask="0x03" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                    <bitfield caption="Operation in active mode" mask="0x0C" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bod level"
-                              mask="0x07"
-                              name="LVL"
-                              rw="R"
-                              values="BOD_LVL"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x07" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor Control"
-                          initval="0x00"
-                          name="VLMCTRLA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level"
-                              mask="0x03"
-                              name="VLMLVL"
-                              rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x03" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor interrrupt enable"
-                              mask="0x01"
-                              name="VLMIE"
-                              rw="RW"/>
-                    <bitfield caption="Configuration"
-                              mask="0x06"
-                              name="VLMCFG"
-                              rw="RW"
-                              values="BOD_VLMCFG"/>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x01" name="VLMIE" rw="RW"/>
+                    <bitfield caption="Configuration" mask="0x06" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor interrupt flag"
-                              mask="0x01"
-                              name="VLMIF"
-                              rw="RW"/>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x01" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Voltage level monitor status"
-                              mask="0x01"
-                              name="VLMS"
-                              rw="R"
-                              values="BOD_VLMS"/>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x01" name="VLMS" rw="R" values="BOD_VLMS"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
                 <value caption="Disabled" name="DISABLE" value="0x00"/>
                 <value caption="Enabled in continuous mode" name="ENABLED" value="0x01"/>
                 <value caption="Enabled in sampled mode" name="SAMPLED" value="0x02"/>
-                <value caption="Enabled in continuous mode. Execution halted at wake-up until BOD is running"
-                       name="ENABLEWAIT"
-                       value="0x03"/>
+                <value caption="Enabled in continuous mode. Execution halted at wake-up until BOD is running" name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
                 <value caption="Sampling frequency is 128 Hz" name="128HZ" value="0x0"/>
@@ -2146,9 +995,7 @@
                 <value caption="Enabled in sampled mode" name="SAMPLE" value="0x02"/>
             </value-group>
             <value-group caption="Bod level select" name="BOD_LVL">
-                <value caption="BOD Disabled during normal operation"
-                       name="BODLEVEL0"
-                       value="0x00"/>
+                <value caption="BOD Disabled during normal operation" name="BODLEVEL0" value="0x00"/>
                 <value caption="1.9 V" name="BODLEVEL1" value="0x01"/>
                 <value caption="2.7 V" name="BODLEVEL2" value="0x02"/>
                 <value caption="4.5 V" name="BODLEVEL3" value="0x03"/>
@@ -2159,338 +1006,103 @@
                 <value caption="VDD crosses VLM threshold" name="BOTH" value="0x02"/>
             </value-group>
             <value-group caption="Voltage level monitor status select" name="BOD_VLMS">
-                <value caption="The voltage is above the VLM threshold level"
-                       name="ABOVE"
-                       value="0x0"/>
-                <value caption="The voltage is below the VLM threshold level"
-                       name="BELOW"
-                       value="0x1"/>
+                <value caption="The voltage is above the VLM threshold level" name="ABOVE" value="0x0"/>
+                <value caption="The voltage is below the VLM threshold level" name="BELOW" value="0x1"/>
             </value-group>
             <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
                 <value caption="VLM Disabled" name="OFF" value="0x0"/>
-                <value caption="VLM threshold 5% above BOD level"
-                       name="5ABOVE"
-                       value="0x1"/>
-                <value caption="VLM threshold 15% above BOD level"
-                       name="15ABOVE"
-                       value="0x2"/>
-                <value caption="VLM threshold 25% above BOD level"
-                       name="25ABOVE"
-                       value="0x3"/>
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x1"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x2"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x3"/>
             </value-group>
         </module>
         <module caption="Configurable Custom Logic" id="cla_ccl_v1" name="CCL">
             <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Sequential Control 0"
-                          initval="0x00"
-                          name="SEQCTRL0"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Sequential Control 1"
-                          initval="0x00"
-                          name="SEQCTRL1"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Sequential Selection"
-                              mask="0x07"
-                              name="SEQSEL"
-                              rw="RW"
-                              values="CCL_SEQSEL"/>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x07" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
                 </register>
-                <register caption="Interrupt Control 0"
-                          initval="0x00"
-                          name="INTCTRL0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Mode for LUT0"
-                              mask="0x03"
-                              name="INTMODE0"
-                              rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1"
-                              mask="0x0C"
-                              name="INTMODE1"
-                              rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2"
-                              mask="0x30"
-                              name="INTMODE2"
-                              rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3"
-                              mask="0xC0"
-                              name="INTMODE3"
-                              rw="RW"
-                              values="CCL_INTMODE3"/>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x03" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0x0C" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xC0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag" mask="0x0F" name="INT" rw="RW"/>
                 </register>
-                <register caption="LUT 0 Control A"
-                          initval="0x00"
-                          name="LUT0CTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 0 Control A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 0 Control B"
-                          initval="0x00"
-                          name="LUT0CTRLB"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 0 Control B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 0 Control C"
-                          initval="0x00"
-                          name="LUT0CTRLC"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 0 Control C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 0"
-                          initval="0x00"
-                          name="TRUTH0"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 1 Control A"
-                          initval="0x00"
-                          name="LUT1CTRLA"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 1 Control A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 1 Control B"
-                          initval="0x00"
-                          name="LUT1CTRLB"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 1 Control B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 1 Control C"
-                          initval="0x00"
-                          name="LUT1CTRLC"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 1 Control C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 1"
-                          initval="0x00"
-                          name="TRUTH1"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 2 Control A"
-                          initval="0x00"
-                          name="LUT2CTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 2 Control A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 2 Control B"
-                          initval="0x00"
-                          name="LUT2CTRLB"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 2 Control B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 2 Control C"
-                          initval="0x00"
-                          name="LUT2CTRLC"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 2 Control C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 2"
-                          initval="0x00"
-                          name="TRUTH2"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
-                <register caption="LUT 3 Control A"
-                          initval="0x00"
-                          name="LUT3CTRLA"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
+                <register caption="LUT 3 Control A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="LUT Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Source Selection"
-                              mask="0x0E"
-                              name="CLKSRC"
-                              rw="RW"
-                              values="CCL_CLKSRC"/>
-                    <bitfield caption="Filter Selection"
-                              mask="0x30"
-                              name="FILTSEL"
-                              rw="RW"
-                              values="CCL_FILTSEL"/>
+                    <bitfield caption="Clock Source Selection" mask="0x0E" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Edge Detection Enable"
-                              mask="0x80"
-                              name="EDGEDET"
-                              rw="RW"
-                              values="CCL_EDGEDET"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
                 </register>
-                <register caption="LUT 3 Control B"
-                          initval="0x00"
-                          name="LUT3CTRLB"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 0 Source Selection"
-                              mask="0x0F"
-                              name="INSEL0"
-                              rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection"
-                              mask="0xF0"
-                              name="INSEL1"
-                              rw="RW"
-                              values="CCL_INSEL1"/>
+                <register caption="LUT 3 Control B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0x0F" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xF0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
-                <register caption="LUT 3 Control C"
-                          initval="0x00"
-                          name="LUT3CTRLC"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="LUT Input 2 Source Selection"
-                              mask="0x0F"
-                              name="INSEL2"
-                              rw="RW"
-                              values="CCL_INSEL2"/>
+                <register caption="LUT 3 Control C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0x0F" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
-                <register caption="Truth 3"
-                          initval="0x00"
-                          name="TRUTH3"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1">
                     <bitfield caption="Truth Table" mask="0xFF" name="TRUTH" rw="RW"/>
                 </register>
             </register-group>
@@ -2521,13 +1133,9 @@
             <value-group caption="Clock Source Selection" name="CCL_CLKSRC">
                 <value caption="Peripheral Clock" name="CLKPER" value="0x0"/>
                 <value caption="INSEL2 selection" name="IN2" value="0x1"/>
-                <value caption="Internal High Frequency oscillator"
-                       name="OSCHF"
-                       value="0x4"/>
+                <value caption="Internal High Frequency oscillator" name="OSCHF" value="0x4"/>
                 <value caption="Internal 32.768 kHz oscillator" name="OSC32K" value="0x5"/>
-                <value caption="Internal 32.768 kHz oscillator divided by 32"
-                       name="OSC1K"
-                       value="0x6"/>
+                <value caption="Internal 32.768 kHz oscillator divided by 32" name="OSC1K" value="0x6"/>
             </value-group>
             <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
                 <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
@@ -2541,9 +1149,7 @@
             <value-group caption="LUT Input 0 Source Selection" name="CCL_INSEL0">
                 <value caption="Masked input" name="MASK" value="0x0"/>
                 <value caption="Feedback input" name="FEEDBACK" value="0x1"/>
-                <value caption="Output from LUT[n+1] as input source"
-                       name="LINK"
-                       value="0x2"/>
+                <value caption="Output from LUT[n+1] as input source" name="LINK" value="0x2"/>
                 <value caption="Event A as input source" name="EVENTA" value="0x3"/>
                 <value caption="Event B as input source" name="EVENTB" value="0x4"/>
                 <value caption="IN0 input source" name="IO" value="0x5"/>
@@ -2557,9 +1163,7 @@
             <value-group caption="LUT Input 1 Source Selection" name="CCL_INSEL1">
                 <value caption="Masked input" name="MASK" value="0x0"/>
                 <value caption="Feedback input" name="FEEDBACK" value="0x1"/>
-                <value caption="Output from LUT[n+1] as input source"
-                       name="LINK"
-                       value="0x2"/>
+                <value caption="Output from LUT[n+1] as input source" name="LINK" value="0x2"/>
                 <value caption="Event A as input source" name="EVENTA" value="0x3"/>
                 <value caption="Event B as input source" name="EVENTB" value="0x4"/>
                 <value caption="IN0 input source" name="IO" value="0x5"/>
@@ -2573,9 +1177,7 @@
             <value-group caption="LUT Input 2 Source Selection" name="CCL_INSEL2">
                 <value caption="Masked input" name="MASK" value="0x0"/>
                 <value caption="Feedback input" name="FEEDBACK" value="0x1"/>
-                <value caption="Output from LUT[n+1] as input source"
-                       name="LINK"
-                       value="0x2"/>
+                <value caption="Output from LUT[n+1] as input source" name="LINK" value="0x2"/>
                 <value caption="Event A as input source" name="EVENTA" value="0x3"/>
                 <value caption="Event B as input source" name="EVENTB" value="0x4"/>
                 <value caption="IN0 input source" name="IO" value="0x5"/>
@@ -2596,174 +1198,62 @@
         </module>
         <module caption="Clock controller" id="avrea" name="CLKCTRL">
             <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
-                <register caption="MCLK Control A"
-                          initval="0x00"
-                          name="MCLKCTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock select"
-                              mask="0x07"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="CLKCTRL_CLKSEL"/>
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock select" mask="0x07" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
                     <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
                 </register>
-                <register caption="MCLK Control B"
-                          initval="0x11"
-                          name="MCLKCTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Control B" initval="0x11" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Prescaler enable" mask="0x01" name="PEN" rw="RW"/>
-                    <bitfield caption="Prescaler division"
-                              mask="0x1E"
-                              name="PDIV"
-                              rw="RW"
-                              values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler division" mask="0x1E" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
                 </register>
-                <register caption="MCLK Control C"
-                          initval="0x00"
-                          name="MCLKCTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Failure Detect Enable"
-                              mask="0x01"
-                              name="CFDEN"
-                              rw="RW"/>
+                <register caption="MCLK Control C" initval="0x00" name="MCLKCTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Failure Detect Enable" mask="0x01" name="CFDEN" rw="RW"/>
                     <bitfield caption="CFD Test" mask="0x02" name="CFDTST" rw="RW"/>
-                    <bitfield caption="CFD Source"
-                              mask="0x0C"
-                              name="CFDSRC"
-                              rw="RW"
-                              values="CLKCTRL_CFDSRC"/>
+                    <bitfield caption="CFD Source" mask="0x0C" name="CFDSRC" rw="RW" values="CLKCTRL_CFDSRC"/>
                 </register>
-                <register caption="MCLK Interrupt Control"
-                          initval="0x00"
-                          name="MCLKINTCTRL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Control" initval="0x00" name="MCLKINTCTRL" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Interrupt Enable" mask="0x01" name="CFD" rw="RW"/>
-                    <bitfield caption="Interrupt Type"
-                              mask="0x80"
-                              name="INTTYPE"
-                              rw="RW"
-                              values="CLKCTRL_INTTYPE"/>
+                    <bitfield caption="Interrupt Type" mask="0x80" name="INTTYPE" rw="RW" values="CLKCTRL_INTTYPE"/>
                 </register>
-                <register caption="MCLK Interrupt Flags"
-                          initval="0x00"
-                          name="MCLKINTFLAGS"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Interrupt Flags" initval="0x00" name="MCLKINTFLAGS" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Clock Failure Detected" mask="0x01" name="CFD" rw="RW"/>
                 </register>
-                <register caption="MCLK Status"
-                          initval="0x00"
-                          name="MCLKSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="System Oscillator changing"
-                              mask="0x01"
-                              name="SOSC"
-                              rw="R"/>
-                    <bitfield caption="High frequency oscillator status"
-                              mask="0x02"
-                              name="OSCHFS"
-                              rw="R"/>
-                    <bitfield caption="32KHz oscillator status"
-                              mask="0x04"
-                              name="OSC32KS"
-                              rw="R"/>
-                    <bitfield caption="32.768 kHz Crystal Oscillator status"
-                              mask="0x08"
-                              name="XOSC32KS"
-                              rw="R"/>
-                    <bitfield caption="External Clock status / XOSCHF status"
-                              mask="0x10"
-                              name="EXTS"
-                              rw="R"/>
+                <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="System Oscillator changing" mask="0x01" name="SOSC" rw="R"/>
+                    <bitfield caption="High frequency oscillator status" mask="0x02" name="OSCHFS" rw="R"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x04" name="OSC32KS" rw="R"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x08" name="XOSC32KS" rw="R"/>
+                    <bitfield caption="External Clock status / XOSCHF status" mask="0x10" name="EXTS" rw="R"/>
                 </register>
-                <register caption="MCLK Timebase"
-                          initval="0x00"
-                          name="MCLKTIMEBASE"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
+                <register caption="MCLK Timebase" initval="0x00" name="MCLKTIMEBASE" offset="0x06" rw="RW" size="1">
                     <bitfield caption="Timebase" mask="0x1F" name="TIMEBASE" rw="RW"/>
                 </register>
-                <register caption="OSCHF Control A"
-                          initval="0x0C"
-                          name="OSCHFCTRLA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Automatic Oscillator Tune"
-                              mask="0x03"
-                              name="AUTOTUNE"
-                              rw="RW"
-                              values="CLKCTRL_AUTOTUNE"/>
+                <register caption="OSCHF Control A" initval="0x0C" name="OSCHFCTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Automatic Oscillator Tune" mask="0x03" name="AUTOTUNE" rw="RW" values="CLKCTRL_AUTOTUNE"/>
                     <bitfield caption="Run in standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="OSCHF Tune"
-                          initval="0x00"
-                          name="OSCHFTUNE"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="OSCHF Tune" initval="0x00" name="OSCHFTUNE" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Oscillator Tune" mask="0xFF" name="TUNE" rw="RW"/>
                 </register>
-                <register caption="OSC32K Control A"
-                          initval="0x00"
-                          name="OSC32KCTRLA"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSC32K Control A"
-                          initval="0x00"
-                          name="XOSC32KCTRLA"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Low power mode" mask="0x02" name="LPMODE" rw="RW"/>
                     <bitfield caption="Select" mask="0x04" name="SEL" rw="RW"/>
-                    <bitfield caption="Crystal startup time"
-                              mask="0x30"
-                              name="CSUT"
-                              rw="RW"
-                              values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
                     <bitfield caption="Run standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="XOSCHF Control A"
-                          initval="0x00"
-                          name="XOSCHFCTRLA"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
+                <register caption="XOSCHF Control A" initval="0x00" name="XOSCHFCTRLA" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Source Select"
-                              mask="0x02"
-                              name="SELHF"
-                              rw="RW"
-                              values="CLKCTRL_SELHF"/>
-                    <bitfield caption="Start-Up Time"
-                              mask="0x30"
-                              name="CSUTHF"
-                              rw="RW"
-                              values="CLKCTRL_CSUTHF"/>
+                    <bitfield caption="Source Select" mask="0x02" name="SELHF" rw="RW" values="CLKCTRL_SELHF"/>
+                    <bitfield caption="Start-Up Time" mask="0x30" name="CSUTHF" rw="RW" values="CLKCTRL_CSUTHF"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Clock select" name="CLKCTRL_CLKSEL">
-                <value caption="Internal high-frequency oscillator"
-                       name="OSCHF"
-                       value="0x0"/>
+                <value caption="Internal high-frequency oscillator" name="OSCHF" value="0x0"/>
                 <value caption="Internal 32.768 kHz oscillator" name="OSC32K" value="0x1"/>
                 <value caption="32.768 kHz crystal oscillator" name="XOSC32K" value="0x2"/>
                 <value caption="External clock" name="EXTCLK" value="0x3"/>
@@ -2783,9 +1273,7 @@
             </value-group>
             <value-group caption="CFD Source select" name="CLKCTRL_CFDSRC">
                 <value caption="Main Clock" name="CLKMAIN" value="0x0"/>
-                <value caption="High Frequency Crystal Oscillator"
-                       name="XOSCHF"
-                       value="0x1"/>
+                <value caption="High Frequency Crystal Oscillator" name="XOSCHF" value="0x1"/>
                 <value caption="32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x2"/>
             </value-group>
             <value-group caption="Interrupt Type select" name="CLKCTRL_INTTYPE">
@@ -2794,9 +1282,7 @@
             </value-group>
             <value-group caption="Automatic Oscillator Tune select" name="CLKCTRL_AUTOTUNE">
                 <value caption="Disabled" name="OFF" value="0x0"/>
-                <value caption="Tune against 32.768 kHz Crystal Oscillator"
-                       name="XOSC32K"
-                       value="0x1"/>
+                <value caption="Tune against 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x1"/>
             </value-group>
             <value-group caption="Start-Up Time select" name="CLKCTRL_CSUTHF">
                 <value caption="256 XOSCHF Cycles" name="256CYC" value="0x0"/>
@@ -2816,44 +1302,19 @@
         </module>
         <module caption="CPU" id="cpu_avr_xt_v1" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection"
-                          initval="0x00"
-                          name="CCP"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCP signature"
-                              mask="0xFF"
-                              name="CCP"
-                              rw="RW"
-                              values="CPU_CCP"/>
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
-                <register caption="Stack Pointer"
-                          initval="0x7FFF"
-                          name="SP"
-                          offset="0xD"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Status Register"
-                          initval="0x00"
-                          name="SREG"
-                          offset="0xF"
-                          rw="RW"
-                          size="1">
+                <register caption="Stack Pointer" initval="0x7FFF" name="SP" offset="0xD" rw="RW" size="2"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
                     <bitfield caption="Carry Flag" mask="0x01" name="C" rw="RW"/>
                     <bitfield caption="Zero Flag" mask="0x02" name="Z" rw="RW"/>
                     <bitfield caption="Negative Flag" mask="0x04" name="N" rw="RW"/>
-                    <bitfield caption="Two's Complement Overflow Flag"
-                              mask="0x08"
-                              name="V"
-                              rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V" rw="RW"/>
                     <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
                     <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
                     <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
-                    <bitfield caption="Global Interrupt Enable Flag"
-                              mask="0x80"
-                              name="I"
-                              rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="CCP signature select" name="CPU_CCP">
@@ -2863,594 +1324,175 @@
         </module>
         <module caption="Interrupt Controller" id="int_8bit_v3" name="CPUINT">
             <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Round-robin Scheduling Enable"
-                              mask="0x01"
-                              name="LVL0RR"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x01" name="LVL0RR" rw="RW"/>
                     <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
-                    <bitfield caption="Interrupt Vector Select"
-                              mask="0x40"
-                              name="IVSEL"
-                              rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Level 0 Interrupt Executing"
-                              mask="0x01"
-                              name="LVL0EX"
-                              rw="R"/>
-                    <bitfield caption="Level 1 Interrupt Executing"
-                              mask="0x02"
-                              name="LVL1EX"
-                              rw="R"/>
-                    <bitfield caption="Non-maskable Interrupt Executing"
-                              mask="0x80"
-                              name="NMIEX"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x01" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x02" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority"
-                          initval="0x00"
-                          name="LVL0PRI"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Level Priority"
-                              mask="0xFF"
-                              name="LVL0PRI"
-                              rw="RW"/>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xFF" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector"
-                          initval="0x00"
-                          name="LVL1VEC"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Interrupt Vector with High Priority"
-                              mask="0xFF"
-                              name="LVL1VEC"
-                              rw="RW"/>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xFF" name="LVL1VEC" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="CRCSCAN" id="math_pdi_crc_v1" name="CRCSCAN">
             <register-group caption="CRCSCAN" name="CRCSCAN" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable CRC scan" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Enable NMI Trigger" mask="0x02" name="NMIEN" rw="RW"/>
                     <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CRC Source"
-                              mask="0x03"
-                              name="SRC"
-                              rw="RW"
-                              values="CRCSCAN_SRC"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x03" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
                 </register>
-                <register caption="Status"
-                          initval="0x02"
-                          name="STATUS"
-                          offset="0x2"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
                     <bitfield caption="CRC Busy" mask="0x01" name="BUSY" rw="R"/>
                     <bitfield caption="CRC Ok" mask="0x02" name="OK" rw="R"/>
                 </register>
             </register-group>
             <value-group caption="CRC Source select" name="CRCSCAN_SRC">
                 <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
-                <value caption="CRC on boot and appl section of flash"
-                       name="APPLICATION"
-                       value="0x1"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
                 <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
             </value-group>
         </module>
-        <module caption="Digital to Analog Converter"
-                id="dac_nbit_ctrl_avr_v6"
-                name="DAC">
+        <module caption="Digital to Analog Converter" id="dac_nbit_ctrl_avr_v6" name="DAC">
             <register-group caption="Digital to Analog Converter" name="DAC" size="0x10">
-                <register caption="Control Register A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="DAC Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Output Buffer Range"
-                              mask="0x30"
-                              name="OUTRANGE"
-                              rw="RW"
-                              values="DAC_OUTRANGE"/>
+                    <bitfield caption="Output Buffer Range" mask="0x30" name="OUTRANGE" rw="RW" values="DAC_OUTRANGE"/>
                     <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
-                    <bitfield caption="Run in Standby Mode"
-                              mask="0x80"
-                              name="RUNSTDBY"
-                              rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="DATA Register"
-                          name="DATA"
-                          offset="0x2"
-                          rw="RW"
-                          size="2">
+                <register caption="DATA Register" name="DATA" offset="0x2" rw="RW" size="2">
                     <bitfield caption="Data" mask="0xFFC0" name="DATA" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Output Buffer Range select" name="DAC_OUTRANGE">
-                <value caption="Output buffer automatically choose best range"
-                       name="AUTO"
-                       value="0x0"/>
-                <value caption="Output buffer configured to low range"
-                       name="LOW"
-                       value="0x2"/>
-                <value caption="Output buffer configured to high range"
-                       name="HIGH"
-                       value="0x3"/>
+                <value caption="Output buffer automatically choose best range" name="AUTO" value="0x0"/>
+                <value caption="Output buffer configured to low range" name="LOW" value="0x2"/>
+                <value caption="Output buffer configured to high range" name="HIGH" value="0x3"/>
             </value-group>
         </module>
         <module caption="Event System" id="avrea" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Software Event A"
-                          initval="0x00"
-                          name="SWEVENTA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Software event on channel select"
-                              mask="0xFF"
-                              name="SWEVENTA"
-                              rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Software event on channel select" mask="0xFF" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
-                <register caption="Multiplexer Channel 0"
-                          initval="0x00"
-                          name="CHANNEL0"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="Multiplexer Channel 1"
-                          initval="0x00"
-                          name="CHANNEL1"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="Multiplexer Channel 2"
-                          initval="0x00"
-                          name="CHANNEL2"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="Multiplexer Channel 3"
-                          initval="0x00"
-                          name="CHANNEL3"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="Multiplexer Channel 4"
-                          initval="0x00"
-                          name="CHANNEL4"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="Multiplexer Channel 5"
-                          initval="0x00"
-                          name="CHANNEL5"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Channel generator select"
-                              mask="0xFF"
-                              name="CHANNEL"
-                              rw="RW"
-                              values="EVSYS_CHANNEL"/>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Channel generator select" mask="0xFF" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="CCL0 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT0A"
-                          offset="0x20"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL0 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT0B"
-                          offset="0x21"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL1 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT1A"
-                          offset="0x22"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL1 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT1B"
-                          offset="0x23"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL2 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT2A"
-                          offset="0x24"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL2 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT2B"
-                          offset="0x25"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL3 Event A"
-                          initval="0x00"
-                          name="USERCCLLUT3A"
-                          offset="0x26"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="CCL3 Event B"
-                          initval="0x00"
-                          name="USERCCLLUT3B"
-                          offset="0x27"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="CCL3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="ADC0"
-                          initval="0x00"
-                          name="USERADC0START"
-                          offset="0x28"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="EVOUTA"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTA"
-                          offset="0x29"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="EVOUTA" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="EVOUTB"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTB"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="EVOUTB" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="EVOUTC"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTC"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="EVOUTC" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="EVOUTD"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTD"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="EVOUTD" initval="0x00" name="USEREVSYSEVOUTD" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="EVOUTE"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTE"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="EVOUTE" initval="0x00" name="USEREVSYSEVOUTE" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="EVOUTF"
-                          initval="0x00"
-                          name="USEREVSYSEVOUTF"
-                          offset="0x2E"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="EVOUTF" initval="0x00" name="USEREVSYSEVOUTF" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="USART0"
-                          initval="0x00"
-                          name="USERUSART0IRDA"
-                          offset="0x2F"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="USART1"
-                          initval="0x00"
-                          name="USERUSART1IRDA"
-                          offset="0x30"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="USART1" initval="0x00" name="USERUSART1IRDA" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="USART2"
-                          initval="0x00"
-                          name="USERUSART2IRDA"
-                          offset="0x31"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="USART2" initval="0x00" name="USERUSART2IRDA" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCA0 Event A"
-                          initval="0x00"
-                          name="USERTCA0CNTA"
-                          offset="0x32"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCA0 Event A" initval="0x00" name="USERTCA0CNTA" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCA0 Event B"
-                          initval="0x00"
-                          name="USERTCA0CNTB"
-                          offset="0x33"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCA0 Event B" initval="0x00" name="USERTCA0CNTB" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCA1 Event A"
-                          initval="0x00"
-                          name="USERTCA1CNTA"
-                          offset="0x34"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCA1 Event A" initval="0x00" name="USERTCA1CNTA" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCA1 Event B"
-                          initval="0x00"
-                          name="USERTCA1CNTB"
-                          offset="0x35"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCA1 Event B" initval="0x00" name="USERTCA1CNTB" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB0 Event A"
-                          initval="0x00"
-                          name="USERTCB0CAPT"
-                          offset="0x36"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB0 Event A" initval="0x00" name="USERTCB0CAPT" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB0 Event B"
-                          initval="0x00"
-                          name="USERTCB0COUNT"
-                          offset="0x37"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB0 Event B" initval="0x00" name="USERTCB0COUNT" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB1 Event A"
-                          initval="0x00"
-                          name="USERTCB1CAPT"
-                          offset="0x38"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB1 Event A" initval="0x00" name="USERTCB1CAPT" offset="0x38" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB1 Event B"
-                          initval="0x00"
-                          name="USERTCB1COUNT"
-                          offset="0x39"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB1 Event B" initval="0x00" name="USERTCB1COUNT" offset="0x39" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB2 Event A"
-                          initval="0x00"
-                          name="USERTCB2CAPT"
-                          offset="0x3A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB2 Event A" initval="0x00" name="USERTCB2CAPT" offset="0x3A" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB2 Event B"
-                          initval="0x00"
-                          name="USERTCB2COUNT"
-                          offset="0x3B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB2 Event B" initval="0x00" name="USERTCB2COUNT" offset="0x3B" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB3 Event A"
-                          initval="0x00"
-                          name="USERTCB3CAPT"
-                          offset="0x3C"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB3 Event A" initval="0x00" name="USERTCB3CAPT" offset="0x3C" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="TCB3 Event B"
-                          initval="0x00"
-                          name="USERTCB3COUNT"
-                          offset="0x3D"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="User channel select"
-                              mask="0xFF"
-                              name="USER"
-                              rw="RW"
-                              values="EVSYS_USER"/>
+                <register caption="TCB3 Event B" initval="0x00" name="USERTCB3COUNT" offset="0x3D" rw="RW" size="1">
+                    <bitfield caption="User channel select" mask="0xFF" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
             </register-group>
             <value-group caption="Channel generator select" name="EVSYS_CHANNEL">
@@ -3458,24 +1500,12 @@
                 <value caption="UPDI SYNCH character" name="UPDI_SYNCH" value="0x1"/>
                 <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
                 <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
-                <value caption="Periodic Interrupt Timer Event 0"
-                       name="RTC_PITEV0"
-                       value="0x8"/>
-                <value caption="Periodic Interrupt Timer Event 1"
-                       name="RTC_PITEV1"
-                       value="0x9"/>
-                <value caption="Configurable Custom Logic LUT0"
-                       name="CCL_LUT0"
-                       value="0x10"/>
-                <value caption="Configurable Custom Logic LUT1"
-                       name="CCL_LUT1"
-                       value="0x11"/>
-                <value caption="Configurable Custom Logic LUT2"
-                       name="CCL_LUT2"
-                       value="0x12"/>
-                <value caption="Configurable Custom Logic LUT3"
-                       name="CCL_LUT3"
-                       value="0x13"/>
+                <value caption="Periodic Interrupt Timer Event 0" name="RTC_PITEV0" value="0x8"/>
+                <value caption="Periodic Interrupt Timer Event 1" name="RTC_PITEV1" value="0x9"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
                 <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
                 <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x21"/>
                 <value caption="ADC 0 Result Ready" name="ADC0_RES" value="0x24"/>
@@ -3497,36 +1527,16 @@
                 <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
                 <value caption="USART 2 XCK" name="USART2_XCK" value="0x62"/>
                 <value caption="SPI 0 SCK" name="SPI0_SCK" value="0x68"/>
-                <value caption="Timer/Counter A0 overflow / low byte timer underflow"
-                       name="TCA0_OVF_LUNF"
-                       value="0x80"/>
-                <value caption="Timer/Counter A0 high byte timer underflow"
-                       name="TCA0_HUNF"
-                       value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0"
-                       name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1"
-                       name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2"
-                       name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
-                <value caption="Timer/Counter A1 overflow / low byte timer underflow"
-                       name="TCA1_OVF_LUNF"
-                       value="0x88"/>
-                <value caption="Timer/Counter A1 high byte timer underflow"
-                       name="TCA1_HUNF"
-                       value="0x89"/>
-                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0"
-                       name="TCA1_CMP0_LCMP0"
-                       value="0x8C"/>
-                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1"
-                       name="TCA1_CMP1_LCMP1"
-                       value="0x8D"/>
-                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2"
-                       name="TCA1_CMP2_LCMP2"
-                       value="0x8E"/>
+                <value caption="Timer/Counter A0 overflow / low byte timer underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte timer underflow" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+                <value caption="Timer/Counter A1 overflow / low byte timer underflow" name="TCA1_OVF_LUNF" value="0x88"/>
+                <value caption="Timer/Counter A1 high byte timer underflow" name="TCA1_HUNF" value="0x89"/>
+                <value caption="Timer/Counter A1 compare 0 / low byte timer compare 0" name="TCA1_CMP0_LCMP0" value="0x8C"/>
+                <value caption="Timer/Counter A1 compare 1 / low byte timer compare 1" name="TCA1_CMP1_LCMP1" value="0x8D"/>
+                <value caption="Timer/Counter A1 compare 2 / low byte timer compare 2" name="TCA1_CMP2_LCMP2" value="0x8E"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -3548,153 +1558,50 @@
             </value-group>
             <value-group caption="User channel select" name="EVSYS_USER">
                 <value caption="Off, No Eventsys Channel connected" name="OFF" value="0x0"/>
-                <value caption="Connect user to event channel 0"
-                       name="CHANNEL0"
-                       value="0x1"/>
-                <value caption="Connect user to event channel 1"
-                       name="CHANNEL1"
-                       value="0x2"/>
-                <value caption="Connect user to event channel 2"
-                       name="CHANNEL2"
-                       value="0x3"/>
-                <value caption="Connect user to event channel 3"
-                       name="CHANNEL3"
-                       value="0x4"/>
-                <value caption="Connect user to event channel 4"
-                       name="CHANNEL4"
-                       value="0x5"/>
-                <value caption="Connect user to event channel 5"
-                       name="CHANNEL5"
-                       value="0x6"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
             </value-group>
         </module>
         <module caption="Fuses" id="avrea" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Watchdog Configuration"
-                          initval="0x00"
-                          name="WDTCFG"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Watchdog Timeout Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="FUSE_WINDOW"/>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
-                <register caption="BOD Configuration"
-                          initval="0x00"
-                          name="BODCFG"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="BOD Operation in Sleep Mode"
-                              mask="0x03"
-                              name="SLEEP"
-                              rw="RW"
-                              values="FUSE_SLEEP"/>
-                    <bitfield caption="BOD Operation in Active Mode"
-                              mask="0x0C"
-                              name="ACTIVE"
-                              rw="RW"
-                              values="FUSE_ACTIVE"/>
-                    <bitfield caption="BOD Sample Frequency"
-                              mask="0x10"
-                              name="SAMPFREQ"
-                              rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Level"
-                              mask="0xE0"
-                              name="LVL"
-                              rw="RW"
-                              values="FUSE_LVL"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x03" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x0C" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Level" mask="0xE0" name="LVL" rw="RW" values="FUSE_LVL"/>
                 </register>
-                <register caption="Oscillator Configuration"
-                          initval="0x00"
-                          name="OSCCFG"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="High-frequency Oscillator Frequency"
-                              mask="0x08"
-                              name="OSCHFFRQ"
-                              rw="RW"
-                              values="FUSE_OSCHFFRQ"/>
+                <register caption="Oscillator Configuration" initval="0x00" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="High-frequency Oscillator Frequency" mask="0x08" name="OSCHFFRQ" rw="RW" values="FUSE_OSCHFFRQ"/>
                 </register>
-                <register caption="System Configuration 0"
-                          initval="0xD0"
-                          name="SYSCFG0"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="EEPROM Save"
-                              mask="0x01"
-                              name="EESAVE"
-                              rw="RW"
-                              values="FUSE_EESAVE"/>
-                    <bitfield caption="Reset Pin Configuration"
-                              mask="0x08"
-                              name="RSTPINCFG"
-                              rw="RW"
-                              values="FUSE_RSTPINCFG"/>
-                    <bitfield caption="UPDI Pin Configuration"
-                              mask="0x10"
-                              name="UPDIPINCFG"
-                              rw="RW"
-                              values="FUSE_UPDIPINCFG"/>
-                    <bitfield caption="CRC Select"
-                              mask="0x20"
-                              name="CRCSEL"
-                              rw="RW"
-                              values="FUSE_CRCSEL"/>
-                    <bitfield caption="CRC Source"
-                              mask="0xC0"
-                              name="CRCSRC"
-                              rw="RW"
-                              values="FUSE_CRCSRC"/>
+                <register caption="System Configuration 0" initval="0xD0" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="EEPROM Save" mask="0x01" name="EESAVE" rw="RW" values="FUSE_EESAVE"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x08" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="UPDI Pin Configuration" mask="0x10" name="UPDIPINCFG" rw="RW" values="FUSE_UPDIPINCFG"/>
+                    <bitfield caption="CRC Select" mask="0x20" name="CRCSEL" rw="RW" values="FUSE_CRCSEL"/>
+                    <bitfield caption="CRC Source" mask="0xC0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                 </register>
-                <register caption="System Configuration 1"
-                          initval="0x07"
-                          name="SYSCFG1"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Startup Time"
-                              mask="0x07"
-                              name="SUT"
-                              rw="RW"
-                              values="FUSE_SUT"/>
+                <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x07" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
-                <register caption="Code Section Size"
-                          initval="0x00"
-                          name="CODESIZE"
-                          offset="0x7"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Boot Section Size"
-                          initval="0x00"
-                          name="BOOTSIZE"
-                          offset="0x8"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Code Section Size" initval="0x00" name="CODESIZE" offset="0x7" rw="RW" size="1"/>
+                <register caption="Boot Section Size" initval="0x00" name="BOOTSIZE" offset="0x8" rw="RW" size="1"/>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
                 <value caption="Disabled" name="DISABLE" value="0x00"/>
                 <value caption="Enabled in continuous mode" name="ENABLED" value="0x01"/>
                 <value caption="Enabled in sampled mode" name="SAMPLED" value="0x02"/>
-                <value caption="Enabled in continuous mode. Execution halted at wake-up until BOD is running"
-                       name="ENABLEWAIT"
-                       value="0x03"/>
+                <value caption="Enabled in continuous mode. Execution halted at wake-up until BOD is running" name="ENABLEWAIT" value="0x03"/>
             </value-group>
             <value-group caption="BOD Level select" name="FUSE_LVL">
-                <value caption="BOD Disabled during normal operation"
-                       name="BODLEVEL0"
-                       value="0x00"/>
+                <value caption="BOD Disabled during normal operation" name="BODLEVEL0" value="0x00"/>
                 <value caption="1.9 V" name="BODLEVEL1" value="0x01"/>
                 <value caption="2.7 V" name="BODLEVEL2" value="0x02"/>
                 <value caption="4.5 V" name="BODLEVEL3" value="0x03"/>
@@ -3708,8 +1615,7 @@
                 <value caption="Enabled in continuous mode" name="ENABLE" value="0x01"/>
                 <value caption="Enabled in sampled mode" name="SAMPLE" value="0x02"/>
             </value-group>
-            <value-group caption="High-frequency Oscillator Frequency select"
-                         name="FUSE_OSCHFFRQ">
+            <value-group caption="High-frequency Oscillator Frequency select" name="FUSE_OSCHFFRQ">
                 <value caption="OSCHF running at 20 MHz" name="20M" value="0x0"/>
                 <value caption="OSCHF running at 16 MHz" name="16M" value="0x1"/>
             </value-group>
@@ -3718,22 +1624,14 @@
                 <value caption="Enable CRC32" name="CRC32" value="0x1"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="CRC of full Flash (boot, application code and application data)"
-                       name="FLASH"
-                       value="0x0"/>
+                <value caption="CRC of full Flash (boot, application code and application data)" name="FLASH" value="0x0"/>
                 <value caption="CRC of boot section" name="BOOT" value="0x1"/>
-                <value caption="CRC of application code and boot sections"
-                       name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="CRC of application code and boot sections" name="BOOTAPP" value="0x2"/>
                 <value caption="No CRC" name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="EEPROM Save select" name="FUSE_EESAVE">
-                <value caption="EEPROM content is erased during chip erase"
-                       name="DISABLE"
-                       value="0x0"/>
-                <value caption="EEPROM content is preserved during chip erase"
-                       name="ENABLE"
-                       value="0x1"/>
+                <value caption="EEPROM content is erased during chip erase" name="DISABLE" value="0x0"/>
+                <value caption="EEPROM content is preserved during chip erase" name="ENABLE" value="0x1"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
                 <value caption="No External Reset" name="NONE" value="0x0"/>
@@ -3784,41 +1682,16 @@
         </module>
         <module caption="General Purpose Registers" id="avrea" name="GPR">
             <register-group caption="General Purpose Registers" name="GPR" size="0x4">
-                <register caption="General Purpose Register 0"
-                          name="GPR0"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 1"
-                          name="GPR1"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 2"
-                          name="GPR2"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="General Purpose Register 3"
-                          name="GPR3"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
+                <register caption="General Purpose Register 0" name="GPR0" offset="0x00" rw="RW" size="1"/>
+                <register caption="General Purpose Register 1" name="GPR1" offset="0x01" rw="RW" size="1"/>
+                <register caption="General Purpose Register 2" name="GPR2" offset="0x02" rw="RW" size="1"/>
+                <register caption="General Purpose Register 3" name="GPR3" offset="0x03" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Lockbits" id="avrea" name="LOCK">
             <register-group caption="Lockbits" name="LOCK" size="0x4">
-                <register caption="Lock Key Bits"
-                          initval="0x5CC5C55C"
-                          name="KEY"
-                          offset="0x0"
-                          rw="RW"
-                          size="4">
-                    <bitfield caption="Lock Key"
-                              mask="0xFFFFFFFF"
-                              name="KEY"
-                              rw="RW"
-                              values="LOCK_KEY"/>
+                <register caption="Lock Key Bits" initval="0x5CC5C55C" name="KEY" offset="0x0" rw="RW" size="4">
+                    <bitfield caption="Lock Key" mask="0xFFFFFFFF" name="KEY" rw="RW" values="LOCK_KEY"/>
                 </register>
             </register-group>
             <value-group caption="Lock Key select" name="LOCK_KEY">
@@ -3826,92 +1699,34 @@
                 <value caption="Read and write lock" name="RWLOCK" value="0xA33A3AA3"/>
             </value-group>
         </module>
-        <module caption="Non-volatile Memory Controller"
-                id="nvm_ctrl_avr_v3"
-                name="NVMCTRL">
+        <module caption="Non-volatile Memory Controller" id="nvm_ctrl_avr_v3" name="NVMCTRL">
             <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x40">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x7F"
-                              name="CMD"
-                              rw="RW"
-                              values="NVMCTRL_CMD"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x30"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Application Code Write Protect"
-                              mask="0x01"
-                              name="APPCODEWP"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x30" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Application Code Write Protect" mask="0x01" name="APPCODEWP" rw="RW"/>
                     <bitfield caption="Boot Read Protect" mask="0x02" name="BOOTRP" rw="RW"/>
-                    <bitfield caption="Application Data Write Protect"
-                              mask="0x04"
-                              name="APPDATAWP"
-                              rw="RW"/>
+                    <bitfield caption="Application Data Write Protect" mask="0x04" name="APPDATAWP" rw="RW"/>
                     <bitfield caption="EEPROM Write Protect" mask="0x08" name="EEWP" rw="RW"/>
-                    <bitfield caption="Flash Mapping in Data space"
-                              mask="0x30"
-                              name="FLMAP"
-                              rw="RW"
-                              values="NVMCTRL_FLMAP"/>
-                    <bitfield caption="Flash Mapping Lock"
-                              mask="0x80"
-                              name="FLMAPLOCK"
-                              rw="RW"/>
+                    <bitfield caption="Flash Mapping in Data space" mask="0x30" name="FLMAP" rw="RW" values="NVMCTRL_FLMAP"/>
+                    <bitfield caption="Flash Mapping Lock" mask="0x80" name="FLMAPLOCK" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x04" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                     <bitfield caption="Flash Ready" mask="0x02" name="FLREADY" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x05" rw="RW" size="1">
                     <bitfield caption="EEPROM Ready" mask="0x01" name="EEREADY" rw="RW"/>
                     <bitfield caption="Flash Ready" mask="0x02" name="FLREADY" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x06"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x06" rw="R" size="1">
                     <bitfield caption="EEPROM busy" mask="0x01" name="EEBUSY" rw="R"/>
                     <bitfield caption="Flash busy" mask="0x02" name="FLBUSY" rw="R"/>
-                    <bitfield caption="Write error"
-                              mask="0x70"
-                              name="ERROR"
-                              rw="R"
-                              values="NVMCTRL_ERROR"/>
+                    <bitfield caption="Write error" mask="0x70" name="ERROR" rw="R" values="NVMCTRL_ERROR"/>
                 </register>
-                <register caption="Data"
-                          initval="0x0000"
-                          name="DATA"
-                          offset="0x08"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Address"
-                          initval="0x00000000"
-                          name="ADDR"
-                          offset="0x0C"
-                          rw="RW"
-                          size="4"/>
+                <register caption="Data" initval="0x0000" name="DATA" offset="0x08" rw="RW" size="2"/>
+                <register caption="Address" initval="0x00000000" name="ADDR" offset="0x0C" rw="RW" size="4"/>
             </register-group>
             <value-group caption="Command select" name="NVMCTRL_CMD">
                 <value caption="No Command" name="NOCMD" value="0x00"/>
@@ -3930,9 +1745,7 @@
                 <value caption="EEPROM Page Erase" name="EEPER" value="0x17"/>
                 <value caption="EEPROM Page Buffer Clear" name="EEPBCLR" value="0x1F"/>
                 <value caption="Chip Erase Command (UPDI only)" name="CHER" value="0x20"/>
-                <value caption="EEPROM Erase Command (UPDI only)"
-                       name="EECHER"
-                       value="0x30"/>
+                <value caption="EEPROM Erase Command (UPDI only)" name="EECHER" value="0x30"/>
             </value-group>
             <value-group caption="Flash Mapping in Data space select" name="NVMCTRL_FLMAP">
                 <value caption="Flash section 0, 0 - 32KB" name="SECTION0" value="0x0"/>
@@ -3942,294 +1755,88 @@
             </value-group>
             <value-group caption="Write error select" name="NVMCTRL_ERROR">
                 <value caption="No Error" name="NOERROR" value="0x0"/>
-                <value caption="Attempt to program write protected area"
-                       name="WRITEPROTECT"
-                       value="0x2"/>
-                <value caption="Selecting new write command while write command already seleted"
-                       name="CMDCOLLISION"
-                       value="0x3"/>
-                <value caption="Address cannot be written with selected command"
-                       name="WRONGSECTION"
-                       value="0x4"/>
+                <value caption="Attempt to program write protected area" name="WRITEPROTECT" value="0x2"/>
+                <value caption="Selecting new write command while write command already seleted" name="CMDCOLLISION" value="0x3"/>
+                <value caption="Address cannot be written with selected command" name="WRONGSECTION" value="0x4"/>
             </value-group>
         </module>
         <module caption="I/O Ports" id="gpio_ports_avr_v3" name="PORT">
             <register-group caption="I/O Ports" name="PORT" size="0x20">
-                <register caption="Data Direction"
-                          initval="0x00"
-                          name="DIR"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Set"
-                          initval="0x00"
-                          name="DIRSET"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Clear"
-                          initval="0x00"
-                          name="DIRCLR"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Data Direction Toggle"
-                          initval="0x00"
-                          name="DIRTGL"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          initval="0x00"
-                          name="OUT"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Set"
-                          initval="0x00"
-                          name="OUTSET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Clear"
-                          initval="0x00"
-                          name="OUTCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value Toggle"
-                          initval="0x00"
-                          name="OUTTGL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          initval="0x00"
-                          name="IN"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" initval="0x00" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Set" initval="0x00" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" initval="0x00" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" initval="0x00" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Output Value" initval="0x00" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Set" initval="0x00" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Clear" initval="0x00" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" initval="0x00" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Input Value" initval="0x00" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
-                <register caption="Port Control"
-                          initval="0x00"
-                          name="PORTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Slew Rate Limit Enable" mask="0x01" name="SRL" rw="RW"/>
                 </register>
-                <register caption="Pin Control Config"
-                          initval="0x00"
-                          name="PINCONFIG"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin Control Config" initval="0x00" name="PINCONFIG" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin Control Update"
-                          initval="0x00"
-                          name="PINCTRLUPD"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Pin Control Set"
-                          initval="0x00"
-                          name="PINCTRLSET"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Pin Control Clear"
-                          initval="0x00"
-                          name="PINCTRLCLR"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Pin 0 Control"
-                          initval="0x00"
-                          name="PIN0CTRL"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin Control Update" initval="0x00" name="PINCTRLUPD" offset="0x0C" rw="RW" size="1"/>
+                <register caption="Pin Control Set" initval="0x00" name="PINCTRLSET" offset="0x0D" rw="RW" size="1"/>
+                <register caption="Pin Control Clear" initval="0x00" name="PINCTRLCLR" offset="0x0E" rw="RW" size="1"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 1 Control"
-                          initval="0x00"
-                          name="PIN1CTRL"
-                          offset="0x11"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 2 Control"
-                          initval="0x00"
-                          name="PIN2CTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 3 Control"
-                          initval="0x00"
-                          name="PIN3CTRL"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 4 Control"
-                          initval="0x00"
-                          name="PIN4CTRL"
-                          offset="0x14"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 5 Control"
-                          initval="0x00"
-                          name="PIN5CTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 6 Control"
-                          initval="0x00"
-                          name="PIN6CTRL"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Pin 7 Control"
-                          initval="0x00"
-                          name="PIN7CTRL"
-                          offset="0x17"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Input/Sense Configuration"
-                              mask="0x07"
-                              name="ISC"
-                              rw="RW"
-                              values="PORT_ISC"/>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" rw="RW" values="PORT_ISC"/>
                     <bitfield caption="Pullup enable" mask="0x08" name="PULLUPEN" rw="RW"/>
-                    <bitfield caption="Input Level Select"
-                              mask="0x40"
-                              name="INLVL"
-                              rw="RW"
-                              values="PORT_INLVL"/>
+                    <bitfield caption="Input Level Select" mask="0x40" name="INLVL" rw="RW" values="PORT_INLVL"/>
                     <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
                 </register>
-                <register caption="Event Generation Control"
-                          initval="0x00"
-                          name="EVGENCTRL"
-                          offset="0x18"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Generator 0 Select"
-                              mask="0x07"
-                              name="EVGEN0SEL"
-                              rw="RW"
-                              values="PORT_EVGEN0SEL"/>
-                    <bitfield caption="Event Generator 1 Select"
-                              mask="0x70"
-                              name="EVGEN1SEL"
-                              rw="RW"
-                              values="PORT_EVGEN1SEL"/>
+                <register caption="Event Generation Control" initval="0x00" name="EVGENCTRL" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Event Generator 0 Select" mask="0x07" name="EVGEN0SEL" rw="RW" values="PORT_EVGEN0SEL"/>
+                    <bitfield caption="Event Generator 1 Select" mask="0x70" name="EVGEN1SEL" rw="RW" values="PORT_EVGEN1SEL"/>
                 </register>
             </register-group>
             <value-group caption="Event Generator 0 Select" name="PORT_EVGEN0SEL">
@@ -4257,182 +1864,53 @@
                 <value caption="TTL Input level" name="TTL" value="0x1"/>
             </value-group>
             <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
-                <value caption="Interrupt disabled but input buffer enabled"
-                       name="INTDISABLE"
-                       value="0x0"/>
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
                 <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
                 <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
                 <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
-                <value caption="Digital Input Buffer disabled"
-                       name="INPUT_DISABLE"
-                       value="0x4"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
                 <value caption="Sense low Level" name="LEVEL" value="0x5"/>
             </value-group>
         </module>
         <module caption="Port Multiplexer" id="avrea" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x20">
-                <register caption="EVSYS route A"
-                          initval="0x00"
-                          name="EVSYSROUTEA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Output A"
-                              mask="0x01"
-                              name="EVOUTA"
-                              rw="RW"
-                              values="PORTMUX_EVOUTA"/>
-                    <bitfield caption="Event Output C"
-                              mask="0x04"
-                              name="EVOUTC"
-                              rw="RW"
-                              values="PORTMUX_EVOUTC"/>
-                    <bitfield caption="Event Output D"
-                              mask="0x08"
-                              name="EVOUTD"
-                              rw="RW"
-                              values="PORTMUX_EVOUTD"/>
-                    <bitfield caption="Event Output F"
-                              mask="0x20"
-                              name="EVOUTF"
-                              rw="RW"
-                              values="PORTMUX_EVOUTF"/>
+                <register caption="EVSYS route A" initval="0x00" name="EVSYSROUTEA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Event Output A" mask="0x01" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output C" mask="0x04" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x08" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
                 </register>
-                <register caption="CCL route A"
-                          initval="0x00"
-                          name="CCLROUTEA"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="CCL Look-Up Table 0 Signals"
-                              mask="0x01"
-                              name="LUT0"
-                              rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="CCL Look-Up Table 1 Signals"
-                              mask="0x02"
-                              name="LUT1"
-                              rw="RW"
-                              values="PORTMUX_LUT1"/>
-                    <bitfield caption="CCL Look-Up Table 2 Signals"
-                              mask="0x04"
-                              name="LUT2"
-                              rw="RW"
-                              values="PORTMUX_LUT2"/>
+                <register caption="CCL route A" initval="0x00" name="CCLROUTEA" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="CCL Look-Up Table 0 Signals" mask="0x01" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="CCL Look-Up Table 1 Signals" mask="0x02" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+                    <bitfield caption="CCL Look-Up Table 2 Signals" mask="0x04" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
                 </register>
-                <register caption="USART route A"
-                          initval="0x00"
-                          name="USARTROUTEA"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="USART0 Routing"
-                              mask="0x07"
-                              name="USART0"
-                              rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="USART1 Routing"
-                              mask="0x18"
-                              name="USART1"
-                              rw="RW"
-                              values="PORTMUX_USART1"/>
+                <register caption="USART route A" initval="0x00" name="USARTROUTEA" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="USART0 Routing" mask="0x07" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="USART1 Routing" mask="0x18" name="USART1" rw="RW" values="PORTMUX_USART1"/>
                 </register>
-                <register caption="USART route B"
-                          initval="0x00"
-                          name="USARTROUTEB"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="USART2 Routing"
-                              mask="0x30"
-                              name="USART2"
-                              rw="RW"
-                              values="PORTMUX_USART2"/>
+                <register caption="USART route B" initval="0x00" name="USARTROUTEB" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="USART2 Routing" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
                 </register>
-                <register caption="SPI route A"
-                          initval="0x00"
-                          name="SPIROUTEA"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI0 Signals"
-                              mask="0x07"
-                              name="SPI0"
-                              rw="RW"
-                              values="PORTMUX_SPI0"/>
+                <register caption="SPI route A" initval="0x00" name="SPIROUTEA" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="SPI0 Signals" mask="0x07" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                 </register>
-                <register caption="TWI route A"
-                          initval="0x00"
-                          name="TWIROUTEA"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TWI0 Signals"
-                              mask="0x03"
-                              name="TWI0"
-                              rw="RW"
-                              values="PORTMUX_TWI0"/>
+                <register caption="TWI route A" initval="0x00" name="TWIROUTEA" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="TWI0 Signals" mask="0x03" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="TCA route A"
-                          initval="0x00"
-                          name="TCAROUTEA"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCA0 Signals"
-                              mask="0x07"
-                              name="TCA0"
-                              rw="RW"
-                              values="PORTMUX_TCA0"/>
-                    <bitfield caption="TCA1 Signals"
-                              mask="0x38"
-                              name="TCA1"
-                              rw="RW"
-                              values="PORTMUX_TCA1"/>
+                <register caption="TCA route A" initval="0x00" name="TCAROUTEA" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="TCA0 Signals" mask="0x07" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
+                    <bitfield caption="TCA1 Signals" mask="0x38" name="TCA1" rw="RW" values="PORTMUX_TCA1"/>
                 </register>
-                <register caption="TCB route A"
-                          initval="0x00"
-                          name="TCBROUTEA"
-                          offset="0x08"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="TCB0 Output"
-                              mask="0x01"
-                              name="TCB0"
-                              rw="RW"
-                              values="PORTMUX_TCB0"/>
-                    <bitfield caption="TCB1 Output"
-                              mask="0x02"
-                              name="TCB1"
-                              rw="RW"
-                              values="PORTMUX_TCB1"/>
-                    <bitfield caption="TCB2 Output"
-                              mask="0x04"
-                              name="TCB2"
-                              rw="RW"
-                              values="PORTMUX_TCB2"/>
-                    <bitfield caption="TCB3 Output"
-                              mask="0x08"
-                              name="TCB3"
-                              rw="RW"
-                              values="PORTMUX_TCB3"/>
+                <register caption="TCB route A" initval="0x00" name="TCBROUTEA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="TCB0 Output" mask="0x01" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="TCB1 Output" mask="0x02" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+                    <bitfield caption="TCB2 Output" mask="0x04" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
+                    <bitfield caption="TCB3 Output" mask="0x08" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
                 </register>
-                <register caption="AC route A"
-                          initval="0x00"
-                          name="ACROUTEA"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Analog Comparator 0 Output"
-                              mask="0x01"
-                              name="AC0"
-                              rw="RW"
-                              values="PORTMUX_AC0"/>
-                    <bitfield caption="Analog Comparator 1 Output"
-                              mask="0x02"
-                              name="AC1"
-                              rw="RW"
-                              values="PORTMUX_AC1"/>
+                <register caption="AC route A" initval="0x00" name="ACROUTEA" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator 0 Output" mask="0x01" name="AC0" rw="RW" values="PORTMUX_AC0"/>
+                    <bitfield caption="Analog Comparator 1 Output" mask="0x02" name="AC1" rw="RW" values="PORTMUX_AC1"/>
                 </register>
             </register-group>
             <value-group caption="Analog Comparator 0 Output select" name="PORTMUX_AC0">
@@ -4532,225 +2010,81 @@
                 <value caption="Not connected to any pins" name="NONE" value="0x3"/>
             </value-group>
         </module>
-        <module caption="Reset controller"
-                id="rst_integration_avr_v2"
-                name="RSTCTRL">
+        <module caption="Reset controller" id="rst_integration_avr_v2" name="RSTCTRL">
             <register-group caption="Reset controller" name="RSTCTRL" size="0x10">
-                <register caption="Reset Flags"
-                          initval="0x00"
-                          name="RSTFR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Power on Reset flag" mask="0x01" name="PORF" rw="RW"/>
-                    <bitfield caption="Brown out detector Reset flag"
-                              mask="0x02"
-                              name="BORF"
-                              rw="RW"/>
+                    <bitfield caption="Brown out detector Reset flag" mask="0x02" name="BORF" rw="RW"/>
                     <bitfield caption="External Reset flag" mask="0x04" name="EXTRF" rw="RW"/>
                     <bitfield caption="Watch dog Reset flag" mask="0x08" name="WDRF" rw="RW"/>
                     <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
                     <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
                 </register>
-                <register caption="Software Reset"
-                          initval="0x00"
-                          name="SWRR"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Software Reset Enable" mask="0x01" name="SWRE" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Real-Time Counter" id="tmr_16b_rtc_avr_v2" name="RTC">
             <register-group caption="Real-Time Counter" name="RTC" size="0x20">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="RTCEN" rw="RW"/>
                     <bitfield caption="Correction enable" mask="0x04" name="CORREN" rw="RW"/>
-                    <bitfield caption="Prescaling Factor"
-                              mask="0x78"
-                              name="PRESCALER"
-                              rw="RW"
-                              values="RTC_PRESCALER"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
                     <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x01"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLABUSY"
-                              rw="R"/>
-                    <bitfield caption="Count Synchronization Busy Flag"
-                              mask="0x02"
-                              name="CNTBUSY"
-                              rw="R"/>
-                    <bitfield caption="Period Synchronization Busy Flag"
-                              mask="0x04"
-                              name="PERBUSY"
-                              rw="R"/>
-                    <bitfield caption="Comparator Synchronization Busy Flag"
-                              mask="0x08"
-                              name="CMPBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x02" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x04" name="PERBUSY" rw="R"/>
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x08" name="CMPBUSY" rw="R"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt enable"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt enable"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt enable" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Overflow Interrupt Flag"
-                              mask="0x01"
-                              name="OVF"
-                              rw="RW"/>
-                    <bitfield caption="Compare Match Interrupt"
-                              mask="0x02"
-                              name="CMP"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVF" rw="RW"/>
+                    <bitfield caption="Compare Match Interrupt" mask="0x02" name="CMP" rw="RW"/>
                 </register>
-                <register caption="Temporary"
-                          name="TEMP"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Debug control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Calibration"
-                          initval="0x00"
-                          name="CALIB"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Error Correction Value"
-                              mask="0x7F"
-                              name="ERROR"
-                              rw="RW"/>
-                    <bitfield caption="Error Correction Sign Bit"
-                              mask="0x80"
-                              name="SIGN"
-                              rw="RW"/>
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7F" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
                 </register>
-                <register caption="Clock Select"
-                          initval="0x00"
-                          name="CLKSEL"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Clock Select"
-                              mask="0x03"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="RTC_CLKSEL"/>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x03" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
                 </register>
                 <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
-                <register caption="Period"
-                          initval="0xFFFF"
-                          name="PER"
-                          offset="0x0A"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
                 <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
-                <register caption="PIT Control A"
-                          initval="0x00"
-                          name="PITCTRLA"
-                          offset="0x10"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="PITEN" rw="RW"/>
-                    <bitfield caption="Period"
-                              mask="0x78"
-                              name="PERIOD"
-                              rw="RW"
-                              values="RTC_PERIOD"/>
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
                 </register>
-                <register caption="PIT Status"
-                          initval="0x00"
-                          name="PITSTATUS"
-                          offset="0x11"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="CTRLA Synchronization Busy Flag"
-                              mask="0x01"
-                              name="CTRLBUSY"
-                              rw="R"/>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x01" name="CTRLBUSY" rw="R"/>
                 </register>
-                <register caption="PIT Interrupt Control"
-                          initval="0x00"
-                          name="PITINTCTRL"
-                          offset="0x12"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags"
-                          initval="0x00"
-                          name="PITINTFLAGS"
-                          offset="0x13"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x01" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Debug control"
-                          initval="0x00"
-                          name="PITDBGCTRL"
-                          offset="0x15"
-                          rw="RW"
-                          size="1">
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Event Generation Control A"
-                          initval="0x00"
-                          name="PITEVGENCTRLA"
-                          offset="0x16"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Event Generation 0 Select"
-                              mask="0x0F"
-                              name="EVGEN0SEL"
-                              rw="RW"
-                              values="RTC_EVGEN0SEL"/>
-                    <bitfield caption="Event Generation 1 Select"
-                              mask="0xF0"
-                              name="EVGEN1SEL"
-                              rw="RW"
-                              values="RTC_EVGEN1SEL"/>
+                <register caption="PIT Event Generation Control A" initval="0x00" name="PITEVGENCTRLA" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Event Generation 0 Select" mask="0x0F" name="EVGEN0SEL" rw="RW" values="RTC_EVGEN0SEL"/>
+                    <bitfield caption="Event Generation 1 Select" mask="0xF0" name="EVGEN1SEL" rw="RW" values="RTC_EVGEN1SEL"/>
                 </register>
             </register-group>
             <value-group caption="Clock Select" name="RTC_CLKSEL">
                 <value caption="Internal 32.768 kHz Oscillator" name="OSC32K" value="0x0"/>
-                <value caption="Internal 32.768 kHz Oscillator Divided by 32"
-                       name="OSC1K"
-                       value="0x1"/>
+                <value caption="Internal 32.768 kHz Oscillator Divided by 32" name="OSC1K" value="0x1"/>
                 <value caption="32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x2"/>
                 <value caption="External Clock" name="EXTCLK" value="0x3"/>
             </value-group>
@@ -4826,129 +2160,34 @@
         </module>
         <module caption="Signature row" id="avrea" name="SIGROW">
             <register-group caption="Signature row" name="SIGROW" size="0x40">
-                <register caption="Device ID Byte 0"
-                          name="DEVICEID0"
-                          offset="0x00"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 1"
-                          name="DEVICEID1"
-                          offset="0x01"
-                          rw="R"
-                          size="1"/>
-                <register caption="Device ID Byte 2"
-                          name="DEVICEID2"
-                          offset="0x02"
-                          rw="R"
-                          size="1"/>
-                <register caption="Temperature Calibration 0"
-                          name="TEMPSENSE0"
-                          offset="0x04"
-                          rw="R"
-                          size="2"/>
-                <register caption="Temperature Calibration 1"
-                          name="TEMPSENSE1"
-                          offset="0x06"
-                          rw="R"
-                          size="2"/>
-                <register caption="Serial Number Byte 0"
-                          name="SERNUM0"
-                          offset="0x10"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 1"
-                          name="SERNUM1"
-                          offset="0x11"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 2"
-                          name="SERNUM2"
-                          offset="0x12"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 3"
-                          name="SERNUM3"
-                          offset="0x13"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 4"
-                          name="SERNUM4"
-                          offset="0x14"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 5"
-                          name="SERNUM5"
-                          offset="0x15"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 6"
-                          name="SERNUM6"
-                          offset="0x16"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 7"
-                          name="SERNUM7"
-                          offset="0x17"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 8"
-                          name="SERNUM8"
-                          offset="0x18"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 9"
-                          name="SERNUM9"
-                          offset="0x19"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 10"
-                          name="SERNUM10"
-                          offset="0x1A"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 11"
-                          name="SERNUM11"
-                          offset="0x1B"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 12"
-                          name="SERNUM12"
-                          offset="0x1C"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 13"
-                          name="SERNUM13"
-                          offset="0x1D"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 14"
-                          name="SERNUM14"
-                          offset="0x1E"
-                          rw="R"
-                          size="1"/>
-                <register caption="Serial Number Byte 15"
-                          name="SERNUM15"
-                          offset="0x1F"
-                          rw="R"
-                          size="1"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Temperature Calibration 0" name="TEMPSENSE0" offset="0x04" rw="R" size="2"/>
+                <register caption="Temperature Calibration 1" name="TEMPSENSE1" offset="0x06" rw="R" size="2"/>
+                <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x10" rw="R" size="1"/>
+                <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x11" rw="R" size="1"/>
+                <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x12" rw="R" size="1"/>
+                <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x13" rw="R" size="1"/>
+                <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x14" rw="R" size="1"/>
+                <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x15" rw="R" size="1"/>
+                <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x16" rw="R" size="1"/>
+                <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x17" rw="R" size="1"/>
+                <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x18" rw="R" size="1"/>
+                <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x19" rw="R" size="1"/>
+                <register caption="Serial Number Byte 10" name="SERNUM10" offset="0x1A" rw="R" size="1"/>
+                <register caption="Serial Number Byte 11" name="SERNUM11" offset="0x1B" rw="R" size="1"/>
+                <register caption="Serial Number Byte 12" name="SERNUM12" offset="0x1C" rw="R" size="1"/>
+                <register caption="Serial Number Byte 13" name="SERNUM13" offset="0x1D" rw="R" size="1"/>
+                <register caption="Serial Number Byte 14" name="SERNUM14" offset="0x1E" rw="R" size="1"/>
+                <register caption="Serial Number Byte 15" name="SERNUM15" offset="0x1F" rw="R" size="1"/>
             </register-group>
         </module>
-        <module caption="Sleep Controller"
-                id="clk_sleep_ctrl_avr_v1"
-                name="SLPCTRL">
+        <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v1" name="SLPCTRL">
             <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Sleep enable" mask="0x01" name="SEN" rw="RW"/>
-                    <bitfield caption="Sleep mode"
-                              mask="0x06"
-                              name="SMODE"
-                              rw="RW"
-                              values="SLPCTRL_SMODE"/>
+                    <bitfield caption="Sleep mode" mask="0x06" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
                 </register>
             </register-group>
             <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
@@ -4959,110 +2198,36 @@
         </module>
         <module caption="Serial Peripheral Interface" id="spi_8bit_v2" name="SPI">
             <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable Module" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Prescaler"
-                              mask="0x06"
-                              name="PRESC"
-                              rw="RW"
-                              values="SPI_PRESC"/>
+                    <bitfield caption="Prescaler" mask="0x06" name="PRESC" rw="RW" values="SPI_PRESC"/>
                     <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
-                    <bitfield caption="Host Operation Enable"
-                              mask="0x20"
-                              name="MASTER"
-                              rw="RW"/>
+                    <bitfield caption="Host Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
                     <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="SPI Mode"
-                              mask="0x03"
-                              name="MODE"
-                              rw="RW"
-                              values="SPI_MODE"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="SPI Mode" mask="0x03" name="MODE" rw="RW" values="SPI_MODE"/>
                     <bitfield caption="SPI Select Disable" mask="0x04" name="SSD" rw="RW"/>
-                    <bitfield caption="Buffer Mode Wait for Receive"
-                              mask="0x40"
-                              name="BUFWR"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Mode Wait for Receive" mask="0x40" name="BUFWR" rw="RW"/>
                     <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Enable" mask="0x01" name="IE" rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Enable"
-                              mask="0x10"
-                              name="SSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <mode name="DEFAULT" qualifier="SPI.CTRLB.BUFEN" value="0"/>
                     <mode name="BUFFERED" qualifier="SPI.CTRLB.BUFEN" value="1"/>
-                    <bitfield caption="Buffer Overflow"
-                              mask="0x01"
-                              modes="BUFFERED"
-                              name="BUFOVF"
-                              rw="RW"/>
-                    <bitfield caption="SPI Select Trigger Interrupt Flag"
-                              mask="0x10"
-                              modes="BUFFERED"
-                              name="SSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Flag"
-                              mask="0x20"
-                              modes="BUFFERED"
-                              name="DREIF"
-                              rw="RW"/>
-                    <bitfield caption="Transfer Complete Interrupt Flag"
-                              mask="0x40"
-                              modes="BUFFERED"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              modes="BUFFERED"
-                              name="RXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Write Collision"
-                              mask="0x40"
-                              modes="DEFAULT"
-                              name="WRCOL"
-                              rw="RW"/>
-                    <bitfield caption="Interrupt Flag"
-                              mask="0x80"
-                              modes="DEFAULT"
-                              name="IF"
-                              rw="RW"/>
+                    <bitfield caption="Buffer Overflow" mask="0x01" modes="BUFFERED" name="BUFOVF" rw="RW"/>
+                    <bitfield caption="SPI Select Trigger Interrupt Flag" mask="0x10" modes="BUFFERED" name="SSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" modes="BUFFERED" name="DREIF" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" modes="BUFFERED" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" modes="BUFFERED" name="RXCIF" rw="RW"/>
+                    <bitfield caption="Write Collision" mask="0x40" modes="DEFAULT" name="WRCOL" rw="RW"/>
+                    <bitfield caption="Interrupt Flag" mask="0x80" modes="DEFAULT" name="IF" rw="RW"/>
                 </register>
                 <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
             </register-group>
@@ -5081,548 +2246,154 @@
         </module>
         <module caption="System Configuration Registers" id="avrea" name="SYSCFG">
             <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
-                <register caption="Revision ID"
-                          name="REVID"
-                          offset="0x01"
-                          rw="R"
-                          size="1">
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="R" size="1">
                     <bitfield caption="Minor Revision" mask="0x0F" name="MINOR" rw="R"/>
                     <bitfield caption="Major Revision" mask="0xF0" name="MAJOR" rw="R"/>
                 </register>
-                <register caption="OCD Message Control"
-                          name="OCDMCTRL"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="OCD Message Control" name="OCDMCTRL" offset="0x04" rw="RW" size="1">
                     <bitfield caption="OCD Message" mask="0xFF" name="OCDM" rw="RW"/>
                 </register>
-                <register caption="OCD Message Status"
-                          initval="0x00"
-                          name="OCDMSTATUS"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
+                <register caption="OCD Message Status" initval="0x00" name="OCDMSTATUS" offset="0x05" rw="RW" size="1">
                     <bitfield caption="OCD Message Valid" mask="0x01" name="VALID" rw="RW"/>
                 </register>
             </register-group>
         </module>
-        <module caption="16-bit Timer/Counter Type A"
-                id="tmr_16b_pwm_v1"
-                name="TCA">
+        <module caption="16-bit Timer/Counter Type A" id="tmr_16b_pwm_v1" name="TCA">
             <register-group caption="16-bit Timer/Counter Type A" name="TCA" size="0x40">
-                <mode caption="Single Mode"
-                      name="SINGLE"
-                      qualifier="TCA.SINGLE.CTRLD.SPLITM"
-                      value="0"/>
-                <mode caption="Split Mode"
-                      name="SPLIT"
-                      qualifier="TCA.SPLIT.CTRLD.SPLITM"
-                      value="1"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <mode caption="Single Mode" name="SINGLE" qualifier="TCA.SINGLE.CTRLD.SPLITM" value="0"/>
+                <mode caption="Split Mode" name="SPLIT" qualifier="TCA.SPLIT.CTRLD.SPLITM" value="1"/>
+                <register caption="Control A" initval="0x00" modes="SINGLE" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Waveform generation mode"
-                              mask="0x07"
-                              name="WGMODE"
-                              rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                <register caption="Control B" initval="0x00" modes="SINGLE" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                     <bitfield caption="Auto Lock Update" mask="0x08" name="ALUPD" rw="RW"/>
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Compare 0 Waveform Output Value"
-                              mask="0x01"
-                              name="CMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Waveform Output Value"
-                              mask="0x02"
-                              name="CMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Waveform Output Value"
-                              mask="0x04"
-                              name="CMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SINGLE" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x01" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x02" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x04" name="CMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SINGLE" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
+                <register caption="Control E Clear" initval="0x00" modes="SINGLE" name="CTRLECLR" offset="0x04" rw="RW" size="1">
                     <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Direction"
-                              mask="0x01"
-                              name="DIR"
-                              rw="RW"
-                              values="TCA_SINGLE_DIR"/>
+                <register caption="Control E Set" initval="0x00" modes="SINGLE" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Direction" mask="0x01" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
                     <bitfield caption="Lock Update" mask="0x02" name="LUPD" rw="RW"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
                 </register>
-                <register caption="Control F Clear"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFCLR"
-                          offset="0x06"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Clear" initval="0x00" modes="SINGLE" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Control F Set"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="CTRLFSET"
-                          offset="0x07"
-                          rw="RW"
-                          size="1">
+                <register caption="Control F Set" initval="0x00" modes="SINGLE" name="CTRLFSET" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV" rw="RW"/>
-                    <bitfield caption="Compare 0 Buffer Valid"
-                              mask="0x02"
-                              name="CMP0BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 1 Buffer Valid"
-                              mask="0x04"
-                              name="CMP1BV"
-                              rw="RW"/>
-                    <bitfield caption="Compare 2 Buffer Valid"
-                              mask="0x08"
-                              name="CMP2BV"
-                              rw="RW"/>
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x02" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x04" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x08" name="CMP2BV" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="EVCTRL"
-                          offset="0x09"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Count on Event Input A"
-                              mask="0x01"
-                              name="CNTAEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action A"
-                              mask="0x0E"
-                              name="EVACTA"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTA"/>
-                    <bitfield caption="Count on Event Input B"
-                              mask="0x10"
-                              name="CNTBEI"
-                              rw="RW"/>
-                    <bitfield caption="Event Action B"
-                              mask="0xE0"
-                              name="EVACTB"
-                              rw="RW"
-                              values="TCA_SINGLE_EVACTB"/>
+                <register caption="Event Control" initval="0x00" modes="SINGLE" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input A" mask="0x01" name="CNTAEI" rw="RW"/>
+                    <bitfield caption="Event Action A" mask="0x0E" name="EVACTA" rw="RW" values="TCA_SINGLE_EVACTA"/>
+                    <bitfield caption="Count on Event Input B" mask="0x10" name="CNTBEI" rw="RW"/>
+                    <bitfield caption="Event Action B" mask="0xE0" name="EVACTB" rw="RW" values="TCA_SINGLE_EVACTB"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" modes="SINGLE" name="INTCTRL" offset="0x0A" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" modes="SINGLE" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
                     <bitfield caption="Overflow Interrupt" mask="0x01" name="OVF" rw="RW"/>
                     <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
                     <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
                     <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SINGLE"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SINGLE" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary data for 16-bit Access"
-                          modes="SINGLE"
-                          name="TEMP"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          modes="SINGLE"
-                          name="CNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period"
-                          modes="SINGLE"
-                          name="PER"
-                          offset="0x26"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0"
-                          modes="SINGLE"
-                          name="CMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1"
-                          modes="SINGLE"
-                          name="CMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2"
-                          modes="SINGLE"
-                          name="CMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Period Buffer"
-                          modes="SINGLE"
-                          name="PERBUF"
-                          offset="0x36"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 0 Buffer"
-                          modes="SINGLE"
-                          name="CMP0BUF"
-                          offset="0x38"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 1 Buffer"
-                          modes="SINGLE"
-                          name="CMP1BUF"
-                          offset="0x3A"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare 2 Buffer"
-                          modes="SINGLE"
-                          name="CMP2BUF"
-                          offset="0x3C"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control A"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLA"
-                          offset="0x00"
-                          rw="RW"
-                          size="1">
+                <register caption="Temporary data for 16-bit Access" modes="SINGLE" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Count" modes="SINGLE" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Period" modes="SINGLE" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Compare 0" modes="SINGLE" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 1" modes="SINGLE" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 2" modes="SINGLE" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Period Buffer" modes="SINGLE" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" modes="SINGLE" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" modes="SINGLE" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" modes="SINGLE" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" modes="SPLIT" name="CTRLA" offset="0x00" rw="RW" size="1">
                     <bitfield caption="Module Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Selection"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0E" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
                     <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLB"
-                          offset="0x01"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Enable"
-                              mask="0x01"
-                              name="LCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Enable"
-                              mask="0x02"
-                              name="LCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Enable"
-                              mask="0x04"
-                              name="LCMP2EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Enable"
-                              mask="0x10"
-                              name="HCMP0EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Enable"
-                              mask="0x20"
-                              name="HCMP1EN"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Enable"
-                              mask="0x40"
-                              name="HCMP2EN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" modes="SPLIT" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Enable" mask="0x01" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x02" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x04" name="LCMP2EN" rw="RW"/>
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLC"
-                          offset="0x02"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Compare 0 Output Value"
-                              mask="0x01"
-                              name="LCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Output Value"
-                              mask="0x02"
-                              name="LCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Output Value"
-                              mask="0x04"
-                              name="LCMP2OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 0 Output Value"
-                              mask="0x10"
-                              name="HCMP0OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 1 Output Value"
-                              mask="0x20"
-                              name="HCMP1OV"
-                              rw="RW"/>
-                    <bitfield caption="High Compare 2 Output Value"
-                              mask="0x40"
-                              name="HCMP2OV"
-                              rw="RW"/>
+                <register caption="Control C" initval="0x00" modes="SPLIT" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x01" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x02" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x04" name="LCMP2OV" rw="RW"/>
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
                 </register>
-                <register caption="Control D"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLD"
-                          offset="0x03"
-                          rw="RW"
-                          size="1">
+                <register caption="Control D" initval="0x00" modes="SPLIT" name="CTRLD" offset="0x03" rw="RW" size="1">
                     <bitfield caption="Split Mode Enable" mask="0x01" name="SPLITM" rw="RW"/>
                 </register>
-                <register caption="Control E Clear"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLECLR"
-                          offset="0x04"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Clear" initval="0x00" modes="SPLIT" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Control E Set"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="CTRLESET"
-                          offset="0x05"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command Enable"
-                              mask="0x03"
-                              name="CMDEN"
-                              rw="RW"
-                              values="TCA_SPLIT_CMDEN"/>
-                    <bitfield caption="Command"
-                              mask="0x0C"
-                              name="CMD"
-                              rw="RW"
-                              values="TCA_SPLIT_CMD"/>
+                <register caption="Control E Set" initval="0x00" modes="SPLIT" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTCTRL"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Enable"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Enable"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Enable"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Enable"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Enable"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Control" initval="0x00" modes="SPLIT" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="INTFLAGS"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Low Underflow Interrupt Flag"
-                              mask="0x01"
-                              name="LUNF"
-                              rw="RW"/>
-                    <bitfield caption="High Underflow Interrupt Flag"
-                              mask="0x02"
-                              name="HUNF"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 2 Interrupt Flag"
-                              mask="0x10"
-                              name="LCMP0"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 1 Interrupt Flag"
-                              mask="0x20"
-                              name="LCMP1"
-                              rw="RW"/>
-                    <bitfield caption="Low Compare 0 Interrupt Flag"
-                              mask="0x40"
-                              name="LCMP2"
-                              rw="RW"/>
+                <register caption="Interrupt Flags" initval="0x00" modes="SPLIT" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x01" name="LUNF" rw="RW"/>
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x02" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          modes="SPLIT"
-                          name="DBGCTRL"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" modes="SPLIT" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Low Count"
-                          modes="SPLIT"
-                          name="LCNT"
-                          offset="0x20"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Count"
-                          modes="SPLIT"
-                          name="HCNT"
-                          offset="0x21"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Period"
-                          modes="SPLIT"
-                          name="LPER"
-                          offset="0x26"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Period"
-                          modes="SPLIT"
-                          name="HPER"
-                          offset="0x27"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP0"
-                          offset="0x28"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP0"
-                          offset="0x29"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP1"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP1"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Low Compare"
-                          modes="SPLIT"
-                          name="LCMP2"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="High Compare"
-                          modes="SPLIT"
-                          name="HCMP2"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1"/>
+                <register caption="Low Count" modes="SPLIT" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="High Count" modes="SPLIT" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="Low Period" modes="SPLIT" name="LPER" offset="0x26" rw="RW" size="1"/>
+                <register caption="High Period" modes="SPLIT" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="Low Compare" modes="SPLIT" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="High Compare" modes="SPLIT" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
             </register-group>
             <value-group caption="Clock Selection" name="TCA_SINGLE_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5639,12 +2410,8 @@
                 <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
                 <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
                 <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
-                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM"
-                       name="DSBOTH"
-                       value="0x06"/>
-                <value caption="Dual Slope PWM, overflow on BOTTOM"
-                       name="DSBOTTOM"
-                       value="0x07"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
             </value-group>
             <value-group caption="Command select" name="TCA_SINGLE_CMD">
                 <value caption="No Command" name="NONE" value="0x00"/>
@@ -5657,31 +2424,17 @@
                 <value caption="Count down" name="DOWN" value="0x1"/>
             </value-group>
             <value-group caption="Event Action A select" name="TCA_SINGLE_EVACTA">
-                <value caption="Count on positive edge event"
-                       name="CNT_POSEDGE"
-                       value="0x00"/>
+                <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
-                <value caption="Count on prescaled clock while event line is 1."
-                       name="CNT_HIGHLVL"
-                       value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
+                <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
                 <value caption="No Action" name="NONE" value="0x00"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN"
-                       value="0x03"/>
-                <value caption="Restart counter at positive edge event"
-                       name="RESTART_POSEDGE"
-                       value="0x04"/>
-                <value caption="Restart counter on any edge event"
-                       name="RESTART_ANYEDGE"
-                       value="0x05"/>
-                <value caption="Restart counter while event line is 1."
-                       name="RESTART_HIGHLVL"
-                       value="0x06"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+                <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
+                <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
+                <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
             </value-group>
             <value-group caption="Clock Selection" name="TCA_SPLIT_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5701,107 +2454,46 @@
             </value-group>
             <value-group caption="Command Enable select" name="TCA_SPLIT_CMDEN">
                 <value caption="None" name="NONE" value="0x0"/>
-                <value caption="Both low byte and high byte counter"
-                       name="BOTH"
-                       value="0x3"/>
+                <value caption="Both low byte and high byte counter" name="BOTH" value="0x3"/>
             </value-group>
         </module>
         <module caption="16-bit Timer Type B" id="tmr_16b_capture_v1" name="TCB">
             <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Clock Select"
-                              mask="0x0E"
-                              name="CLKSEL"
-                              rw="RW"
-                              values="TCB_CLKSEL"/>
+                    <bitfield caption="Clock Select" mask="0x0E" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
                     <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
                     <bitfield caption="Cascade two timers" mask="0x20" name="CASCADE" rw="RW"/>
                     <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
-                <register caption="Control Register B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Timer Mode"
-                              mask="0x07"
-                              name="CNTMODE"
-                              rw="RW"
-                              values="TCB_CNTMODE"/>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Timer Mode" mask="0x07" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
                     <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
                     <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
                     <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Event Input Enable" mask="0x01" name="CAPTEI" rw="RW"/>
                     <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
-                    <bitfield caption="Input Capture Noise Cancellation Filter"
-                              mask="0x40"
-                              name="FILTER"
-                              rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
                 </register>
-                <register caption="Interrupt Control"
-                          initval="0x00"
-                          name="INTCTRL"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Capture or Timeout" mask="0x01" name="CAPT" rw="RW"/>
                     <bitfield caption="Overflow" mask="0x02" name="OVF" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x7"
-                          rw="R"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
                     <bitfield caption="Run" mask="0x01" name="RUN" rw="R"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Temporary Value"
-                          name="TEMP"
-                          offset="0x9"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Count"
-                          initval="0x0000"
-                          name="CNT"
-                          offset="0xA"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Compare or Capture"
-                          name="CCMP"
-                          offset="0xC"
-                          rw="RW"
-                          size="2"/>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
             </register-group>
             <value-group caption="Clock Select" name="TCB_CLKSEL">
                 <value caption="CLK_PER" name="DIV1" value="0x00"/>
@@ -5814,137 +2506,46 @@
                 <value caption="Periodic Interrupt" name="INT" value="0x00"/>
                 <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
                 <value caption="Input Capture Event" name="CAPT" value="0x02"/>
-                <value caption="Input Capture Frequency measurement"
-                       name="FRQ"
-                       value="0x03"/>
-                <value caption="Input Capture Pulse-Width measurement"
-                       name="PW"
-                       value="0x04"/>
-                <value caption="Input Capture Frequency and Pulse-Width measurement"
-                       name="FRQPW"
-                       value="0x05"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
                 <value caption="Single Shot" name="SINGLE" value="0x06"/>
                 <value caption="8-bit PWM" name="PWM8" value="0x07"/>
             </value-group>
         </module>
         <module caption="Two-Wire Interface" id="i2c_8bit_avr_v3" name="TWI">
             <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Fast-mode Enable"
-                              mask="0x01"
-                              name="FMEN"
-                              rw="RW"
-                              values="TWI_FMEN"/>
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="SDA Setup Time"
-                              mask="0x10"
-                              name="SDASETUP"
-                              rw="RW"
-                              values="TWI_SDASETUP"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Fast-mode Enable" mask="0x01" name="FMEN" rw="RW" values="TWI_FMEN"/>
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Dual Mode Control"
-                          initval="0x00"
-                          name="DUALCTRL"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
+                <register caption="Dual Mode Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Fast-mode Plus Enable"
-                              mask="0x02"
-                              name="FMPEN"
-                              rw="RW"
-                              values="TWI_FMPEN"/>
-                    <bitfield caption="SDA Hold Time"
-                              mask="0x0C"
-                              name="SDAHOLD"
-                              rw="RW"
-                              values="TWI_SDAHOLD"/>
-                    <bitfield caption="Input voltage transition level"
-                              mask="0x40"
-                              name="INPUTLVL"
-                              rw="RW"
-                              values="TWI_INPUTLVL"/>
+                    <bitfield caption="Fast-mode Plus Enable" mask="0x02" name="FMPEN" rw="RW" values="TWI_FMPEN"/>
+                    <bitfield caption="SDA Hold Time" mask="0x0C" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+                    <bitfield caption="Input voltage transition level" mask="0x40" name="INPUTLVL" rw="RW" values="TWI_INPUTLVL"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Debug Run"
-                              mask="0x01"
-                              name="DBGRUN"
-                              rw="RW"
-                              values="TWI_DBGRUN"/>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW" values="TWI_DBGRUN"/>
                 </register>
-                <register caption="Host Control A"
-                          initval="0x00"
-                          name="MCTRLA"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Inactive Bus Time-Out"
-                              mask="0x0C"
-                              name="TIMEOUT"
-                              rw="RW"
-                              values="TWI_TIMEOUT"/>
+                    <bitfield caption="Inactive Bus Time-Out" mask="0x0C" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
                     <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
-                    <bitfield caption="Write Interrupt Enable"
-                              mask="0x40"
-                              name="WIEN"
-                              rw="RW"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
                     <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
                 </register>
-                <register caption="Host Control B"
-                          initval="0x00"
-                          name="MCTRLB"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="MCMD"
-                              rw="RW"
-                              values="TWI_MCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Host Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                     <bitfield caption="Flush" mask="0x08" name="FLUSH" rw="RW"/>
                 </register>
-                <register caption="Host STATUS"
-                          initval="0x00"
-                          name="MSTATUS"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Bus State"
-                              mask="0x03"
-                              name="BUSSTATE"
-                              rw="RW"
-                              values="TWI_BUSSTATE"/>
+                <register caption="Host STATUS" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
@@ -5952,155 +2553,73 @@
                     <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
                     <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
                 </register>
-                <register caption="Host Baud Rate"
-                          initval="0x00"
-                          name="MBAUD"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Baud Rate" initval="0x00" name="MBAUD" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Baud Rate" mask="0xFF" name="BAUD" rw="RW"/>
                 </register>
-                <register caption="Host Address"
-                          initval="0x00"
-                          name="MADDR"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Address" initval="0x00" name="MADDR" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Host Data"
-                          initval="0x00"
-                          name="MDATA"
-                          offset="0x8"
-                          rw="RW"
-                          size="1">
+                <register caption="Host Data" initval="0x00" name="MDATA" offset="0x8" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Control A"
-                          initval="0x00"
-                          name="SCTRLA"
-                          offset="0x9"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Enable" mask="0x01" name="ENABLE" rw="RW"/>
                     <bitfield caption="Smart Mode Enable" mask="0x02" name="SMEN" rw="RW"/>
-                    <bitfield caption="Address Recognition Mode"
-                              mask="0x04"
-                              name="PMEN"
-                              rw="RW"/>
+                    <bitfield caption="Address Recognition Mode" mask="0x04" name="PMEN" rw="RW"/>
                     <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Enable"
-                              mask="0x40"
-                              name="APIEN"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
                     <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
                 </register>
-                <register caption="Client Control B"
-                          initval="0x00"
-                          name="SCTRLB"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Command"
-                              mask="0x03"
-                              name="SCMD"
-                              rw="RW"
-                              values="TWI_SCMD"/>
-                    <bitfield caption="Acknowledge Action"
-                              mask="0x04"
-                              name="ACKACT"
-                              rw="RW"
-                              values="TWI_ACKACT"/>
+                <register caption="Client Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x03" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
                 </register>
-                <register caption="Client Status"
-                          initval="0x00"
-                          name="SSTATUS"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Address or Stop"
-                              mask="0x01"
-                              name="AP"
-                              rw="RW"
-                              values="TWI_AP"/>
+                <register caption="Client Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Address or Stop" mask="0x01" name="AP" rw="RW" values="TWI_AP"/>
                     <bitfield caption="Read/Write Direction" mask="0x02" name="DIR" rw="RW"/>
                     <bitfield caption="Bus Error" mask="0x04" name="BUSERR" rw="RW"/>
                     <bitfield caption="Collision" mask="0x08" name="COLL" rw="RW"/>
                     <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="RW"/>
                     <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
-                    <bitfield caption="Address or Stop Interrupt Flag"
-                              mask="0x40"
-                              name="APIF"
-                              rw="RW"/>
+                    <bitfield caption="Address or Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
                     <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
                 </register>
-                <register caption="Client Address"
-                          initval="0x00"
-                          name="SADDR"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address" initval="0x00" name="SADDR" offset="0xC" rw="RW" size="1">
                     <bitfield caption="Address" mask="0xFF" name="ADDR" rw="RW"/>
                 </register>
-                <register caption="Client Data"
-                          initval="0x00"
-                          name="SDATA"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Data" initval="0x00" name="SDATA" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Data" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Client Address Mask"
-                          initval="0x00"
-                          name="SADDRMASK"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="Client Address Mask" initval="0x00" name="SADDRMASK" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Address Mask Enable" mask="0x01" name="ADDREN" rw="RW"/>
                     <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK" rw="RW"/>
                 </register>
             </register-group>
             <value-group caption="Fast-mode Enable select" name="TWI_FMEN">
-                <value caption="SCL duty cycle operating according to Sm specification"
-                       name="OFF"
-                       value="0x0"/>
-                <value caption="SCL duty cycle operating according to Fm specification"
-                       name="ON"
-                       value="0x1"/>
+                <value caption="SCL duty cycle operating according to Sm specification" name="OFF" value="0x0"/>
+                <value caption="SCL duty cycle operating according to Fm specification" name="ON" value="0x1"/>
             </value-group>
             <value-group caption="Fast-mode Plus Enable select" name="TWI_FMPEN">
-                <value caption="Operating in Standard-mode or Fast-mode"
-                       name="OFF"
-                       value="0x0"/>
+                <value caption="Operating in Standard-mode or Fast-mode" name="OFF" value="0x0"/>
                 <value caption="Operating in Fast-mode Plus" name="ON" value="0x1"/>
             </value-group>
             <value-group caption="Input voltage transition level select" name="TWI_INPUTLVL">
                 <value caption="I2C input voltage transition level" name="I2C" value="0x0"/>
-                <value caption="SMBus 3.0 input voltage transition level"
-                       name="SMBUS"
-                       value="0x1"/>
+                <value caption="SMBus 3.0 input voltage transition level" name="SMBUS" value="0x1"/>
             </value-group>
             <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
                 <value caption="No SDA Hold Delay" name="OFF" value="0x0"/>
                 <value caption="Short SDA hold time" name="50NS" value="0x1"/>
-                <value caption="Meets SMBUS 2.0 specification under typical conditions"
-                       name="300NS"
-                       value="0x2"/>
-                <value caption="Meets SMBUS 2.0 specificaiton across all corners"
-                       name="500NS"
-                       value="0x3"/>
+                <value caption="Meets SMBUS 2.0 specification under typical conditions" name="300NS" value="0x2"/>
+                <value caption="Meets SMBUS 2.0 specificaiton across all corners" name="500NS" value="0x3"/>
             </value-group>
             <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
                 <value caption="SDA setup time is four clock cycles" name="4CYC" value="0"/>
                 <value caption="SDA setup time is eight clock cycle" name="8CYC" value="1"/>
             </value-group>
             <value-group caption="Debug Run select" name="TWI_DBGRUN">
-                <value caption="The peripheral is halted in Break Debug mode and ignores events"
-                       name="HALT"
-                       value="0"/>
-                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted"
-                       name="RUN"
-                       value="1"/>
+                <value caption="The peripheral is halted in Break Debug mode and ignores events" name="HALT" value="0"/>
+                <value caption="The peripheral will continue to run in Break Debug mode when the CPU is halted" name="RUN" value="1"/>
             </value-group>
             <value-group caption="Inactive Bus Time-Out select" name="TWI_TIMEOUT">
                 <value caption="Bus time-out disabled. I2C." name="DISABLED" value="0"/>
@@ -6114,15 +2633,9 @@
             </value-group>
             <value-group caption="Command select" name="TWI_MCMD">
                 <value caption="No action" name="NOACT" value="0"/>
-                <value caption="Execute Acknowledge Action followed by repeated Start."
-                       name="REPSTART"
-                       value="1"/>
-                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR."
-                       name="RECVTRANS"
-                       value="2"/>
-                <value caption="Execute Acknowledge Action followed by issuing a Stop condition."
-                       name="STOP"
-                       value="3"/>
+                <value caption="Execute Acknowledge Action followed by repeated Start." name="REPSTART" value="1"/>
+                <value caption="Execute Acknowledge Action followed by a byte read/write operation. Read/write is defined by DIR." name="RECVTRANS" value="2"/>
+                <value caption="Execute Acknowledge Action followed by issuing a Stop condition." name="STOP" value="3"/>
             </value-group>
             <value-group caption="Bus State select" name="TWI_BUSSTATE">
                 <value caption="Unknown bus state" name="UNKNOWN" value="0"/>
@@ -6133,254 +2646,81 @@
             <value-group caption="Command select" name="TWI_SCMD">
                 <value caption="No Action" name="NOACT" value="0"/>
                 <value caption="Complete transaction" name="COMPTRANS" value="2"/>
-                <value caption="Used in response to an interrupt"
-                       name="RESPONSE"
-                       value="3"/>
+                <value caption="Used in response to an interrupt" name="RESPONSE" value="3"/>
             </value-group>
             <value-group caption="Address or Stop select" name="TWI_AP">
-                <value caption="A Stop condition generated the interrupt on APIF flag"
-                       name="STOP"
-                       value="0"/>
-                <value caption="Address detection generated the interrupt on APIF flag"
-                       name="ADR"
-                       value="1"/>
+                <value caption="A Stop condition generated the interrupt on APIF flag" name="STOP" value="0"/>
+                <value caption="Address detection generated the interrupt on APIF flag" name="ADR" value="1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter"
-                            name="USART"
-                            size="0x10">
-                <register caption="Receive Data Low Byte"
-                          initval="0x00"
-                          name="RXDATAL"
-                          offset="0x0"
-                          rw="R"
-                          size="1">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xFF" name="DATA" rw="R"/>
                 </register>
-                <register caption="Receive Data High Byte"
-                          initval="0x00"
-                          name="RXDATAH"
-                          offset="0x1"
-                          rw="R"
-                          size="1">
-                    <bitfield caption="Receiver Data Register"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="R"/>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Receiver Data Register" mask="0x01" name="DATA8" rw="R"/>
                     <bitfield caption="Parity Error" mask="0x02" name="PERR" rw="R"/>
                     <bitfield caption="Frame Error" mask="0x04" name="FERR" rw="R"/>
                     <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Transmit Data Low Byte"
-                          initval="0x00"
-                          name="TXDATAL"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register"
-                              mask="0xFF"
-                              name="DATA"
-                              rw="RW"/>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xFF" name="DATA" rw="RW"/>
                 </register>
-                <register caption="Transmit Data High Byte"
-                          initval="0x00"
-                          name="TXDATAH"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)"
-                              mask="0x01"
-                              name="DATA8"
-                              rw="RW"/>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x01" name="DATA8" rw="RW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
                     <bitfield caption="Wait For Break" mask="0x01" name="WFB" rw="RW"/>
                     <bitfield caption="Break Detected Flag" mask="0x02" name="BDF" rw="RW"/>
-                    <bitfield caption="Inconsistent Sync Field Interrupt Flag"
-                              mask="0x08"
-                              name="ISFIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Start Interrupt"
-                              mask="0x10"
-                              name="RXSIF"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Flag"
-                              mask="0x20"
-                              name="DREIF"
-                              rw="R"/>
-                    <bitfield caption="Transmit Interrupt Flag"
-                              mask="0x40"
-                              name="TXCIF"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Flag"
-                              mask="0x80"
-                              name="RXCIF"
-                              rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x08" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
                 </register>
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x5"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="RS485 Mode internal transmitter"
-                              mask="0x01"
-                              name="RS485"
-                              rw="RW"
-                              values="USART_RS485"/>
-                    <bitfield caption="Auto-baud Error Interrupt Enable"
-                              mask="0x04"
-                              name="ABEIE"
-                              rw="RW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x01" name="RS485" rw="RW" values="USART_RS485"/>
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x04" name="ABEIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x08" name="LBME" rw="RW"/>
-                    <bitfield caption="Receiver Start Frame Interrupt Enable"
-                              mask="0x10"
-                              name="RXSIE"
-                              rw="RW"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable"
-                              mask="0x20"
-                              name="DREIE"
-                              rw="RW"/>
-                    <bitfield caption="Transmit Complete Interrupt Enable"
-                              mask="0x40"
-                              name="TXCIE"
-                              rw="RW"/>
-                    <bitfield caption="Receive Complete Interrupt Enable"
-                              mask="0x80"
-                              name="RXCIE"
-                              rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                 </register>
-                <register caption="Control B"
-                          initval="0x00"
-                          name="CTRLB"
-                          offset="0x6"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Multi-processor Communication Mode"
-                              mask="0x01"
-                              name="MPCM"
-                              rw="RW"/>
-                    <bitfield caption="Receiver Mode"
-                              mask="0x06"
-                              name="RXMODE"
-                              rw="RW"
-                              values="USART_RXMODE"/>
-                    <bitfield caption="Open Drain Mode Enable"
-                              mask="0x08"
-                              name="ODME"
-                              rw="RW"/>
-                    <bitfield caption="Start Frame Detection Enable"
-                              mask="0x10"
-                              name="SFDEN"
-                              rw="RW"/>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x06" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x08" name="ODME" rw="RW"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
                     <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
                     <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
                 </register>
-                <register caption="Control C"
-                          initval="0x03"
-                          name="CTRLC"
-                          offset="0x7"
-                          rw="RW"
-                          size="1">
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="NORMAL" qualifier="USART.CTRLC.CMODE" value="0x00 0x01 0x02"/>
                     <mode name="MSPI" qualifier="USART.CTRLC.CMODE" value="0x03"/>
-                    <bitfield caption="Communication Mode"
-                              mask="0xC0"
-                              name="CMODE"
-                              rw="RW"
-                              values="USART_CMODE"/>
-                    <bitfield caption="SPI Host Mode, Clock Phase"
-                              mask="0x02"
-                              modes="MSPI"
-                              name="UCPHA"
-                              rw="RW"/>
-                    <bitfield caption="SPI Host Mode, Data Order"
-                              mask="0x04"
-                              modes="MSPI"
-                              name="UDORD"
-                              rw="RW"/>
-                    <bitfield caption="Character Size"
-                              mask="0x07"
-                              modes="NORMAL"
-                              name="CHSIZE"
-                              rw="RW"
-                              values="USART_NORMAL_CHSIZE"/>
-                    <bitfield caption="Stop Bit Mode"
-                              mask="0x08"
-                              modes="NORMAL"
-                              name="SBMODE"
-                              rw="RW"
-                              values="USART_NORMAL_SBMODE"/>
-                    <bitfield caption="Parity Mode"
-                              mask="0x30"
-                              modes="NORMAL"
-                              name="PMODE"
-                              rw="RW"
-                              values="USART_NORMAL_PMODE"/>
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" rw="RW" values="USART_CMODE"/>
+                    <bitfield caption="SPI Host Mode, Clock Phase" mask="0x02" modes="MSPI" name="UCPHA" rw="RW"/>
+                    <bitfield caption="SPI Host Mode, Data Order" mask="0x04" modes="MSPI" name="UDORD" rw="RW"/>
+                    <bitfield caption="Character Size" mask="0x07" modes="NORMAL" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" modes="NORMAL" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" modes="NORMAL" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
                 </register>
-                <register caption="Baud Rate"
-                          initval="0x0000"
-                          name="BAUD"
-                          offset="0x8"
-                          rw="RW"
-                          size="2"/>
-                <register caption="Control D"
-                          initval="0x00"
-                          name="CTRLD"
-                          offset="0xA"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Auto Baud Window"
-                              mask="0xC0"
-                              name="ABW"
-                              rw="RW"
-                              values="USART_ABW"/>
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xC0" name="ABW" rw="RW" values="USART_ABW"/>
                 </register>
-                <register caption="Debug Control"
-                          initval="0x00"
-                          name="DBGCTRL"
-                          offset="0xB"
-                          rw="RW"
-                          size="1">
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Debug Run" mask="0x01" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="Event Control"
-                          initval="0x00"
-                          name="EVCTRL"
-                          offset="0xC"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="IrDA Event Input Enable"
-                              mask="0x01"
-                              name="IREI"
-                              rw="RW"/>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x01" name="IREI" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control"
-                          initval="0x00"
-                          name="TXPLCTRL"
-                          offset="0xD"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xFF" name="TXPL" rw="RW"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control"
-                          initval="0x00"
-                          name="RXPLCTRL"
-                          offset="0xE"
-                          rw="RW"
-                          size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7F" name="RXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -6405,12 +2745,8 @@
                 <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
                 <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
                 <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
-                <value caption="Character size: 9 bit read low byte first"
-                       name="9BITL"
-                       value="0x06"/>
-                <value caption="Character size: 9 bit read high byte first"
-                       name="9BITH"
-                       value="0x07"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
             </value-group>
             <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
                 <value caption="No Parity" name="DISABLED" value="0x00"/>
@@ -6430,384 +2766,90 @@
         </module>
         <module caption="User Row" id="avrea" name="USERROW">
             <register-group caption="User Row" name="USERROW" size="0x40">
-                <register caption="User Row Byte 0"
-                          name="USERROW0"
-                          offset="0x00"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 1"
-                          name="USERROW1"
-                          offset="0x01"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 2"
-                          name="USERROW2"
-                          offset="0x02"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 3"
-                          name="USERROW3"
-                          offset="0x03"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 4"
-                          name="USERROW4"
-                          offset="0x04"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 5"
-                          name="USERROW5"
-                          offset="0x05"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 6"
-                          name="USERROW6"
-                          offset="0x06"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 7"
-                          name="USERROW7"
-                          offset="0x07"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 8"
-                          name="USERROW8"
-                          offset="0x08"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 9"
-                          name="USERROW9"
-                          offset="0x09"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 10"
-                          name="USERROW10"
-                          offset="0x0A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 11"
-                          name="USERROW11"
-                          offset="0x0B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 12"
-                          name="USERROW12"
-                          offset="0x0C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 13"
-                          name="USERROW13"
-                          offset="0x0D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 14"
-                          name="USERROW14"
-                          offset="0x0E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 15"
-                          name="USERROW15"
-                          offset="0x0F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 16"
-                          name="USERROW16"
-                          offset="0x10"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 17"
-                          name="USERROW17"
-                          offset="0x11"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 18"
-                          name="USERROW18"
-                          offset="0x12"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 19"
-                          name="USERROW19"
-                          offset="0x13"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 20"
-                          name="USERROW20"
-                          offset="0x14"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 21"
-                          name="USERROW21"
-                          offset="0x15"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 22"
-                          name="USERROW22"
-                          offset="0x16"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 23"
-                          name="USERROW23"
-                          offset="0x17"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 24"
-                          name="USERROW24"
-                          offset="0x18"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 25"
-                          name="USERROW25"
-                          offset="0x19"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 26"
-                          name="USERROW26"
-                          offset="0x1A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 27"
-                          name="USERROW27"
-                          offset="0x1B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 28"
-                          name="USERROW28"
-                          offset="0x1C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 29"
-                          name="USERROW29"
-                          offset="0x1D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 30"
-                          name="USERROW30"
-                          offset="0x1E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 31"
-                          name="USERROW31"
-                          offset="0x1F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 32"
-                          name="USERROW32"
-                          offset="0x20"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 33"
-                          name="USERROW33"
-                          offset="0x21"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 34"
-                          name="USERROW34"
-                          offset="0x22"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 35"
-                          name="USERROW35"
-                          offset="0x23"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 36"
-                          name="USERROW36"
-                          offset="0x24"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 37"
-                          name="USERROW37"
-                          offset="0x25"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 38"
-                          name="USERROW38"
-                          offset="0x26"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 39"
-                          name="USERROW39"
-                          offset="0x27"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 40"
-                          name="USERROW40"
-                          offset="0x28"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 41"
-                          name="USERROW41"
-                          offset="0x29"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 42"
-                          name="USERROW42"
-                          offset="0x2A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 43"
-                          name="USERROW43"
-                          offset="0x2B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 44"
-                          name="USERROW44"
-                          offset="0x2C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 45"
-                          name="USERROW45"
-                          offset="0x2D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 46"
-                          name="USERROW46"
-                          offset="0x2E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 47"
-                          name="USERROW47"
-                          offset="0x2F"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 48"
-                          name="USERROW48"
-                          offset="0x30"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 49"
-                          name="USERROW49"
-                          offset="0x31"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 50"
-                          name="USERROW50"
-                          offset="0x32"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 51"
-                          name="USERROW51"
-                          offset="0x33"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 52"
-                          name="USERROW52"
-                          offset="0x34"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 53"
-                          name="USERROW53"
-                          offset="0x35"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 54"
-                          name="USERROW54"
-                          offset="0x36"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 55"
-                          name="USERROW55"
-                          offset="0x37"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 56"
-                          name="USERROW56"
-                          offset="0x38"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 57"
-                          name="USERROW57"
-                          offset="0x39"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 58"
-                          name="USERROW58"
-                          offset="0x3A"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 59"
-                          name="USERROW59"
-                          offset="0x3B"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 60"
-                          name="USERROW60"
-                          offset="0x3C"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 61"
-                          name="USERROW61"
-                          offset="0x3D"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 62"
-                          name="USERROW62"
-                          offset="0x3E"
-                          rw="RW"
-                          size="1"/>
-                <register caption="User Row Byte 63"
-                          name="USERROW63"
-                          offset="0x3F"
-                          rw="RW"
-                          size="1"/>
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+                <register caption="User Row Byte 32" name="USERROW32" offset="0x20" rw="RW" size="1"/>
+                <register caption="User Row Byte 33" name="USERROW33" offset="0x21" rw="RW" size="1"/>
+                <register caption="User Row Byte 34" name="USERROW34" offset="0x22" rw="RW" size="1"/>
+                <register caption="User Row Byte 35" name="USERROW35" offset="0x23" rw="RW" size="1"/>
+                <register caption="User Row Byte 36" name="USERROW36" offset="0x24" rw="RW" size="1"/>
+                <register caption="User Row Byte 37" name="USERROW37" offset="0x25" rw="RW" size="1"/>
+                <register caption="User Row Byte 38" name="USERROW38" offset="0x26" rw="RW" size="1"/>
+                <register caption="User Row Byte 39" name="USERROW39" offset="0x27" rw="RW" size="1"/>
+                <register caption="User Row Byte 40" name="USERROW40" offset="0x28" rw="RW" size="1"/>
+                <register caption="User Row Byte 41" name="USERROW41" offset="0x29" rw="RW" size="1"/>
+                <register caption="User Row Byte 42" name="USERROW42" offset="0x2A" rw="RW" size="1"/>
+                <register caption="User Row Byte 43" name="USERROW43" offset="0x2B" rw="RW" size="1"/>
+                <register caption="User Row Byte 44" name="USERROW44" offset="0x2C" rw="RW" size="1"/>
+                <register caption="User Row Byte 45" name="USERROW45" offset="0x2D" rw="RW" size="1"/>
+                <register caption="User Row Byte 46" name="USERROW46" offset="0x2E" rw="RW" size="1"/>
+                <register caption="User Row Byte 47" name="USERROW47" offset="0x2F" rw="RW" size="1"/>
+                <register caption="User Row Byte 48" name="USERROW48" offset="0x30" rw="RW" size="1"/>
+                <register caption="User Row Byte 49" name="USERROW49" offset="0x31" rw="RW" size="1"/>
+                <register caption="User Row Byte 50" name="USERROW50" offset="0x32" rw="RW" size="1"/>
+                <register caption="User Row Byte 51" name="USERROW51" offset="0x33" rw="RW" size="1"/>
+                <register caption="User Row Byte 52" name="USERROW52" offset="0x34" rw="RW" size="1"/>
+                <register caption="User Row Byte 53" name="USERROW53" offset="0x35" rw="RW" size="1"/>
+                <register caption="User Row Byte 54" name="USERROW54" offset="0x36" rw="RW" size="1"/>
+                <register caption="User Row Byte 55" name="USERROW55" offset="0x37" rw="RW" size="1"/>
+                <register caption="User Row Byte 56" name="USERROW56" offset="0x38" rw="RW" size="1"/>
+                <register caption="User Row Byte 57" name="USERROW57" offset="0x39" rw="RW" size="1"/>
+                <register caption="User Row Byte 58" name="USERROW58" offset="0x3A" rw="RW" size="1"/>
+                <register caption="User Row Byte 59" name="USERROW59" offset="0x3B" rw="RW" size="1"/>
+                <register caption="User Row Byte 60" name="USERROW60" offset="0x3C" rw="RW" size="1"/>
+                <register caption="User Row Byte 61" name="USERROW61" offset="0x3D" rw="RW" size="1"/>
+                <register caption="User Row Byte 62" name="USERROW62" offset="0x3E" rw="RW" size="1"/>
+                <register caption="User Row Byte 63" name="USERROW63" offset="0x3F" rw="RW" size="1"/>
             </register-group>
         </module>
         <module caption="Virtual Ports" id="gpio_ports_avr_v3_vport" name="VPORT">
             <register-group caption="Virtual Ports" name="VPORT" size="0x4">
-                <register caption="Data Direction"
-                          initval="0x00"
-                          name="DIR"
-                          offset="0x0"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Output Value"
-                          initval="0x00"
-                          name="OUT"
-                          offset="0x1"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Input Value"
-                          initval="0x00"
-                          name="IN"
-                          offset="0x2"
-                          rw="RW"
-                          size="1"/>
-                <register caption="Interrupt Flags"
-                          initval="0x00"
-                          name="INTFLAGS"
-                          offset="0x3"
-                          rw="RW"
-                          size="1">
+                <register caption="Data Direction" initval="0x00" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Output Value" initval="0x00" name="OUT" offset="0x1" rw="RW" size="1"/>
+                <register caption="Input Value" initval="0x00" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Pin Interrupt Flag" mask="0xFF" name="INT" rw="RW"/>
                 </register>
             </register-group>
         </module>
         <module caption="Voltage reference" id="avrea" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
-                <register caption="DAC0 Reference"
-                          initval="0x00"
-                          name="DAC0REF"
-                          offset="0x2"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="DAC0 Reference" initval="0x00" name="DAC0REF" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
-                <register caption="AC Reference"
-                          initval="0x00"
-                          name="ACREF"
-                          offset="0x4"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Reference select"
-                              mask="0x07"
-                              name="REFSEL"
-                              rw="RW"
-                              values="VREF_REFSEL"/>
+                <register caption="AC Reference" initval="0x00" name="ACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Reference select" mask="0x07" name="REFSEL" rw="RW" values="VREF_REFSEL"/>
                     <bitfield caption="Always on" mask="0x80" name="ALWAYSON" rw="RW"/>
                 </register>
             </register-group>
@@ -6822,33 +2864,12 @@
         </module>
         <module caption="Watch-Dog Timer" id="wdt_windowed_v2" name="WDT">
             <register-group caption="Watch-Dog Timer" name="WDT" size="0x10">
-                <register caption="Control A"
-                          initval="0x00"
-                          name="CTRLA"
-                          offset="0x0"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Period"
-                              mask="0x0F"
-                              name="PERIOD"
-                              rw="RW"
-                              values="WDT_PERIOD"/>
-                    <bitfield caption="Window"
-                              mask="0xF0"
-                              name="WINDOW"
-                              rw="RW"
-                              values="WDT_WINDOW"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x0F" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xF0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
                 </register>
-                <register caption="Status"
-                          initval="0x00"
-                          name="STATUS"
-                          offset="0x1"
-                          rw="RW"
-                          size="1">
-                    <bitfield caption="Syncronization busy"
-                              mask="0x01"
-                              name="SYNCBUSY"
-                              rw="R"/>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY" rw="R"/>
                     <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90CAN128.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90CAN128.xml
index abaa2d29..a659314b 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90CAN128.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90CAN128.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AT90CAN128-16AI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="AT90CAN128-16MI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="AT90CAN128-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="AT90CAN128-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN128-16AI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64" package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN128-16MI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN128-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64" package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN128-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="AT90CAN128" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
-                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -40,8 +31,7 @@
                 <memory-segment name="XRAM" start="0x1100" size="0xef00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -51,8 +41,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -65,8 +54,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -79,8 +67,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -93,8 +80,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -107,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -121,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -135,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -151,8 +134,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -163,8 +145,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="MOSI" function="default" pad="PB2"/>
@@ -175,8 +156,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PD1"/>
                         <signal group="SCL" function="default" pad="PD0"/>
@@ -185,8 +165,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PE1"/>
                         <signal group="RXD" function="default" pad="PE0"/>
@@ -194,8 +173,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -205,8 +183,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PC7"/>
                     </signals>
@@ -217,14 +194,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="0" function="default" pad="PD0"/>
                         <signal group="INT" index="1" function="default" pad="PD1"/>
@@ -239,14 +214,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD7"/>
                         <signal group="OCA" function="default" pad="PB7"/>
@@ -255,8 +228,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD6"/>
                         <signal group="ICP" function="default" pad="PD4"/>
@@ -266,8 +238,7 @@
                     </signals>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PE6"/>
                         <signal group="ICP" function="default" pad="PE7"/>
@@ -279,8 +250,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="TOSC" index="1" function="default" pad="PG4"/>
                         <signal group="TOSC" index="2" function="default" pad="PG3"/>
@@ -290,14 +260,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -312,8 +280,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -322,8 +289,7 @@
             </module>
             <module name="CAN">
                 <instance name="CAN" caption="Controller Area Network">
-                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
-                                    caption="Controller Area Network"/>
+                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data" caption="Controller Area Network"/>
                     <signals>
                         <signal group="TXCAN" function="default" pad="PD5"/>
                         <signal group="RXCAN" function="default" pad="PD6"/>
@@ -332,20 +298,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -439,8 +402,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -501,8 +463,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -533,8 +494,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Reserved for factory tests" mask="0x01" name="TA0SEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -559,94 +519,50 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
@@ -730,8 +646,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -906,10 +821,8 @@
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
                     <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS_XMEM"/>
-                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
-                              values="CPU_WAIT_STATES"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1" values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0" values="CPU_WAIT_STATES"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
                     <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
@@ -960,8 +873,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
                 <value caption="1" name="VAL_0x00" value="0x00"/>
@@ -1004,24 +916,16 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1063,16 +967,14 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF">
                     <bitfield caption="Output Compare A bits" mask="0xFF" name="OCR0A"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -1110,8 +1012,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -1119,26 +1020,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareC Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareC Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -1157,8 +1050,7 @@
                     <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
                     <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
@@ -1166,26 +1058,18 @@
                     <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output CompareC Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output CompareC Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
@@ -1214,14 +1098,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -1258,8 +1140,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1286,14 +1167,12 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
@@ -1310,8 +1189,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1339,16 +1217,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -1414,12 +1290,10 @@
                 <register caption="Enable Interrupt MOb Register" name="CANIE1" offset="0xDF" size="1" mask="0x7F">
                     <bitfield caption="Interrupt Enable by MOb" mask="0x7F" name="IEMOB" lsb="8"/>
                 </register>
-                <register caption="CAN Status Interrupt MOb Register" name="CANSIT2" offset="0xE0" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="CAN Status Interrupt MOb Register" name="CANSIT2" offset="0xE0" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Status of Interrupt by MOb" mask="0xFF" name="SIT"/>
                 </register>
-                <register caption="CAN Status Interrupt MOb Register" name="CANSIT1" offset="0xE1" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="CAN Status Interrupt MOb Register" name="CANSIT1" offset="0xE1" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Status of Interrupt by MOb" mask="0x7F" name="SIT" lsb="8"/>
                 </register>
                 <register caption="Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
@@ -1443,12 +1317,10 @@
                 <register caption="TTC Timer Register" name="CANTTC" offset="0xE8" size="2" ocd-rw="R">
                     <bitfield caption="TTC Timer Count" mask="0xFFFF" name="TIMTTC"/>
                 </register>
-                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Trasnmit Error Count" mask="0xFF" name="TEC"/>
                 </register>
-                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Receive Error Count" mask="0xFF" name="REC"/>
                 </register>
                 <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90CAN32.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90CAN32.xml
index 57dbd826..9613c85b 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90CAN32.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90CAN32.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AT90CAN32-16AI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="AT90CAN32-16MI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="AT90CAN32-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="AT90CAN32-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN32-16AI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64" package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN32-16MI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN32-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64" package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN32-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="AT90CAN32" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x6000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x6000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -40,8 +31,7 @@
                 <memory-segment name="XRAM" start="0x0900" size="0xf700" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -51,8 +41,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -65,8 +54,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -79,8 +67,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -93,8 +80,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -107,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -121,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -135,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -151,8 +134,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -163,8 +145,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="MOSI" function="default" pad="PB2"/>
@@ -175,8 +156,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PD1"/>
                         <signal group="SCL" function="default" pad="PD0"/>
@@ -185,8 +165,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PE1"/>
                         <signal group="RXD" function="default" pad="PE0"/>
@@ -194,8 +173,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -205,8 +183,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PC7"/>
                     </signals>
@@ -217,14 +194,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="0" function="default" pad="PD0"/>
                         <signal group="INT" index="1" function="default" pad="PD1"/>
@@ -239,14 +214,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD7"/>
                         <signal group="OCA" function="default" pad="PB7"/>
@@ -255,8 +228,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD6"/>
                         <signal group="ICP" function="default" pad="PD4"/>
@@ -266,8 +238,7 @@
                     </signals>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PE6"/>
                         <signal group="ICP" function="default" pad="PE7"/>
@@ -279,8 +250,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="TOSC" index="1" function="default" pad="PG4"/>
                         <signal group="TOSC" index="2" function="default" pad="PG3"/>
@@ -290,14 +260,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -312,8 +280,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -322,8 +289,7 @@
             </module>
             <module name="CAN">
                 <instance name="CAN" caption="Controller Area Network">
-                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
-                                    caption="Controller Area Network"/>
+                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data" caption="Controller Area Network"/>
                     <signals>
                         <signal group="TXCAN" function="default" pad="PD5"/>
                         <signal group="RXCAN" function="default" pad="PD6"/>
@@ -332,20 +298,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -439,8 +402,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -501,8 +463,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -533,8 +494,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Reserved for factory tests" mask="0x01" name="TA0SEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -559,70 +519,38 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_16MHZ_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_16MHZ_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_16MHZ_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_16MHZ_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_16MHZ_1KCK_65MS" value="0x0F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$3E00" name="512W_3E00" value="0x03"/>
@@ -706,8 +634,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -882,10 +809,8 @@
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
                     <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS_XMEM"/>
-                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
-                              values="CPU_WAIT_STATES"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1" values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0" values="CPU_WAIT_STATES"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
                     <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
@@ -936,8 +861,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
                 <value caption="1" name="VAL_0x00" value="0x00"/>
@@ -980,24 +904,16 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1039,16 +955,14 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF">
                     <bitfield caption="Output Compare A bits" mask="0xFF" name="OCR0A"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -1086,8 +1000,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -1095,26 +1008,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareC Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareC Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -1133,8 +1038,7 @@
                     <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
                     <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
@@ -1142,26 +1046,18 @@
                     <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output CompareC Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output CompareC Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
@@ -1190,14 +1086,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -1234,8 +1128,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1262,14 +1155,12 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
@@ -1286,8 +1177,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1315,16 +1205,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -1390,12 +1278,10 @@
                 <register caption="Enable Interrupt MOb Register" name="CANIE1" offset="0xDF" size="1" mask="0x7F">
                     <bitfield caption="Interrupt Enable by MOb" mask="0x7F" name="IEMOB" lsb="8"/>
                 </register>
-                <register caption="CAN Status Interrupt MOb Register" name="CANSIT2" offset="0xE0" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="CAN Status Interrupt MOb Register" name="CANSIT2" offset="0xE0" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Status of Interrupt by MOb" mask="0xFF" name="SIT"/>
                 </register>
-                <register caption="CAN Status Interrupt MOb Register" name="CANSIT1" offset="0xE1" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="CAN Status Interrupt MOb Register" name="CANSIT1" offset="0xE1" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Status of Interrupt by MOb" mask="0x7F" name="SIT" lsb="8"/>
                 </register>
                 <register caption="Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
@@ -1419,12 +1305,10 @@
                 <register caption="TTC Timer Register" name="CANTTC" offset="0xE8" size="2" ocd-rw="R">
                     <bitfield caption="TTC Timer Count" mask="0xFFFF" name="TIMTTC"/>
                 </register>
-                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Trasnmit Error Count" mask="0xFF" name="TEC"/>
                 </register>
-                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Receive Error Count" mask="0xFF" name="REC"/>
                 </register>
                 <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90CAN64.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90CAN64.xml
index 0b46af16..5eed3d0a 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90CAN64.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90CAN64.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="AT90CAN64-16AI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="AT90CAN64-16MI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="AT90CAN64-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="AT90CAN64-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN64-16AI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64" package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN64-16MI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN64-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64" package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN64-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="AT90CAN64" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -40,8 +31,7 @@
                 <memory-segment name="XRAM" start="0x1100" size="0xef00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -51,8 +41,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -65,8 +54,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -79,8 +67,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -93,8 +80,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -107,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -121,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -135,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -151,8 +134,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -163,8 +145,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="MOSI" function="default" pad="PB2"/>
@@ -175,8 +156,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PD1"/>
                         <signal group="SCL" function="default" pad="PD0"/>
@@ -185,8 +165,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PE1"/>
                         <signal group="RXD" function="default" pad="PE0"/>
@@ -194,8 +173,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -205,8 +183,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PC7"/>
                     </signals>
@@ -217,14 +194,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="0" function="default" pad="PD0"/>
                         <signal group="INT" index="1" function="default" pad="PD1"/>
@@ -239,14 +214,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD7"/>
                         <signal group="OCA" function="default" pad="PB7"/>
@@ -255,8 +228,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD6"/>
                         <signal group="ICP" function="default" pad="PD4"/>
@@ -266,8 +238,7 @@
                     </signals>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PE6"/>
                         <signal group="ICP" function="default" pad="PE7"/>
@@ -279,8 +250,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="TOSC" index="1" function="default" pad="PG4"/>
                         <signal group="TOSC" index="2" function="default" pad="PG3"/>
@@ -290,14 +260,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -312,8 +280,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -322,8 +289,7 @@
             </module>
             <module name="CAN">
                 <instance name="CAN" caption="Controller Area Network">
-                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
-                                    caption="Controller Area Network"/>
+                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data" caption="Controller Area Network"/>
                     <signals>
                         <signal group="TXCAN" function="default" pad="PD5"/>
                         <signal group="RXCAN" function="default" pad="PD6"/>
@@ -332,20 +298,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -439,8 +402,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -501,8 +463,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -533,8 +494,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Reserved for factory tests" mask="0x01" name="TA0SEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -559,70 +519,38 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_16MHZ_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_16MHZ_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_16MHZ_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_16MHZ_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_16MHZ_1KCK_65MS" value="0x0F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$7E00" name="512W_7E00" value="0x03"/>
@@ -706,8 +634,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -882,10 +809,8 @@
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
                     <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS_XMEM"/>
-                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
-                              values="CPU_WAIT_STATES"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1" values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0" values="CPU_WAIT_STATES"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
                     <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
@@ -936,8 +861,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
                 <value caption="1" name="VAL_0x00" value="0x00"/>
@@ -980,24 +904,16 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1015,9 +931,7 @@
         </module>
         <module caption="EEPROM" name="EEPROM">
             <register-group caption="EEPROM" name="EEPROM">
-                <register
-                        caption="EEPROM Read/Write Access Bytes - Only bit 10..8 are used in AT90CAN64 - Only bit 9..8 are used in AT90CAN32"
-                        name="EEAR" offset="0x41" size="2" mask="0x0FFF">
+                <register caption="EEPROM Read/Write Access Bytes - Only bit 10..8 are used in AT90CAN64 - Only bit 9..8 are used in AT90CAN32" name="EEAR" offset="0x41" size="2" mask="0x0FFF">
                     <bitfield caption="EEPROM Address bits" mask="0x0FFF" name="EEAR"/>
                 </register>
                 <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1">
@@ -1041,16 +955,14 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF">
                     <bitfield caption="Output Compare A bits" mask="0xFF" name="OCR0A"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -1088,8 +1000,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -1097,26 +1008,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareC Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareC Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -1135,8 +1038,7 @@
                     <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
                     <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
@@ -1144,26 +1046,18 @@
                     <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output CompareC Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output CompareC Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
@@ -1192,14 +1086,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -1236,8 +1128,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1264,14 +1155,12 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
@@ -1288,8 +1177,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1317,16 +1205,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -1392,12 +1278,10 @@
                 <register caption="Enable Interrupt MOb Register" name="CANIE1" offset="0xDF" size="1" mask="0x7F">
                     <bitfield caption="Interrupt Enable by MOb" mask="0x7F" name="IEMOB" lsb="8"/>
                 </register>
-                <register caption="CAN Status Interrupt MOb Register" name="CANSIT2" offset="0xE0" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="CAN Status Interrupt MOb Register" name="CANSIT2" offset="0xE0" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Status of Interrupt by MOb" mask="0xFF" name="SIT"/>
                 </register>
-                <register caption="CAN Status Interrupt MOb Register" name="CANSIT1" offset="0xE1" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="CAN Status Interrupt MOb Register" name="CANSIT1" offset="0xE1" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Status of Interrupt by MOb" mask="0x7F" name="SIT" lsb="8"/>
                 </register>
                 <register caption="Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
@@ -1421,12 +1305,10 @@
                 <register caption="TTC Timer Register" name="CANTTC" offset="0xE8" size="2" ocd-rw="R">
                     <bitfield caption="TTC Timer Count" mask="0xFFFF" name="TIMTTC"/>
                 </register>
-                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Trasnmit Error Count" mask="0xFF" name="TEC"/>
                 </register>
-                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Receive Error Count" mask="0xFF" name="REC"/>
                 </register>
                 <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM1.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM1.xml
index 8566ad6a..d43be273 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM1.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM1.xml
@@ -7,16 +7,11 @@
     <device name="AT90PWM1" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x40"/>
+                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x40"/>
+                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x40"/>
+                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -44,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -58,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -72,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -83,28 +74,23 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="PSC">
                 <instance name="PSC0" caption="Power Stage Controller">
-                    <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
                 <instance name="PSC2" caption="Power Stage Controller">
-                    <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
                 <instance name="PSC1" caption="Power Stage Controller">
-                    <register-group name="PSC1" name-in-module="PSC1" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC1" name-in-module="PSC1" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -112,68 +98,57 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
             <interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
             <interrupt index="3" name="PSC1_CAPT" caption="PSC1 Capture Event"/>
@@ -262,8 +237,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -324,8 +298,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -368,8 +341,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -378,90 +350,48 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -547,16 +477,14 @@
                     <bitfield caption="PSC 0 Input Select for Part B" mask="0x40" name="PISEL0B"/>
                     <bitfield caption="PSC 0 Edge Level Selector on Input Part B" mask="0x20" name="PELEV0B"/>
                     <bitfield caption="PSC 0 Filter Enable on Input Part B" mask="0x10" name="PFLTE0B"/>
-                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM0B"
-                              values="PSC_FAULT_MODE_OPER"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM0B" values="PSC_FAULT_MODE_OPER"/>
                 </register>
                 <register caption="PSC 0 Input A Control" name="PFRC0A" offset="0xDC" size="1">
                     <bitfield caption="PSC 0 Capture Enable Input Part A" mask="0x80" name="PCAE0A"/>
                     <bitfield caption="PSC 0 Input Select for Part A" mask="0x40" name="PISEL0A"/>
                     <bitfield caption="PSC 0 Edge Level Selector on Input Part A" mask="0x20" name="PELEV0A"/>
                     <bitfield caption="PSC 0 Filter Enable on Input Part A" mask="0x10" name="PFLTE0A"/>
-                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM0A"
-                              values="PSC_FAULT_MODE_OPER"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM0A" values="PSC_FAULT_MODE_OPER"/>
                 </register>
                 <register caption="PSC 0 Control Register" name="PCTL0" offset="0xDB" size="1">
                     <bitfield caption="PSC 0 Prescaler Selects" mask="0xC0" name="PPRE0" values="PSC_PRESCALER"/>
@@ -580,8 +508,7 @@
                 <register caption="Output Compare RA Register " name="OCR0RA" offset="0xD4" size="2" mask="0x0FFF"/>
                 <register caption="Output Compare SA Register " name="OCR0SA" offset="0xD2" size="2" mask="0x0FFF"/>
                 <register caption="PSC0 Synchro and Output Configuration" name="PSOC0" offset="0xD0" size="1">
-                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC0"
-                              values="PSC_SYNC_SOURCE"/>
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC0" values="PSC_SYNC_SOURCE"/>
                     <bitfield caption="PSCOUT01 Output Enable" mask="0x04" name="POEN0B"/>
                     <bitfield caption="PSCOUT00 Output Enable" mask="0x01" name="POEN0A"/>
                 </register>
@@ -609,16 +536,14 @@
                     <bitfield caption="PSC 2 Input Select for Part B" mask="0x40" name="PISEL2B"/>
                     <bitfield caption="PSC 2 Edge Level Selector on Input Part B" mask="0x20" name="PELEV2B"/>
                     <bitfield caption="PSC 2 Filter Enable on Input Part B" mask="0x10" name="PFLTE2B"/>
-                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM2B"
-                              values="PSC_FAULT_MODE_OPER"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM2B" values="PSC_FAULT_MODE_OPER"/>
                 </register>
                 <register caption="PSC 2 Input B Control" name="PFRC2A" offset="0xFC" size="1">
                     <bitfield caption="PSC 2 Capture Enable Input Part A" mask="0x80" name="PCAE2A"/>
                     <bitfield caption="PSC 2 Input Select for Part A" mask="0x40" name="PISEL2A"/>
                     <bitfield caption="PSC 2 Edge Level Selector on Input Part A" mask="0x20" name="PELEV2A"/>
                     <bitfield caption="PSC 2 Filter Enable on Input Part A" mask="0x10" name="PFLTE2A"/>
-                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM2A"
-                              values="PSC_FAULT_MODE_OPER"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM2A" values="PSC_FAULT_MODE_OPER"/>
                 </register>
                 <register caption="PSC 2 Control Register" name="PCTL2" offset="0xFB" size="1">
                     <bitfield caption="PSC 2 Prescaler Selects" mask="0xC0" name="PPRE2" values="PSC_PRESCALER"/>
@@ -675,16 +600,14 @@
                     <bitfield caption="PSC 1 Input Select for Part B" mask="0x40" name="PISEL1B"/>
                     <bitfield caption="PSC 1 Edge Level Selector on Input Part B" mask="0x20" name="PELEV1B"/>
                     <bitfield caption="PSC 1 Filter Enable on Input Part B" mask="0x10" name="PFLTE1B"/>
-                    <bitfield caption="PSC 1 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM1B"
-                              values="PSC_FAULT_MODE_OPER"/>
+                    <bitfield caption="PSC 1 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM1B" values="PSC_FAULT_MODE_OPER"/>
                 </register>
                 <register caption="PSC 1 Input B Control" name="PFRC1A" offset="0xEC" size="1">
                     <bitfield caption="PSC 1 Capture Enable Input Part A" mask="0x80" name="PCAE1A"/>
                     <bitfield caption="PSC 1 Input Select for Part A" mask="0x40" name="PISEL1A"/>
                     <bitfield caption="PSC 1 Edge Level Selector on Input Part A" mask="0x20" name="PELEV1A"/>
                     <bitfield caption="PSC 1 Filter Enable on Input Part A" mask="0x10" name="PFLTE1A"/>
-                    <bitfield caption="PSC 1 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM1A"
-                              values="PSC_FAULT_MODE_OPER"/>
+                    <bitfield caption="PSC 1 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM1A" values="PSC_FAULT_MODE_OPER"/>
                 </register>
                 <register caption="PSC 1 Control Register" name="PCTL1" offset="0xEB" size="1">
                     <bitfield caption="PSC 1 Prescaler Selects" mask="0xC0" name="PPRE1" values="PSC_PRESCALER"/>
@@ -696,8 +619,7 @@
                     <bitfield caption="PSC 1 Run" mask="0x01" name="PRUN1"/>
                 </register>
                 <register caption="PSC1 Synchro and Output Configuration" name="PSOC1" offset="0xE0" size="1">
-                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC1"
-                              values="PSC_SYNC_SOURCE"/>
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC1" values="PSC_SYNC_SOURCE"/>
                     <bitfield caption="PSCOUT11 Output Enable" mask="0x04" name="POEN1B"/>
                     <bitfield caption="PSCOUT10 Output Enable" mask="0x01" name="POEN1A"/>
                 </register>
@@ -717,8 +639,7 @@
                 <value caption="Reserved (do not use)" name="VAL_0x0B" value="0x0B"/>
                 <value caption="Reserved (do not use)" name="VAL_0x0C" value="0x0C"/>
                 <value caption="Reserved (do not use)" name="VAL_0x0D" value="0x0D"/>
-                <value caption="Fixed Frequency Edge Retrigger PSC and Disactivate Output" name="VAL_0x0E"
-                       value="0x0E"/>
+                <value caption="Fixed Frequency Edge Retrigger PSC and Disactivate Output" name="VAL_0x0E" value="0x0E"/>
                 <value caption="Reserved (do not use)" name="VAL_0x0F" value="0x0F"/>
             </value-group>
             <value-group caption="" name="PSC_PRESCALER">
@@ -771,8 +692,7 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
@@ -846,14 +766,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -899,14 +816,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -921,8 +835,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
@@ -931,16 +844,13 @@
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1" mask="0xFFFF" name="TCNT1"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare A Register" mask="0xFFFF" name="OCR1A"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare B Register" mask="0xFFFF" name="OCR1B"/>
                 </register>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter Input Capture" mask="0xFFFF" name="ICR1"/>
                 </register>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
@@ -1018,8 +928,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
         </module>
         <module caption="Serial Peripheral Interface" name="SPI">
@@ -1058,8 +967,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1080,14 +988,10 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Mask" mask="0x0F" name="INT"/>
@@ -1131,8 +1035,7 @@
                 <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0xAF" size="1">
                     <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
                     <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
-                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
                 </register>
                 <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM161.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM161.xml
index 2b56cb3c..25717de8 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM161.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM161.xml
@@ -7,16 +7,11 @@
     <device name="AT90PWM161" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
@@ -44,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -58,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -72,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -84,44 +75,37 @@
             </module>
             <module name="DAC">
                 <instance name="DAC" caption="Digital-to-Analog Converter">
-                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
-                                    caption="Digital-to-Analog Converter"/>
+                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data" caption="Digital-to-Analog Converter"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -129,48 +113,40 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PSC">
                 <instance name="PSC0" caption="Power Stage Controller">
-                    <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
                 <instance name="PSC2" caption="Power Stage Controller">
-                    <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
             <interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
             <interrupt index="3" name="PSC2_EEC" caption="PSC2 End Of Enhanced Cycle"/>
@@ -247,8 +223,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -309,8 +284,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0C 0x1C 0x0C 0x1C 0x2C 0x3C 0x2C 0x3C 0x4C 0x5C 0x4C 0x5C 0x6C 0x7C 0x6C 0x7C 0x24 0x34 0x64 0x74 0x28 0x38 0x68 0x78 0x7C 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0C 0x1C 0x0C 0x1C 0x2C 0x3C 0x2C 0x3C 0x4C 0x5C 0x4C 0x5C 0x6C 0x7C 0x6C 0x7C 0x24 0x34 0x64 0x74 0x28 0x38 0x68 0x78 0x7C 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -346,8 +320,7 @@
                     <bitfield caption="PSC0 Reset Behavior" mask="0x20" name="PSC0RB"/>
                     <bitfield caption="PSC Reset Value" mask="0x10" name="PSCRV"/>
                     <bitfield caption="PSC2 and PSC0 input Reset Behavior" mask="0x08" name="PSCINRB"/>
-                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
                     <bitfield caption="Reset Disabled (Enable PE0 as I/O pin)" mask="0x80" name="RSTDISBL"/>
@@ -365,118 +338,62 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. CK; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0000 SUT=00]"
-                       name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x00"/>
-                <value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+4.1 ms; [CKSEL=0000 SUT=01]"
-                       name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x10"/>
-                <value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+65 ms; [CKSEL=0000 SUT=10]"
-                       name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x20"/>
-                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0010 SUT=00]"
-                       name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+4.1 ms; [CKSEL=0010 SUT=01]"
-                       name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+65 ms;  [CKSEL=0010 SUT=10]"
-                       name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1000 SUT=00]"
-                       name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1000 SUT=01]"
-                       name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x18"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1000 SUT=10]"
-                       name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1000 SUT=11]"
-                       name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1001 SUT=00]"
-                       name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1001 SUT=01]"
-                       name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1001 SUT=10]"
-                       name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1001 SUT=11]"
-                       name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1010 SUT=00]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1010 SUT=01]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1010 SUT=10]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1010 SUT=11]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms;  [CKSEL=1011 SUT=00]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1011 SUT=01]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1011 SUT=10]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1011 SUT=11]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+4.1 ms; [CKSEL=1100 SUT=00]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+65 ms;  [CKSEL=1100 SUT=01]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=1100 SUT=10]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1100 SUT=11]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+65 ms;  [CKSEL=1101 SUT=00"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=1101 SUT=01]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1101 SUT=10]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+65 ms;  [CKSEL=1101 SUT=11]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1110 SUT=00]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms;  [CKSEL=1110 SUT=01]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1110 SUT=10]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1110 SUT=11]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1111 SUT=00]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1111 SUT=01]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1111 SUT=10]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1111 SUT=11]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3F"/>
-                <value caption="WD128 KHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0011 SUT=00]" name="WDOSC_128KHZ_1KCK_14CK_0MS"
-                       value="0x03"/>
-                <value caption="WD128 KHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0011 SUT=01]"
-                       name="WDOSC_128KHZ_1KCK_14CK_4MS1" value="0x13"/>
-                <value caption="WD128 KHz; SUT: 1KCK/14CK+65 ms; [CKSEL=0011 SUT=10]" name="WDOSC_128KHZ_1KCK_14CK_65MS"
-                       value="0x23"/>
-                <value caption="WD128 KHz; SUT: 16KCK/14CK+0 ms; [CKSEL=0011 SUT=11]" name="WDOSC_128KHZ_16KCK_14CK_0MS"
-                       value="0x33"/>
-                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=0001 SUT=00]"
-                       name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x01"/>
-                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+4 ms;   [CKSEL=0001 SUT=01]"
-                       name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_4MS" value="0x11"/>
-                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+64 ms;   [CKSEL=0001 SUT=10]"
-                       name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_64MS" value="0x21"/>
-                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+0 ms; [CKSEL=0101 SUT=00]"
-                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_0MS" value="0x05"/>
-                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=01]"
-                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x15"/>
-                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=10]"
-                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x25"/>
-                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+64 ms; [CKSEL=0101 SUT=11]"
-                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_64MS" value="0x35"/>
-                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=0100 SUT=00]"
-                       name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+4 ms; [CKSEL=0100 SUT=01]"
-                       name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_4MS" value="0x14"/>
-                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+64 ms; [CKSEL=0100 SUT=10]"
-                       name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_64MS" value="0x24"/>
-                <value caption="PLL/4; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=0100 SUT=11]"
-                       name="PLLCLK_DIV4_PLLIN_XOSC_16KCK_14CK_0MS" value="0x34"/>
-                <value caption="RC 1 MHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0110 SUT=00]" name="RC_1MHZ_1KCK_14CK_0MS"
-                       value="0x06"/>
-                <value caption="RC 1 MHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0110 SUT=01]" name="RC_1MHZ_1KCK_14CK_4MS1"
-                       value="0x16"/>
-                <value caption="RC 1 MHz; SUT: 1KCK/14CK+65 ms;  [CKSEL=0110 SUT=10]" name="RC_1MHZ_1KCK_14CK_65MS"
-                       value="0x26"/>
+                <value caption="Ext. CK; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0000 SUT=00]" name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+4.1 ms; [CKSEL=0000 SUT=01]" name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+65 ms; [CKSEL=0000 SUT=10]" name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x20"/>
+                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0010 SUT=00]" name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+4.1 ms; [CKSEL=0010 SUT=01]" name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+65 ms;  [CKSEL=0010 SUT=10]" name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1000 SUT=00]" name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1000 SUT=01]" name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x18"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1000 SUT=10]" name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1000 SUT=11]" name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1001 SUT=00]" name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1001 SUT=01]" name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1001 SUT=10]" name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1001 SUT=11]" name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1010 SUT=00]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1010 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1010 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1010 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms;  [CKSEL=1011 SUT=00]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1011 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1011 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1011 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+4.1 ms; [CKSEL=1100 SUT=00]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+65 ms;  [CKSEL=1100 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=1100 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1100 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+65 ms;  [CKSEL=1101 SUT=00" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=1101 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1101 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+65 ms;  [CKSEL=1101 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1110 SUT=00]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms;  [CKSEL=1110 SUT=01]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1110 SUT=10]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1110 SUT=11]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1111 SUT=00]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1111 SUT=01]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1111 SUT=10]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1111 SUT=11]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="WD128 KHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0011 SUT=00]" name="WDOSC_128KHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="WD128 KHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0011 SUT=01]" name="WDOSC_128KHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="WD128 KHz; SUT: 1KCK/14CK+65 ms; [CKSEL=0011 SUT=10]" name="WDOSC_128KHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="WD128 KHz; SUT: 16KCK/14CK+0 ms; [CKSEL=0011 SUT=11]" name="WDOSC_128KHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=0001 SUT=00]" name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+4 ms;   [CKSEL=0001 SUT=01]" name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+64 ms;   [CKSEL=0001 SUT=10]" name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+0 ms; [CKSEL=0101 SUT=00]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=01]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=10]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+64 ms; [CKSEL=0101 SUT=11]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=0100 SUT=00]" name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+4 ms; [CKSEL=0100 SUT=01]" name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+64 ms; [CKSEL=0100 SUT=10]" name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_64MS" value="0x24"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=0100 SUT=11]" name="PLLCLK_DIV4_PLLIN_XOSC_16KCK_14CK_0MS" value="0x34"/>
+                <value caption="RC 1 MHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0110 SUT=00]" name="RC_1MHZ_1KCK_14CK_0MS" value="0x06"/>
+                <value caption="RC 1 MHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0110 SUT=01]" name="RC_1MHZ_1KCK_14CK_4MS1" value="0x16"/>
+                <value caption="RC 1 MHz; SUT: 1KCK/14CK+65 ms;  [CKSEL=0110 SUT=10]" name="RC_1MHZ_1KCK_14CK_65MS" value="0x26"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
@@ -548,8 +465,7 @@
                 </register>
                 <register caption="DAC Control Register" name="DACON" offset="0x76" size="1">
                     <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
-                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
-                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS" values="ANALOG_DAC_AUTO_TRIGGER"/>
                     <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
                     <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
                 </register>
@@ -599,8 +515,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x82" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -621,12 +536,9 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x89" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x41" size="1">
                     <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
@@ -661,10 +573,8 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x27" size="1">
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
                     <bitfield caption="ADC Noise Canceller Disable" mask="0x40" name="ADNCDIS"/>
-                    <bitfield caption="ADC Single Shot Enable on PSC's Synchronisation Signals" mask="0x10"
-                              name="ADSSEN"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
+                    <bitfield caption="ADC Single Shot Enable on PSC's Synchronisation Signals" mask="0x10" name="ADSSEN"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x77" size="1">
                     <bitfield caption="" mask="0x80" name="ADC7D"/>
@@ -694,8 +604,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_4BITS">
                 <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
@@ -725,15 +634,13 @@
                 <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x7D" size="1">
                     <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
-                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
                 </register>
                 <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x7E" size="1">
                     <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
                     <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
-                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
                 </register>
                 <register caption="Analog Comparator Status Register" name="ACSR" offset="0x20" size="1" ocd-rw="R">
@@ -794,8 +701,7 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x88" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x88" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x83" size="1" ocd-rw="R">
@@ -957,8 +863,7 @@
                     <bitfield caption="" mask="0x0C" name="PICR21"/>
                     <bitfield caption="" mask="0x03" name="PICR2" lsb="8"/>
                 </register>
-                <register caption="PSC 2 Input Capture Register Low" name="PICR2L" offset="0x6C" size="1" mask="0xFF"
-                          ocd-rw="R"/>
+                <register caption="PSC 2 Input Capture Register Low" name="PICR2L" offset="0x6C" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="PSC 2 Input B Control" name="PFRC2B" offset="0x67" size="1">
                     <bitfield caption="PSC 2 Capture Enable Input Part B" mask="0x80" name="PCAE2B"/>
                     <bitfield caption="PSC 2 Input Select for Part B" mask="0x40" name="PISEL2B"/>
@@ -1031,8 +936,7 @@
                     <bitfield caption="Ramp Number" mask="0x06" name="PRN2"/>
                     <bitfield caption="End of PSC2 Interrupt" mask="0x01" name="PEOP2"/>
                 </register>
-                <register caption="Analog Synchronization Delay Register" name="PASDLY2" offset="0x71" size="1"
-                          mask="0xFF"/>
+                <register caption="Analog Synchronization Delay Register" name="PASDLY2" offset="0x71" size="1" mask="0xFF"/>
             </register-group>
         </module>
         <module caption="Timer/Counter, 16-bit" name="TC16">
@@ -1041,8 +945,7 @@
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x22" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x22" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
                 </register>
@@ -1050,12 +953,10 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x10" name="WGM13"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x5A" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x8C" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM216.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM216.xml
index c137ac74..25bfe791 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM216.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM216.xml
@@ -6,16 +6,11 @@
     <device name="AT90PWM216" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,8 +37,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -57,8 +50,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -71,8 +63,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -82,32 +73,27 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EUSART">
                 <instance name="EUSART" caption="Extended USART">
-                    <register-group name="EUSART" name-in-module="EUSART" offset="0x00" address-space="data"
-                                    caption="Extended USART"/>
+                    <register-group name="EUSART" name-in-module="EUSART" offset="0x00" address-space="data" caption="Extended USART"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="DAC">
                 <instance name="DAC" caption="Digital-to-Analog Converter">
-                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
-                                    caption="Digital-to-Analog Converter"/>
+                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data" caption="Digital-to-Analog Converter"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -115,78 +101,65 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART" caption="USART">
-                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PSC">
                 <instance name="PSC0" caption="Power Stage Controller">
-                    <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
                 <instance name="PSC2" caption="Power Stage Controller">
-                    <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
             <interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
             <interrupt index="3" name="PSC1_CAPT" caption="PSC1 Capture Event"/>
@@ -275,8 +248,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -337,8 +309,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -382,8 +353,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -392,90 +362,48 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -554,10 +482,8 @@
             <register-group caption="Extended USART" name="EUSART">
                 <register caption="EUSART I/O Data Register" name="EUDR" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="EUSART Control and Status Register A" name="EUCSRA" offset="0xC8" size="1">
-                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0xF0" name="UTxS"
-                              values="COMM_TRANS_CHAR_SIZE"/>
-                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0x0F" name="URxS"
-                              values="COMM_TRANS_CHAR_SIZE2"/>
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0xF0" name="UTxS" values="COMM_TRANS_CHAR_SIZE"/>
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0x0F" name="URxS" values="COMM_TRANS_CHAR_SIZE2"/>
                 </register>
                 <register caption="EUSART Control Register B" name="EUCSRB" offset="0xC9" size="1">
                     <bitfield caption="EUSART Enable Bit" mask="0x10" name="EUSART"/>
@@ -570,12 +496,10 @@
                     <bitfield caption="F1617 Bit" mask="0x04" name="F1617"/>
                     <bitfield caption="Stop Bits" mask="0x03" name="STP"/>
                 </register>
-                <register caption="Manchester Receiver Baud Rate Register High Byte" name="MUBRRH" offset="0xCD"
-                          size="1">
+                <register caption="Manchester Receiver Baud Rate Register High Byte" name="MUBRRH" offset="0xCD" size="1">
                     <bitfield caption="Manchester Receiver Baud Rate Register Bits" mask="0xFF" name="MUBRR" lsb="8"/>
                 </register>
-                <register caption="Manchester Receiver Baud Rate Register Low Byte" name="MUBRRL" offset="0xCC"
-                          size="1">
+                <register caption="Manchester Receiver Baud Rate Register Low Byte" name="MUBRRL" offset="0xCC" size="1">
                     <bitfield caption="Manchester Receiver Baud Rate Register Bits" mask="0xFF" name="MUBRR"/>
                 </register>
             </register-group>
@@ -627,16 +551,14 @@
                 <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0xAE" size="1">
                     <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
-                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
                     <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
                 </register>
                 <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0xAF" size="1">
                     <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
                     <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
-                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
                 </register>
                 <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
@@ -663,8 +585,7 @@
                 </register>
                 <register caption="DAC Control Register" name="DACON" offset="0xAA" size="1">
                     <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
-                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
-                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS" values="ANALOG_DAC_AUTO_TRIGGER"/>
                     <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
                     <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
                     <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
@@ -706,8 +627,7 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
@@ -781,14 +701,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -834,14 +751,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -856,8 +770,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
@@ -866,16 +779,13 @@
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1" mask="0xFFFF" name="TCNT1"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare A Register" mask="0xFFFF" name="OCR1A"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare B Register" mask="0xFFFF" name="OCR1B"/>
                 </register>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter Input Capture" mask="0xFFFF" name="ICR1"/>
                 </register>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
@@ -952,8 +862,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
         </module>
         <module caption="USART" name="USART">
@@ -1040,8 +949,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1062,14 +970,10 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Mask" mask="0x0F" name="INT"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM2B.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM2B.xml
index 9e205a7d..085bdf53 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM2B.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM2B.xml
@@ -6,16 +6,11 @@
     <device name="AT90PWM2B" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x40"/>
+                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x40"/>
+                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x40"/>
+                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,8 +37,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -57,8 +50,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -71,8 +63,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -82,32 +73,27 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EUSART">
                 <instance name="EUSART" caption="Extended USART">
-                    <register-group name="EUSART" name-in-module="EUSART" offset="0x00" address-space="data"
-                                    caption="Extended USART"/>
+                    <register-group name="EUSART" name-in-module="EUSART" offset="0x00" address-space="data" caption="Extended USART"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="DAC">
                 <instance name="DAC" caption="Digital-to-Analog Converter">
-                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
-                                    caption="Digital-to-Analog Converter"/>
+                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data" caption="Digital-to-Analog Converter"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -115,78 +101,65 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART" caption="USART">
-                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PSC">
                 <instance name="PSC0" caption="Power Stage Controller">
-                    <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
                 <instance name="PSC2" caption="Power Stage Controller">
-                    <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
             <interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
             <interrupt index="3" name="PSC1_CAPT" caption="PSC1 Capture Event"/>
@@ -275,8 +248,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -337,8 +309,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -382,8 +353,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -392,112 +362,59 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
-                <value caption="PLL clock 16 MHz; Rc. Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Rc. Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -578,10 +495,8 @@
                     <bitfield caption="EUSART Extended data bits" mask="0xFF" name="EUDR"/>
                 </register>
                 <register caption="EUSART Control and Status Register A" name="EUCSRA" offset="0xC8" size="1">
-                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0xF0" name="UTxS"
-                              values="COMM_TRANS_CHAR_SIZE"/>
-                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0x0F" name="URxS"
-                              values="COMM_TRANS_CHAR_SIZE2"/>
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0xF0" name="UTxS" values="COMM_TRANS_CHAR_SIZE"/>
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0x0F" name="URxS" values="COMM_TRANS_CHAR_SIZE2"/>
                 </register>
                 <register caption="EUSART Control Register B" name="EUCSRB" offset="0xC9" size="1">
                     <bitfield caption="EUSART Enable Bit" mask="0x10" name="EUSART"/>
@@ -646,16 +561,14 @@
                 <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0xAE" size="1">
                     <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
-                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
                     <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
                 </register>
                 <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0xAF" size="1">
                     <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
                     <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
-                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
                 </register>
                 <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
@@ -682,8 +595,7 @@
                 </register>
                 <register caption="DAC Control Register" name="DACON" offset="0xAA" size="1">
                     <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
-                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
-                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS" values="ANALOG_DAC_AUTO_TRIGGER"/>
                     <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
                     <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
                     <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
@@ -725,8 +637,7 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
@@ -800,14 +711,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -853,14 +761,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -875,8 +780,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
@@ -885,12 +789,9 @@
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1" mask="0xFFFF" name="TCNT1"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Input Capture" mask="0xFFFF" name="ICR1"/>
                 </register>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
@@ -966,8 +867,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
         </module>
         <module caption="USART" name="USART">
@@ -1053,8 +953,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1075,14 +974,10 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request Enable" mask="0x07" name="INT"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM316.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM316.xml
index 59c4ff27..ff3783b1 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM316.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM316.xml
@@ -7,16 +7,11 @@
     <device name="AT90PWM316" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -44,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -58,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -72,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -86,8 +77,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -97,32 +87,27 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EUSART">
                 <instance name="EUSART" caption="Extended USART">
-                    <register-group name="EUSART" name-in-module="EUSART" offset="0x00" address-space="data"
-                                    caption="Extended USART"/>
+                    <register-group name="EUSART" name-in-module="EUSART" offset="0x00" address-space="data" caption="Extended USART"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="DAC">
                 <instance name="DAC" caption="Digital-to-Analog Converter">
-                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
-                                    caption="Digital-to-Analog Converter"/>
+                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data" caption="Digital-to-Analog Converter"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -130,82 +115,68 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART" caption="USART">
-                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PSC">
                 <instance name="PSC0" caption="Power Stage Controller">
-                    <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
                 <instance name="PSC1" caption="Power Stage Controller">
-                    <register-group name="PSC1" name-in-module="PSC1" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC1" name-in-module="PSC1" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
                 <instance name="PSC2" caption="Power Stage Controller">
-                    <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
             <interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
             <interrupt index="3" name="PSC1_CAPT" caption="PSC1 Capture Event"/>
@@ -294,8 +265,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -356,8 +326,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -401,8 +370,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -411,112 +379,59 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -600,10 +515,8 @@
             <register-group caption="Extended USART" name="EUSART">
                 <register caption="EUSART I/O Data Register" name="EUDR" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="EUSART Control and Status Register A" name="EUCSRA" offset="0xC8" size="1">
-                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0xF0" name="UTxS"
-                              values="COMM_TRANS_CHAR_SIZE"/>
-                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0x0F" name="URxS"
-                              values="COMM_TRANS_CHAR_SIZE2"/>
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0xF0" name="UTxS" values="COMM_TRANS_CHAR_SIZE"/>
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0x0F" name="URxS" values="COMM_TRANS_CHAR_SIZE2"/>
                 </register>
                 <register caption="EUSART Control Register B" name="EUCSRB" offset="0xC9" size="1">
                     <bitfield caption="EUSART Enable Bit" mask="0x10" name="EUSART"/>
@@ -616,12 +529,10 @@
                     <bitfield caption="F1617 Bit" mask="0x04" name="F1617"/>
                     <bitfield caption="Stop Bits" mask="0x03" name="STP"/>
                 </register>
-                <register caption="Manchester Receiver Baud Rate Register High Byte" name="MUBRRH" offset="0xCD"
-                          size="1">
+                <register caption="Manchester Receiver Baud Rate Register High Byte" name="MUBRRH" offset="0xCD" size="1">
                     <bitfield caption="Manchester Receiver Baud Rate Register Bits" mask="0xFF" name="MUBRR" lsb="8"/>
                 </register>
-                <register caption="Manchester Receiver Baud Rate Register Low Byte" name="MUBRRL" offset="0xCC"
-                          size="1">
+                <register caption="Manchester Receiver Baud Rate Register Low Byte" name="MUBRRL" offset="0xCC" size="1">
                     <bitfield caption="Manchester Receiver Baud Rate Register Bits" mask="0xFF" name="MUBRR"/>
                 </register>
             </register-group>
@@ -673,16 +584,14 @@
                 <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0xAE" size="1">
                     <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
-                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
                     <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
                 </register>
                 <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0xAF" size="1">
                     <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
                     <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
-                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
                 </register>
                 <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
@@ -709,8 +618,7 @@
                 </register>
                 <register caption="DAC Control Register" name="DACON" offset="0xAA" size="1">
                     <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
-                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
-                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS" values="ANALOG_DAC_AUTO_TRIGGER"/>
                     <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
                     <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
                     <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
@@ -752,8 +660,7 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
@@ -827,14 +734,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -880,14 +784,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -902,8 +803,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
@@ -912,16 +812,13 @@
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1" mask="0xFFFF" name="TCNT1"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare A Register" mask="0xFFFF" name="OCR1A"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare B Register" mask="0xFFFF" name="OCR1B"/>
                 </register>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -996,8 +893,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
         </module>
         <module caption="USART" name="USART">
@@ -1084,8 +980,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1106,14 +1001,10 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM3B.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM3B.xml
index 6c4c1a3a..086b9583 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM3B.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM3B.xml
@@ -7,16 +7,11 @@
     <device name="AT90PWM3B" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x40"/>
+                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x40"/>
+                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x40"/>
+                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -44,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -58,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -72,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -86,8 +77,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -97,32 +87,27 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EUSART">
                 <instance name="EUSART" caption="Extended USART">
-                    <register-group name="EUSART" name-in-module="EUSART" offset="0x00" address-space="data"
-                                    caption="Extended USART"/>
+                    <register-group name="EUSART" name-in-module="EUSART" offset="0x00" address-space="data" caption="Extended USART"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="DAC">
                 <instance name="DAC" caption="Digital-to-Analog Converter">
-                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
-                                    caption="Digital-to-Analog Converter"/>
+                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data" caption="Digital-to-Analog Converter"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -130,82 +115,68 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART" caption="USART">
-                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PSC">
                 <instance name="PSC0" caption="Power Stage Controller">
-                    <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
                 <instance name="PSC1" caption="Power Stage Controller">
-                    <register-group name="PSC1" name-in-module="PSC1" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC1" name-in-module="PSC1" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
                 <instance name="PSC2" caption="Power Stage Controller">
-                    <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
             <interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
             <interrupt index="3" name="PSC1_CAPT" caption="PSC1 Capture Event"/>
@@ -294,8 +265,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -356,8 +326,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -401,8 +370,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -411,112 +379,59 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
-                <value caption="PLL clock 16 MHz; Rc. Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Rc. Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -602,10 +517,8 @@
                     <bitfield caption="EUSART Extended data bits" mask="0xFF" name="EUDR"/>
                 </register>
                 <register caption="EUSART Control and Status Register A" name="EUCSRA" offset="0xC8" size="1">
-                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0xF0" name="UTxS"
-                              values="COMM_TRANS_CHAR_SIZE"/>
-                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0x0F" name="URxS"
-                              values="COMM_TRANS_CHAR_SIZE2"/>
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0xF0" name="UTxS" values="COMM_TRANS_CHAR_SIZE"/>
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0x0F" name="URxS" values="COMM_TRANS_CHAR_SIZE2"/>
                 </register>
                 <register caption="EUSART Control Register B" name="EUCSRB" offset="0xC9" size="1">
                     <bitfield caption="EUSART Enable Bit" mask="0x10" name="EUSART"/>
@@ -670,16 +583,14 @@
                 <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0xAE" size="1">
                     <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
-                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
                     <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
                 </register>
                 <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0xAF" size="1">
                     <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
                     <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
-                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
                 </register>
                 <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
@@ -706,8 +617,7 @@
                 </register>
                 <register caption="DAC Control Register" name="DACON" offset="0xAA" size="1">
                     <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
-                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
-                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS" values="ANALOG_DAC_AUTO_TRIGGER"/>
                     <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
                     <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
                     <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
@@ -749,8 +659,7 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
@@ -824,14 +733,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -877,14 +783,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -899,8 +802,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
@@ -915,8 +817,7 @@
                 <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2">
                     <bitfield caption="Timer/Counter1 Output Compare B" mask="0xFFFF" name="OCR1B"/>
                 </register>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Input Capture" mask="0xFFFF" name="ICR1"/>
                 </register>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
@@ -992,8 +893,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
         </module>
         <module caption="USART" name="USART">
@@ -1079,8 +979,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1101,14 +1000,10 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request Enable" mask="0x0F" name="INT"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM81.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM81.xml
index 743559d2..fcfd1aae 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM81.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM81.xml
@@ -7,16 +7,11 @@
     <device name="AT90PWM81" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x40"/>
+                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x40"/>
+                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x40"/>
+                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0100" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -44,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -58,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -72,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -84,44 +75,37 @@
             </module>
             <module name="DAC">
                 <instance name="DAC" caption="Digital-to-Analog Converter">
-                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
-                                    caption="Digital-to-Analog Converter"/>
+                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data" caption="Digital-to-Analog Converter"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -129,48 +113,40 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PSC">
                 <instance name="PSC0" caption="Power Stage Controller">
-                    <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
                 <instance name="PSC2" caption="Power Stage Controller">
-                    <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
             <interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
             <interrupt index="3" name="PSC2_EEC" caption="PSC2 End Of Enhanced Cycle"/>
@@ -247,8 +223,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -309,8 +284,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0C 0x1C 0x0C 0x1C 0x2C 0x3C 0x2C 0x3C 0x4C 0x5C 0x4C 0x5C 0x6C 0x7C 0x6C 0x7C 0x24 0x34 0x64 0x74 0x28 0x38 0x68 0x78 0x7C 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0C 0x1C 0x0C 0x1C 0x2C 0x3C 0x2C 0x3C 0x4C 0x5C 0x4C 0x5C 0x6C 0x7C 0x6C 0x7C 0x24 0x34 0x64 0x74 0x28 0x38 0x68 0x78 0x7C 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -346,8 +320,7 @@
                     <bitfield caption="PSC0 Reset Behavior" mask="0x20" name="PSC0RB"/>
                     <bitfield caption="PSC Reset Value" mask="0x10" name="PSCRV"/>
                     <bitfield caption="PSC2 and PSC0 input Reset Behavior" mask="0x08" name="PSCINRB"/>
-                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
                     <bitfield caption="Reset Disabled (Enable PE0 as I/O pin)" mask="0x80" name="RSTDISBL"/>
@@ -365,118 +338,62 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. CK; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0000 SUT=00]"
-                       name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x00"/>
-                <value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+4.1 ms; [CKSEL=0000 SUT=01]"
-                       name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x10"/>
-                <value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+65 ms; [CKSEL=0000 SUT=10]"
-                       name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x20"/>
-                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0010 SUT=00]"
-                       name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+4.1 ms; [CKSEL=0010 SUT=01]"
-                       name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+65 ms;  [CKSEL=0010 SUT=10]"
-                       name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1000 SUT=00]"
-                       name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1000 SUT=01]"
-                       name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x18"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1000 SUT=10]"
-                       name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1000 SUT=11]"
-                       name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1001 SUT=00]"
-                       name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1001 SUT=01]"
-                       name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1001 SUT=10]"
-                       name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1001 SUT=11]"
-                       name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1010 SUT=00]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1010 SUT=01]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1010 SUT=10]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1010 SUT=11]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms;  [CKSEL=1011 SUT=00]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1011 SUT=01]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1011 SUT=10]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1011 SUT=11]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+4.1 ms; [CKSEL=1100 SUT=00]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+65 ms;  [CKSEL=1100 SUT=01]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=1100 SUT=10]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1100 SUT=11]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+65 ms;  [CKSEL=1101 SUT=00"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=1101 SUT=01]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1101 SUT=10]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+65 ms;  [CKSEL=1101 SUT=11]"
-                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1110 SUT=00]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms;  [CKSEL=1110 SUT=01]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1110 SUT=10]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1110 SUT=11]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1111 SUT=00]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1111 SUT=01]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1111 SUT=10]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1111 SUT=11]"
-                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3F"/>
-                <value caption="WD128 KHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0011 SUT=00]" name="WDOSC_128KHZ_1KCK_14CK_0MS"
-                       value="0x03"/>
-                <value caption="WD128 KHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0011 SUT=01]"
-                       name="WDOSC_128KHZ_1KCK_14CK_4MS1" value="0x13"/>
-                <value caption="WD128 KHz; SUT: 1KCK/14CK+65 ms; [CKSEL=0011 SUT=10]" name="WDOSC_128KHZ_1KCK_14CK_65MS"
-                       value="0x23"/>
-                <value caption="WD128 KHz; SUT: 16KCK/14CK+0 ms; [CKSEL=0011 SUT=11]" name="WDOSC_128KHZ_16KCK_14CK_0MS"
-                       value="0x33"/>
-                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=0001 SUT=00]"
-                       name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x01"/>
-                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+4 ms;   [CKSEL=0001 SUT=01]"
-                       name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_4MS" value="0x11"/>
-                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+64 ms;   [CKSEL=0001 SUT=10]"
-                       name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_64MS" value="0x21"/>
-                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+0 ms; [CKSEL=0101 SUT=00]"
-                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_0MS" value="0x05"/>
-                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=01]"
-                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x15"/>
-                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=10]"
-                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x25"/>
-                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+64 ms; [CKSEL=0101 SUT=11]"
-                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_64MS" value="0x35"/>
-                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=0100 SUT=00]"
-                       name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+4 ms; [CKSEL=0100 SUT=01]"
-                       name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_4MS" value="0x14"/>
-                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+64 ms; [CKSEL=0100 SUT=10]"
-                       name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_64MS" value="0x24"/>
-                <value caption="PLL/4; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=0100 SUT=11]"
-                       name="PLLCLK_DIV4_PLLIN_XOSC_16KCK_14CK_0MS" value="0x34"/>
-                <value caption="RC 1 MHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0110 SUT=00]" name="RC_1MHZ_1KCK_14CK_0MS"
-                       value="0x06"/>
-                <value caption="RC 1 MHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0110 SUT=01]" name="RC_1MHZ_1KCK_14CK_4MS1"
-                       value="0x16"/>
-                <value caption="RC 1 MHz; SUT: 1KCK/14CK+65 ms;  [CKSEL=0110 SUT=10]" name="RC_1MHZ_1KCK_14CK_65MS"
-                       value="0x26"/>
+                <value caption="Ext. CK; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0000 SUT=00]" name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+4.1 ms; [CKSEL=0000 SUT=01]" name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+65 ms; [CKSEL=0000 SUT=10]" name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x20"/>
+                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0010 SUT=00]" name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+4.1 ms; [CKSEL=0010 SUT=01]" name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+65 ms;  [CKSEL=0010 SUT=10]" name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1000 SUT=00]" name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1000 SUT=01]" name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x18"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1000 SUT=10]" name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1000 SUT=11]" name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1001 SUT=00]" name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1001 SUT=01]" name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1001 SUT=10]" name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1001 SUT=11]" name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1010 SUT=00]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1010 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1010 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1010 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms;  [CKSEL=1011 SUT=00]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1011 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1011 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1011 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+4.1 ms; [CKSEL=1100 SUT=00]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+65 ms;  [CKSEL=1100 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=1100 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1100 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+65 ms;  [CKSEL=1101 SUT=00" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=1101 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1101 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+65 ms;  [CKSEL=1101 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1110 SUT=00]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms;  [CKSEL=1110 SUT=01]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1110 SUT=10]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1110 SUT=11]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1111 SUT=00]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1111 SUT=01]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1111 SUT=10]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1111 SUT=11]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="WD128 KHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0011 SUT=00]" name="WDOSC_128KHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="WD128 KHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0011 SUT=01]" name="WDOSC_128KHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="WD128 KHz; SUT: 1KCK/14CK+65 ms; [CKSEL=0011 SUT=10]" name="WDOSC_128KHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="WD128 KHz; SUT: 16KCK/14CK+0 ms; [CKSEL=0011 SUT=11]" name="WDOSC_128KHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=0001 SUT=00]" name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+4 ms;   [CKSEL=0001 SUT=01]" name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+64 ms;   [CKSEL=0001 SUT=10]" name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+0 ms; [CKSEL=0101 SUT=00]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=01]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=10]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+64 ms; [CKSEL=0101 SUT=11]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=0100 SUT=00]" name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+4 ms; [CKSEL=0100 SUT=01]" name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+64 ms; [CKSEL=0100 SUT=10]" name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_64MS" value="0x24"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=0100 SUT=11]" name="PLLCLK_DIV4_PLLIN_XOSC_16KCK_14CK_0MS" value="0x34"/>
+                <value caption="RC 1 MHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0110 SUT=00]" name="RC_1MHZ_1KCK_14CK_0MS" value="0x06"/>
+                <value caption="RC 1 MHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0110 SUT=01]" name="RC_1MHZ_1KCK_14CK_4MS1" value="0x16"/>
+                <value caption="RC 1 MHz; SUT: 1KCK/14CK+65 ms;  [CKSEL=0110 SUT=10]" name="RC_1MHZ_1KCK_14CK_65MS" value="0x26"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
@@ -545,8 +462,7 @@
                 </register>
                 <register caption="DAC Control Register" name="DACON" offset="0x76" size="1">
                     <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
-                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
-                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS" values="ANALOG_DAC_AUTO_TRIGGER"/>
                     <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
                     <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
                 </register>
@@ -598,8 +514,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x82" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -620,12 +535,9 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x89" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x41" size="1">
                     <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
@@ -662,10 +574,8 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x27" size="1">
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
                     <bitfield caption="ADC Noise Canceller Disable" mask="0x40" name="ADNCDIS"/>
-                    <bitfield caption="ADC Single Shot Enable on PSC's Synchronisation Signals" mask="0x10"
-                              name="ADSSEN"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
+                    <bitfield caption="ADC Single Shot Enable on PSC's Synchronisation Signals" mask="0x10" name="ADSSEN"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x77" size="1">
                     <bitfield caption="ADC8 Digital input Disable" mask="0x80" name="ADC8D"/>
@@ -695,8 +605,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_4BITS">
                 <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
@@ -726,15 +635,13 @@
                 <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x7D" size="1">
                     <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
-                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
                 </register>
                 <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x7E" size="1">
                     <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
                     <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
-                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
                 </register>
                 <register caption="Analog Comparator Status Register" name="ACSR" offset="0x20" size="1" ocd-rw="R">
@@ -795,8 +702,7 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x88" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x88" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x83" size="1" ocd-rw="R">
@@ -1062,8 +968,7 @@
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x22" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x22" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
                 </register>
@@ -1071,8 +976,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x10" name="WGM13"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x5A" size="2">
                     <bitfield caption="Timer/Counter 1 bits" mask="0xFFFF" name="TCNT1"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB1286.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB1286.xml
index 34999a93..96eb1fc6 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB1286.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB1286.xml
@@ -7,16 +7,11 @@
     <device name="AT90USB1286" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
-                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -34,8 +29,7 @@
                 <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -45,14 +39,12 @@
         <peripherals>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -65,8 +57,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -79,8 +70,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -93,8 +83,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -107,8 +96,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -121,8 +109,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -137,8 +124,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V3"/>
                     </parameters>
@@ -146,114 +132,95 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="USB_DEVICE">
                 <instance name="USB_DEVICE" caption="USB Device Registers">
-                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
-                                    caption="USB Device Registers"/>
+                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data" caption="USB Device Registers"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="PLL">
                 <instance name="PLL" caption="Phase Locked Loop">
-                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
-                                    caption="Phase Locked Loop"/>
+                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data" caption="Phase Locked Loop"/>
                 </instance>
             </module>
             <module name="USB_GLOBAL">
                 <instance name="USB_GLOBAL" caption="USB Controller">
-                    <register-group name="USB_GLOBAL" name-in-module="USB_GLOBAL" offset="0x00" address-space="data"
-                                    caption="USB Controller"/>
+                    <register-group name="USB_GLOBAL" name-in-module="USB_GLOBAL" offset="0x00" address-space="data" caption="USB Controller"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -348,8 +315,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -410,8 +376,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -442,8 +407,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF3">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -468,94 +432,50 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
@@ -605,8 +525,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -685,10 +604,8 @@
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
                     <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS3"/>
-                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
-                              values="CPU_WAIT_STATES"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1" values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0" values="CPU_WAIT_STATES"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
                     <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
@@ -751,8 +668,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="CPU_PIN_RELEASE">
                 <value caption="None" name="VAL_0x00" value="0x00"/>
@@ -1018,10 +934,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -1035,14 +949,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1066,14 +977,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -1090,10 +998,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -1131,8 +1037,7 @@
                     <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
                     <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
@@ -1140,26 +1045,18 @@
                     <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
@@ -1178,8 +1075,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -1187,26 +1083,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -1227,8 +1115,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1240,24 +1127,16 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1293,14 +1172,12 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
@@ -1317,8 +1194,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1346,16 +1222,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB1287.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB1287.xml
index 212d55f6..f228adfb 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB1287.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB1287.xml
@@ -7,16 +7,11 @@
     <device name="AT90USB1287" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
-                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -34,8 +29,7 @@
                 <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -45,14 +39,12 @@
         <peripherals>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -65,8 +57,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -79,8 +70,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -94,8 +84,7 @@
 
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -109,8 +98,7 @@
 
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -124,8 +112,7 @@
 
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -140,8 +127,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V3"/>
                     </parameters>
@@ -149,120 +135,100 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="USB_DEVICE">
                 <instance name="USB_DEVICE" caption="USB Device Registers">
-                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
-                                    caption="USB Device Registers"/>
+                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data" caption="USB Device Registers"/>
                 </instance>
             </module>
             <module name="USB_GLOBAL">
                 <instance name="USB_GLOBAL" caption="USB Controller">
-                    <register-group name="USB_GLOBAL" name-in-module="USB_GLOBAL" offset="0x00" address-space="data"
-                                    caption="USB Controller"/>
+                    <register-group name="USB_GLOBAL" name-in-module="USB_GLOBAL" offset="0x00" address-space="data" caption="USB Controller"/>
                 </instance>
             </module>
             <module name="USB_HOST">
                 <instance name="USB_HOST" caption="USB Host Registers">
-                    <register-group name="USB_HOST" name-in-module="USB_HOST" offset="0x00" address-space="data"
-                                    caption="USB Host Registers"/>
+                    <register-group name="USB_HOST" name-in-module="USB_HOST" offset="0x00" address-space="data" caption="USB Host Registers"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="PLL">
                 <instance name="PLL" caption="Phase Locked Loop">
-                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
-                                    caption="Phase Locked Loop"/>
+                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data" caption="Phase Locked Loop"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -357,8 +323,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -419,8 +384,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -451,8 +415,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF3">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -477,94 +440,50 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
@@ -614,8 +533,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -694,10 +612,8 @@
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
                     <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS3"/>
-                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
-                              values="CPU_WAIT_STATES"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1" values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0" values="CPU_WAIT_STATES"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
                     <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
@@ -760,8 +676,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="CPU_PIN_RELEASE">
                 <value caption="None" name="VAL_0x00" value="0x00"/>
@@ -1173,10 +1088,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -1190,14 +1103,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1221,14 +1131,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -1245,10 +1152,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -1286,8 +1191,7 @@
                     <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
                     <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
@@ -1295,26 +1199,18 @@
                     <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
@@ -1333,8 +1229,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -1342,26 +1237,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -1382,8 +1269,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1395,24 +1281,16 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1448,14 +1326,12 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
@@ -1472,8 +1348,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1501,16 +1376,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB162.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB162.xml
index a4520bca..ca1f7b4d 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB162.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB162.xml
@@ -7,16 +7,11 @@
     <device name="AT90USB162" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -44,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -58,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -72,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -88,56 +79,47 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="PLL">
                 <instance name="PLL" caption="Phase Locked Loop">
-                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
-                                    caption="Phase Locked Loop"/>
+                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data" caption="Phase Locked Loop"/>
                 </instance>
             </module>
             <module name="USB_DEVICE">
                 <instance name="USB_DEVICE" caption="USB Device Registers">
-                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
-                                    caption="USB Device Registers"/>
+                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data" caption="USB Device Registers"/>
                 </instance>
             </module>
             <module name="PS2">
                 <instance name="PS2" caption="PS/2 Controller">
-                    <register-group name="PS2" name-in-module="PS2" offset="0x00" address-space="data"
-                                    caption="PS/2 Controller"/>
+                    <register-group name="PS2" name-in-module="PS2" offset="0x00" address-space="data" caption="PS/2 Controller"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                     </parameters>
@@ -145,44 +127,37 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -268,8 +243,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -330,8 +304,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -362,8 +335,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF4">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
@@ -388,94 +360,50 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x03"/>
@@ -609,10 +537,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -626,14 +552,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -666,8 +589,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -675,26 +597,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -858,8 +772,7 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
@@ -911,8 +824,7 @@
                     <bitfield caption="" mask="0x04" name="EXTE"/>
                     <bitfield caption="" mask="0x01" name="CLKS"/>
                 </register>
-                <register caption="debugWire communication register" name="DWDR" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw=""/>
+                <register caption="debugWire communication register" name="DWDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
             </register-group>
             <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
                 <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
@@ -1017,16 +929,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR1" offset="0x7F" size="1" ocd-rw="W">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB646.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB646.xml
index 45b61a02..3fc1109f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB646.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB646.xml
@@ -7,16 +7,11 @@
     <device name="AT90USB646" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -34,8 +29,7 @@
                 <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -45,14 +39,12 @@
         <peripherals>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -65,8 +57,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -79,8 +70,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -93,8 +83,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -107,8 +96,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -121,8 +109,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -137,8 +124,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V3"/>
                     </parameters>
@@ -146,120 +132,100 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="USB_DEVICE">
                 <instance name="USB_DEVICE" caption="USB Device Registers">
-                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
-                                    caption="USB Device Registers"/>
+                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data" caption="USB Device Registers"/>
                 </instance>
             </module>
             <module name="USB_GLOBAL">
                 <instance name="USB_GLOBAL" caption="USB Controller">
-                    <register-group name="USB_GLOBAL" name-in-module="USB_GLOBAL" offset="0x00" address-space="data"
-                                    caption="USB Controller"/>
+                    <register-group name="USB_GLOBAL" name-in-module="USB_GLOBAL" offset="0x00" address-space="data" caption="USB Controller"/>
                 </instance>
             </module>
             <module name="USB_HOST">
                 <instance name="USB_HOST" caption="USB Host Registers">
-                    <register-group name="USB_HOST" name-in-module="USB_HOST" offset="0x00" address-space="data"
-                                    caption="USB Host Registers"/>
+                    <register-group name="USB_HOST" name-in-module="USB_HOST" offset="0x00" address-space="data" caption="USB Host Registers"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="PLL">
                 <instance name="PLL" caption="Phase Locked Loop">
-                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
-                                    caption="Phase Locked Loop"/>
+                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data" caption="Phase Locked Loop"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -354,8 +320,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -416,8 +381,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -448,8 +412,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF3">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x9B">
@@ -474,94 +437,50 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$7F00" name="512W_7F00" value="0x03"/>
@@ -611,8 +530,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -691,10 +609,8 @@
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
                     <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS3"/>
-                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
-                              values="CPU_WAIT_STATES"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1" values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0" values="CPU_WAIT_STATES"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
                     <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
@@ -757,8 +673,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="CPU_PIN_RELEASE">
                 <value caption="None" name="VAL_0x00" value="0x00"/>
@@ -1170,10 +1085,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -1187,14 +1100,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1218,14 +1128,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -1242,10 +1149,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -1283,8 +1188,7 @@
                     <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
                     <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
@@ -1292,26 +1196,18 @@
                     <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
@@ -1330,8 +1226,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -1339,26 +1234,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -1379,8 +1266,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1392,24 +1278,16 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1445,14 +1323,12 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
@@ -1469,8 +1345,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1498,16 +1373,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB647.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB647.xml
index f7eb0732..e35f0f5d 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB647.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB647.xml
@@ -7,16 +7,11 @@
     <device name="AT90USB647" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -34,8 +29,7 @@
                 <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -45,14 +39,12 @@
         <peripherals>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -65,8 +57,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -79,8 +70,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -93,8 +83,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -107,8 +96,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -121,8 +109,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -137,8 +124,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V3"/>
                     </parameters>
@@ -146,120 +132,100 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="USB_DEVICE">
                 <instance name="USB_DEVICE" caption="USB Device Registers">
-                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
-                                    caption="USB Device Registers"/>
+                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data" caption="USB Device Registers"/>
                 </instance>
             </module>
             <module name="USB_GLOBAL">
                 <instance name="USB_GLOBAL" caption="USB Controller">
-                    <register-group name="USB_GLOBAL" name-in-module="USB_GLOBAL" offset="0x00" address-space="data"
-                                    caption="USB Controller"/>
+                    <register-group name="USB_GLOBAL" name-in-module="USB_GLOBAL" offset="0x00" address-space="data" caption="USB Controller"/>
                 </instance>
             </module>
             <module name="USB_HOST">
                 <instance name="USB_HOST" caption="USB Host Registers">
-                    <register-group name="USB_HOST" name-in-module="USB_HOST" offset="0x00" address-space="data"
-                                    caption="USB Host Registers"/>
+                    <register-group name="USB_HOST" name-in-module="USB_HOST" offset="0x00" address-space="data" caption="USB Host Registers"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="PLL">
                 <instance name="PLL" caption="Phase Locked Loop">
-                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
-                                    caption="Phase Locked Loop"/>
+                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data" caption="Phase Locked Loop"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -354,8 +320,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -416,8 +381,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -448,8 +412,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF3">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x9B">
@@ -474,94 +437,50 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$7F00" name="512W_7F00" value="0x03"/>
@@ -611,8 +530,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -691,10 +609,8 @@
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
                     <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS3"/>
-                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
-                              values="CPU_WAIT_STATES"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1" values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0" values="CPU_WAIT_STATES"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
                     <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
@@ -757,8 +673,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="CPU_PIN_RELEASE">
                 <value caption="None" name="VAL_0x00" value="0x00"/>
@@ -1170,10 +1085,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -1187,14 +1100,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1218,14 +1128,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -1242,10 +1149,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -1283,8 +1188,7 @@
                     <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
                     <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
@@ -1292,26 +1196,18 @@
                     <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
@@ -1330,8 +1226,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -1339,26 +1234,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -1379,8 +1266,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1392,24 +1278,16 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1445,14 +1323,12 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
@@ -1469,8 +1345,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1498,16 +1373,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB82.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB82.xml
index 2cf7b173..276a0933 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB82.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB82.xml
@@ -6,16 +6,11 @@
     <device name="AT90USB82" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x1000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x1000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,8 +37,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -57,8 +50,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -71,8 +63,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -87,56 +78,47 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="PLL">
                 <instance name="PLL" caption="Phase Locked Loop">
-                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
-                                    caption="Phase Locked Loop"/>
+                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data" caption="Phase Locked Loop"/>
                 </instance>
             </module>
             <module name="USB_DEVICE">
                 <instance name="USB_DEVICE" caption="USB Device Registers">
-                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
-                                    caption="USB Device Registers"/>
+                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data" caption="USB Device Registers"/>
                 </instance>
             </module>
             <module name="PS2">
                 <instance name="PS2" caption="PS/2 Controller">
-                    <register-group name="PS2" name-in-module="PS2" offset="0x00" address-space="data"
-                                    caption="PS/2 Controller"/>
+                    <register-group name="PS2" name-in-module="PS2" offset="0x00" address-space="data" caption="PS/2 Controller"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                     </parameters>
@@ -144,44 +126,37 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -267,8 +242,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -329,8 +303,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -361,8 +334,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF4">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
@@ -387,94 +359,50 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x03"/>
@@ -608,10 +536,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -625,14 +551,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -665,8 +588,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -674,26 +596,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -857,8 +771,7 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
@@ -910,8 +823,7 @@
                     <bitfield caption="" mask="0x04" name="EXTE"/>
                     <bitfield caption="" mask="0x01" name="CLKS"/>
                 </register>
-                <register caption="debugWire communication register" name="DWDR" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw=""/>
+                <register caption="debugWire communication register" name="DWDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
             </register-group>
             <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
                 <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
@@ -1016,16 +928,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR1" offset="0x7F" size="1" ocd-rw="W">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128.xml
index 58881078..4dee86e2 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128.xml
@@ -1,36 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega128L-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN64"
-                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega128L-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega128-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
-                 package="TQFP64" vccmin="4.5" vccmax="5.5"/>
-        <variant ordercode="ATmega128-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
-                 package="QFN64" vccmin="4.5" vccmax="5.5"/>
-        <variant ordercode="ATmega128L-8AN" tempmin="-40" tempmax="105" speedmax="8000000" pinout="TQFPQFN64"
-                 package="TQFP64" vccmin="3.0" vccmax="5.5"/>
-        <variant ordercode="ATmega128L-8MN" tempmin="-40" tempmax="105" speedmax="8000000" pinout="TQFPQFN64"
-                 package="QFN64" vccmin="3.0" vccmax="5.5"/>
-        <variant ordercode="ATmega128-16AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64"
-                 package="TQFP64" vccmin="4.5" vccmax="5.5"/>
-        <variant ordercode="ATmega128-16MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64"
-                 package="QFN64" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega128L-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN64" package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega128L-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega128-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64" package="TQFP64" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega128-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64" package="QFN64" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega128L-8AN" tempmin="-40" tempmax="105" speedmax="8000000" pinout="TQFPQFN64" package="TQFP64" vccmin="3.0" vccmax="5.5"/>
+        <variant ordercode="ATmega128L-8MN" tempmin="-40" tempmax="105" speedmax="8000000" pinout="TQFPQFN64" package="QFN64" vccmin="3.0" vccmax="5.5"/>
+        <variant ordercode="ATmega128-16AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64" package="TQFP64" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega128-16MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64" package="QFN64" vccmin="4.5" vccmax="5.5"/>
     </variants>
     <device name="ATmega128" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
-                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -48,8 +35,7 @@
                 <memory-segment name="XRAM" start="0x1100" size="0xef00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
@@ -59,8 +45,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
@@ -69,8 +54,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="MISO" function="default" pad="PB3"/>
                         <signal group="MOSI" function="default" pad="PB2"/>
@@ -81,8 +65,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PD1"/>
                         <signal group="SCL" function="default" pad="PD0"/>
@@ -91,8 +74,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="XCK" function="default" pad="PE2"/>
                         <signal group="TXD" function="default" pad="PE1"/>
@@ -100,8 +82,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="XCK" function="default" pad="PD5"/>
                         <signal group="TXD" function="default" pad="PD3"/>
@@ -111,8 +92,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -120,14 +100,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TDI" function="default" pad="PF7"/>
                         <signal group="TDO" function="default" pad="PF6"/>
@@ -138,8 +116,7 @@
             </module>
             <module name="MISC">
                 <instance name="MISC" caption="Other Registers">
-                    <register-group name="MISC" name-in-module="MISC" offset="0x00" address-space="data"
-                                    caption="Other Registers"/>
+                    <register-group name="MISC" name-in-module="MISC" offset="0x00" address-space="data" caption="Other Registers"/>
                     <signals>
                         <signal group="AD" index="7" function="default" pad="PA7"/>
                         <signal group="AD" index="6" function="default" pad="PA6"/>
@@ -167,8 +144,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="7" function="default" pad="PE7"/>
                         <signal group="INT" index="6" function="default" pad="PE6"/>
@@ -183,14 +159,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -203,8 +177,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -217,8 +190,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -231,8 +203,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -245,8 +216,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -259,8 +229,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -273,8 +242,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -286,8 +254,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC0" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OC" function="default" pad="PB4"/>
                         <signal group="TOSC" index="1" function="default" pad="PG4"/>
@@ -297,8 +264,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="OCC" function="default" pad="PB7"/>
                         <signal group="OCB" function="default" pad="PB6"/>
@@ -308,8 +274,7 @@
                     </signals>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="ICP" function="default" pad="PE7"/>
                         <signal group="T" function="default" pad="PE6"/>
@@ -321,8 +286,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC2" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="OC" function="default" pad="PB7"/>
                         <signal group="T" function="default" pad="PD7"/>
@@ -331,14 +295,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="7" function="default" pad="PF7"/>
                         <signal group="ADC" index="6" function="default" pad="PF6"/>
@@ -353,20 +315,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -458,8 +417,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -520,8 +478,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -565,8 +522,7 @@
                     <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x10" name="CKOPT"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
-                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
                     <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
                 </register>
@@ -579,116 +535,61 @@
                 <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
-                       value="0x01"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
-                       value="0x11"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS"
-                       value="0x21"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
-                       value="0x02"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
-                       value="0x12"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
-                       value="0x22"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
-                       value="0x04"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
-                       value="0x14"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
-                       value="0x24"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
-                       value="0x09"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
-                       value="0x19"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
-                       value="0x29"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS" value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS" value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS" value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS" value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS" value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS" value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS" value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS" value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS" value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS" value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS" value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms" name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms" name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms" name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms" name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms" name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms" name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms" name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms" name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms" name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms" name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms" name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms" name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms" name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms" name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms" name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms" name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms" name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms" name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms" name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms" name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms" name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms" name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms" name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms" name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
@@ -728,16 +629,14 @@
                 <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -835,8 +734,7 @@
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
                     <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
                 </register>
-                <register caption="USART Baud Rate Register Hight Byte" name="UBRR0H" offset="0x90" size="1"
-                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR0H" offset="0x90" size="1" mask="0x0F"/>
                 <register caption="USART Baud Rate Register Low Byte" name="UBRR0L" offset="0x29" size="1" mask="0xFF"/>
             </register-group>
             <register-group caption="USART" name="USART1">
@@ -868,8 +766,7 @@
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
                     <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
                 </register>
-                <register caption="USART Baud Rate Register Hight Byte" name="UBRR1H" offset="0x98" size="1"
-                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR1H" offset="0x98" size="1" mask="0x0F"/>
                 <register caption="USART Baud Rate Register Low Byte" name="UBRR1L" offset="0x99" size="1" mask="0xFF"/>
             </register-group>
             <value-group caption="" name="COMM_USART_MODE">
@@ -929,8 +826,7 @@
                 </register>
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x6D" size="1">
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x0C" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x0C" name="SRW0" values="CPU_WAIT_STATES"/>
                     <bitfield caption="Wait state select bit upper page" mask="0x02" name="SRW11"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x6C" size="1">
@@ -958,8 +854,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
                 <value value="0x00" caption="1.0 MHz " name="1_0_MHz_"/>
@@ -991,8 +886,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x42" size="1"
-                          ocd-rw="">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x42" size="1" ocd-rw="">
                     <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
@@ -1008,32 +902,23 @@
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
                     <bitfield caption="Pull Up Disable" mask="0x04" name="PUD"/>
                     <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x02" name="PSR0"/>
-                    <bitfield caption="Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1" mask="0x01"
-                              name="PSR321"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1" mask="0x01" name="PSR321"/>
                 </register>
             </register-group>
         </module>
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x5A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x59" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1116,8 +1001,7 @@
                     <bitfield caption="Timer/Counter Control Register 0 Update Busy" mask="0x01" name="TCR0UB"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
-                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02" name="OCIE0"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
@@ -1150,15 +1034,12 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
-                              name="OCIE1A"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
-                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
-                    <bitfield caption="Timer/Counter 1, Output Compare Match C Interrupt Enable" mask="0x01"
-                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter 1, Output Compare Match C Interrupt Enable" mask="0x01" name="OCIE1C"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
@@ -1166,8 +1047,7 @@
                     <bitfield caption="Output Compare Flag 1B" mask="0x08" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
                 </register>
-                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
-                          ocd-rw="R">
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter 1, Output Compare C Match Flag" mask="0x01" name="OCF1C"/>
                 </register>
                 <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
@@ -1192,28 +1072,20 @@
                     <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x78" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2" mask="0xFFFF"/>
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC3">
                 <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="TICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x10"
-                              name="OCIE3A"/>
-                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x08"
-                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x10" name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x08" name="OCIE3B"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x04" name="TOIE3"/>
-                    <bitfield caption="Timer/Counter3, Output Compare Match Interrupt Enable" mask="0x02"
-                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3, Output Compare Match Interrupt Enable" mask="0x02" name="OCIE3C"/>
                 </register>
-                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
-                          ocd-rw="R">
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3A" mask="0x10" name="OCF3A"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x08" name="OCF3B"/>
@@ -1242,14 +1114,10 @@
                     <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output compare Register C Bytes" name="OCR3C" offset="0x82" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output compare Register C Bytes" name="OCR3C" offset="0x82" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -1304,8 +1172,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1332,8 +1199,7 @@
                     <bitfield caption="ADC Free Running Select" mask="0x20" name="ADFR"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
             </register-group>
@@ -1341,8 +1207,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1280.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1280.xml
index 55ce5996..cac85761 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1280.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1280.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega1280V-8AU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="TQFP100" pinout="TQFP100"/>
-        <variant ordercode="ATmega1280V-8CU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="CBGA100" pinout="CBGA100"/>
-        <variant ordercode="ATmega1280-16AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="TQFP100" pinout="TQFP100"/>
-        <variant ordercode="ATmega1280-16CU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="CBGA100" pinout="CBGA100"/>
+        <variant ordercode="ATmega1280V-8AU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="TQFP100" pinout="TQFP100"/>
+        <variant ordercode="ATmega1280V-8CU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="CBGA100" pinout="CBGA100"/>
+        <variant ordercode="ATmega1280-16AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5" package="TQFP100" pinout="TQFP100"/>
+        <variant ordercode="ATmega1280-16CU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5" package="CBGA100" pinout="CBGA100"/>
     </variants>
     <device name="ATmega1280" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
-                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -40,8 +31,7 @@
                 <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -51,8 +41,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -61,8 +50,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PE1"/>
                         <signal group="RXD" function="default" pad="PE0"/>
@@ -70,8 +58,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -79,8 +66,7 @@
                     </signals>
                 </instance>
                 <instance name="USART2" caption="USART">
-                    <register-group name="USART2" name-in-module="USART2" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART2" name-in-module="USART2" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="XCK" pad="PH2" function="default"/>
                         <signal group="TXD" pad="PH1" function="default"/>
@@ -88,8 +74,7 @@
                     </signals>
                 </instance>
                 <instance name="USART3" caption="USART">
-                    <register-group name="USART3" name-in-module="USART3" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART3" name-in-module="USART3" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="XCK" pad="PJ2" function="default"/>
                         <signal group="TXD" pad="PJ1" function="default"/>
@@ -99,8 +84,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PD1"/>
                         <signal group="SCL" function="default" pad="PD0"/>
@@ -109,8 +93,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="MOSI" function="default" pad="PB2"/>
@@ -121,8 +104,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -135,8 +117,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -149,8 +130,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -163,8 +143,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -177,8 +156,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -191,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -205,8 +182,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -219,8 +195,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PH0" index="0"/>
                         <signal group="P" function="default" pad="PH1" index="1"/>
@@ -233,8 +208,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PJ0" index="0"/>
                         <signal group="P" function="default" pad="PJ1" index="1"/>
@@ -247,8 +221,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTK" caption="I/O Port">
-                    <register-group name="PORTK" name-in-module="PORTK" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTK" name-in-module="PORTK" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PK0" index="0"/>
                         <signal group="P" function="default" pad="PK1" index="1"/>
@@ -261,8 +234,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTL" caption="I/O Port">
-                    <register-group name="PORTL" name-in-module="PORTL" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTL" name-in-module="PORTL" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PL0" index="0"/>
                         <signal group="P" function="default" pad="PL1" index="1"/>
@@ -277,8 +249,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PG5"/>
@@ -288,8 +259,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="TOSC" index="1" function="default" pad="PG4"/>
                         <signal group="TOSC" index="2" function="default" pad="PG3"/>
@@ -300,20 +270,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC5" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="OCC" pad="PL5" function="default"/>
                         <signal group="OCB" pad="PL4" function="default"/>
@@ -323,8 +290,7 @@
                     </signals>
                 </instance>
                 <instance name="TC4" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" pad="PH7" function="default"/>
                         <signal group="OCC" pad="PH5" function="default"/>
@@ -334,8 +300,7 @@
                     </signals>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PE6"/>
                         <signal group="ICP" function="default" pad="PE7"/>
@@ -345,8 +310,7 @@
                     </signals>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD6"/>
                         <signal group="ICP" function="default" pad="PD4"/>
@@ -358,8 +322,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -370,8 +333,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PB0"/>
                         <signal group="PCINT" index="1" function="default" pad="PB1"/>
@@ -410,8 +372,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PE7"/>
                     </signals>
@@ -422,8 +383,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -446,26 +406,22 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -579,8 +535,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -641,8 +596,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -673,8 +627,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -698,104 +651,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
@@ -841,16 +745,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -960,8 +862,7 @@
             </register-group>
             <register-group caption="USART" name="USART3">
                 <register caption="USART I/O Data Register" name="UDR3" offset="0x136" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART Control and Status Register A" name="UCSR3A" offset="0x130" size="1"
-                          ocd-rw="R">
+                <register caption="USART Control and Status Register A" name="UCSR3A" offset="0x130" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC3"/>
                     <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC3"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE3"/>
@@ -1126,10 +1027,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -1143,14 +1042,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1174,14 +1070,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -1198,10 +1091,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -1232,8 +1123,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1281,8 +1171,7 @@
                     <bitfield caption="Input Capture 5 Noise Canceler" mask="0x80" name="ICNC5"/>
                     <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 5 Control Register C" name="TCCR5C" offset="0x122" size="1">
                     <bitfield caption="Force Output Compare 5A" mask="0x80" name="FOC5A"/>
@@ -1290,26 +1179,18 @@
                     <bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
                 </register>
                 <register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
                     <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
-                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE5C"/>
-                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE5B"/>
-                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE5A"/>
                     <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
                 </register>
-                <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1" ocd-rw="">
                     <bitfield caption="Input Capture Flag 5" mask="0x20" name="ICF5"/>
                     <bitfield caption="Output Compare Flag 5C" mask="0x08" name="OCF5C"/>
                     <bitfield caption="Output Compare Flag 5B" mask="0x04" name="OCF5B"/>
@@ -1328,8 +1209,7 @@
                     <bitfield caption="Input Capture 4 Noise Canceler" mask="0x80" name="ICNC4"/>
                     <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
                     <bitfield caption="Force Output Compare 4A" mask="0x80" name="FOC4A"/>
@@ -1337,26 +1217,18 @@
                     <bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
                 </register>
                 <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
                     <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
-                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE4C"/>
-                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE4B"/>
-                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE4A"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1" ocd-rw="">
                     <bitfield caption="Input Capture Flag 4" mask="0x20" name="ICF4"/>
                     <bitfield caption="Output Compare Flag 4C" mask="0x08" name="OCF4C"/>
                     <bitfield caption="Output Compare Flag 4B" mask="0x04" name="OCF4B"/>
@@ -1375,8 +1247,7 @@
                     <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
                     <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
@@ -1384,26 +1255,18 @@
                     <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
@@ -1422,8 +1285,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -1431,26 +1293,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -1471,8 +1325,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1484,24 +1337,16 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1561,10 +1406,8 @@
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
                     <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS2"/>
-                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
-                              values="CPU_WAIT_STATES"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1" values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0" values="CPU_WAIT_STATES"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
                     <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
@@ -1631,8 +1474,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
                 <value caption="1" name="VAL_0x00" value="0x00"/>
@@ -1664,25 +1506,21 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF6"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF6"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR2" offset="0x7D" size="1">
                     <bitfield caption="" mask="0x80" name="ADC15D"/>
@@ -1708,10 +1546,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF6">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1722,50 +1558,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
                 <value caption="ADC Single Ended Input pin 8" name="ADC8" value="0x20"/>
@@ -1776,50 +1590,28 @@
                 <value caption="ADC Single Ended Input pin 13" name="ADC13" value="0x25"/>
                 <value caption="ADC Single Ended Input pin 14" name="ADC14" value="0x26"/>
                 <value caption="ADC Single Ended Input pin 15" name="ADC15" value="0x27"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain" name="ADC8_ADC8_10X"
-                       value="0x28"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain" name="ADC9_ADC8_10X"
-                       value="0x29"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain" name="ADC8_ADC8_200x"
-                       value="0x2A"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain" name="ADC9_ADC8_200X"
-                       value="0x2B"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain" name="ADC10_ADC10_10X"
-                       value="0x2C"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain" name="ADC11_ADC10_10X"
-                       value="0x2D"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain"
-                       name="ADC10_ADC10_200X" value="0x2E"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain"
-                       name="ADC11_ADC10_200X" value="0x2F"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain" name="ADC8_ADC9_1X"
-                       value="0x30"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain" name="ADC9_ADC9_1X"
-                       value="0x31"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain" name="ADC10_ADC9_1X"
-                       value="0x32"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain" name="ADC11_ADC9_1X"
-                       value="0x33"/>
-                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain" name="ADC12_ADC9_1X"
-                       value="0x34"/>
-                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain" name="ADC13_ADC9_1X"
-                       value="0x35"/>
-                <value caption="ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain" name="ADC14_ADC9_1X"
-                       value="0x36"/>
-                <value caption="ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain" name="ADC15_ADC9_1X"
-                       value="0x37"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain" name="ADC8_ADC10_1X"
-                       value="0x38"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain" name="ADC9_ADC10_1X"
-                       value="0x39"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain" name="ADC10_ADC10_1X"
-                       value="0x3A"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain" name="ADC11_ADC10_1X"
-                       value="0x3B"/>
-                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain" name="ADC12_ADC10_1X"
-                       value="0x3C"/>
-                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain" name="ADC13_ADC10_1X"
-                       value="0x3D"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain" name="ADC8_ADC8_10X" value="0x28"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain" name="ADC9_ADC8_10X" value="0x29"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain" name="ADC8_ADC8_200x" value="0x2A"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain" name="ADC9_ADC8_200X" value="0x2B"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain" name="ADC10_ADC10_10X" value="0x2C"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain" name="ADC11_ADC10_10X" value="0x2D"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain" name="ADC10_ADC10_200X" value="0x2E"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain" name="ADC11_ADC10_200X" value="0x2F"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain" name="ADC8_ADC9_1X" value="0x30"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain" name="ADC9_ADC9_1X" value="0x31"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain" name="ADC10_ADC9_1X" value="0x32"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain" name="ADC11_ADC9_1X" value="0x33"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain" name="ADC12_ADC9_1X" value="0x34"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain" name="ADC13_ADC9_1X" value="0x35"/>
+                <value caption="ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain" name="ADC14_ADC9_1X" value="0x36"/>
+                <value caption="ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain" name="ADC15_ADC9_1X" value="0x37"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain" name="ADC8_ADC10_1X" value="0x38"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain" name="ADC9_ADC10_1X" value="0x39"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain" name="ADC10_ADC10_1X" value="0x3A"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain" name="ADC11_ADC10_1X" value="0x3B"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain" name="ADC12_ADC10_1X" value="0x3C"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain" name="ADC13_ADC10_1X" value="0x3D"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1281.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1281.xml
index 4249cd55..7b69930f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1281.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1281.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega1281V-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega1281V-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="QFN64"
-                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega1281-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega1281-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega1281V-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP64" package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1281V-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1281-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64" package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega1281-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega1281" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
-                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -40,8 +31,7 @@
                 <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -51,8 +41,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -61,8 +50,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PE1"/>
                         <signal group="RXD" function="default" pad="PE0"/>
@@ -70,8 +58,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -81,8 +68,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PD1"/>
                         <signal group="SCL" function="default" pad="PD0"/>
@@ -91,8 +77,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="MOSI" function="default" pad="PB2"/>
@@ -103,8 +88,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -117,8 +101,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -131,8 +114,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -145,8 +127,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -159,8 +140,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -173,8 +153,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -187,8 +166,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -203,8 +181,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PG5"/>
@@ -214,8 +191,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="TOSC" index="1" function="default" pad="PG4"/>
                         <signal group="TOSC" index="2" function="default" pad="PG3"/>
@@ -225,22 +201,18 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC5" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC4" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PE6"/>
                         <signal group="ICP" function="default" pad="PE7"/>
@@ -250,8 +222,7 @@
                     </signals>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD6"/>
                         <signal group="ICP" function="default" pad="PD4"/>
@@ -263,14 +234,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -281,8 +250,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PB0"/>
                         <signal group="PCINT" index="1" function="default" pad="PB1"/>
@@ -306,8 +274,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -322,14 +289,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PE7"/>
                     </signals>
@@ -340,20 +305,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -467,8 +429,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -529,8 +490,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -561,8 +521,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -586,104 +545,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
@@ -729,16 +639,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -931,10 +839,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -948,14 +854,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -979,14 +882,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -1003,10 +903,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -1037,8 +935,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1068,8 +965,7 @@
                     <bitfield caption="Input Capture 5 Noise Canceler" mask="0x80" name="ICNC5"/>
                     <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 5 Control Register C" name="TCCR5C" offset="0x122" size="1">
                     <bitfield caption="Force Output Compare 5A" mask="0x80" name="FOC5A"/>
@@ -1077,26 +973,18 @@
                     <bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
                 </register>
                 <register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
                     <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
-                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE5C"/>
-                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE5B"/>
-                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE5A"/>
                     <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
                 </register>
-                <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1" ocd-rw="">
                     <bitfield caption="Input Capture Flag 5" mask="0x20" name="ICF5"/>
                     <bitfield caption="Output Compare Flag 5C" mask="0x08" name="OCF5C"/>
                     <bitfield caption="Output Compare Flag 5B" mask="0x04" name="OCF5B"/>
@@ -1115,8 +1003,7 @@
                     <bitfield caption="Input Capture 4 Noise Canceler" mask="0x80" name="ICNC4"/>
                     <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
                     <bitfield caption="Force Output Compare 4A" mask="0x80" name="FOC4A"/>
@@ -1124,26 +1011,18 @@
                     <bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
                 </register>
                 <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
                     <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
-                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE4C"/>
-                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE4B"/>
-                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE4A"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1" ocd-rw="">
                     <bitfield caption="Input Capture Flag 4" mask="0x20" name="ICF4"/>
                     <bitfield caption="Output Compare Flag 4C" mask="0x08" name="OCF4C"/>
                     <bitfield caption="Output Compare Flag 4B" mask="0x04" name="OCF4B"/>
@@ -1162,8 +1041,7 @@
                     <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
                     <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
@@ -1171,26 +1049,18 @@
                     <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
@@ -1209,8 +1079,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -1218,26 +1087,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -1276,8 +1137,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1289,24 +1149,16 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1342,25 +1194,21 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF6"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF6"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR2" offset="0x7D" size="1">
                     <bitfield caption="" mask="0x80" name="ADC15D"/>
@@ -1386,10 +1234,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF6">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1400,50 +1246,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
                 <value caption="ADC Single Ended Input pin 8" name="ADC8" value="0x20"/>
@@ -1454,50 +1278,28 @@
                 <value caption="ADC Single Ended Input pin 13" name="ADC13" value="0x25"/>
                 <value caption="ADC Single Ended Input pin 14" name="ADC14" value="0x26"/>
                 <value caption="ADC Single Ended Input pin 15" name="ADC15" value="0x27"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain" name="ADC8_ADC8_10X"
-                       value="0x28"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain" name="ADC9_ADC8_10X"
-                       value="0x29"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain" name="ADC8_ADC8_200x"
-                       value="0x2A"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain" name="ADC9_ADC8_200X"
-                       value="0x2B"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain" name="ADC10_ADC10_10X"
-                       value="0x2C"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain" name="ADC11_ADC10_10X"
-                       value="0x2D"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain"
-                       name="ADC10_ADC10_200X" value="0x2E"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain"
-                       name="ADC11_ADC10_200X" value="0x2F"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain" name="ADC8_ADC9_1X"
-                       value="0x30"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain" name="ADC9_ADC9_1X"
-                       value="0x31"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain" name="ADC10_ADC9_1X"
-                       value="0x32"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain" name="ADC11_ADC9_1X"
-                       value="0x33"/>
-                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain" name="ADC12_ADC9_1X"
-                       value="0x34"/>
-                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain" name="ADC13_ADC9_1X"
-                       value="0x35"/>
-                <value caption="ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain" name="ADC14_ADC9_1X"
-                       value="0x36"/>
-                <value caption="ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain" name="ADC15_ADC9_1X"
-                       value="0x37"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain" name="ADC8_ADC10_1X"
-                       value="0x38"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain" name="ADC9_ADC10_1X"
-                       value="0x39"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain" name="ADC10_ADC10_1X"
-                       value="0x3A"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain" name="ADC11_ADC10_1X"
-                       value="0x3B"/>
-                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain" name="ADC12_ADC10_1X"
-                       value="0x3C"/>
-                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain" name="ADC13_ADC10_1X"
-                       value="0x3D"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain" name="ADC8_ADC8_10X" value="0x28"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain" name="ADC9_ADC8_10X" value="0x29"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain" name="ADC8_ADC8_200x" value="0x2A"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain" name="ADC9_ADC8_200X" value="0x2B"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain" name="ADC10_ADC10_10X" value="0x2C"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain" name="ADC11_ADC10_10X" value="0x2D"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain" name="ADC10_ADC10_200X" value="0x2E"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain" name="ADC11_ADC10_200X" value="0x2F"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain" name="ADC8_ADC9_1X" value="0x30"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain" name="ADC9_ADC9_1X" value="0x31"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain" name="ADC10_ADC9_1X" value="0x32"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain" name="ADC11_ADC9_1X" value="0x33"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain" name="ADC12_ADC9_1X" value="0x34"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain" name="ADC13_ADC9_1X" value="0x35"/>
+                <value caption="ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain" name="ADC14_ADC9_1X" value="0x36"/>
+                <value caption="ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain" name="ADC15_ADC9_1X" value="0x37"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain" name="ADC8_ADC10_1X" value="0x38"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain" name="ADC9_ADC10_1X" value="0x39"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain" name="ADC10_ADC10_1X" value="0x3A"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain" name="ADC11_ADC10_1X" value="0x3B"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain" name="ADC12_ADC10_1X" value="0x3C"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain" name="ADC13_ADC10_1X" value="0x3D"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1563,10 +1365,8 @@
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
                     <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS2"/>
-                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
-                              values="CPU_WAIT_STATES"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1" values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0" values="CPU_WAIT_STATES"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
                     <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
@@ -1632,8 +1432,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="CPU_PIN_RELEASE">
                 <value caption="None" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284.xml
index c5359663..55a5da5e 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284.xml
@@ -1,26 +1,18 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega1284-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega1284-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega1284-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="QFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="QFN44" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega1284" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
-                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -37,8 +29,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x4000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -48,8 +39,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
@@ -58,8 +48,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -67,8 +56,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -78,8 +66,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -92,8 +79,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -106,8 +92,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -120,8 +105,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -136,8 +120,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB0"/>
                         <signal group="OCB" function="default" pad="PB4"/>
@@ -147,8 +130,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -157,8 +139,7 @@
                     </signals>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD0"/>
                         <signal group="ICP" function="default" pad="PB5"/>
@@ -169,8 +150,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PD6"/>
@@ -179,14 +159,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PA0"/>
                         <signal group="PCINT" index="1" function="default" pad="PA1"/>
@@ -228,8 +206,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -244,8 +221,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PC2"/>
                         <signal group="TMS" function="default" pad="PC3"/>
@@ -256,14 +232,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -272,8 +246,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB4"/>
                         <signal group="MOSI" function="default" pad="PB5"/>
@@ -284,14 +257,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PB1"/>
                     </signals>
@@ -302,20 +273,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -407,8 +375,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -469,8 +436,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -496,8 +462,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -528,8 +493,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -553,104 +517,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot start address=$FE00" name="512W_FE00" value="0x03"/>
@@ -696,16 +611,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -822,10 +735,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -839,14 +750,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -871,14 +779,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -900,24 +805,18 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC3">
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
                     <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
                     <bitfield caption="Timer/Counter3 Output Compare A Match Flag" mask="0x02" name="OCF3A"/>
@@ -939,12 +838,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -960,14 +856,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -984,10 +877,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -1030,12 +921,9 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
@@ -1074,24 +962,20 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x80" name="ADC7D"/>
@@ -1107,10 +991,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1121,50 +1003,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
             </value-group>
@@ -1191,8 +1051,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1285,8 +1144,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284P.xml
index 92160189..476b2770 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284P.xml
@@ -1,32 +1,21 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega1284P-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega1284P-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega1284P-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="QFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega1284P-AN" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega1284P-PN" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega1284P-MN" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="QFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284P-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284P-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284P-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="QFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284P-AN" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284P-PN" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284P-MN" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="QFN44" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega1284P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
-                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,8 +32,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x4000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -54,8 +42,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
@@ -64,8 +51,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -73,8 +59,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -84,8 +69,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -98,8 +82,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -112,8 +95,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -126,8 +108,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -142,8 +123,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB0"/>
                         <signal group="OCB" function="default" pad="PB4"/>
@@ -153,8 +133,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -163,8 +142,7 @@
                     </signals>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD0"/>
                         <signal group="ICP" function="default" pad="PB5"/>
@@ -175,8 +153,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PD6"/>
@@ -185,14 +162,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PA0"/>
                         <signal group="PCINT" index="1" function="default" pad="PA1"/>
@@ -234,8 +209,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -250,8 +224,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PC2"/>
                         <signal group="TMS" function="default" pad="PC3"/>
@@ -262,14 +235,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -278,8 +249,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB4"/>
                         <signal group="MOSI" function="default" pad="PB5"/>
@@ -290,14 +260,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PB1"/>
                     </signals>
@@ -308,20 +276,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -413,8 +378,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -475,8 +439,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -502,8 +465,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -534,8 +496,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -559,104 +520,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot start address=$FE00" name="512W_FE00" value="0x03"/>
@@ -702,16 +614,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -836,12 +746,10 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare B bits" mask="0xFF" name="OCR0B"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x47" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare A bits" mask="0xFF" name="OCR0A"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
@@ -859,14 +767,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -891,14 +796,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -922,30 +824,24 @@
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare A bits" mask="0xFFFF" name="OCR1A"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare B bits" mask="0xFFFF" name="OCR1B"/>
                 </register>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
                 </register>
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC3">
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
                     <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
                     <bitfield caption="Timer/Counter3 Output Compare A Match Flag" mask="0x02" name="OCF3A"/>
@@ -969,16 +865,13 @@
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter3 bits" mask="0xFFFF" name="TCNT3"/>
                 </register>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter3 Output Compare A bits" mask="0xFFFF" name="OCR3A"/>
                 </register>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter3 Output Compare B bits" mask="0xFFFF" name="OCR3B"/>
                 </register>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter3 Input Capture bits" mask="0xFFFF" name="ICR3"/>
                 </register>
             </register-group>
@@ -996,14 +889,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -1022,12 +912,10 @@
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter2 bits" mask="0xFF" name="TCNT2"/>
                 </register>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter2 Output Compare B bits" mask="0xFF" name="OCR2B"/>
                 </register>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter2 Output Compare A bits" mask="0xFF" name="OCR2A"/>
                 </register>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
@@ -1072,12 +960,9 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
@@ -1116,26 +1001,22 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
                     <bitfield caption="ADC Data bits" mask="0xFFFF" name="ADC"/>
                 </register>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x80" name="ADC7D"/>
@@ -1151,10 +1032,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1165,50 +1044,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
             </value-group>
@@ -1235,8 +1092,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1339,8 +1195,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284RFR2.xml
index ece42e27..f9e00d83 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284RFR2.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega1284RFR2-ZU" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega1284RFR2-ZUR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega1284RFR2-ZF" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega1284RFR2-ZFR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega1284RFR2-ZU" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega1284RFR2-ZUR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega1284RFR2-ZF" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega1284RFR2-ZFR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
     </variants>
     <device name="ATmega1284RFR2" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
-                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,10 +24,8 @@
             <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
                 <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
-            <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100"
-                           size="0x0300">
-                <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="0x100"/>
+            <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100" size="0x0300">
+                <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="data" id="data" start="0x0000" size="0x4200">
                 <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
@@ -44,8 +33,7 @@
                 <memory-segment name="IRAM" start="0x0200" size="0x4000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -55,48 +43,39 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
                 <instance name="USART0_SPI" caption="Serial Peripheral Interface">
-                    <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
                 <instance name="USART1_SPI" caption="Serial Peripheral Interface">
-                    <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="MISSING_PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -109,12 +88,10 @@
                     </signals>
                 </instance>
                 <instance name="MISSING_PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -127,8 +104,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -140,8 +116,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -154,8 +129,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
                         <signal function="PORTG" group="P" index="3" pad="PG3"/>
@@ -165,86 +139,71 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC5" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC4" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TRX24">
                 <instance name="TRX24" caption="Low-Power 2.4 GHz Transceiver">
-                    <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data"
-                                    caption="Low-Power 2.4 GHz Transceiver"/>
+                    <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data" caption="Low-Power 2.4 GHz Transceiver"/>
                 </instance>
             </module>
             <module name="SYMCNT">
                 <instance name="SYMCNT" caption="MAC Symbol Counter">
-                    <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data"
-                                    caption="MAC Symbol Counter"/>
+                    <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data" caption="MAC Symbol Counter"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V3"/>
                     </parameters>
@@ -252,32 +211,27 @@
             </module>
             <module name="FLASH">
                 <instance name="FLASH" caption="FLASH Controller">
-                    <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data"
-                                    caption="FLASH Controller"/>
+                    <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data" caption="FLASH Controller"/>
                 </instance>
             </module>
             <module name="PWRCTRL">
                 <instance name="PWRCTRL" caption="Power Controller">
-                    <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data"
-                                    caption="Power Controller"/>
+                    <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data" caption="Power Controller"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -342,8 +296,7 @@
             <interrupt index="68" name="SCNT_OVFL" caption="Symbol counter - overflow interrupt"/>
             <interrupt index="69" name="SCNT_BACKOFF" caption="Symbol counter - backoff interrupt"/>
             <interrupt index="70" name="AES_READY" caption="AES engine ready interrupt"/>
-            <interrupt index="71" name="BAT_LOW"
-                       caption="Battery monitor indicates supply voltage below threshold"/>
+            <interrupt index="71" name="BAT_LOW" caption="Battery monitor indicates supply voltage below threshold"/>
             <interrupt index="72" name="TRX24_TX_START" caption="TRX24 TX start interrupt"/>
             <interrupt index="73" name="TRX24_AMI0" caption="Address match interrupt of address filter 0"/>
             <interrupt index="74" name="TRX24_AMI1" caption="Address match interrupt of address filter 1"/>
@@ -406,8 +359,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -468,8 +420,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -500,8 +451,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFE">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -515,8 +465,7 @@
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
                     <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
-                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT"
-                              values="ENUM_SUT_CKSEL"/>
+                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT" values="ENUM_SUT_CKSEL"/>
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
@@ -526,87 +475,49 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS"
-                       value="0x23"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x06"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x16"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS" value="0x23"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x06"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x16"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x26"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x36"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x07"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x17"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x27"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x37"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x08"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x18"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x36"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x07"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x17"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x27"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x37"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x08"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x18"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x28"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x38"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x09"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x19"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x29"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x39"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x38"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x09"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x19"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x29"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x39"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1A"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1C"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1E"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
@@ -663,8 +574,7 @@
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -681,8 +591,7 @@
         <module caption="USART" name="USART">
             <register-group caption="USART" name="USART0">
                 <register caption="USART0 I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
-                          ocd-rw="R">
+                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
@@ -703,8 +612,7 @@
                     <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
                 </register>
                 <register caption="USART0 Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
-                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0"
-                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT_MEGARF"/>
                     <bitfield caption="Parity Mode" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
                     <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
@@ -714,8 +622,7 @@
             </register-group>
             <register-group caption="USART" name="USART1">
                 <register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
-                          ocd-rw="R">
+                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
@@ -736,8 +643,7 @@
                     <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
                 </register>
                 <register caption="USART1 Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
-                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"
-                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT_MEGARF"/>
                     <bitfield caption="Parity Mode" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
                     <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
@@ -772,10 +678,8 @@
                 <value caption="9-bit" name="VAL_7" value="7"/>
             </value-group>
             <value-group caption="" name="USART_CLK_POLARITY_BITF">
-                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)"
-                       name="VAL_0" value="0"/>
-                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)"
-                       name="VAL_1" value="1"/>
+                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)" name="VAL_0" value="0"/>
+                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)" name="VAL_1" value="1"/>
             </value-group>
         </module>
         <module caption="Two Wire Serial Interface" name="TWI">
@@ -813,40 +717,26 @@
                 <value caption="SLA+W has been transmitted; ACK has been received." name="VAL_0x18" value="0x18"/>
                 <value caption="SLA+W has been transmitted; NOT ACK has been received." name="VAL_0x20" value="0x20"/>
                 <value caption="Data byte has been transmitted; ACK has been received." name="VAL_0x28" value="0x28"/>
-                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30"
-                       value="0x30"/>
-                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)."
-                       name="VAL_0x38" value="0x38"/>
+                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30" value="0x30"/>
+                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)." name="VAL_0x38" value="0x38"/>
                 <value caption="SLA+R has been transmitted; ACK has been received." name="VAL_0x40" value="0x40"/>
                 <value caption="SLA+R has been transmitted; NOT ACK has been received." name="VAL_0x48" value="0x48"/>
                 <value caption="Data byte has been received; ACK has been returned." name="VAL_0x50" value="0x50"/>
                 <value caption="Data byte has been received; NOT ACK has been returned." name="VAL_0x58" value="0x58"/>
                 <value caption="Own SLA+W has been received; ACK has been returned." name="VAL_0x60" value="0x60"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned."
-                       name="VAL_0x68" value="0x68"/>
-                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70"
-                       value="0x70"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned."
-                       name="VAL_0x78" value="0x78"/>
-                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned."
-                       name="VAL_0x80" value="0x80"/>
-                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned."
-                       name="VAL_0x88" value="0x88"/>
-                <value caption="Previously addressed with general call; data has been received; ACK has been returned."
-                       name="VAL_0x90" value="0x90"/>
-                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned."
-                       name="VAL_0x98" value="0x98"/>
-                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave."
-                       name="VAL_0xA0" value="0xA0"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned." name="VAL_0x68" value="0x68"/>
+                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70" value="0x70"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned." name="VAL_0x78" value="0x78"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned." name="VAL_0x80" value="0x80"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned." name="VAL_0x88" value="0x88"/>
+                <value caption="Previously addressed with general call; data has been received; ACK has been returned." name="VAL_0x90" value="0x90"/>
+                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned." name="VAL_0x98" value="0x98"/>
+                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave." name="VAL_0xA0" value="0xA0"/>
                 <value caption="Own SLA+R has been received; ACK has been returned." name="VAL_0xA8" value="0xA8"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned."
-                       name="VAL_0xB0" value="0xB0"/>
-                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8"
-                       value="0xB8"/>
-                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0"
-                       value="0xC0"/>
-                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received."
-                       name="VAL_0xC8" value="0xC8"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned." name="VAL_0xB0" value="0xB0"/>
+                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8" value="0xB8"/>
+                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0" value="0xC0"/>
+                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received." name="VAL_0xC8" value="0xC8"/>
                 <value caption="No relevant state information available; TWINT = 0." name="VAL_0xF8" value="0xF8"/>
             </value-group>
             <value-group caption="" name="COMM_TWI_PRESACLE">
@@ -865,8 +755,7 @@
                     <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
                     <bitfield caption="Clock polarity" mask="0x08" name="CPOL" values="SPI_CPOL_BITF"/>
                     <bitfield caption="Clock Phase" mask="0x04" name="CPHA" values="SPI_CPHA_BITF"/>
-                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR"
-                              values="COMM_SCK_RATE_SPI2X"/>
+                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR" values="COMM_SCK_RATE_SPI2X"/>
                 </register>
                 <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
                     <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
@@ -877,8 +766,7 @@
                 <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
             </register-group>
             <register-group caption="Serial Peripheral Interface" name="USART0_SPI">
-                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
-                          ocd-rw="R">
+                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
@@ -897,8 +785,7 @@
                 </register>
             </register-group>
             <register-group caption="Serial Peripheral Interface" name="USART1_SPI">
-                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
-                          ocd-rw="R">
+                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
@@ -970,10 +857,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Register" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -990,14 +875,11 @@
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Reserved" mask="0xF8" name="Res"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Reserved" mask="0xF8" name="Res"/>
                     <bitfield caption="Timer/Counter0 Output Compare B Match Flag" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare A Match Flag" mask="0x02" name="OCF0A"/>
@@ -1047,14 +929,11 @@
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
                     <bitfield caption="Output Compare Flag 2 B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2 A" mask="0x02" name="OCF2A"/>
@@ -1074,19 +953,15 @@
                     <bitfield caption="Clock Select" mask="0x07" name="CS2" values="TC2_CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input for AMR" mask="0x80" name="EXCLKAMR"/>
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Timer/Counter2 Asynchronous Mode" mask="0x20" name="AS2"/>
                     <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08"
-                              name="OCR2AUB"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04"
-                              name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04" name="OCR2BUB"/>
                     <bitfield caption="Timer/Counter2 Control Register A Update Busy" mask="0x02" name="TCR2AUB"/>
                     <bitfield caption="Timer/Counter2 Control Register B Update Busy" mask="0x01" name="TCR2BUB"/>
                 </register>
@@ -1133,8 +1008,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1155,20 +1029,16 @@
         <module caption="Timer/Counter, 16-bit" name="TC16">
             <register-group caption="Timer/Counter, 16-bit" name="TC5">
                 <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C"
-                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C" values="TC4_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
                     <bitfield caption="Input Capture 5 Noise Canceller" mask="0x80" name="ICNC5"/>
                     <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS5" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter5 Control Register C" name="TCCR5C" offset="0x122" size="1">
@@ -1178,26 +1048,18 @@
                     <bitfield caption="Reserved" mask="0x1F" name="Res"/>
                 </register>
                 <register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
                     <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
-                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE5C"/>
-                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE5B"/>
-                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE5A"/>
                     <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
                 </register>
-                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1" ocd-rw="">
                     <bitfield caption="Timer/Counter5 Input Capture Flag" mask="0x20" name="ICF5"/>
                     <bitfield caption="Timer/Counter5 Output Compare C Match Flag" mask="0x08" name="OCF5C"/>
                     <bitfield caption="Timer/Counter5 Output Compare B Match Flag" mask="0x04" name="OCF5B"/>
@@ -1207,20 +1069,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC4">
                 <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C"
-                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C" values="TC4_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
                     <bitfield caption="Input Capture 4 Noise Canceller" mask="0x80" name="ICNC4"/>
                     <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS4" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
@@ -1230,26 +1088,18 @@
                     <bitfield caption="Reserved" mask="0x1F" name="Res"/>
                 </register>
                 <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
                     <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
-                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE4C"/>
-                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE4B"/>
-                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE4A"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1" ocd-rw="">
                     <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
                     <bitfield caption="Timer/Counter4 Output Compare C Match Flag" mask="0x08" name="OCF4C"/>
                     <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
@@ -1259,20 +1109,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC3">
                 <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C"
-                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C" values="TC1_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
                     <bitfield caption="Input Capture 3 Noise Canceller" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
@@ -1282,26 +1128,18 @@
                     <bitfield caption="Reserved" mask="0x1F" name="Res"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
                     <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
@@ -1311,20 +1149,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C"
-                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C" values="TC1_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
                     <bitfield caption="Input Capture 1 Noise Canceller" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
@@ -1334,26 +1168,18 @@
                     <bitfield caption="Reserved" mask="0x1F" name="Res"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare C Match Flag" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
@@ -1398,10 +1224,8 @@
             <value-group caption="" name="TC1_COMNX_BITF">
                 <value caption="Normal port operation, OCnA/OCnB/OCnC disconnected." name="VAL_0" value="0"/>
                 <value caption="Toggle OCnA/OCnB/OCnC on Compare Match." name="VAL_1" value="1"/>
-                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2"
-                       value="2"/>
-                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3"
-                       value="3"/>
+                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2" value="2"/>
+                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3" value="3"/>
             </value-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT_MEGARF">
                 <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
@@ -1422,106 +1246,75 @@
                     <bitfield caption="Power Amplifier Ramp Down Frequency Inversion" mask="0x02" name="PARDFI"/>
                     <bitfield caption="Power Amplifier Ramp Up Frequency Inversion" mask="0x01" name="PARUFI"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L"
-                          offset="0x10E" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L" offset="0x10E" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 0" mask="0xFF" name="MAFSA0L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H"
-                          offset="0x10F" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H" offset="0x10F" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 0" mask="0xFF" name="MAFSA0H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)"
-                          name="MAFPA0L" offset="0x110" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF"
-                              name="MAFPA0L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)" name="MAFPA0L" offset="0x110" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF" name="MAFPA0L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)"
-                          name="MAFPA0H" offset="0x111" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF"
-                              name="MAFPA0H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)" name="MAFPA0H" offset="0x111" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF" name="MAFPA0H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L"
-                          offset="0x112" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L" offset="0x112" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 1" mask="0xFF" name="MAFSA1L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H"
-                          offset="0x113" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H" offset="0x113" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 1" mask="0xFF" name="MAFSA1H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)"
-                          name="MAFPA1L" offset="0x114" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF"
-                              name="MAFPA1L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)" name="MAFPA1L" offset="0x114" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF" name="MAFPA1L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)"
-                          name="MAFPA1H" offset="0x115" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF"
-                              name="MAFPA1H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)" name="MAFPA1H" offset="0x115" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF" name="MAFPA1H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L"
-                          offset="0x116" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L" offset="0x116" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 2" mask="0xFF" name="MAFSA2L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H"
-                          offset="0x117" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H" offset="0x117" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 2" mask="0xFF" name="MAFSA2H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)"
-                          name="MAFPA2L" offset="0x118" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF"
-                              name="MAFPA2L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)" name="MAFPA2L" offset="0x118" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF" name="MAFPA2L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)"
-                          name="MAFPA2H" offset="0x119" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF"
-                              name="MAFPA2H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)" name="MAFPA2H" offset="0x119" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF" name="MAFPA2H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L"
-                          offset="0x11A" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L" offset="0x11A" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 3" mask="0xFF" name="MAFSA3L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H"
-                          offset="0x11B" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H" offset="0x11B" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 3" mask="0xFF" name="MAFSA3H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)"
-                          name="MAFPA3L" offset="0x11C" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF"
-                              name="MAFPA3L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)" name="MAFPA3L" offset="0x11C" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF" name="MAFPA3L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)"
-                          name="MAFPA3H" offset="0x11D" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF"
-                              name="MAFPA3H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)" name="MAFPA3H" offset="0x11D" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF" name="MAFPA3H"/>
                 </register>
-                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C"
-                          size="1">
+                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C" size="1">
                     <bitfield caption="Reserved Bit" mask="0xF0" name="Res"/>
                     <bitfield caption="Multiple Address Filter 3 Enable" mask="0x08" name="MAF3EN"/>
                     <bitfield caption="Multiple Address Filter 2 Enable" mask="0x04" name="MAF2EN"/>
                     <bitfield caption="Multiple Address Filter 1 Enable" mask="0x02" name="MAF1EN"/>
                     <bitfield caption="Multiple Address Filter 0 Enable" mask="0x01" name="MAF0EN"/>
                 </register>
-                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D"
-                          size="1">
+                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D" size="1">
                     <bitfield caption="Set Data Pending bit for address filter 3." mask="0x80" name="AACK_3_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40"
-                              name="AACK_3_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40" name="AACK_3_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 2." mask="0x20" name="AACK_2_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10"
-                              name="AACK_2_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10" name="AACK_2_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 1." mask="0x08" name="AACK_1_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04"
-                              name="AACK_1_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04" name="AACK_1_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 0." mask="0x02" name="AACK_0_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01"
-                              name="AACK_0_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01" name="AACK_0_I_AM_COORD"/>
                 </register>
                 <register caption="AES Control Register" name="AES_CTRL" offset="0x13C" size="1">
                     <bitfield caption="Request AES Operation." mask="0x80" name="AES_REQUEST"/>
                     <bitfield caption="Set AES Operation Mode" mask="0x20" name="AES_MODE" values="AES_MODE_BITF"/>
-                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR"
-                              values="AES_DIRECTION_BITF"/>
+                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR" values="AES_DIRECTION_BITF"/>
                     <bitfield caption="AES Interrupt Enable" mask="0x04" name="AES_IM"/>
                 </register>
                 <register caption="AES Status Register" name="AES_STATUS" offset="0x13D" size="1" ocd-rw="R">
@@ -1532,8 +1325,7 @@
                 <register caption="AES Plain and Cipher Text Buffer Register" name="AES_STATE" offset="0x13E" size="1">
                     <bitfield caption="AES Plain and Cipher Text Buffer" mask="0xFF" name="AES_STATE"/>
                 </register>
-                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F"
-                          size="1">
+                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F" size="1">
                     <bitfield caption="AES Encryption/Decryption Key Buffer" mask="0xFF" name="AES_KEY"/>
                 </register>
                 <register caption="Transceiver Status Register" name="TRX_STATUS" offset="0x141" size="1" ocd-rw="R">
@@ -1560,25 +1352,19 @@
                     <bitfield caption="Enable PLL TX filter" mask="0x10" name="PLL_TX_FLT"/>
                     <bitfield caption="Reserved" mask="0x0F" name="Res"/>
                 </register>
-                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145"
-                          size="1">
+                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145" size="1">
                     <bitfield caption="Reserved" mask="0xF0" name="Res"/>
                     <bitfield caption="Transmit Power Setting" mask="0x0F" name="TX_PWR" values="TX_PWR_bitf"/>
                 </register>
-                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1"
-                          ocd-rw="R">
-                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID"
-                              values="RX_CRC_VALID_bitf"/>
+                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1" ocd-rw="R">
+                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID" values="RX_CRC_VALID_bitf"/>
                     <bitfield caption="Random Value" mask="0x60" name="RND_VALUE"/>
-                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI"
-                              values="RSSI_VALUE_BITF"/>
+                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI" values="RSSI_VALUE_BITF"/>
                 </register>
-                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147"
-                          size="1" ocd-rw="R">
+                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147" size="1" ocd-rw="R">
                     <bitfield caption="Energy Detection Level" mask="0xFF" name="ED_LEVEL" values="ED_LEVEL_BITF"/>
                 </register>
-                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA"
-                          offset="0x148" size="1">
+                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA" offset="0x148" size="1">
                     <bitfield caption="Manual CCA Measurement Request" mask="0x80" name="CCA_REQUEST"/>
                     <bitfield caption="Select CCA Measurement Mode" mask="0x60" name="CCA_MODE" values="CCA_MODE_bitf"/>
                     <bitfield caption="RX/TX Channel Selection" mask="0x1F" name="CHANNEL" values="CHANNEL_bitf"/>
@@ -1588,29 +1374,22 @@
                     <bitfield caption="ED Threshold Level for CCA Measurement" mask="0x0F" name="CCA_ED_THRES"/>
                 </register>
                 <register caption="Transceiver Receive Control Register" name="RX_CTRL" offset="0x14A" size="1">
-                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES"
-                              values="PDT_THRES_bitf"/>
+                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES" values="PDT_THRES_bitf"/>
                 </register>
                 <register caption="Start of Frame Delimiter Value Register" name="SFD_VALUE" offset="0x14B" size="1">
-                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE"
-                              values="SFD_VALUE_BITF"/>
+                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE" values="SFD_VALUE_BITF"/>
                 </register>
                 <register caption="Transceiver Control Register 2" name="TRX_CTRL_2" offset="0x14C" size="1">
                     <bitfield caption="RX Safe Mode" mask="0x80" name="RX_SAFE_MODE"/>
                     <bitfield caption="Reserved" mask="0x7C" name="Res"/>
-                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE"
-                              values="OQPSK_DATA_RATE_bitf"/>
+                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE" values="OQPSK_DATA_RATE_bitf"/>
                 </register>
                 <register caption="Antenna Diversity Control Register" name="ANT_DIV" offset="0x14D" size="1">
-                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL"
-                              values="ANT_SEL_bitf"/>
+                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL" values="ANT_SEL_bitf"/>
                     <bitfield caption="Reserved" mask="0x70" name="Res"/>
-                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN"
-                              values="ANT_DIV_EN_bitf"/>
-                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN"
-                              values="ANT_EXT_SW_EN_bitf"/>
-                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL"
-                              values="ANT_CTRL_bitf"/>
+                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN" values="ANT_DIV_EN_bitf"/>
+                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN" values="ANT_EXT_SW_EN_bitf"/>
+                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL" values="ANT_CTRL_bitf"/>
                 </register>
                 <register caption="Transceiver Interrupt Enable Register" name="IRQ_MASK" offset="0x14E" size="1">
                     <bitfield caption="Awake Interrupt Enable" mask="0x80" name="AWAKE_EN"/>
@@ -1634,14 +1413,10 @@
                 </register>
                 <register caption="Transceiver Interrupt Enable Register 1" name="IRQ_MASK1" offset="0xBE" size="1">
                     <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10"
-                              name="MAF_3_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08"
-                              name="MAF_2_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04"
-                              name="MAF_1_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02"
-                              name="MAF_0_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10" name="MAF_3_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08" name="MAF_2_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04" name="MAF_1_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02" name="MAF_0_AMI_EN"/>
                     <bitfield caption="Transmit Start Interrupt enable" mask="0x01" name="TX_START_EN"/>
                 </register>
                 <register caption="Transceiver Interrupt Status Register 1" name="IRQ_STATUS1" offset="0xBF" size="1">
@@ -1652,29 +1427,22 @@
                     <bitfield caption="Address Match Interrupt Status Address filter 0" mask="0x02" name="MAF_0_AMI"/>
                     <bitfield caption="Transmit Start Interrupt Status" mask="0x01" name="TX_START"/>
                 </register>
-                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150"
-                          size="1">
-                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT"
-                              values="AVREG_EXT_BITF"/>
+                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150" size="1">
+                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT" values="AVREG_EXT_BITF"/>
                     <bitfield caption="AVDD Supply Voltage Valid" mask="0x40" name="AVDD_OK" values="AVDD_OK_BITF"/>
-                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT"
-                              values="DVREG_EXT_BITF"/>
+                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT" values="DVREG_EXT_BITF"/>
                     <bitfield caption="DVDD Supply Voltage Valid" mask="0x04" name="DVDD_OK" values="DVDD_OK_BITF"/>
                 </register>
                 <register caption="Battery Monitor Control and Status Register" name="BATMON" offset="0x151" size="1">
                     <bitfield caption="Battery Monitor Interrupt Status" mask="0x80" name="BAT_LOW"/>
                     <bitfield caption="Battery Monitor Interrupt Enable" mask="0x40" name="BAT_LOW_EN"/>
                     <bitfield caption="Battery Monitor Status" mask="0x20" name="BATMON_OK" values="BATMON_OK_bitf"/>
-                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR"
-                              values="BATMON_HR_bitf"/>
-                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH"
-                              values="BATMON_VTH_bitf"/>
+                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR" values="BATMON_HR_bitf"/>
+                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH" values="BATMON_VTH_bitf"/>
                 </register>
                 <register caption="Crystal Oscillator Control Register" name="XOSC_CTRL" offset="0x152" size="1">
-                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE"
-                              values="XTAL_MODE_BITF"/>
-                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM"
-                              values="XTAL_TRIM_bitf"/>
+                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE" values="XTAL_MODE_BITF"/>
+                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM" values="XTAL_TRIM_bitf"/>
                 </register>
                 <register caption="Channel Control Register 0" name="CC_CTRL_0" offset="0x153" size="1">
                     <bitfield caption="Channel Number" mask="0xFF" name="CC_NUMBER"/>
@@ -1682,55 +1450,43 @@
                 <register caption="Channel Control Register 1" name="CC_CTRL_1" offset="0x154" size="1">
                     <bitfield caption="Channel Band" mask="0x0F" name="CC_BAND"/>
                 </register>
-                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155"
-                          size="1">
+                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155" size="1">
                     <bitfield caption="Prevent Frame Reception" mask="0x80" name="RX_PDT_DIS"/>
                     <bitfield caption="Receiver Override Function" mask="0x40" name="RX_OVERRIDE"/>
                     <bitfield caption="Reserved" mask="0x30" name="Res"/>
-                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL"
-                              values="RX_PDT_LEVEL_BITF"/>
+                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL" values="RX_PDT_LEVEL_BITF"/>
                 </register>
-                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156"
-                          size="1">
-                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL"
-                              values="RX_RPC_CTRL_BITF"/>
+                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156" size="1">
+                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL" values="RX_RPC_CTRL_BITF"/>
                     <bitfield caption="Reciver Smart Receiving Mode Enable" mask="0x20" name="RX_RPC_EN"/>
                     <bitfield caption="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10" name="PDT_RPC_EN"/>
                     <bitfield caption="PLL Smart Receiving Mode Enable" mask="0x08" name="PLL_RPC_EN"/>
                     <bitfield caption="Reserved" mask="0x04" name="Res0"/>
                     <bitfield caption="Smart Receiving Mode IPAN Handling Enable" mask="0x02" name="IPAN_RPC_EN"/>
-                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01"
-                              name="XAH_RPC_EN"/>
+                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01" name="XAH_RPC_EN"/>
                 </register>
-                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157"
-                          size="1">
+                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157" size="1">
                     <bitfield caption="Filter Reserved Frames" mask="0x20" name="AACK_FLTR_RES_FT"/>
                     <bitfield caption="Process Reserved Frames" mask="0x10" name="AACK_UPLD_RES_FT"/>
-                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME"
-                              values="AACK_ACK_TIME_bitf"/>
+                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME" values="AACK_ACK_TIME_bitf"/>
                     <bitfield caption="Enable Promiscuous Mode" mask="0x02" name="AACK_PROM_MODE"/>
                 </register>
                 <register caption="Transceiver Filter Tuning Control Register" name="FTN_CTRL" offset="0x158" size="1">
                     <bitfield caption="Start Calibration Loop of Filter Tuning Network" mask="0x80" name="FTN_START"/>
                 </register>
-                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF"
-                          offset="0x15A" size="1">
+                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF" offset="0x15A" size="1">
                     <bitfield caption="Start Center Frequency Calibration" mask="0x80" name="PLL_CF_START"/>
                 </register>
-                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B"
-                          size="1">
+                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B" size="1">
                     <bitfield caption="Start Delay Cell Calibration" mask="0x80" name="PLL_DCU_START"/>
                 </register>
-                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1"
-                          ocd-rw="R">
+                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1" ocd-rw="R">
                     <bitfield caption="Part Number" mask="0xFF" name="PART_NUM" values="PART_NUM_bitf"/>
                 </register>
-                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D"
-                          size="1" ocd-rw="R">
+                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D" size="1" ocd-rw="R">
                     <bitfield caption="Version Number" mask="0xFF" name="VERSION_NUM" values="VERSION_NUM_2_BITF"/>
                 </register>
-                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0"
-                          offset="0x15E" size="1" ocd-rw="R">
+                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0" offset="0x15E" size="1" ocd-rw="R">
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x80" name="MAN_ID_07"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x40" name="MAN_ID_06"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x20" name="MAN_ID_05"/>
@@ -1740,13 +1496,10 @@
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x02" name="MAN_ID_01"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x01" name="MAN_ID_00" values="MAN_ID_0_BITF"/>
                 </register>
-                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1"
-                          offset="0x15F" size="1" ocd-rw="R">
-                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF"
-                              lsb="10"/>
+                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1" offset="0x15F" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF" lsb="10"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160"
-                          size="1">
+                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160" size="1">
                     <bitfield caption="MAC Short Address" mask="0x80" name="SHORT_ADDR_07"/>
                     <bitfield caption="MAC Short Address" mask="0x40" name="SHORT_ADDR_06"/>
                     <bitfield caption="MAC Short Address" mask="0x20" name="SHORT_ADDR_05"/>
@@ -1756,12 +1509,10 @@
                     <bitfield caption="MAC Short Address" mask="0x02" name="SHORT_ADDR_01"/>
                     <bitfield caption="MAC Short Address" mask="0x01" name="SHORT_ADDR_00"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1"
-                          offset="0x161" size="1">
+                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1" offset="0x161" size="1">
                     <bitfield caption="MAC Short Address" mask="0xFF" name="SHORT_ADDR_" lsb="10"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0"
-                          offset="0x162" size="1">
+                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0" offset="0x162" size="1">
                     <bitfield caption="MAC Personal Area Network ID" mask="0x80" name="PAN_ID_07"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x40" name="PAN_ID_06"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x20" name="PAN_ID_05"/>
@@ -1771,8 +1522,7 @@
                     <bitfield caption="MAC Personal Area Network ID" mask="0x02" name="PAN_ID_01"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x01" name="PAN_ID_00"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1"
-                          offset="0x163" size="1">
+                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1" offset="0x163" size="1">
                     <bitfield caption="MAC Personal Area Network ID" mask="0xFF" name="PAN_ID_" lsb="10"/>
                 </register>
                 <register caption="Transceiver MAC IEEE Address Register 0" name="IEEE_ADDR_0" offset="0x164" size="1">
@@ -1806,17 +1556,12 @@
                 <register caption="Transceiver MAC IEEE Address Register 7" name="IEEE_ADDR_7" offset="0x16B" size="1">
                     <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="70"/>
                 </register>
-                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0"
-                          offset="0x16C" size="1">
-                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0"
-                              name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
-                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E"
-                              name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
-                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION"
-                              values="SLOTTED_OPERATION_BITF"/>
+                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0" offset="0x16C" size="1">
+                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0" name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
+                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E" name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
+                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION" values="SLOTTED_OPERATION_BITF"/>
                 </register>
-                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0"
-                          offset="0x16D" size="1">
+                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0" offset="0x16D" size="1">
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x80" name="CSMA_SEED_07"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x40" name="CSMA_SEED_06"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x20" name="CSMA_SEED_05"/>
@@ -1826,27 +1571,21 @@
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x02" name="CSMA_SEED_01"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x01" name="CSMA_SEED_00"/>
                 </register>
-                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1"
-                          offset="0x16E" size="1">
-                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE"
-                              values="AACK_FVN_MODE_bitf"/>
+                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1" offset="0x16E" size="1">
+                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE" values="AACK_FVN_MODE_bitf"/>
                     <bitfield caption="Set Frame Pending Sub-field" mask="0x20" name="AACK_SET_PD"/>
                     <bitfield caption="Disable Acknowledgment Frame Transmission" mask="0x10" name="AACK_DIS_ACK"/>
                     <bitfield caption="Set Personal Area Network Coordinator" mask="0x08" name="AACK_I_AM_COORD"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x07" name="CSMA_SEED_1"/>
                 </register>
-                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F"
-                          size="1">
+                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F" size="1">
                     <bitfield caption="Maximum Back-off Exponent" mask="0xF0" name="MAX_BE" values="MAX_BE_bitf"/>
                     <bitfield caption="Minimum Back-off Exponent" mask="0x0F" name="MIN_BE" values="MIN_BE_bitf"/>
                 </register>
-                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176"
-                          size="1">
-                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG"
-                              values="TST_CTRL_DIG_BITF"/>
+                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176" size="1">
+                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG" values="TST_CTRL_DIG_BITF"/>
                 </register>
-                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B"
-                          size="1">
+                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B" size="1">
                     <bitfield caption="Received Frame Length" mask="0xFF" name="RX_LENGTH"/>
                 </register>
                 <register caption="Start of frame buffer" name="TRXFBST" offset="0x180" size="1" mask="0xFF"/>
@@ -1985,10 +1724,8 @@
                 <value caption="2480 MHz" name="F_2480MHZ" value="26"/>
             </value-group>
             <value-group caption="" name="PDT_THRES_bitf">
-                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled"
-                       name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
-                <value caption="Recommended correlator threshold for Antenna Diversity operation"
-                       name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
+                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled" name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
+                <value caption="Recommended correlator threshold for Antenna Diversity operation" name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
             </value-group>
             <value-group caption="" name="SFD_VALUE_BITF">
                 <value caption="IEEE 802.15.4 compliant value of the SFD" name="IEEE_SFD" value="0xA7"/>
@@ -2015,28 +1752,22 @@
                 <value caption="Reserved" name="VAL_0" value="0"/>
                 <value caption="Antenna 1: DIG1=H, DIG2=L" name="ANT_1" value="1"/>
                 <value caption="Antenna 0: DIG1=L, DIG2=H" name="ANT_0" value="2"/>
-                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity"
-                       name="ANT_RESET" value="3"/>
+                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity" name="ANT_RESET" value="3"/>
             </value-group>
             <value-group caption="" name="AVREG_EXT_BITF">
-                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT"
-                       value="0"/>
-                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section."
-                       name="AVDD_EXT" value="1"/>
+                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT" value="0"/>
+                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section." name="AVDD_EXT" value="1"/>
             </value-group>
             <value-group caption="" name="AVDD_OK_BITF">
                 <value caption="Analog voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
                 <value caption="Analog supply voltage has settled" name="VAL_1" value="1"/>
             </value-group>
             <value-group caption="" name="DVREG_EXT_BITF">
-                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT"
-                       value="0"/>
-                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section."
-                       name="DVDD_EXT" value="1"/>
+                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT" value="0"/>
+                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section." name="DVDD_EXT" value="1"/>
             </value-group>
             <value-group caption="" name="DVDD_OK_BITF">
-                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0"
-                       value="0"/>
+                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
                 <value caption="Digital supply voltage has settled" name="VAL_1" value="1"/>
             </value-group>
             <value-group caption="" name="BATMON_OK_bitf">
@@ -2066,10 +1797,8 @@
                 <value caption="3.675V / 2.45V (BATMON_HR=1/0)" name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="XTAL_MODE_BITF">
-                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4"
-                       value="0x4"/>
-                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled."
-                       name="VAL_0xF" value="0xF"/>
+                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4" value="0x4"/>
+                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled." name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="XTAL_TRIM_bitf">
                 <value caption="0.0 pF, trimming capacitors disconnected" name="XTAL_TRIM_MIN" value="0x0"/>
@@ -2078,21 +1807,17 @@
                 <value caption="4.5 pF, trimming capacitor switched on" name="XTAL_TRIM_MAX" value="0xF"/>
             </value-group>
             <value-group caption="" name="RX_PDT_LEVEL_BITF">
-                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered"
-                       name="RX_PDT_LEVEL_MIN" value="0x0"/>
+                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered" name="RX_PDT_LEVEL_MIN" value="0x0"/>
                 <value caption="RX_THRES &gt; RSSI_BASE_VAL + 0 · 3; RSSI &gt; -90 dBm" name="VAL_0x1" value="0x1"/>
                 <value caption="..." name="VAL_0x2" value="0x2"/>
                 <value caption="RX_THRES &gt; RSSI_BASE_VAL + 13 · 3; RSSI &gt; -51 dBm" name="VAL_0xE" value="0xE"/>
-                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX"
-                       value="0xF"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX" value="0xF"/>
             </value-group>
             <value-group caption="" name="RX_RPC_CTRL_BITF">
-                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0"
-                       value="0"/>
+                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0" value="0"/>
                 <value caption="Reserved" name="VAL_1" value="1"/>
                 <value caption="Reserved" name="VAL_2" value="2"/>
-                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3"
-                       value="3"/>
+                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3" value="3"/>
             </value-group>
             <value-group caption="" name="AACK_ACK_TIME_bitf">
                 <value caption="12 symbols acknowledgment time" name="AACK_ACK_TIME_12_SYM" value="0"/>
@@ -2110,12 +1835,10 @@
                 <value caption="Revision D" name="REV_D" value="4"/>
             </value-group>
             <value-group caption="" name="MAN_ID_0_BITF">
-                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F"
-                       name="ATMEL_BYTE_0" value="0x1f"/>
+                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F" name="ATMEL_BYTE_0" value="0x1f"/>
             </value-group>
             <value-group caption="" name="MAN_ID_1_BITF">
-                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F"
-                       name="ATMEL_BYTE_1" value="0x00"/>
+                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F" name="ATMEL_BYTE_1" value="0x00"/>
             </value-group>
             <value-group caption="" name="MAX_FRAME_RETRIES_bitf">
                 <value caption="Retransmission of frame is not attempted." name="VAL_0x0" value="0x0"/>
@@ -2132,10 +1855,8 @@
                 <value caption="Immediate frame re-transmission without performing CSMA-CA" name="VAL_0x7" value="0x7"/>
             </value-group>
             <value-group caption="" name="SLOTTED_OPERATION_BITF">
-                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested."
-                       name="SLOTTED_OP_DIS" value="0"/>
-                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller."
-                       name="SLOTTED_OP_EN" value="1"/>
+                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested." name="SLOTTED_OP_DIS" value="0"/>
+                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller." name="SLOTTED_OP_EN" value="1"/>
             </value-group>
             <value-group caption="" name="AACK_FVN_MODE_bitf">
                 <value caption="Acknowledge frames with version number 0" name="VAL_0" value="0"/>
@@ -2146,17 +1867,14 @@
             <value-group caption="" name="MAX_BE_bitf">
                 <value caption="This value is not valid for the maximum back-off exponent." name="VAL_1" value="1"/>
                 <value caption="This value is not valid for the maximum back-off exponent." name="VAL_2" value="2"/>
-                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3"
-                       value="3"/>
+                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3" value="3"/>
                 <value caption="..." name="VAL_4" value="4"/>
-                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8"
-                       value="8"/>
+                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8" value="8"/>
             </value-group>
             <value-group caption="" name="MIN_BE_bitf">
                 <value caption="Minimum value of minimum back-off exponent." name="VAL_0" value="0"/>
                 <value caption="..." name="VAL_1" value="1"/>
-                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE."
-                       name="VAL_8" value="8"/>
+                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE." name="VAL_8" value="8"/>
             </value-group>
             <value-group caption="" name="TST_CTRL_DIG_BITF">
                 <value caption="NORMAL (no test is active)" name="VAL_0" value="0"/>
@@ -2165,104 +1883,76 @@
         </module>
         <module caption="MAC Symbol Counter" name="SYMCNT">
             <register-group caption="MAC Symbol Counter" name="SYMCNT">
-                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH"
-                          offset="0xFC" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF"
-                              name="SCTSTRHH"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH" offset="0xFC" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSTRHH"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL"
-                          offset="0xFB" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF"
-                              name="SCTSTRHL"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL" offset="0xFB" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSTRHL"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH"
-                          offset="0xFA" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF"
-                              name="SCTSTRLH"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH" offset="0xFA" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSTRLH"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL"
-                          offset="0xF9" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF"
-                              name="SCTSTRLL"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL" offset="0xF9" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSTRLL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 HH-Byte" mask="0xFF" name="SCOCR1HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 HL-Byte" mask="0xFF" name="SCOCR1HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 LH-Byte" mask="0xFF" name="SCOCR1LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 LL-Byte" mask="0xFF" name="SCOCR1LL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 HH-Byte" mask="0xFF" name="SCOCR2HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 HL-Byte" mask="0xFF" name="SCOCR2HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 LH-Byte" mask="0xFF" name="SCOCR2LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 LL-Byte" mask="0xFF" name="SCOCR2LL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 HH-Byte" mask="0xFF" name="SCOCR3HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 HL-Byte" mask="0xFF" name="SCOCR3HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 LH-Byte" mask="0xFF" name="SCOCR3LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 LL-Byte" mask="0xFF" name="SCOCR3LL"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSRHH"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSRHL"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSRLH"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSRLL"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register HH-Byte" mask="0xFF" name="SCBTSRHH"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register HL-Byte" mask="0xFF" name="SCBTSRHL"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register LH-Byte" mask="0xFF" name="SCBTSRLH"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register LL-Byte" mask="0xFF" name="SCBTSRLL"/>
                 </register>
                 <register caption="Symbol Counter Register HH-Byte" name="SCCNTHH" offset="0xE4" size="1">
@@ -2296,8 +1986,7 @@
                 <register caption="Symbol Counter Control Register 1" name="SCCR1" offset="0xDD" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res" lsb="5"/>
                     <bitfield caption="Symbol Counter Beacon Timestamp Mask Register" mask="0x20" name="SCBTSM"/>
-                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"
-                              name="SCCKDIV" values="SCCKDIV_BITF"/>
+                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C" name="SCCKDIV" values="SCCKDIV_BITF"/>
                     <bitfield caption="Enable External Clock Source on PG2" mask="0x02" name="SCEECLK"/>
                     <bitfield caption="Backoff Slot Counter enable" mask="0x01" name="SCENBO"/>
                 </register>
@@ -2311,32 +2000,21 @@
                 </register>
                 <register caption="Symbol Counter Compare Source Register" name="SCCSR" offset="0xDB" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"
-                              name="SCCS3" values="SCCS3_BITF"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C"
-                              name="SCCS2" values="SCCS2_BITF"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03"
-                              name="SCCS1" values="SCCS1_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30" name="SCCS3" values="SCCS3_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C" name="SCCS2" values="SCCS2_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03" name="SCCS1" values="SCCS1_BITF"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH"
-                          offset="0xDA" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"
-                              name="SCRSTRHH"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH" offset="0xDA" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF" name="SCRSTRHH"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL"
-                          offset="0xD9" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF"
-                              name="SCRSTRHL"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL" offset="0xD9" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF" name="SCRSTRHL"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH"
-                          offset="0xD8" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF"
-                              name="SCRSTRLH"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH" offset="0xD8" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF" name="SCRSTRLH"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL"
-                          offset="0xD7" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF"
-                              name="SCRSTRLL"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL" offset="0xD7" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF" name="SCRSTRLL"/>
                 </register>
             </register-group>
             <value-group caption="" name="SCCKDIV_BITF">
@@ -2349,28 +2027,19 @@
                 <value caption="Transceiver Clock divided by 4,   (4MHz)" name="VAL_6" value="6"/>
             </value-group>
             <value-group caption="" name="SCCS3_BITF">
-                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
             <value-group caption="" name="SCCS2_BITF">
-                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
             <value-group caption="" name="SCCS1_BITF">
-                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
         </module>
         <module caption="EEPROM" name="EEPROM">
@@ -2406,39 +2075,28 @@
                 </register>
             </register-group>
             <value-group caption="" name="OCDR_DATA_BITF">
-                <value caption="Refer to the debugger documentation for further information on how to use this register."
-                       name="VAL_0" value="0"/>
+                <value caption="Refer to the debugger documentation for further information on how to use this register." name="VAL_0" value="0"/>
             </value-group>
         </module>
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL3"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL3"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
-                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT"
-                              values="INTERRUPT_REQ_ENABLE_BITF"/>
+                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT" values="INTERRUPT_REQ_ENABLE_BITF"/>
                 </register>
                 <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
-                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF"
-                              values="INTERRUPT_EXT_FLAG_BITF"/>
+                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF" values="INTERRUPT_EXT_FLAG_BITF"/>
                 </register>
                 <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
                     <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="16"/>
@@ -2460,12 +2118,9 @@
             </register-group>
             <value-group caption="" name="INTERRUPT_SENSE_CONTROL3">
                 <value caption="The low level of INTn generates an interrupt request." name="VAL_0x00" value="0x00"/>
-                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01"
-                       value="0x01"/>
-                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01" value="0x01"/>
+                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02" value="0x02"/>
+                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="INTERRUPT_REQ_ENABLE_BITF">
                 <value caption="All external pin interrupts are disabled." name="VAL_0x00" value="0x00"/>
@@ -2473,11 +2128,9 @@
             </value-group>
             <value-group caption="" name="INTERRUPT_EXT_FLAG_BITF">
                 <value caption="No edge or logic change on INT7:0 occurred." name="VAL_0x00" value="0x00"/>
-                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request."
-                       name="VAL_0x01" value="0x01"/>
+                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request." name="VAL_0x01" value="0x01"/>
                 <value caption="..." name="VAL_0x02" value="0x02"/>
-                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request."
-                       name="VAL_0x80" value="0x80"/>
+                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request." name="VAL_0x80" value="0x80"/>
             </value-group>
         </module>
         <module caption="Analog-to-Digital Converter" name="ADC">
@@ -2494,8 +2147,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="AVDD Supply Voltage OK" mask="0x80" name="AVDDOK"/>
@@ -2503,12 +2155,10 @@
                     <bitfield caption="Reference Voltage OK" mask="0x20" name="REFOK"/>
                     <bitfield caption="Analog Channel Change" mask="0x10" name="ACCH"/>
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="The ADC Control and Status Register C" name="ADCSRC" offset="0x77" size="1">
-                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT"
-                              values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
+                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT" values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
                     <bitfield caption="Reserved" mask="0x20" name="Res0"/>
                     <bitfield caption="ADC Start-up Time" mask="0x1F" name="ADSUT" values="ANALOG_ADC_STARTUP_TIME"/>
                 </register>
@@ -2536,10 +2186,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF9">
                 <value caption="AREF, Internal reference voltage generation turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVDD with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -2620,14 +2268,12 @@
                     <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
                 </register>
                 <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1">
-                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL"
-                              values="OSCCAL_BITF"/>
+                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL" values="OSCCAL_BITF"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
                     <bitfield caption="Reserved" mask="0x70" name="Res"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
                 </register>
                 <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
                     <bitfield caption="Reserved" mask="0xF0" name="Res"/>
@@ -2701,8 +2347,7 @@
                 <value caption="Reserved" name="VAL_0xC" value="0xC"/>
                 <value caption="Reserved" name="VAL_0xD" value="0xD"/>
                 <value caption="Reserved" name="VAL_0xE" value="0xE"/>
-                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed."
-                       name="VAL_0xF" value="0xF"/>
+                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed." name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
                 <value caption="Idle" name="IDLE" value="0x00"/>
@@ -2725,8 +2370,7 @@
             <register-group caption="FLASH Controller" name="FLASH">
                 <register caption="Flash Extended-Mode Control-Register" name="NEMCR" offset="0x75" size="1">
                     <bitfield caption="Enable Extended Address Mode for Extra Rows" mask="0x40" name="ENEAM"/>
-                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM"
-                              values="NEMCR_ADDRESS_BITF"/>
+                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM" values="NEMCR_ADDRESS_BITF"/>
                 </register>
                 <register caption="Reference Voltage Calibration Register" name="BGCR" offset="0x67" size="1">
                     <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
@@ -2782,16 +2426,13 @@
                     <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
                     <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
                 </register>
-                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130"
-                          size="1">
+                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130" size="1">
                     <bitfield caption="Reserved" mask="0xF0" name="Res"/>
                     <bitfield caption="Low-Byte Data Register Bits" mask="0x0F" name="LLDRL" values="LLDRL_VALUE_BITF"/>
                 </register>
-                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131"
-                          size="1">
+                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131" size="1">
                     <bitfield caption="Reserved" mask="0xE0" name="Res"/>
-                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH"
-                              values="LLDRH_VALUE_BITF"/>
+                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH" values="LLDRH_VALUE_BITF"/>
                 </register>
                 <register caption="Low Leakage Voltage Regulator Control Register" name="LLCR" offset="0x12F" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
@@ -2817,16 +2458,12 @@
                 </register>
             </register-group>
             <value-group caption="" name="LLDRL_VALUE_BITF">
-                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08"
-                       value="0x08"/>
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00" value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08" value="0x08"/>
             </value-group>
             <value-group caption="" name="LLDRH_VALUE_BITF">
-                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10"
-                       value="0x10"/>
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00" value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10" value="0x10"/>
             </value-group>
             <value-group caption="" name="PAD_IO_bitf">
                 <value caption="2 mA" name="PAD_IO_2MA" value="0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128A.xml
index 66cdb225..e0a95ce4 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128A.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega128A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
-                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega128A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega128A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64" package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega128A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega128A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
-                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -36,8 +29,7 @@
                 <memory-segment name="XRAM" start="0x1100" size="0xef00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
@@ -47,8 +39,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -57,8 +48,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="MISO" function="default" pad="PB3"/>
                         <signal group="MOSI" function="default" pad="PB2"/>
@@ -69,8 +59,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PD1"/>
                         <signal group="SCL" function="default" pad="PD0"/>
@@ -79,8 +68,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" function="default" pad="PE0"/>
                         <signal group="TXD" function="default" pad="PE1"/>
@@ -88,8 +76,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" function="default" pad="PD2"/>
                         <signal group="TXD" function="default" pad="PD3"/>
@@ -99,8 +86,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -108,14 +94,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -126,8 +110,7 @@
             </module>
             <module name="MISC">
                 <instance name="MISC" caption="Other Registers">
-                    <register-group name="MISC" name-in-module="MISC" offset="0x00" address-space="data"
-                                    caption="Other Registers"/>
+                    <register-group name="MISC" name-in-module="MISC" offset="0x00" address-space="data" caption="Other Registers"/>
                     <signals>
                         <signal group="PDI" function="default" pad="PE0"/>
                         <signal group="PDO" function="default" pad="PE1"/>
@@ -158,8 +141,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="0" function="default" pad="PD0"/>
                         <signal group="INT" index="1" function="default" pad="PD1"/>
@@ -174,14 +156,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -194,8 +174,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -208,8 +187,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -222,8 +200,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -236,8 +213,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -250,8 +226,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -264,8 +239,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -277,8 +251,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC0" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OC" function="default" pad="PB4"/>
                     </signals>
@@ -286,8 +259,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB5"/>
                         <signal group="OCB" function="default" pad="PB6"/>
@@ -297,8 +269,7 @@
                     </signals>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PE3"/>
                         <signal group="OCB" function="default" pad="PE4"/>
@@ -309,8 +280,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC2" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD7"/>
                         <signal group="OC" function="default" pad="PB7"/>
@@ -319,14 +289,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -341,20 +309,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -446,8 +411,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -508,8 +472,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -553,8 +516,7 @@
                     <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x10" name="CKOPT"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
-                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
                     <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
                 </register>
@@ -567,116 +529,61 @@
                 <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
-                       value="0x01"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
-                       value="0x11"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS"
-                       value="0x21"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
-                       value="0x02"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
-                       value="0x12"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
-                       value="0x22"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
-                       value="0x04"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
-                       value="0x14"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
-                       value="0x24"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
-                       value="0x09"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
-                       value="0x19"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
-                       value="0x29"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS" value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS" value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS" value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS" value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS" value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS" value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS" value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS" value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS" value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS" value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS" value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms" name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms" name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms" name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms" name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms" name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms" name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms" name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms" name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms" name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms" name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms" name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms" name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms" name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms" name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms" name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms" name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms" name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms" name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms" name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms" name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms" name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms" name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms" name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms" name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
@@ -716,16 +623,14 @@
                 <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -823,8 +728,7 @@
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
                     <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
                 </register>
-                <register caption="USART Baud Rate Register Hight Byte" name="UBRR0H" offset="0x90" size="1"
-                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR0H" offset="0x90" size="1" mask="0x0F"/>
                 <register caption="USART Baud Rate Register Low Byte" name="UBRR0L" offset="0x29" size="1" mask="0xFF"/>
             </register-group>
             <register-group caption="USART" name="USART1">
@@ -856,8 +760,7 @@
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
                     <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
                 </register>
-                <register caption="USART Baud Rate Register Hight Byte" name="UBRR1H" offset="0x98" size="1"
-                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR1H" offset="0x98" size="1" mask="0x0F"/>
                 <register caption="USART Baud Rate Register Low Byte" name="UBRR1L" offset="0x99" size="1" mask="0xFF"/>
             </register-group>
             <value-group caption="" name="COMM_USART_MODE">
@@ -907,8 +810,7 @@
                 </register>
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x6D" size="1">
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x0C" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x0C" name="SRW0" values="CPU_WAIT_STATES"/>
                     <bitfield caption="Wait state select bit upper page" mask="0x02" name="SRW11"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x6C" size="1">
@@ -937,8 +839,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
                 <value value="0x00" caption="1.0 MHz " name="1_0_MHz_"/>
@@ -970,8 +871,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x42" size="1"
-                          ocd-rw="">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x42" size="1" ocd-rw="">
                     <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
@@ -987,32 +887,23 @@
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
                     <bitfield caption="Pull Up Disable" mask="0x04" name="PUD"/>
                     <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x02" name="PSR0"/>
-                    <bitfield caption="Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1" mask="0x01"
-                              name="PSR321"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1" mask="0x01" name="PSR321"/>
                 </register>
             </register-group>
         </module>
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x5A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x59" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1095,8 +986,7 @@
                     <bitfield caption="Timer/Counter Control Register 0 Update Busy" mask="0x01" name="TCR0UB"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
-                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02" name="OCIE0"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
@@ -1129,15 +1019,12 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
-                              name="OCIE1A"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
-                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
-                    <bitfield caption="Timer/Counter 1, Output Compare Match C Interrupt Enable" mask="0x01"
-                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter 1, Output Compare Match C Interrupt Enable" mask="0x01" name="OCIE1C"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
@@ -1145,8 +1032,7 @@
                     <bitfield caption="Output Compare Flag 1B" mask="0x08" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
                 </register>
-                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
-                          ocd-rw="R">
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter 1, Output Compare C Match Flag" mask="0x01" name="OCF1C"/>
                 </register>
                 <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
@@ -1171,28 +1057,20 @@
                     <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x78" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2" mask="0xFFFF"/>
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC3">
                 <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="TICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x10"
-                              name="OCIE3A"/>
-                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x08"
-                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x10" name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x08" name="OCIE3B"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x04" name="TOIE3"/>
-                    <bitfield caption="Timer/Counter3, Output Compare Match Interrupt Enable" mask="0x02"
-                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3, Output Compare Match Interrupt Enable" mask="0x02" name="OCIE3C"/>
                 </register>
-                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
-                          ocd-rw="R">
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3A" mask="0x10" name="OCF3A"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x08" name="OCF3B"/>
@@ -1221,14 +1099,10 @@
                     <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output compare Register C Bytes" name="OCR3C" offset="0x82" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output compare Register C Bytes" name="OCR3C" offset="0x82" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -1283,8 +1157,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1311,8 +1184,7 @@
                     <bitfield caption="ADC Free Running Select" mask="0x20" name="ADFR"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
             </register-group>
@@ -1320,8 +1192,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFA1.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFA1.xml
index 87a12bb1..317a2a01 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFA1.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFA1.xml
@@ -6,16 +6,11 @@
     <device name="ATmega128RFA1" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
-                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0200" size="0x4000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,48 +37,39 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
                 <instance name="USART0_SPI" caption="Serial Peripheral Interface">
-                    <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
                 <instance name="USART1_SPI" caption="Serial Peripheral Interface">
-                    <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="MISSING_PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTB" pad="PB0" index="0"/>
                         <signal group="P" function="PORTB" pad="PB1" index="1"/>
@@ -97,12 +82,10 @@
                     </signals>
                 </instance>
                 <instance name="MISSING_PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTD" pad="PD0" index="0"/>
                         <signal group="P" function="PORTD" pad="PD1" index="1"/>
@@ -115,8 +98,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTE" pad="PE0" index="0"/>
                         <signal group="P" function="PORTE" pad="PE1" index="1"/>
@@ -129,8 +111,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTF" pad="PF0" index="0"/>
                         <signal group="P" function="PORTF" pad="PF1" index="1"/>
@@ -143,8 +124,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTG" pad="PG0" index="0"/>
                         <signal group="P" function="PORTG" pad="PG1" index="1"/>
@@ -157,86 +137,71 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC5" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC4" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TRX24">
                 <instance name="TRX24" caption="Low-Power 2.4 GHz Transceiver">
-                    <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data"
-                                    caption="Low-Power 2.4 GHz Transceiver"/>
+                    <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data" caption="Low-Power 2.4 GHz Transceiver"/>
                 </instance>
             </module>
             <module name="SYMCNT">
                 <instance name="SYMCNT" caption="MAC Symbol Counter">
-                    <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data"
-                                    caption="MAC Symbol Counter"/>
+                    <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data" caption="MAC Symbol Counter"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V3"/>
                     </parameters>
@@ -244,32 +209,27 @@
             </module>
             <module name="FLASH">
                 <instance name="FLASH" caption="FLASH Controller">
-                    <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data"
-                                    caption="FLASH Controller"/>
+                    <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data" caption="FLASH Controller"/>
                 </instance>
             </module>
             <module name="PWRCTRL">
                 <instance name="PWRCTRL" caption="Power Controller">
-                    <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data"
-                                    caption="Power Controller"/>
+                    <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data" caption="Power Controller"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -340,8 +300,7 @@
             <interrupt index="68" name="SCNT_OVFL" caption="Symbol counter - overflow interrupt"/>
             <interrupt index="69" name="SCNT_BACKOFF" caption="Symbol counter - backoff interrupt"/>
             <interrupt index="70" name="AES_READY" caption="AES engine ready interrupt"/>
-            <interrupt index="71" name="BAT_LOW"
-                       caption="Battery monitor indicates supply voltage below threshold"/>
+            <interrupt index="71" name="BAT_LOW" caption="Battery monitor indicates supply voltage below threshold"/>
         </interrupts>
         <interfaces>
             <interface name="ISP" type="isp"/>
@@ -399,8 +358,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -461,8 +419,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -493,8 +450,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -508,8 +464,7 @@
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
                     <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
-                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT"
-                              values="ENUM_SUT_CKSEL"/>
+                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT" values="ENUM_SUT_CKSEL"/>
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
@@ -519,28 +474,17 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS"
-                       value="0x23"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TRXOSC_258CK_4MS1"
-                       value="0x06"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TRXOSC_258CK_65MS"
-                       value="0x16"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TRXOSC_1KCK_0MS"
-                       value="0x26"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TRXOSC_1KCK_4MS1"
-                       value="0x36"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TRXOSC_1KCK_65MS"
-                       value="0x07"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TRXOSC_16KCK_0MS"
-                       value="0x17"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TRXOSC_16KCK_4MS1"
-                       value="0x27"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TRXOSC_16KCK_65MS"
-                       value="0x37"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS" value="0x23"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TRXOSC_258CK_4MS1" value="0x06"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TRXOSC_258CK_65MS" value="0x16"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TRXOSC_1KCK_0MS" value="0x26"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TRXOSC_1KCK_4MS1" value="0x36"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TRXOSC_1KCK_65MS" value="0x07"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TRXOSC_16KCK_0MS" value="0x17"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TRXOSC_16KCK_4MS1" value="0x27"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TRXOSC_16KCK_65MS" value="0x37"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
@@ -597,8 +541,7 @@
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -615,8 +558,7 @@
         <module caption="USART" name="USART">
             <register-group caption="USART" name="USART0">
                 <register caption="USART0 I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
-                          ocd-rw="R">
+                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
@@ -637,8 +579,7 @@
                     <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
                 </register>
                 <register caption="USART0 Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
-                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0"
-                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT_MEGARF"/>
                     <bitfield caption="Parity Mode" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
                     <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
@@ -648,8 +589,7 @@
             </register-group>
             <register-group caption="USART" name="USART1">
                 <register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
-                          ocd-rw="R">
+                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
@@ -670,8 +610,7 @@
                     <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
                 </register>
                 <register caption="USART1 Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
-                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"
-                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT_MEGARF"/>
                     <bitfield caption="Parity Mode" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
                     <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
@@ -706,10 +645,8 @@
                 <value caption="9-bit" name="VAL_7" value="7"/>
             </value-group>
             <value-group caption="" name="USART_CLK_POLARITY_BITF">
-                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)"
-                       name="VAL_0" value="0"/>
-                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)"
-                       name="VAL_1" value="1"/>
+                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)" name="VAL_0" value="0"/>
+                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)" name="VAL_1" value="1"/>
             </value-group>
         </module>
         <module caption="Two Wire Serial Interface" name="TWI">
@@ -747,40 +684,26 @@
                 <value caption="SLA+W has been transmitted; ACK has been received." name="VAL_0x18" value="0x18"/>
                 <value caption="SLA+W has been transmitted; NOT ACK has been received." name="VAL_0x20" value="0x20"/>
                 <value caption="Data byte has been transmitted; ACK has been received." name="VAL_0x28" value="0x28"/>
-                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30"
-                       value="0x30"/>
-                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)."
-                       name="VAL_0x38" value="0x38"/>
+                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30" value="0x30"/>
+                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)." name="VAL_0x38" value="0x38"/>
                 <value caption="SLA+R has been transmitted; ACK has been received." name="VAL_0x40" value="0x40"/>
                 <value caption="SLA+R has been transmitted; NOT ACK has been received." name="VAL_0x48" value="0x48"/>
                 <value caption="Data byte has been received; ACK has been returned." name="VAL_0x50" value="0x50"/>
                 <value caption="Data byte has been received; NOT ACK has been returned." name="VAL_0x58" value="0x58"/>
                 <value caption="Own SLA+W has been received; ACK has been returned." name="VAL_0x60" value="0x60"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned."
-                       name="VAL_0x68" value="0x68"/>
-                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70"
-                       value="0x70"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned."
-                       name="VAL_0x78" value="0x78"/>
-                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned."
-                       name="VAL_0x80" value="0x80"/>
-                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned."
-                       name="VAL_0x88" value="0x88"/>
-                <value caption="Previously addressed with general call; data has been received; ACK has been returned."
-                       name="VAL_0x90" value="0x90"/>
-                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned."
-                       name="VAL_0x98" value="0x98"/>
-                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave."
-                       name="VAL_0xA0" value="0xA0"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned." name="VAL_0x68" value="0x68"/>
+                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70" value="0x70"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned." name="VAL_0x78" value="0x78"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned." name="VAL_0x80" value="0x80"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned." name="VAL_0x88" value="0x88"/>
+                <value caption="Previously addressed with general call; data has been received; ACK has been returned." name="VAL_0x90" value="0x90"/>
+                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned." name="VAL_0x98" value="0x98"/>
+                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave." name="VAL_0xA0" value="0xA0"/>
                 <value caption="Own SLA+R has been received; ACK has been returned." name="VAL_0xA8" value="0xA8"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned."
-                       name="VAL_0xB0" value="0xB0"/>
-                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8"
-                       value="0xB8"/>
-                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0"
-                       value="0xC0"/>
-                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received."
-                       name="VAL_0xC8" value="0xC8"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned." name="VAL_0xB0" value="0xB0"/>
+                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8" value="0xB8"/>
+                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0" value="0xC0"/>
+                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received." name="VAL_0xC8" value="0xC8"/>
                 <value caption="No relevant state information available; TWINT = 0." name="VAL_0xF8" value="0xF8"/>
             </value-group>
             <value-group caption="" name="COMM_TWI_PRESACLE">
@@ -799,8 +722,7 @@
                     <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
                     <bitfield caption="Clock polarity" mask="0x08" name="CPOL" values="SPI_CPOL_BITF"/>
                     <bitfield caption="Clock Phase" mask="0x04" name="CPHA" values="SPI_CPHA_BITF"/>
-                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR"
-                              values="COMM_SCK_RATE_3BIT"/>
+                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
                 </register>
                 <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
                     <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
@@ -811,8 +733,7 @@
                 <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
             </register-group>
             <register-group caption="Serial Peripheral Interface" name="USART0_SPI">
-                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
-                          ocd-rw="R">
+                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
@@ -831,8 +752,7 @@
                 </register>
             </register-group>
             <register-group caption="Serial Peripheral Interface" name="USART1_SPI">
-                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
-                          ocd-rw="R">
+                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
@@ -908,10 +828,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Register" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -928,14 +846,11 @@
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Reserved" mask="0xF8" name="Res"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Reserved" mask="0xF8" name="Res"/>
                     <bitfield caption="Timer/Counter0 Output Compare B Match Flag" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare A Match Flag" mask="0x02" name="OCF0A"/>
@@ -985,14 +900,11 @@
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
                     <bitfield caption="Output Compare Flag 2 B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2 A" mask="0x02" name="OCF2A"/>
@@ -1012,19 +924,15 @@
                     <bitfield caption="Clock Select" mask="0x07" name="CS2" values="TC2_CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input for AMR" mask="0x80" name="EXCLKAMR"/>
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Timer/Counter2 Asynchronous Mode" mask="0x20" name="AS2"/>
                     <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08"
-                              name="OCR2AUB"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04"
-                              name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04" name="OCR2BUB"/>
                     <bitfield caption="Timer/Counter2 Control Register A Update Busy" mask="0x02" name="TCR2AUB"/>
                     <bitfield caption="Timer/Counter2 Control Register B Update Busy" mask="0x01" name="TCR2BUB"/>
                 </register>
@@ -1071,8 +979,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1093,20 +1000,16 @@
         <module caption="Timer/Counter, 16-bit" name="TC16">
             <register-group caption="Timer/Counter, 16-bit" name="TC5">
                 <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C"
-                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C" values="TC4_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
                     <bitfield caption="Input Capture 5 Noise Canceller" mask="0x80" name="ICNC5"/>
                     <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS5" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter5 Control Register C" name="TCCR5C" offset="0x122" size="1">
@@ -1116,26 +1019,18 @@
                     <bitfield caption="Reserved" mask="0x1F" name="Res"/>
                 </register>
                 <register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
                     <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
-                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE5C"/>
-                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE5B"/>
-                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE5A"/>
                     <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
                 </register>
-                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1" ocd-rw="">
                     <bitfield caption="Timer/Counter5 Input Capture Flag" mask="0x20" name="ICF5"/>
                     <bitfield caption="Timer/Counter5 Output Compare C Match Flag" mask="0x08" name="OCF5C"/>
                     <bitfield caption="Timer/Counter5 Output Compare B Match Flag" mask="0x04" name="OCF5B"/>
@@ -1145,20 +1040,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC4">
                 <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C"
-                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C" values="TC4_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
                     <bitfield caption="Input Capture 4 Noise Canceller" mask="0x80" name="ICNC4"/>
                     <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS4" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
@@ -1168,26 +1059,18 @@
                     <bitfield caption="Reserved" mask="0x1F" name="Res"/>
                 </register>
                 <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
                     <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
-                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE4C"/>
-                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE4B"/>
-                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE4A"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1" ocd-rw="">
                     <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
                     <bitfield caption="Timer/Counter4 Output Compare C Match Flag" mask="0x08" name="OCF4C"/>
                     <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
@@ -1197,20 +1080,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC3">
                 <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C"
-                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C" values="TC1_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
                     <bitfield caption="Input Capture 3 Noise Canceller" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
@@ -1220,26 +1099,18 @@
                     <bitfield caption="Reserved" mask="0x1F" name="Res"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
                     <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
@@ -1249,20 +1120,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C"
-                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C" values="TC1_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
                     <bitfield caption="Input Capture 1 Noise Canceller" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
@@ -1272,26 +1139,18 @@
                     <bitfield caption="Reserved" mask="0x1F" name="Res"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare C Match Flag" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
@@ -1336,10 +1195,8 @@
             <value-group caption="" name="TC1_COMNX_BITF">
                 <value caption="Normal port operation, OCnA/OCnB/OCnC disconnected." name="VAL_0" value="0"/>
                 <value caption="Toggle OCnA/OCnB/OCnC on Compare Match." name="VAL_1" value="1"/>
-                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2"
-                       value="2"/>
-                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3"
-                       value="3"/>
+                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2" value="2"/>
+                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3" value="3"/>
             </value-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT_MEGARF">
                 <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
@@ -1357,8 +1214,7 @@
                 <register caption="AES Control Register" name="AES_CTRL" offset="0x13C" size="1">
                     <bitfield caption="Request AES Operation." mask="0x80" name="AES_REQUEST"/>
                     <bitfield caption="Set AES Operation Mode" mask="0x20" name="AES_MODE" values="AES_MODE_BITF"/>
-                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR"
-                              values="AES_DIRECTION_BITF"/>
+                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR" values="AES_DIRECTION_BITF"/>
                     <bitfield caption="AES Interrupt Enable" mask="0x04" name="AES_IM"/>
                 </register>
                 <register caption="AES Status Register" name="AES_STATUS" offset="0x13D" size="1" ocd-rw="R">
@@ -1369,8 +1225,7 @@
                 <register caption="AES Plain and Cipher Text Buffer Register" name="AES_STATE" offset="0x13E" size="1">
                     <bitfield caption="AES Plain and Cipher Text Buffer" mask="0xFF" name="AES_STATE"/>
                 </register>
-                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F"
-                          size="1">
+                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F" size="1">
                     <bitfield caption="AES Encryption/Decryption Key Buffer" mask="0xFF" name="AES_KEY"/>
                 </register>
                 <register caption="Transceiver Status Register" name="TRX_STATUS" offset="0x141" size="1" ocd-rw="R">
@@ -1392,27 +1247,20 @@
                     <bitfield caption="Enable Automatic CRC Calculation" mask="0x20" name="TX_AUTO_CRC_ON"/>
                     <bitfield caption="Reserved" mask="0x1F" name="Res"/>
                 </register>
-                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145"
-                          size="1">
-                    <bitfield caption="Power Amplifier Buffer Lead Time" mask="0xC0" name="PA_BUF_LT"
-                              values="PA_BUF_LT_bitf"/>
+                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145" size="1">
+                    <bitfield caption="Power Amplifier Buffer Lead Time" mask="0xC0" name="PA_BUF_LT" values="PA_BUF_LT_bitf"/>
                     <bitfield caption="Power Amplifier Lead Time" mask="0x30" name="PA_LT" values="PA_LT_bitf"/>
                     <bitfield caption="Transmit Power Setting" mask="0x0F" name="TX_PWR" values="TX_PWR_bitf"/>
                 </register>
-                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1"
-                          ocd-rw="R">
-                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID"
-                              values="RX_CRC_VALID_bitf"/>
+                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1" ocd-rw="R">
+                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID" values="RX_CRC_VALID_bitf"/>
                     <bitfield caption="Random Value" mask="0x60" name="RND_VALUE"/>
-                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI"
-                              values="RSSI_VALUE_BITF"/>
+                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI" values="RSSI_VALUE_BITF"/>
                 </register>
-                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147"
-                          size="1" ocd-rw="R">
+                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147" size="1" ocd-rw="R">
                     <bitfield caption="Energy Detection Level" mask="0xFF" name="ED_LEVEL" values="ED_LEVEL_BITF"/>
                 </register>
-                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA"
-                          offset="0x148" size="1">
+                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA" offset="0x148" size="1">
                     <bitfield caption="Manual CCA Measurement Request" mask="0x80" name="CCA_REQUEST"/>
                     <bitfield caption="Select CCA Measurement Mode" mask="0x60" name="CCA_MODE" values="CCA_MODE_bitf"/>
                     <bitfield caption="RX/TX Channel Selection" mask="0x1F" name="CHANNEL" values="CHANNEL_bitf"/>
@@ -1422,29 +1270,22 @@
                     <bitfield caption="ED Threshold Level for CCA Measurement" mask="0x0F" name="CCA_ED_THRES"/>
                 </register>
                 <register caption="Transceiver Receive Control Register" name="RX_CTRL" offset="0x14A" size="1">
-                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES"
-                              values="PDT_THRES_bitf"/>
+                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES" values="PDT_THRES_bitf"/>
                 </register>
                 <register caption="Start of Frame Delimiter Value Register" name="SFD_VALUE" offset="0x14B" size="1">
-                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE"
-                              values="SFD_VALUE_BITF"/>
+                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE" values="SFD_VALUE_BITF"/>
                 </register>
                 <register caption="Transceiver Control Register 2" name="TRX_CTRL_2" offset="0x14C" size="1">
                     <bitfield caption="RX Safe Mode" mask="0x80" name="RX_SAFE_MODE"/>
                     <bitfield caption="Reserved" mask="0x7C" name="Res"/>
-                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE"
-                              values="OQPSK_DATA_RATE_bitf"/>
+                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE" values="OQPSK_DATA_RATE_bitf"/>
                 </register>
                 <register caption="Antenna Diversity Control Register" name="ANT_DIV" offset="0x14D" size="1">
-                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL"
-                              values="ANT_SEL_bitf"/>
+                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL" values="ANT_SEL_bitf"/>
                     <bitfield caption="Reserved" mask="0x70" name="Res"/>
-                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN"
-                              values="ANT_DIV_EN_bitf"/>
-                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN"
-                              values="ANT_EXT_SW_EN_bitf"/>
-                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL"
-                              values="ANT_CTRL_bitf"/>
+                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN" values="ANT_DIV_EN_bitf"/>
+                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN" values="ANT_EXT_SW_EN_bitf"/>
+                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL" values="ANT_CTRL_bitf"/>
                 </register>
                 <register caption="Transceiver Interrupt Enable Register" name="IRQ_MASK" offset="0x14E" size="1">
                     <bitfield caption="Awake Interrupt Enable" mask="0x80" name="AWAKE_EN"/>
@@ -1466,66 +1307,50 @@
                     <bitfield caption="PLL Unlock Interrupt Status" mask="0x02" name="PLL_UNLOCK"/>
                     <bitfield caption="PLL Lock Interrupt Status" mask="0x01" name="PLL_LOCK"/>
                 </register>
-                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150"
-                          size="1">
-                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT"
-                              values="AVREG_EXT_BITF"/>
+                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150" size="1">
+                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT" values="AVREG_EXT_BITF"/>
                     <bitfield caption="AVDD Supply Voltage Valid" mask="0x40" name="AVDD_OK" values="AVDD_OK_BITF"/>
-                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT"
-                              values="DVREG_EXT_BITF"/>
+                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT" values="DVREG_EXT_BITF"/>
                     <bitfield caption="DVDD Supply Voltage Valid" mask="0x04" name="DVDD_OK" values="DVDD_OK_BITF"/>
                 </register>
                 <register caption="Battery Monitor Control and Status Register" name="BATMON" offset="0x151" size="1">
                     <bitfield caption="Battery Monitor Interrupt Status" mask="0x80" name="BAT_LOW"/>
                     <bitfield caption="Battery Monitor Interrupt Enable" mask="0x40" name="BAT_LOW_EN"/>
                     <bitfield caption="Battery Monitor Status" mask="0x20" name="BATMON_OK" values="BATMON_OK_bitf"/>
-                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR"
-                              values="BATMON_HR_bitf"/>
-                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH"
-                              values="BATMON_VTH_bitf"/>
+                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR" values="BATMON_HR_bitf"/>
+                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH" values="BATMON_VTH_bitf"/>
                 </register>
                 <register caption="Crystal Oscillator Control Register" name="XOSC_CTRL" offset="0x152" size="1">
-                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE"
-                              values="XTAL_MODE_BITF"/>
-                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM"
-                              values="XTAL_TRIM_bitf"/>
+                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE" values="XTAL_MODE_BITF"/>
+                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM" values="XTAL_TRIM_bitf"/>
                 </register>
-                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155"
-                          size="1">
+                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155" size="1">
                     <bitfield caption="Prevent Frame Reception" mask="0x80" name="RX_PDT_DIS"/>
                     <bitfield caption="Reserved" mask="0x70" name="Res"/>
-                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL"
-                              values="RX_PDT_LEVEL_BITF"/>
+                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL" values="RX_PDT_LEVEL_BITF"/>
                 </register>
-                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157"
-                          size="1">
+                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157" size="1">
                     <bitfield caption="Filter Reserved Frames" mask="0x20" name="AACK_FLTR_RES_FT"/>
                     <bitfield caption="Process Reserved Frames" mask="0x10" name="AACK_UPLD_RES_FT"/>
-                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME"
-                              values="AACK_ACK_TIME_bitf"/>
+                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME" values="AACK_ACK_TIME_bitf"/>
                     <bitfield caption="Enable Promiscuous Mode" mask="0x02" name="AACK_PROM_MODE"/>
                 </register>
                 <register caption="Transceiver Filter Tuning Control Register" name="FTN_CTRL" offset="0x158" size="1">
                     <bitfield caption="Start Calibration Loop of Filter Tuning Network" mask="0x80" name="FTN_START"/>
                 </register>
-                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF"
-                          offset="0x15A" size="1">
+                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF" offset="0x15A" size="1">
                     <bitfield caption="Start Center Frequency Calibration" mask="0x80" name="PLL_CF_START"/>
                 </register>
-                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B"
-                          size="1">
+                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B" size="1">
                     <bitfield caption="Start Delay Cell Calibration" mask="0x80" name="PLL_DCU_START"/>
                 </register>
-                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1"
-                          ocd-rw="R">
+                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1" ocd-rw="R">
                     <bitfield caption="Part Number" mask="0xFF" name="PART_NUM" values="PART_NUM_bitf"/>
                 </register>
-                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D"
-                          size="1" ocd-rw="R">
+                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D" size="1" ocd-rw="R">
                     <bitfield caption="Version Number" mask="0xFF" name="VERSION_NUM" values="VERSION_NUM_BITF"/>
                 </register>
-                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0"
-                          offset="0x15E" size="1" ocd-rw="R">
+                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0" offset="0x15E" size="1" ocd-rw="R">
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x80" name="MAN_ID_07"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x40" name="MAN_ID_06"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x20" name="MAN_ID_05"/>
@@ -1535,13 +1360,10 @@
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x02" name="MAN_ID_01"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x01" name="MAN_ID_00" values="MAN_ID_0_BITF"/>
                 </register>
-                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1"
-                          offset="0x15F" size="1" ocd-rw="R">
-                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF"
-                              lsb="10"/>
+                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1" offset="0x15F" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF" lsb="10"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160"
-                          size="1">
+                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160" size="1">
                     <bitfield caption="MAC Short Address" mask="0x80" name="SHORT_ADDR_07"/>
                     <bitfield caption="MAC Short Address" mask="0x40" name="SHORT_ADDR_06"/>
                     <bitfield caption="MAC Short Address" mask="0x20" name="SHORT_ADDR_05"/>
@@ -1551,12 +1373,10 @@
                     <bitfield caption="MAC Short Address" mask="0x02" name="SHORT_ADDR_01"/>
                     <bitfield caption="MAC Short Address" mask="0x01" name="SHORT_ADDR_00"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1"
-                          offset="0x161" size="1">
+                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1" offset="0x161" size="1">
                     <bitfield caption="MAC Short Address" mask="0xFF" name="SHORT_ADDR_" lsb="10"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0"
-                          offset="0x162" size="1">
+                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0" offset="0x162" size="1">
                     <bitfield caption="MAC Personal Area Network ID" mask="0x80" name="PAN_ID_07"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x40" name="PAN_ID_06"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x20" name="PAN_ID_05"/>
@@ -1566,8 +1386,7 @@
                     <bitfield caption="MAC Personal Area Network ID" mask="0x02" name="PAN_ID_01"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x01" name="PAN_ID_00"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1"
-                          offset="0x163" size="1">
+                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1" offset="0x163" size="1">
                     <bitfield caption="MAC Personal Area Network ID" mask="0xFF" name="PAN_ID_" lsb="10"/>
                 </register>
                 <register caption="Transceiver MAC IEEE Address Register 0" name="IEEE_ADDR_0" offset="0x164" size="1">
@@ -1601,17 +1420,12 @@
                 <register caption="Transceiver MAC IEEE Address Register 7" name="IEEE_ADDR_7" offset="0x16B" size="1">
                     <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="70"/>
                 </register>
-                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0"
-                          offset="0x16C" size="1">
-                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0"
-                              name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
-                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E"
-                              name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
-                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION"
-                              values="SLOTTED_OPERATION_BITF"/>
+                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0" offset="0x16C" size="1">
+                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0" name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
+                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E" name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
+                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION" values="SLOTTED_OPERATION_BITF"/>
                 </register>
-                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0"
-                          offset="0x16D" size="1">
+                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0" offset="0x16D" size="1">
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x80" name="CSMA_SEED_07"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x40" name="CSMA_SEED_06"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x20" name="CSMA_SEED_05"/>
@@ -1621,27 +1435,21 @@
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x02" name="CSMA_SEED_01"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x01" name="CSMA_SEED_00"/>
                 </register>
-                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1"
-                          offset="0x16E" size="1">
-                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE"
-                              values="AACK_FVN_MODE_bitf"/>
+                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1" offset="0x16E" size="1">
+                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE" values="AACK_FVN_MODE_bitf"/>
                     <bitfield caption="Set Frame Pending Sub-field" mask="0x20" name="AACK_SET_PD"/>
                     <bitfield caption="Disable Acknowledgment Frame Transmission" mask="0x10" name="AACK_DIS_ACK"/>
                     <bitfield caption="Set Personal Area Network Coordinator" mask="0x08" name="AACK_I_AM_COORD"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x07" name="CSMA_SEED_1"/>
                 </register>
-                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F"
-                          size="1">
+                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F" size="1">
                     <bitfield caption="Maximum Back-off Exponent" mask="0xF0" name="MAX_BE" values="MAX_BE_bitf"/>
                     <bitfield caption="Minimum Back-off Exponent" mask="0x0F" name="MIN_BE" values="MIN_BE_bitf"/>
                 </register>
-                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176"
-                          size="1">
-                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG"
-                              values="TST_CTRL_DIG_BITF"/>
+                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176" size="1">
+                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG" values="TST_CTRL_DIG_BITF"/>
                 </register>
-                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B"
-                          size="1">
+                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B" size="1">
                     <bitfield caption="Received Frame Length" mask="0xFF" name="RX_LENGTH"/>
                 </register>
                 <register caption="Start of frame buffer" name="TRXFBST" offset="0x180" size="1" mask="0xFF"/>
@@ -1772,10 +1580,8 @@
                 <value caption="2480 MHz" name="F_2480MHZ" value="26"/>
             </value-group>
             <value-group caption="" name="PDT_THRES_bitf">
-                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled"
-                       name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
-                <value caption="Recommended correlator threshold for Antenna Diversity operation"
-                       name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
+                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled" name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
+                <value caption="Recommended correlator threshold for Antenna Diversity operation" name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
             </value-group>
             <value-group caption="" name="SFD_VALUE_BITF">
                 <value caption="IEEE 802.15.4 compliant value of the SFD" name="IEEE_SFD" value="0xA7"/>
@@ -1802,28 +1608,22 @@
                 <value caption="Reserved" name="VAL_0" value="0"/>
                 <value caption="Antenna 1: DIG1=H, DIG2=L" name="ANT_1" value="1"/>
                 <value caption="Antenna 0: DIG1=L, DIG2=H" name="ANT_0" value="2"/>
-                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity"
-                       name="ANT_RESET" value="3"/>
+                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity" name="ANT_RESET" value="3"/>
             </value-group>
             <value-group caption="" name="AVREG_EXT_BITF">
-                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT"
-                       value="0"/>
-                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section."
-                       name="AVDD_EXT" value="1"/>
+                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT" value="0"/>
+                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section." name="AVDD_EXT" value="1"/>
             </value-group>
             <value-group caption="" name="AVDD_OK_BITF">
                 <value caption="Analog voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
                 <value caption="Analog supply voltage has settled" name="VAL_1" value="1"/>
             </value-group>
             <value-group caption="" name="DVREG_EXT_BITF">
-                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT"
-                       value="0"/>
-                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section."
-                       name="DVDD_EXT" value="1"/>
+                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT" value="0"/>
+                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section." name="DVDD_EXT" value="1"/>
             </value-group>
             <value-group caption="" name="DVDD_OK_BITF">
-                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0"
-                       value="0"/>
+                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
                 <value caption="Digital supply voltage has settled" name="VAL_1" value="1"/>
             </value-group>
             <value-group caption="" name="BATMON_OK_bitf">
@@ -1853,10 +1653,8 @@
                 <value caption="3.675V (BATMON_HR=1) 2.45V (BATMON_HR=0)" name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="XTAL_MODE_BITF">
-                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4"
-                       value="0x4"/>
-                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled."
-                       name="VAL_0xF" value="0xF"/>
+                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4" value="0x4"/>
+                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled." name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="XTAL_TRIM_bitf">
                 <value caption="0.0 pF, trimming capacitors disconnected" name="XTAL_TRIM_MIN" value="0x0"/>
@@ -1865,13 +1663,11 @@
                 <value caption="4.5 pF, trimming capacitor switched on" name="XTAL_TRIM_MAX" value="0xF"/>
             </value-group>
             <value-group caption="" name="RX_PDT_LEVEL_BITF">
-                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered"
-                       name="RX_PDT_LEVEL_MIN" value="0x0"/>
+                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered" name="RX_PDT_LEVEL_MIN" value="0x0"/>
                 <value caption="RX_THRES &gt; RSSI_BASE_VAL + 0 · 3; RSSI &gt; -90 dBm" name="VAL_0x1" value="0x1"/>
                 <value caption="..." name="VAL_0x2" value="0x2"/>
                 <value caption="RX_THRES &gt; RSSI_BASE_VAL + 13 · 3; RSSI &gt; -51 dBm" name="VAL_0xE" value="0xE"/>
-                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX"
-                       value="0xF"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX" value="0xF"/>
             </value-group>
             <value-group caption="" name="AACK_ACK_TIME_bitf">
                 <value caption="12 symbols acknowledgment time" name="AACK_ACK_TIME_12_SYM" value="0"/>
@@ -1885,12 +1681,10 @@
                 <value caption="Revision B" name="REV_B" value="3"/>
             </value-group>
             <value-group caption="" name="MAN_ID_0_BITF">
-                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F"
-                       name="ATMEL_BYTE_0" value="0x1f"/>
+                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F" name="ATMEL_BYTE_0" value="0x1f"/>
             </value-group>
             <value-group caption="" name="MAN_ID_1_BITF">
-                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F"
-                       name="ATMEL_BYTE_1" value="0x00"/>
+                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F" name="ATMEL_BYTE_1" value="0x00"/>
             </value-group>
             <value-group caption="" name="MAX_FRAME_RETRIES_bitf">
                 <value caption="Retransmission of frame is not attempted." name="VAL_0x0" value="0x0"/>
@@ -1907,10 +1701,8 @@
                 <value caption="Immediate frame re-transmission without performing CSMA-CA" name="VAL_0x7" value="0x7"/>
             </value-group>
             <value-group caption="" name="SLOTTED_OPERATION_BITF">
-                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested."
-                       name="SLOTTED_OP_DIS" value="0"/>
-                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller."
-                       name="SLOTTED_OP_EN" value="1"/>
+                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested." name="SLOTTED_OP_DIS" value="0"/>
+                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller." name="SLOTTED_OP_EN" value="1"/>
             </value-group>
             <value-group caption="" name="AACK_FVN_MODE_bitf">
                 <value caption="Acknowledge frames with version number 0" name="VAL_0" value="0"/>
@@ -1921,17 +1713,14 @@
             <value-group caption="" name="MAX_BE_bitf">
                 <value caption="This value is not valid for the maximum back-off exponent." name="VAL_1" value="1"/>
                 <value caption="This value is not valid for the maximum back-off exponent." name="VAL_2" value="2"/>
-                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3"
-                       value="3"/>
+                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3" value="3"/>
                 <value caption="..." name="VAL_4" value="4"/>
-                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8"
-                       value="8"/>
+                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8" value="8"/>
             </value-group>
             <value-group caption="" name="MIN_BE_bitf">
                 <value caption="Minimum value of minimum back-off exponent." name="VAL_0" value="0"/>
                 <value caption="..." name="VAL_1" value="1"/>
-                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE."
-                       name="VAL_8" value="8"/>
+                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE." name="VAL_8" value="8"/>
             </value-group>
             <value-group caption="" name="TST_CTRL_DIG_BITF">
                 <value caption="NORMAL (no test is active)" name="VAL_0" value="0"/>
@@ -1940,84 +1729,64 @@
         </module>
         <module caption="MAC Symbol Counter" name="SYMCNT">
             <register-group caption="MAC Symbol Counter" name="SYMCNT">
-                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 HH-Byte" mask="0xFF" name="SCOCR1HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 HL-Byte" mask="0xFF" name="SCOCR1HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 LH-Byte" mask="0xFF" name="SCOCR1LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 LL-Byte" mask="0xFF" name="SCOCR1LL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 HH-Byte" mask="0xFF" name="SCOCR2HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 HL-Byte" mask="0xFF" name="SCOCR2HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 LH-Byte" mask="0xFF" name="SCOCR2LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 LL-Byte" mask="0xFF" name="SCOCR2LL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 HH-Byte" mask="0xFF" name="SCOCR3HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 HL-Byte" mask="0xFF" name="SCOCR3HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 LH-Byte" mask="0xFF" name="SCOCR3LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 LL-Byte" mask="0xFF" name="SCOCR3LL"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSRHH"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSRHL"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSRLH"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSRLL"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register HH-Byte" mask="0xFF" name="SCBTSRHH"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register HL-Byte" mask="0xFF" name="SCBTSRHL"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register LH-Byte" mask="0xFF" name="SCBTSRLH"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register LL-Byte" mask="0xFF" name="SCBTSRLL"/>
                 </register>
                 <register caption="Symbol Counter Register HH-Byte" name="SCCNTHH" offset="0xE4" size="1">
@@ -2095,39 +1864,28 @@
                 </register>
             </register-group>
             <value-group caption="" name="OCDR_DATA_BITF">
-                <value caption="Refer to the debugger documentation for further information on how to use this register."
-                       name="VAL_0" value="0"/>
+                <value caption="Refer to the debugger documentation for further information on how to use this register." name="VAL_0" value="0"/>
             </value-group>
         </module>
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL3"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL3"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
-                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT"
-                              values="INTERRUPT_REQ_ENABLE_BITF"/>
+                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT" values="INTERRUPT_REQ_ENABLE_BITF"/>
                 </register>
                 <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
-                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF"
-                              values="INTERRUPT_EXT_FLAG_BITF"/>
+                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF" values="INTERRUPT_EXT_FLAG_BITF"/>
                 </register>
                 <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
                     <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="16"/>
@@ -2147,12 +1905,9 @@
             </register-group>
             <value-group caption="" name="INTERRUPT_SENSE_CONTROL3">
                 <value caption="The low level of INTn generates an interrupt request." name="VAL_0x00" value="0x00"/>
-                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01"
-                       value="0x01"/>
-                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01" value="0x01"/>
+                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02" value="0x02"/>
+                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="INTERRUPT_REQ_ENABLE_BITF">
                 <value caption="All external pin interrupts are disabled." name="VAL_0x00" value="0x00"/>
@@ -2160,11 +1915,9 @@
             </value-group>
             <value-group caption="" name="INTERRUPT_EXT_FLAG_BITF">
                 <value caption="No edge or logic change on INT7:0 occurred." name="VAL_0x00" value="0x00"/>
-                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request."
-                       name="VAL_0x01" value="0x01"/>
+                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request." name="VAL_0x01" value="0x01"/>
                 <value caption="..." name="VAL_0x02" value="0x02"/>
-                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request."
-                       name="VAL_0x80" value="0x80"/>
+                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request." name="VAL_0x80" value="0x80"/>
             </value-group>
         </module>
         <module caption="Analog-to-Digital Converter" name="ADC">
@@ -2181,8 +1934,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="AVDD Supply Voltage OK" mask="0x80" name="AVDDOK"/>
@@ -2190,12 +1942,10 @@
                     <bitfield caption="Reference Voltage OK" mask="0x20" name="REFOK"/>
                     <bitfield caption="Analog Channel Change" mask="0x10" name="ACCH"/>
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="The ADC Control and Status Register C" name="ADCSRC" offset="0x77" size="1">
-                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT"
-                              values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
+                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT" values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
                     <bitfield caption="Reserved" mask="0x20" name="Res0"/>
                     <bitfield caption="ADC Start-up Time" mask="0x1F" name="ADSUT" values="ANALOG_ADC_STARTUP_TIME"/>
                 </register>
@@ -2223,10 +1973,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF9">
                 <value caption="AREF, Internal reference voltage generation turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVDD with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -2306,15 +2054,13 @@
                     <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
                 </register>
                 <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1">
-                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL"
-                              values="OSCCAL_BITF"/>
+                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL" values="OSCCAL_BITF"/>
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
                     <bitfield caption="Reserved" mask="0x70" name="Res"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
                 </register>
                 <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
                     <bitfield caption="Reserved" mask="0xF0" name="Res"/>
@@ -2387,8 +2133,7 @@
                 <value caption="Reserved" name="VAL_0xC" value="0xC"/>
                 <value caption="Reserved" name="VAL_0xD" value="0xD"/>
                 <value caption="Reserved" name="VAL_0xE" value="0xE"/>
-                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed."
-                       name="VAL_0xF" value="0xF"/>
+                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed." name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
                 <value caption="Idle" name="IDLE" value="0x00"/>
@@ -2411,8 +2156,7 @@
             <register-group caption="FLASH Controller" name="FLASH">
                 <register caption="Flash Extended-Mode Control-Register" name="NEMCR" offset="0x75" size="1">
                     <bitfield caption="Enable Extended Address Mode for Extra Rows" mask="0x40" name="ENEAM"/>
-                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM"
-                              values="NEMCR_ADDRESS_BITF"/>
+                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM" values="NEMCR_ADDRESS_BITF"/>
                 </register>
                 <register caption="Reference Voltage Calibration Register" name="BGCR" offset="0x67" size="1">
                     <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
@@ -2448,40 +2192,33 @@
                     <bitfield caption="Multi-purpose Transceiver Control Bit" mask="0x02" name="SLPTR"/>
                     <bitfield caption="Force Transceiver Reset" mask="0x01" name="TRXRST"/>
                 </register>
-                <register caption="Data Retention Configuration Register of SRAM 0" name="DRTRAM0" offset="0x135"
-                          size="1">
+                <register caption="Data Retention Configuration Register of SRAM 0" name="DRTRAM0" offset="0x135" size="1">
                     <bitfield caption="Reserved" mask="0xC0" name="Res"/>
                     <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
                     <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
                 </register>
-                <register caption="Data Retention Configuration Register of SRAM 1" name="DRTRAM1" offset="0x134"
-                          size="1">
+                <register caption="Data Retention Configuration Register of SRAM 1" name="DRTRAM1" offset="0x134" size="1">
                     <bitfield caption="Reserved" mask="0xC0" name="Res"/>
                     <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
                     <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
                 </register>
-                <register caption="Data Retention Configuration Register of SRAM 2" name="DRTRAM2" offset="0x133"
-                          size="1">
+                <register caption="Data Retention Configuration Register of SRAM 2" name="DRTRAM2" offset="0x133" size="1">
                     <bitfield caption="Reserved Bit" mask="0x40" name="Res"/>
                     <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
                     <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
                 </register>
-                <register caption="Data Retention Configuration Register of SRAM 3" name="DRTRAM3" offset="0x132"
-                          size="1">
+                <register caption="Data Retention Configuration Register of SRAM 3" name="DRTRAM3" offset="0x132" size="1">
                     <bitfield caption="Reserved" mask="0xC0" name="Res"/>
                     <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
                     <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
                 </register>
-                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130"
-                          size="1">
+                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130" size="1">
                     <bitfield caption="Reserved" mask="0xF0" name="Res"/>
                     <bitfield caption="Low-Byte Data Register Bits" mask="0x0F" name="LLDRL" values="LLDRL_VALUE_BITF"/>
                 </register>
-                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131"
-                          size="1">
+                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131" size="1">
                     <bitfield caption="Reserved" mask="0xE0" name="Res"/>
-                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH"
-                              values="LLDRH_VALUE_BITF"/>
+                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH" values="LLDRH_VALUE_BITF"/>
                 </register>
                 <register caption="Low Leakage Voltage Regulator Control Register" name="LLCR" offset="0x12F" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
@@ -2507,16 +2244,12 @@
                 </register>
             </register-group>
             <value-group caption="" name="LLDRL_VALUE_BITF">
-                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08"
-                       value="0x08"/>
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00" value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08" value="0x08"/>
             </value-group>
             <value-group caption="" name="LLDRH_VALUE_BITF">
-                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10"
-                       value="0x10"/>
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00" value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10" value="0x10"/>
             </value-group>
             <value-group caption="" name="PAD_IO_bitf">
                 <value caption="2 mA" name="PAD_IO_2MA" value="0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFR2.xml
index 4e066c41..66b14ec0 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFR2.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega128RFR2-ZU" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega128RFR2-ZUR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega128RFR2-ZF" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega128RFR2-ZFR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega128RFR2-ZU" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega128RFR2-ZUR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega128RFR2-ZF" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega128RFR2-ZFR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
     </variants>
     <device name="ATmega128RFR2" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
-                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,10 +24,8 @@
             <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
                 <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
-            <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100"
-                           size="0x0300">
-                <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="0x100"/>
+            <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100" size="0x0300">
+                <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="data" id="data" start="0x0000" size="0x4200">
                 <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
@@ -44,8 +33,7 @@
                 <memory-segment name="IRAM" start="0x0200" size="0x4000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -55,48 +43,39 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
                 <instance name="USART0_SPI" caption="Serial Peripheral Interface">
-                    <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
                 <instance name="USART1_SPI" caption="Serial Peripheral Interface">
-                    <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="MISSING_PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -109,12 +88,10 @@
                     </signals>
                 </instance>
                 <instance name="MISSING_PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -127,8 +104,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -141,8 +117,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -155,8 +130,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -169,86 +143,71 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC5" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC4" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TRX24">
                 <instance name="TRX24" caption="Low-Power 2.4 GHz Transceiver">
-                    <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data"
-                                    caption="Low-Power 2.4 GHz Transceiver"/>
+                    <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data" caption="Low-Power 2.4 GHz Transceiver"/>
                 </instance>
             </module>
             <module name="SYMCNT">
                 <instance name="SYMCNT" caption="MAC Symbol Counter">
-                    <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data"
-                                    caption="MAC Symbol Counter"/>
+                    <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data" caption="MAC Symbol Counter"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V3"/>
                     </parameters>
@@ -256,32 +215,27 @@
             </module>
             <module name="FLASH">
                 <instance name="FLASH" caption="FLASH Controller">
-                    <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data"
-                                    caption="FLASH Controller"/>
+                    <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data" caption="FLASH Controller"/>
                 </instance>
             </module>
             <module name="PWRCTRL">
                 <instance name="PWRCTRL" caption="Power Controller">
-                    <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data"
-                                    caption="Power Controller"/>
+                    <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data" caption="Power Controller"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -346,8 +300,7 @@
             <interrupt index="68" name="SCNT_OVFL" caption="Symbol counter - overflow interrupt"/>
             <interrupt index="69" name="SCNT_BACKOFF" caption="Symbol counter - backoff interrupt"/>
             <interrupt index="70" name="AES_READY" caption="AES engine ready interrupt"/>
-            <interrupt index="71" name="BAT_LOW"
-                       caption="Battery monitor indicates supply voltage below threshold"/>
+            <interrupt index="71" name="BAT_LOW" caption="Battery monitor indicates supply voltage below threshold"/>
             <interrupt index="72" name="TRX24_TX_START" caption="TRX24 TX start interrupt"/>
             <interrupt index="73" name="TRX24_AMI0" caption="Address match interrupt of address filter 0"/>
             <interrupt index="74" name="TRX24_AMI1" caption="Address match interrupt of address filter 1"/>
@@ -410,8 +363,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -472,8 +424,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -504,8 +455,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFE">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -519,8 +469,7 @@
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
                     <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
-                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT"
-                              values="ENUM_SUT_CKSEL"/>
+                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT" values="ENUM_SUT_CKSEL"/>
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
@@ -530,87 +479,49 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS"
-                       value="0x23"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x06"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x16"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS" value="0x23"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x06"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x16"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x26"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x36"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x07"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x17"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x27"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x37"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x08"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x18"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x36"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x07"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x17"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x27"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x37"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x08"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x18"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x28"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x38"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x09"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x19"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x29"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x39"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x38"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x09"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x19"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x29"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x39"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1A"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1C"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1E"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
@@ -667,8 +578,7 @@
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -685,8 +595,7 @@
         <module caption="USART" name="USART">
             <register-group caption="USART" name="USART0">
                 <register caption="USART0 I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
-                          ocd-rw="R">
+                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
@@ -707,8 +616,7 @@
                     <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
                 </register>
                 <register caption="USART0 Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
-                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0"
-                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT_MEGARF"/>
                     <bitfield caption="Parity Mode" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
                     <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
@@ -718,8 +626,7 @@
             </register-group>
             <register-group caption="USART" name="USART1">
                 <register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
-                          ocd-rw="R">
+                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
@@ -740,8 +647,7 @@
                     <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
                 </register>
                 <register caption="USART1 Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
-                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"
-                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT_MEGARF"/>
                     <bitfield caption="Parity Mode" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
                     <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
@@ -776,10 +682,8 @@
                 <value caption="9-bit" name="VAL_7" value="7"/>
             </value-group>
             <value-group caption="" name="USART_CLK_POLARITY_BITF">
-                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)"
-                       name="VAL_0" value="0"/>
-                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)"
-                       name="VAL_1" value="1"/>
+                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)" name="VAL_0" value="0"/>
+                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)" name="VAL_1" value="1"/>
             </value-group>
         </module>
         <module caption="Two Wire Serial Interface" name="TWI">
@@ -817,40 +721,26 @@
                 <value caption="SLA+W has been transmitted; ACK has been received." name="VAL_0x18" value="0x18"/>
                 <value caption="SLA+W has been transmitted; NOT ACK has been received." name="VAL_0x20" value="0x20"/>
                 <value caption="Data byte has been transmitted; ACK has been received." name="VAL_0x28" value="0x28"/>
-                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30"
-                       value="0x30"/>
-                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)."
-                       name="VAL_0x38" value="0x38"/>
+                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30" value="0x30"/>
+                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)." name="VAL_0x38" value="0x38"/>
                 <value caption="SLA+R has been transmitted; ACK has been received." name="VAL_0x40" value="0x40"/>
                 <value caption="SLA+R has been transmitted; NOT ACK has been received." name="VAL_0x48" value="0x48"/>
                 <value caption="Data byte has been received; ACK has been returned." name="VAL_0x50" value="0x50"/>
                 <value caption="Data byte has been received; NOT ACK has been returned." name="VAL_0x58" value="0x58"/>
                 <value caption="Own SLA+W has been received; ACK has been returned." name="VAL_0x60" value="0x60"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned."
-                       name="VAL_0x68" value="0x68"/>
-                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70"
-                       value="0x70"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned."
-                       name="VAL_0x78" value="0x78"/>
-                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned."
-                       name="VAL_0x80" value="0x80"/>
-                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned."
-                       name="VAL_0x88" value="0x88"/>
-                <value caption="Previously addressed with general call; data has been received; ACK has been returned."
-                       name="VAL_0x90" value="0x90"/>
-                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned."
-                       name="VAL_0x98" value="0x98"/>
-                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave."
-                       name="VAL_0xA0" value="0xA0"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned." name="VAL_0x68" value="0x68"/>
+                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70" value="0x70"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned." name="VAL_0x78" value="0x78"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned." name="VAL_0x80" value="0x80"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned." name="VAL_0x88" value="0x88"/>
+                <value caption="Previously addressed with general call; data has been received; ACK has been returned." name="VAL_0x90" value="0x90"/>
+                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned." name="VAL_0x98" value="0x98"/>
+                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave." name="VAL_0xA0" value="0xA0"/>
                 <value caption="Own SLA+R has been received; ACK has been returned." name="VAL_0xA8" value="0xA8"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned."
-                       name="VAL_0xB0" value="0xB0"/>
-                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8"
-                       value="0xB8"/>
-                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0"
-                       value="0xC0"/>
-                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received."
-                       name="VAL_0xC8" value="0xC8"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned." name="VAL_0xB0" value="0xB0"/>
+                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8" value="0xB8"/>
+                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0" value="0xC0"/>
+                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received." name="VAL_0xC8" value="0xC8"/>
                 <value caption="No relevant state information available; TWINT = 0." name="VAL_0xF8" value="0xF8"/>
             </value-group>
             <value-group caption="" name="COMM_TWI_PRESACLE">
@@ -869,8 +759,7 @@
                     <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
                     <bitfield caption="Clock polarity" mask="0x08" name="CPOL" values="SPI_CPOL_BITF"/>
                     <bitfield caption="Clock Phase" mask="0x04" name="CPHA" values="SPI_CPHA_BITF"/>
-                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR"
-                              values="COMM_SCK_RATE_SPI2X"/>
+                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR" values="COMM_SCK_RATE_SPI2X"/>
                 </register>
                 <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
                     <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
@@ -880,8 +769,7 @@
                 <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
             </register-group>
             <register-group caption="Serial Peripheral Interface" name="USART0_SPI">
-                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
-                          ocd-rw="R">
+                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
@@ -900,8 +788,7 @@
                 </register>
             </register-group>
             <register-group caption="Serial Peripheral Interface" name="USART1_SPI">
-                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
-                          ocd-rw="R">
+                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
@@ -973,10 +860,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Register" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -992,14 +877,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0" values="TC0_WGM_BITF"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare B Match Flag" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare A Match Flag" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1047,14 +929,11 @@
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
                     <bitfield caption="Output Compare Flag 2 B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2 A" mask="0x02" name="OCF2A"/>
@@ -1072,19 +951,15 @@
                     <bitfield caption="Clock Select" mask="0x07" name="CS2" values="TC2_CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input for AMR" mask="0x80" name="EXCLKAMR"/>
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Timer/Counter2 Asynchronous Mode" mask="0x20" name="AS2"/>
                     <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08"
-                              name="OCR2AUB"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04"
-                              name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04" name="OCR2BUB"/>
                     <bitfield caption="Timer/Counter2 Control Register A Update Busy" mask="0x02" name="TCR2AUB"/>
                     <bitfield caption="Timer/Counter2 Control Register B Update Busy" mask="0x01" name="TCR2BUB"/>
                 </register>
@@ -1131,8 +1006,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1153,20 +1027,16 @@
         <module caption="Timer/Counter, 16-bit" name="TC16">
             <register-group caption="Timer/Counter, 16-bit" name="TC5">
                 <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C"
-                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C" values="TC4_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
                     <bitfield caption="Input Capture 5 Noise Canceller" mask="0x80" name="ICNC5"/>
                     <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS5" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter5 Control Register C" name="TCCR5C" offset="0x122" size="1">
@@ -1175,26 +1045,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
                 </register>
                 <register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
                     <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
-                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE5C"/>
-                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE5B"/>
-                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE5A"/>
                     <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
                 </register>
-                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1" ocd-rw="">
                     <bitfield caption="Timer/Counter5 Input Capture Flag" mask="0x20" name="ICF5"/>
                     <bitfield caption="Timer/Counter5 Output Compare C Match Flag" mask="0x08" name="OCF5C"/>
                     <bitfield caption="Timer/Counter5 Output Compare B Match Flag" mask="0x04" name="OCF5B"/>
@@ -1204,20 +1066,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC4">
                 <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C"
-                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C" values="TC4_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
                     <bitfield caption="Input Capture 4 Noise Canceller" mask="0x80" name="ICNC4"/>
                     <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS4" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
@@ -1226,26 +1084,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
                 </register>
                 <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
                     <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
-                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE4C"/>
-                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE4B"/>
-                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE4A"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1" ocd-rw="">
                     <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
                     <bitfield caption="Timer/Counter4 Output Compare C Match Flag" mask="0x08" name="OCF4C"/>
                     <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
@@ -1255,20 +1105,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC3">
                 <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C"
-                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C" values="TC1_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
                     <bitfield caption="Input Capture 3 Noise Canceller" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
@@ -1277,26 +1123,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
                     <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
@@ -1306,20 +1144,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C"
-                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C" values="TC1_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
                     <bitfield caption="Input Capture 1 Noise Canceller" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
@@ -1328,26 +1162,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare C Match Flag" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
@@ -1392,10 +1218,8 @@
             <value-group caption="" name="TC1_COMNX_BITF">
                 <value caption="Normal port operation, OCnA/OCnB/OCnC disconnected." name="VAL_0" value="0"/>
                 <value caption="Toggle OCnA/OCnB/OCnC on Compare Match." name="VAL_1" value="1"/>
-                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2"
-                       value="2"/>
-                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3"
-                       value="3"/>
+                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2" value="2"/>
+                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3" value="3"/>
             </value-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT_MEGARF">
                 <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
@@ -1416,106 +1240,75 @@
                     <bitfield caption="Power Amplifier Ramp Down Frequency Inversion" mask="0x02" name="PARDFI"/>
                     <bitfield caption="Power Amplifier Ramp Up Frequency Inversion" mask="0x01" name="PARUFI"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L"
-                          offset="0x10E" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L" offset="0x10E" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 0" mask="0xFF" name="MAFSA0L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H"
-                          offset="0x10F" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H" offset="0x10F" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 0" mask="0xFF" name="MAFSA0H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)"
-                          name="MAFPA0L" offset="0x110" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF"
-                              name="MAFPA0L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)" name="MAFPA0L" offset="0x110" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF" name="MAFPA0L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)"
-                          name="MAFPA0H" offset="0x111" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF"
-                              name="MAFPA0H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)" name="MAFPA0H" offset="0x111" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF" name="MAFPA0H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L"
-                          offset="0x112" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L" offset="0x112" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 1" mask="0xFF" name="MAFSA1L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H"
-                          offset="0x113" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H" offset="0x113" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 1" mask="0xFF" name="MAFSA1H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)"
-                          name="MAFPA1L" offset="0x114" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF"
-                              name="MAFPA1L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)" name="MAFPA1L" offset="0x114" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF" name="MAFPA1L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)"
-                          name="MAFPA1H" offset="0x115" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF"
-                              name="MAFPA1H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)" name="MAFPA1H" offset="0x115" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF" name="MAFPA1H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L"
-                          offset="0x116" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L" offset="0x116" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 2" mask="0xFF" name="MAFSA2L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H"
-                          offset="0x117" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H" offset="0x117" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 2" mask="0xFF" name="MAFSA2H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)"
-                          name="MAFPA2L" offset="0x118" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF"
-                              name="MAFPA2L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)" name="MAFPA2L" offset="0x118" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF" name="MAFPA2L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)"
-                          name="MAFPA2H" offset="0x119" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF"
-                              name="MAFPA2H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)" name="MAFPA2H" offset="0x119" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF" name="MAFPA2H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L"
-                          offset="0x11A" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L" offset="0x11A" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 3" mask="0xFF" name="MAFSA3L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H"
-                          offset="0x11B" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H" offset="0x11B" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 3" mask="0xFF" name="MAFSA3H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)"
-                          name="MAFPA3L" offset="0x11C" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF"
-                              name="MAFPA3L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)" name="MAFPA3L" offset="0x11C" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF" name="MAFPA3L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)"
-                          name="MAFPA3H" offset="0x11D" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF"
-                              name="MAFPA3H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)" name="MAFPA3H" offset="0x11D" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF" name="MAFPA3H"/>
                 </register>
-                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C"
-                          size="1">
+                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C" size="1">
                     <bitfield caption="Reserved Bit" mask="0xF0" name="Res"/>
                     <bitfield caption="Multiple Address Filter 3 Enable" mask="0x08" name="MAF3EN"/>
                     <bitfield caption="Multiple Address Filter 2 Enable" mask="0x04" name="MAF2EN"/>
                     <bitfield caption="Multiple Address Filter 1 Enable" mask="0x02" name="MAF1EN"/>
                     <bitfield caption="Multiple Address Filter 0 Enable" mask="0x01" name="MAF0EN"/>
                 </register>
-                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D"
-                          size="1">
+                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D" size="1">
                     <bitfield caption="Set Data Pending bit for address filter 3." mask="0x80" name="AACK_3_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40"
-                              name="AACK_3_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40" name="AACK_3_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 2." mask="0x20" name="AACK_2_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10"
-                              name="AACK_2_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10" name="AACK_2_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 1." mask="0x08" name="AACK_1_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04"
-                              name="AACK_1_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04" name="AACK_1_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 0." mask="0x02" name="AACK_0_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01"
-                              name="AACK_0_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01" name="AACK_0_I_AM_COORD"/>
                 </register>
                 <register caption="AES Control Register" name="AES_CTRL" offset="0x13C" size="1">
                     <bitfield caption="Request AES Operation." mask="0x80" name="AES_REQUEST"/>
                     <bitfield caption="Set AES Operation Mode" mask="0x20" name="AES_MODE" values="AES_MODE_BITF"/>
-                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR"
-                              values="AES_DIRECTION_BITF"/>
+                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR" values="AES_DIRECTION_BITF"/>
                     <bitfield caption="AES Interrupt Enable" mask="0x04" name="AES_IM"/>
                 </register>
                 <register caption="AES Status Register" name="AES_STATUS" offset="0x13D" size="1" ocd-rw="R">
@@ -1525,8 +1318,7 @@
                 <register caption="AES Plain and Cipher Text Buffer Register" name="AES_STATE" offset="0x13E" size="1">
                     <bitfield caption="AES Plain and Cipher Text Buffer" mask="0xFF" name="AES_STATE"/>
                 </register>
-                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F"
-                          size="1">
+                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F" size="1">
                     <bitfield caption="AES Encryption/Decryption Key Buffer" mask="0xFF" name="AES_KEY"/>
                 </register>
                 <register caption="Transceiver Status Register" name="TRX_STATUS" offset="0x141" size="1" ocd-rw="R">
@@ -1551,24 +1343,18 @@
                     <bitfield caption="Enable Automatic CRC Calculation" mask="0x20" name="TX_AUTO_CRC_ON"/>
                     <bitfield caption="Enable PLL TX filter" mask="0x10" name="PLL_TX_FLT"/>
                 </register>
-                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145"
-                          size="1">
+                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145" size="1">
                     <bitfield caption="Transmit Power Setting" mask="0x0F" name="TX_PWR" values="TX_PWR_bitf"/>
                 </register>
-                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1"
-                          ocd-rw="R">
-                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID"
-                              values="RX_CRC_VALID_bitf"/>
+                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1" ocd-rw="R">
+                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID" values="RX_CRC_VALID_bitf"/>
                     <bitfield caption="Random Value" mask="0x60" name="RND_VALUE"/>
-                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI"
-                              values="RSSI_VALUE_BITF"/>
+                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI" values="RSSI_VALUE_BITF"/>
                 </register>
-                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147"
-                          size="1" ocd-rw="R">
+                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147" size="1" ocd-rw="R">
                     <bitfield caption="Energy Detection Level" mask="0xFF" name="ED_LEVEL" values="ED_LEVEL_BITF"/>
                 </register>
-                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA"
-                          offset="0x148" size="1">
+                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA" offset="0x148" size="1">
                     <bitfield caption="Manual CCA Measurement Request" mask="0x80" name="CCA_REQUEST"/>
                     <bitfield caption="Select CCA Measurement Mode" mask="0x60" name="CCA_MODE" values="CCA_MODE_bitf"/>
                     <bitfield caption="RX/TX Channel Selection" mask="0x1F" name="CHANNEL" values="CHANNEL_bitf"/>
@@ -1578,27 +1364,20 @@
                     <bitfield caption="ED Threshold Level for CCA Measurement" mask="0x0F" name="CCA_ED_THRES"/>
                 </register>
                 <register caption="Transceiver Receive Control Register" name="RX_CTRL" offset="0x14A" size="1">
-                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES"
-                              values="PDT_THRES_bitf"/>
+                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES" values="PDT_THRES_bitf"/>
                 </register>
                 <register caption="Start of Frame Delimiter Value Register" name="SFD_VALUE" offset="0x14B" size="1">
-                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE"
-                              values="SFD_VALUE_BITF"/>
+                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE" values="SFD_VALUE_BITF"/>
                 </register>
                 <register caption="Transceiver Control Register 2" name="TRX_CTRL_2" offset="0x14C" size="1">
                     <bitfield caption="RX Safe Mode" mask="0x80" name="RX_SAFE_MODE"/>
-                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE"
-                              values="OQPSK_DATA_RATE_bitf"/>
+                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE" values="OQPSK_DATA_RATE_bitf"/>
                 </register>
                 <register caption="Antenna Diversity Control Register" name="ANT_DIV" offset="0x14D" size="1">
-                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL"
-                              values="ANT_SEL_bitf"/>
-                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN"
-                              values="ANT_DIV_EN_bitf"/>
-                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN"
-                              values="ANT_EXT_SW_EN_bitf"/>
-                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL"
-                              values="ANT_CTRL_bitf"/>
+                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL" values="ANT_SEL_bitf"/>
+                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN" values="ANT_DIV_EN_bitf"/>
+                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN" values="ANT_EXT_SW_EN_bitf"/>
+                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL" values="ANT_CTRL_bitf"/>
                 </register>
                 <register caption="Transceiver Interrupt Enable Register" name="IRQ_MASK" offset="0x14E" size="1">
                     <bitfield caption="Awake Interrupt Enable" mask="0x80" name="AWAKE_EN"/>
@@ -1622,14 +1401,10 @@
                 </register>
                 <register caption="Transceiver Interrupt Enable Register 1" name="IRQ_MASK1" offset="0xBE" size="1">
                     <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10"
-                              name="MAF_3_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08"
-                              name="MAF_2_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04"
-                              name="MAF_1_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02"
-                              name="MAF_0_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10" name="MAF_3_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08" name="MAF_2_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04" name="MAF_1_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02" name="MAF_0_AMI_EN"/>
                     <bitfield caption="Transmit Start Interrupt enable" mask="0x01" name="TX_START_EN"/>
                 </register>
                 <register caption="Transceiver Interrupt Status Register 1" name="IRQ_STATUS1" offset="0xBF" size="1">
@@ -1640,29 +1415,22 @@
                     <bitfield caption="Address Match Interrupt Status Address filter 0" mask="0x02" name="MAF_0_AMI"/>
                     <bitfield caption="Transmit Start Interrupt Status" mask="0x01" name="TX_START"/>
                 </register>
-                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150"
-                          size="1">
-                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT"
-                              values="AVREG_EXT_BITF"/>
+                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150" size="1">
+                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT" values="AVREG_EXT_BITF"/>
                     <bitfield caption="AVDD Supply Voltage Valid" mask="0x40" name="AVDD_OK" values="AVDD_OK_BITF"/>
-                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT"
-                              values="DVREG_EXT_BITF"/>
+                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT" values="DVREG_EXT_BITF"/>
                     <bitfield caption="DVDD Supply Voltage Valid" mask="0x04" name="DVDD_OK" values="DVDD_OK_BITF"/>
                 </register>
                 <register caption="Battery Monitor Control and Status Register" name="BATMON" offset="0x151" size="1">
                     <bitfield caption="Battery Monitor Interrupt Status" mask="0x80" name="BAT_LOW"/>
                     <bitfield caption="Battery Monitor Interrupt Enable" mask="0x40" name="BAT_LOW_EN"/>
                     <bitfield caption="Battery Monitor Status" mask="0x20" name="BATMON_OK" values="BATMON_OK_bitf"/>
-                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR"
-                              values="BATMON_HR_bitf"/>
-                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH"
-                              values="BATMON_VTH_bitf"/>
+                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR" values="BATMON_HR_bitf"/>
+                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH" values="BATMON_VTH_bitf"/>
                 </register>
                 <register caption="Crystal Oscillator Control Register" name="XOSC_CTRL" offset="0x152" size="1">
-                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE"
-                              values="XTAL_MODE_BITF"/>
-                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM"
-                              values="XTAL_TRIM_bitf"/>
+                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE" values="XTAL_MODE_BITF"/>
+                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM" values="XTAL_TRIM_bitf"/>
                 </register>
                 <register caption="Channel Control Register 0" name="CC_CTRL_0" offset="0x153" size="1">
                     <bitfield caption="Channel Number" mask="0xFF" name="CC_NUMBER"/>
@@ -1670,54 +1438,42 @@
                 <register caption="Channel Control Register 1" name="CC_CTRL_1" offset="0x154" size="1">
                     <bitfield caption="Channel Band" mask="0x0F" name="CC_BAND"/>
                 </register>
-                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155"
-                          size="1">
+                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155" size="1">
                     <bitfield caption="Prevent Frame Reception" mask="0x80" name="RX_PDT_DIS"/>
                     <bitfield caption="Receiver Override Function" mask="0x40" name="RX_OVERRIDE"/>
-                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL"
-                              values="RX_PDT_LEVEL_BITF"/>
+                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL" values="RX_PDT_LEVEL_BITF"/>
                 </register>
-                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156"
-                          size="1">
-                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL"
-                              values="RX_RPC_CTRL_BITF"/>
+                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156" size="1">
+                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL" values="RX_RPC_CTRL_BITF"/>
                     <bitfield caption="Reciver Smart Receiving Mode Enable" mask="0x20" name="RX_RPC_EN"/>
                     <bitfield caption="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10" name="PDT_RPC_EN"/>
                     <bitfield caption="PLL Smart Receiving Mode Enable" mask="0x08" name="PLL_RPC_EN"/>
                     <bitfield caption="Reserved" mask="0x04" name="Res0"/>
                     <bitfield caption="Smart Receiving Mode IPAN Handling Enable" mask="0x02" name="IPAN_RPC_EN"/>
-                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01"
-                              name="XAH_RPC_EN"/>
+                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01" name="XAH_RPC_EN"/>
                 </register>
-                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157"
-                          size="1">
+                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157" size="1">
                     <bitfield caption="Filter Reserved Frames" mask="0x20" name="AACK_FLTR_RES_FT"/>
                     <bitfield caption="Process Reserved Frames" mask="0x10" name="AACK_UPLD_RES_FT"/>
-                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME"
-                              values="AACK_ACK_TIME_bitf"/>
+                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME" values="AACK_ACK_TIME_bitf"/>
                     <bitfield caption="Enable Promiscuous Mode" mask="0x02" name="AACK_PROM_MODE"/>
                 </register>
                 <register caption="Transceiver Filter Tuning Control Register" name="FTN_CTRL" offset="0x158" size="1">
                     <bitfield caption="Start Calibration Loop of Filter Tuning Network" mask="0x80" name="FTN_START"/>
                 </register>
-                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF"
-                          offset="0x15A" size="1">
+                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF" offset="0x15A" size="1">
                     <bitfield caption="Start Center Frequency Calibration" mask="0x80" name="PLL_CF_START"/>
                 </register>
-                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B"
-                          size="1">
+                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B" size="1">
                     <bitfield caption="Start Delay Cell Calibration" mask="0x80" name="PLL_DCU_START"/>
                 </register>
-                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1"
-                          ocd-rw="R">
+                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1" ocd-rw="R">
                     <bitfield caption="Part Number" mask="0xFF" name="PART_NUM" values="PART_NUM_bitf"/>
                 </register>
-                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D"
-                          size="1" ocd-rw="R">
+                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D" size="1" ocd-rw="R">
                     <bitfield caption="Version Number" mask="0xFF" name="VERSION_NUM" values="VERSION_NUM_2_BITF"/>
                 </register>
-                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0"
-                          offset="0x15E" size="1" ocd-rw="R">
+                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0" offset="0x15E" size="1" ocd-rw="R">
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x80" name="MAN_ID_07"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x40" name="MAN_ID_06"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x20" name="MAN_ID_05"/>
@@ -1727,13 +1483,10 @@
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x02" name="MAN_ID_01"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x01" name="MAN_ID_00" values="MAN_ID_0_BITF"/>
                 </register>
-                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1"
-                          offset="0x15F" size="1" ocd-rw="R">
-                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF"
-                              lsb="10"/>
+                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1" offset="0x15F" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF" lsb="10"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160"
-                          size="1">
+                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160" size="1">
                     <bitfield caption="MAC Short Address" mask="0x80" name="SHORT_ADDR_07"/>
                     <bitfield caption="MAC Short Address" mask="0x40" name="SHORT_ADDR_06"/>
                     <bitfield caption="MAC Short Address" mask="0x20" name="SHORT_ADDR_05"/>
@@ -1743,12 +1496,10 @@
                     <bitfield caption="MAC Short Address" mask="0x02" name="SHORT_ADDR_01"/>
                     <bitfield caption="MAC Short Address" mask="0x01" name="SHORT_ADDR_00"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1"
-                          offset="0x161" size="1">
+                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1" offset="0x161" size="1">
                     <bitfield caption="MAC Short Address" mask="0xFF" name="SHORT_ADDR_" lsb="10"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0"
-                          offset="0x162" size="1">
+                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0" offset="0x162" size="1">
                     <bitfield caption="MAC Personal Area Network ID" mask="0x80" name="PAN_ID_07"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x40" name="PAN_ID_06"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x20" name="PAN_ID_05"/>
@@ -1758,8 +1509,7 @@
                     <bitfield caption="MAC Personal Area Network ID" mask="0x02" name="PAN_ID_01"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x01" name="PAN_ID_00"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1"
-                          offset="0x163" size="1">
+                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1" offset="0x163" size="1">
                     <bitfield caption="MAC Personal Area Network ID" mask="0xFF" name="PAN_ID_" lsb="10"/>
                 </register>
                 <register caption="Transceiver MAC IEEE Address Register 0" name="IEEE_ADDR_0" offset="0x164" size="1">
@@ -1793,17 +1543,12 @@
                 <register caption="Transceiver MAC IEEE Address Register 7" name="IEEE_ADDR_7" offset="0x16B" size="1">
                     <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="70"/>
                 </register>
-                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0"
-                          offset="0x16C" size="1">
-                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0"
-                              name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
-                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E"
-                              name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
-                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION"
-                              values="SLOTTED_OPERATION_BITF"/>
+                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0" offset="0x16C" size="1">
+                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0" name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
+                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E" name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
+                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION" values="SLOTTED_OPERATION_BITF"/>
                 </register>
-                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0"
-                          offset="0x16D" size="1">
+                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0" offset="0x16D" size="1">
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x80" name="CSMA_SEED_07"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x40" name="CSMA_SEED_06"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x20" name="CSMA_SEED_05"/>
@@ -1813,27 +1558,21 @@
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x02" name="CSMA_SEED_01"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x01" name="CSMA_SEED_00"/>
                 </register>
-                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1"
-                          offset="0x16E" size="1">
-                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE"
-                              values="AACK_FVN_MODE_bitf"/>
+                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1" offset="0x16E" size="1">
+                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE" values="AACK_FVN_MODE_bitf"/>
                     <bitfield caption="Set Frame Pending Sub-field" mask="0x20" name="AACK_SET_PD"/>
                     <bitfield caption="Disable Acknowledgment Frame Transmission" mask="0x10" name="AACK_DIS_ACK"/>
                     <bitfield caption="Set Personal Area Network Coordinator" mask="0x08" name="AACK_I_AM_COORD"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x07" name="CSMA_SEED_1"/>
                 </register>
-                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F"
-                          size="1">
+                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F" size="1">
                     <bitfield caption="Maximum Back-off Exponent" mask="0xF0" name="MAX_BE" values="MAX_BE_bitf"/>
                     <bitfield caption="Minimum Back-off Exponent" mask="0x0F" name="MIN_BE" values="MIN_BE_bitf"/>
                 </register>
-                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176"
-                          size="1">
-                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG"
-                              values="TST_CTRL_DIG_BITF"/>
+                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176" size="1">
+                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG" values="TST_CTRL_DIG_BITF"/>
                 </register>
-                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B"
-                          size="1">
+                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B" size="1">
                     <bitfield caption="Received Frame Length" mask="0xFF" name="RX_LENGTH"/>
                 </register>
                 <register caption="Start of frame buffer" name="TRXFBST" offset="0x180" size="1" mask="0xFF"/>
@@ -1972,10 +1711,8 @@
                 <value caption="2480 MHz" name="F_2480MHZ" value="26"/>
             </value-group>
             <value-group caption="" name="PDT_THRES_bitf">
-                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled"
-                       name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
-                <value caption="Recommended correlator threshold for Antenna Diversity operation"
-                       name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
+                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled" name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
+                <value caption="Recommended correlator threshold for Antenna Diversity operation" name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
             </value-group>
             <value-group caption="" name="SFD_VALUE_BITF">
                 <value caption="IEEE 802.15.4 compliant value of the SFD" name="IEEE_SFD" value="0xA7"/>
@@ -2002,28 +1739,22 @@
                 <value caption="Reserved" name="VAL_0" value="0"/>
                 <value caption="Antenna 1: DIG1=H, DIG2=L" name="ANT_1" value="1"/>
                 <value caption="Antenna 0: DIG1=L, DIG2=H" name="ANT_0" value="2"/>
-                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity"
-                       name="ANT_RESET" value="3"/>
+                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity" name="ANT_RESET" value="3"/>
             </value-group>
             <value-group caption="" name="AVREG_EXT_BITF">
-                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT"
-                       value="0"/>
-                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section."
-                       name="AVDD_EXT" value="1"/>
+                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT" value="0"/>
+                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section." name="AVDD_EXT" value="1"/>
             </value-group>
             <value-group caption="" name="AVDD_OK_BITF">
                 <value caption="Analog voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
                 <value caption="Analog supply voltage has settled" name="VAL_1" value="1"/>
             </value-group>
             <value-group caption="" name="DVREG_EXT_BITF">
-                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT"
-                       value="0"/>
-                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section."
-                       name="DVDD_EXT" value="1"/>
+                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT" value="0"/>
+                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section." name="DVDD_EXT" value="1"/>
             </value-group>
             <value-group caption="" name="DVDD_OK_BITF">
-                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0"
-                       value="0"/>
+                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
                 <value caption="Digital supply voltage has settled" name="VAL_1" value="1"/>
             </value-group>
             <value-group caption="" name="BATMON_OK_bitf">
@@ -2053,10 +1784,8 @@
                 <value caption="3.675V / 2.45V (BATMON_HR=1/0)" name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="XTAL_MODE_BITF">
-                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4"
-                       value="0x4"/>
-                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled."
-                       name="VAL_0xF" value="0xF"/>
+                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4" value="0x4"/>
+                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled." name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="XTAL_TRIM_bitf">
                 <value caption="0.0 pF, trimming capacitors disconnected" name="XTAL_TRIM_MIN" value="0x0"/>
@@ -2065,21 +1794,17 @@
                 <value caption="4.5 pF, trimming capacitor switched on" name="XTAL_TRIM_MAX" value="0xF"/>
             </value-group>
             <value-group caption="" name="RX_PDT_LEVEL_BITF">
-                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered"
-                       name="RX_PDT_LEVEL_MIN" value="0x0"/>
+                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered" name="RX_PDT_LEVEL_MIN" value="0x0"/>
                 <value caption="RX_THRES &gt; RSSI_BASE_VAL + 0 · 3; RSSI &gt; -90 dBm" name="VAL_0x1" value="0x1"/>
                 <value caption="..." name="VAL_0x2" value="0x2"/>
                 <value caption="RX_THRES &gt; RSSI_BASE_VAL + 13 · 3; RSSI &gt; -51 dBm" name="VAL_0xE" value="0xE"/>
-                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX"
-                       value="0xF"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX" value="0xF"/>
             </value-group>
             <value-group caption="" name="RX_RPC_CTRL_BITF">
-                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0"
-                       value="0"/>
+                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0" value="0"/>
                 <value caption="Reserved" name="VAL_1" value="1"/>
                 <value caption="Reserved" name="VAL_2" value="2"/>
-                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3"
-                       value="3"/>
+                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3" value="3"/>
             </value-group>
             <value-group caption="" name="AACK_ACK_TIME_bitf">
                 <value caption="12 symbols acknowledgment time" name="AACK_ACK_TIME_12_SYM" value="0"/>
@@ -2095,12 +1820,10 @@
                 <value caption="Revision B" name="REV_B" value="1"/>
             </value-group>
             <value-group caption="" name="MAN_ID_0_BITF">
-                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F"
-                       name="ATMEL_BYTE_0" value="0x1f"/>
+                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F" name="ATMEL_BYTE_0" value="0x1f"/>
             </value-group>
             <value-group caption="" name="MAN_ID_1_BITF">
-                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F"
-                       name="ATMEL_BYTE_1" value="0x00"/>
+                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F" name="ATMEL_BYTE_1" value="0x00"/>
             </value-group>
             <value-group caption="" name="MAX_FRAME_RETRIES_bitf">
                 <value caption="Retransmission of frame is not attempted." name="VAL_0x0" value="0x0"/>
@@ -2117,10 +1840,8 @@
                 <value caption="Immediate frame re-transmission without performing CSMA-CA" name="VAL_0x7" value="0x7"/>
             </value-group>
             <value-group caption="" name="SLOTTED_OPERATION_BITF">
-                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested."
-                       name="SLOTTED_OP_DIS" value="0"/>
-                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller."
-                       name="SLOTTED_OP_EN" value="1"/>
+                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested." name="SLOTTED_OP_DIS" value="0"/>
+                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller." name="SLOTTED_OP_EN" value="1"/>
             </value-group>
             <value-group caption="" name="AACK_FVN_MODE_bitf">
                 <value caption="Acknowledge frames with version number 0" name="VAL_0" value="0"/>
@@ -2131,17 +1852,14 @@
             <value-group caption="" name="MAX_BE_bitf">
                 <value caption="This value is not valid for the maximum back-off exponent." name="VAL_1" value="1"/>
                 <value caption="This value is not valid for the maximum back-off exponent." name="VAL_2" value="2"/>
-                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3"
-                       value="3"/>
+                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3" value="3"/>
                 <value caption="..." name="VAL_4" value="4"/>
-                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8"
-                       value="8"/>
+                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8" value="8"/>
             </value-group>
             <value-group caption="" name="MIN_BE_bitf">
                 <value caption="Minimum value of minimum back-off exponent." name="VAL_0" value="0"/>
                 <value caption="..." name="VAL_1" value="1"/>
-                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE."
-                       name="VAL_8" value="8"/>
+                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE." name="VAL_8" value="8"/>
             </value-group>
             <value-group caption="" name="TST_CTRL_DIG_BITF">
                 <value caption="NORMAL (no test is active)" name="VAL_0" value="0"/>
@@ -2150,104 +1868,76 @@
         </module>
         <module caption="MAC Symbol Counter" name="SYMCNT">
             <register-group caption="MAC Symbol Counter" name="SYMCNT">
-                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH"
-                          offset="0xFC" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF"
-                              name="SCTSTRHH"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH" offset="0xFC" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSTRHH"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL"
-                          offset="0xFB" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF"
-                              name="SCTSTRHL"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL" offset="0xFB" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSTRHL"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH"
-                          offset="0xFA" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF"
-                              name="SCTSTRLH"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH" offset="0xFA" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSTRLH"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL"
-                          offset="0xF9" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF"
-                              name="SCTSTRLL"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL" offset="0xF9" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSTRLL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 HH-Byte" mask="0xFF" name="SCOCR1HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 HL-Byte" mask="0xFF" name="SCOCR1HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 LH-Byte" mask="0xFF" name="SCOCR1LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 LL-Byte" mask="0xFF" name="SCOCR1LL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 HH-Byte" mask="0xFF" name="SCOCR2HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 HL-Byte" mask="0xFF" name="SCOCR2HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 LH-Byte" mask="0xFF" name="SCOCR2LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 LL-Byte" mask="0xFF" name="SCOCR2LL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 HH-Byte" mask="0xFF" name="SCOCR3HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 HL-Byte" mask="0xFF" name="SCOCR3HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 LH-Byte" mask="0xFF" name="SCOCR3LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 LL-Byte" mask="0xFF" name="SCOCR3LL"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSRHH"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSRHL"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSRLH"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSRLL"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register HH-Byte" mask="0xFF" name="SCBTSRHH"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register HL-Byte" mask="0xFF" name="SCBTSRHL"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register LH-Byte" mask="0xFF" name="SCBTSRLH"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register LL-Byte" mask="0xFF" name="SCBTSRLL"/>
                 </register>
                 <register caption="Symbol Counter Register HH-Byte" name="SCCNTHH" offset="0xE4" size="1">
@@ -2281,8 +1971,7 @@
                 <register caption="Symbol Counter Control Register 1" name="SCCR1" offset="0xDD" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res" lsb="5"/>
                     <bitfield caption="Symbol Counter Beacon Timestamp Mask Register" mask="0x20" name="SCBTSM"/>
-                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"
-                              name="SCCKDIV" values="SCCKDIV_BITF"/>
+                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C" name="SCCKDIV" values="SCCKDIV_BITF"/>
                     <bitfield caption="Enable External Clock Source on PG2" mask="0x02" name="SCEECLK"/>
                     <bitfield caption="Backoff Slot Counter enable" mask="0x01" name="SCENBO"/>
                 </register>
@@ -2296,32 +1985,21 @@
                 </register>
                 <register caption="Symbol Counter Compare Source Register" name="SCCSR" offset="0xDB" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"
-                              name="SCCS3" values="SCCS3_BITF"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C"
-                              name="SCCS2" values="SCCS2_BITF"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03"
-                              name="SCCS1" values="SCCS1_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30" name="SCCS3" values="SCCS3_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C" name="SCCS2" values="SCCS2_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03" name="SCCS1" values="SCCS1_BITF"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH"
-                          offset="0xDA" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"
-                              name="SCRSTRHH"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH" offset="0xDA" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF" name="SCRSTRHH"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL"
-                          offset="0xD9" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF"
-                              name="SCRSTRHL"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL" offset="0xD9" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF" name="SCRSTRHL"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH"
-                          offset="0xD8" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF"
-                              name="SCRSTRLH"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH" offset="0xD8" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF" name="SCRSTRLH"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL"
-                          offset="0xD7" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF"
-                              name="SCRSTRLL"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL" offset="0xD7" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF" name="SCRSTRLL"/>
                 </register>
             </register-group>
             <value-group caption="" name="SCCKDIV_BITF">
@@ -2334,28 +2012,19 @@
                 <value caption="Transceiver Clock divided by 4,   (4MHz)" name="VAL_6" value="6"/>
             </value-group>
             <value-group caption="" name="SCCS3_BITF">
-                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
             <value-group caption="" name="SCCS2_BITF">
-                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
             <value-group caption="" name="SCCS1_BITF">
-                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
         </module>
         <module caption="EEPROM" name="EEPROM">
@@ -2390,39 +2059,28 @@
                 </register>
             </register-group>
             <value-group caption="" name="OCDR_DATA_BITF">
-                <value caption="Refer to the debugger documentation for further information on how to use this register."
-                       name="VAL_0" value="0"/>
+                <value caption="Refer to the debugger documentation for further information on how to use this register." name="VAL_0" value="0"/>
             </value-group>
         </module>
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL3"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL3"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
-                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT"
-                              values="INTERRUPT_REQ_ENABLE_BITF"/>
+                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT" values="INTERRUPT_REQ_ENABLE_BITF"/>
                 </register>
                 <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
-                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF"
-                              values="INTERRUPT_EXT_FLAG_BITF"/>
+                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF" values="INTERRUPT_EXT_FLAG_BITF"/>
                 </register>
                 <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
                     <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="16"/>
@@ -2444,12 +2102,9 @@
             </register-group>
             <value-group caption="" name="INTERRUPT_SENSE_CONTROL3">
                 <value caption="The low level of INTn generates an interrupt request." name="VAL_0x00" value="0x00"/>
-                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01"
-                       value="0x01"/>
-                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01" value="0x01"/>
+                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02" value="0x02"/>
+                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="INTERRUPT_REQ_ENABLE_BITF">
                 <value caption="All external pin interrupts are disabled." name="VAL_0x00" value="0x00"/>
@@ -2457,11 +2112,9 @@
             </value-group>
             <value-group caption="" name="INTERRUPT_EXT_FLAG_BITF">
                 <value caption="No edge or logic change on INT7:0 occurred." name="VAL_0x00" value="0x00"/>
-                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request."
-                       name="VAL_0x01" value="0x01"/>
+                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request." name="VAL_0x01" value="0x01"/>
                 <value caption="..." name="VAL_0x02" value="0x02"/>
-                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request."
-                       name="VAL_0x80" value="0x80"/>
+                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request." name="VAL_0x80" value="0x80"/>
             </value-group>
         </module>
         <module caption="Analog-to-Digital Converter" name="ADC">
@@ -2478,8 +2131,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="AVDD Supply Voltage OK" mask="0x80" name="AVDDOK"/>
@@ -2487,12 +2139,10 @@
                     <bitfield caption="Reference Voltage OK" mask="0x20" name="REFOK"/>
                     <bitfield caption="Analog Channel Change" mask="0x10" name="ACCH"/>
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="The ADC Control and Status Register C" name="ADCSRC" offset="0x77" size="1">
-                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT"
-                              values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
+                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT" values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
                     <bitfield caption="Reserved" mask="0x20" name="Res0"/>
                     <bitfield caption="ADC Start-up Time" mask="0x1F" name="ADSUT" values="ANALOG_ADC_STARTUP_TIME"/>
                 </register>
@@ -2520,10 +2170,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF9">
                 <value caption="AREF, Internal reference voltage generation turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVDD with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -2602,14 +2250,12 @@
                     <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
                 </register>
                 <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1">
-                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL"
-                              values="OSCCAL_BITF"/>
+                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL" values="OSCCAL_BITF"/>
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
                 </register>
                 <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
                     <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
@@ -2682,8 +2328,7 @@
                 <value caption="Reserved" name="VAL_0xC" value="0xC"/>
                 <value caption="Reserved" name="VAL_0xD" value="0xD"/>
                 <value caption="Reserved" name="VAL_0xE" value="0xE"/>
-                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed."
-                       name="VAL_0xF" value="0xF"/>
+                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed." name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
                 <value caption="Idle" name="IDLE" value="0x00"/>
@@ -2706,8 +2351,7 @@
             <register-group caption="FLASH Controller" name="FLASH">
                 <register caption="Flash Extended-Mode Control-Register" name="NEMCR" offset="0x75" size="1">
                     <bitfield caption="Enable Extended Address Mode for Extra Rows" mask="0x40" name="ENEAM"/>
-                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM"
-                              values="NEMCR_ADDRESS_BITF"/>
+                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM" values="NEMCR_ADDRESS_BITF"/>
                 </register>
                 <register caption="Reference Voltage Calibration Register" name="BGCR" offset="0x67" size="1">
                     <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
@@ -2759,14 +2403,11 @@
                     <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
                     <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
                 </register>
-                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130"
-                          size="1">
+                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130" size="1">
                     <bitfield caption="Low-Byte Data Register Bits" mask="0x0F" name="LLDRL" values="LLDRL_VALUE_BITF"/>
                 </register>
-                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131"
-                          size="1">
-                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH"
-                              values="LLDRH_VALUE_BITF"/>
+                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131" size="1">
+                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH" values="LLDRH_VALUE_BITF"/>
                 </register>
                 <register caption="Low Leakage Voltage Regulator Control Register" name="LLCR" offset="0x12F" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
@@ -2791,16 +2432,12 @@
                 </register>
             </register-group>
             <value-group caption="" name="LLDRL_VALUE_BITF">
-                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08"
-                       value="0x08"/>
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00" value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08" value="0x08"/>
             </value-group>
             <value-group caption="" name="LLDRH_VALUE_BITF">
-                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10"
-                       value="0x10"/>
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00" value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10" value="0x10"/>
             </value-group>
             <value-group caption="" name="PAD_IO_bitf">
                 <value caption="2 mA" name="PAD_IO_2MA" value="0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16.xml
index 92ec9f06..01f1caa2 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16.xml
@@ -1,32 +1,21 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega16L-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega16L-8PU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega16L-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN44"
-                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega16-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
-                 package="TQFP44" vccmin="4.5" vccmax="5.5"/>
-        <variant ordercode="ATmega16-16PU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="4.5" vccmax="5.5"/>
-        <variant ordercode="ATmega16-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
-                 package="QFN44" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega16L-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16L-8PU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="PDIP40" package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16L-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN44" package="QFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44" package="TQFP44" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega16-16PU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="PDIP40" package="PDIP40" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega16-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44" package="QFN44" vccmin="4.5" vccmax="5.5"/>
     </variants>
     <device name="ATmega16" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,8 +32,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
@@ -54,8 +42,7 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="OC" function="default" pad="PB3"/>
                         <signal group="T" function="default" pad="PB0"/>
@@ -64,8 +51,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -76,8 +62,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="2" function="default" pad="PB2"/>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
@@ -87,14 +72,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -102,8 +85,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="TOSC" index="2" function="default" pad="PC7"/>
                         <signal group="TOSC" index="1" function="default" pad="PC6"/>
@@ -113,8 +95,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SCK" function="default" pad="PB7"/>
                         <signal group="MISO" function="default" pad="PB6"/>
@@ -125,8 +106,7 @@
             </module>
             <module name="USART">
                 <instance name="USART" caption="USART">
-                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="XCK" function="default" pad="PB0"/>
                         <signal group="TXD" function="default" pad="PD1"/>
@@ -136,8 +116,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -146,8 +125,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
@@ -156,8 +134,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="7" function="default" pad="PA7"/>
                         <signal group="ADC" index="6" function="default" pad="PA6"/>
@@ -172,8 +149,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TDI" function="default" pad="PC5"/>
                         <signal group="TDO" function="default" pad="PC4"/>
@@ -184,14 +160,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -204,8 +178,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -218,8 +191,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -232,8 +204,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -248,26 +219,22 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
@@ -345,8 +312,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -407,8 +373,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -434,8 +399,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -475,8 +439,7 @@
                     <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x10" name="CKOPT"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
-                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
                     <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
                 </register>
@@ -489,116 +452,61 @@
                 <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
-                       value="0x01"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
-                       value="0x11"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS"
-                       value="0x21"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
-                       value="0x02"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
-                       value="0x12"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
-                       value="0x22"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
-                       value="0x04"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
-                       value="0x14"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
-                       value="0x24"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
-                       value="0x09"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
-                       value="0x19"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
-                       value="0x29"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS" value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS" value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS" value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS" value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS" value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS" value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS" value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS" value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS" value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS" value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS" value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms" name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms" name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms" name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms" name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms" name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms" name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms" name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms" name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms" name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms" name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms" name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms" name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms" name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms" name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms" name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms" name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms" name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms" name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms" name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms" name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms" name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms" name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms" name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms" name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
@@ -645,8 +553,7 @@
                 <register caption="Timer/Counter Register" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
                 <register caption="Output Compare Register" name="OCR0" offset="0x5C" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
-                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02" name="OCIE0"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -678,10 +585,8 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
-                              name="OCIE1A"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
-                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -701,16 +606,12 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -737,10 +638,8 @@
                     <bitfield caption="External Interrupt Flag 2" mask="0x20" name="INTF2"/>
                 </register>
                 <register caption="General Interrupt Control Register" name="MCUCR" offset="0x55" size="1">
-                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
                     <bitfield caption="Interrupt Sense Control 2" mask="0x40" name="ISC2"/>
@@ -781,10 +680,8 @@
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Sleep Mode Select" mask="0xB0" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
                     <bitfield caption="Sleep Enable" mask="0x40" name="SE"/>
-                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
@@ -844,8 +741,7 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0x44" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2" offset="0x43" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2" offset="0x43" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0x42" size="1">
                     <bitfield caption="Asynchronous Timer/counter2" mask="0x08" name="AS2"/>
                     <bitfield caption="Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
@@ -933,8 +829,7 @@
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ"/>
                     <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
                 </register>
-                <register caption="USART Baud Rate Register Hight Byte" name="UBRRH" offset="0x40" size="1"
-                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRRH" offset="0x40" size="1" mask="0x0F"/>
                 <register caption="USART Baud Rate Register Low Byte" name="UBRRL" offset="0x29" size="1" mask="0xFF"/>
             </register-group>
             <value-group caption="" name="COMM_USART_MODE">
@@ -986,16 +881,14 @@
                 <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -1018,8 +911,7 @@
                     <bitfield caption="ADC Auto Trigger" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
@@ -1030,8 +922,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1046,8 +937,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          ocd-rw="">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" ocd-rw="">
                     <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
@@ -1096,8 +986,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
                     <bitfield caption="RW" mask="0x10" name="WDTOE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1608.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1608.xml
index 1ea4fda0..457e8611 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1608.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1608.xml
@@ -1,36 +1,25 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega1608-AFR" package="TQFP32" pinout="QFP32" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
-        <variant ordercode="ATmega1608-MFR" package="VQFN32" pinout="QFN32" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
-        <variant ordercode="ATmega1608-XFR" package="SSOP28" pinout="SSOP28" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega1608-AFR" package="TQFP32" pinout="QFP32" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega1608-MFR" package="VQFN32" pinout="QFN32" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega1608-XFR" package="SSOP28" pinout="SSOP28" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
     </variants>
     <device name="ATmega1608" family="AVR8" architecture="AVR8X" avr-family="AVR MEGA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x4000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000"
-                                start="0x00004000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001300" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00004000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -80,8 +69,7 @@
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
@@ -91,13 +79,11 @@
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
-                                pad="PF6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1" pad="PF6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
                     </signals>
                 </instance>
@@ -135,18 +121,12 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT5" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT5" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -492,10 +472,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -553,10 +531,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -577,8 +553,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -673,23 +648,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -730,14 +700,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
@@ -750,14 +716,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -767,14 +730,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -784,14 +744,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -801,14 +758,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
@@ -935,12 +889,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -985,8 +937,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1014,12 +965,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1053,66 +1002,51 @@
         <module caption="Event System" id="I2118" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
-                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
-                              values="EVSYS_STROBE0"/>
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W" values="EVSYS_STROBE0"/>
                 </register>
                 <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
                 <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
@@ -1229,16 +1163,12 @@
         </module>
         <module caption="Fuses" id="I2600" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1248,16 +1178,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1285,11 +1213,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1463,8 +1389,7 @@
                     <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
                     <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
                 </register>
-                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
                     <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
                     <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
@@ -1481,21 +1406,15 @@
                     <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
                     <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
                 </register>
-                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
-                          rw="RW" size="1">
-                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
-                              values="PORTMUX_USART1"/>
-                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
-                              values="PORTMUX_USART2"/>
-                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
-                              values="PORTMUX_USART3"/>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW" values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW" values="PORTMUX_USART3"/>
                 </register>
             </register-group>
             <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
@@ -1618,12 +1537,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1685,16 +1602,11 @@
                 <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
                 <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
                 <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
-                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R" size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R" size="1"/>
                 <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
                 <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
                 <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
@@ -1709,10 +1621,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1808,8 +1718,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1922,8 +1831,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1959,8 +1867,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2035,10 +1942,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2050,8 +1955,7 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -2151,15 +2055,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2174,19 +2076,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -2209,8 +2107,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2228,8 +2125,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2361,10 +2257,8 @@
         <module caption="Voltage reference" id="I2600" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
-                              values="VREF_AC0REFSEL"/>
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW" values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1609.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1609.xml
index 7786dfee..99a2e203 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1609.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1609.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega1609-AFR" package="TQFP48" pinout="QFP48" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
-        <variant ordercode="ATmega1609-MFR" package="UQFN48" pinout="QFN48" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega1609-AFR" package="TQFP48" pinout="QFP48" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega1609-MFR" package="UQFN48" pinout="QFN48" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
     </variants>
     <device name="ATmega1609" family="AVR8" architecture="AVR8X" avr-family="AVR MEGA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x4000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000"
-                                start="0x00004000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001300" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00004000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -82,26 +72,22 @@
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
-                                pad="PC6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
-                                pad="PF6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1" pad="PF6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
                     </signals>
                 </instance>
@@ -139,24 +125,15 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT1" function="EVSYS" group="EVOUT" index="1"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS_ALT" group="EVOUT" index="2"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT4" function="EVSYS" group="EVOUT" index="4"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT5" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS_ALT" group="EVOUT" index="2" pad="PC7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT4" function="EVSYS" group="EVOUT" index="4" pad="PE2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT5" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -563,10 +540,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -624,10 +599,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -648,8 +621,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -744,23 +716,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -801,14 +768,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
@@ -821,14 +784,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -838,14 +798,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -855,14 +812,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -872,14 +826,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
@@ -1006,12 +957,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -1056,8 +1005,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1085,12 +1033,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1124,74 +1070,57 @@
         <module caption="Event System" id="I2118" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
-                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
-                              values="EVSYS_STROBE0"/>
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W" values="EVSYS_STROBE0"/>
                 </register>
                 <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
                 <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
@@ -1310,16 +1239,12 @@
         </module>
         <module caption="Fuses" id="I2600" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1329,16 +1254,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1366,11 +1289,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1544,8 +1465,7 @@
                     <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
                     <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
                 </register>
-                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
                     <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
                     <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
@@ -1562,21 +1482,15 @@
                     <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
                     <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
                 </register>
-                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
-                          rw="RW" size="1">
-                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
-                              values="PORTMUX_USART1"/>
-                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
-                              values="PORTMUX_USART2"/>
-                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
-                              values="PORTMUX_USART3"/>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW" values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW" values="PORTMUX_USART3"/>
                 </register>
             </register-group>
             <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
@@ -1708,12 +1622,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1775,16 +1687,11 @@
                 <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
                 <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
                 <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
-                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R" size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R" size="1"/>
                 <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
                 <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
                 <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
@@ -1799,10 +1706,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1898,8 +1803,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2012,8 +1916,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2049,8 +1952,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2125,10 +2027,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2140,8 +2040,7 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -2241,15 +2140,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2264,19 +2161,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -2299,8 +2192,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2318,8 +2210,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2451,10 +2342,8 @@
         <module caption="Voltage reference" id="I2600" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
-                              values="VREF_AC0REFSEL"/>
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW" values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA162.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA162.xml
index 6c07c77a..6ee279d1 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA162.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA162.xml
@@ -8,16 +8,11 @@
     <device name="ATmega162" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +30,7 @@
                 <memory-segment name="XRAM" start="0x0500" size="0xfb00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,46 +40,38 @@
         <peripherals>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -93,26 +79,22 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTA" pad="PA0" index="0"/>
                         <signal group="P" function="PORTA" pad="PA1" index="1"/>
@@ -125,8 +107,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTB" pad="PB0" index="0"/>
                         <signal group="P" function="PORTB" pad="PB1" index="1"/>
@@ -139,8 +120,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTC" pad="PC0" index="0"/>
                         <signal group="P" function="PORTC" pad="PC1" index="1"/>
@@ -153,8 +133,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTD" pad="PD0" index="0"/>
                         <signal group="P" function="PORTD" pad="PD1" index="1"/>
@@ -167,8 +146,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTE" pad="PE0" index="0"/>
                         <signal group="P" function="PORTE" pad="PE1" index="1"/>
@@ -178,38 +156,32 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -294,8 +266,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -356,8 +327,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -383,8 +353,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -416,8 +385,7 @@
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
                     <bitfield caption="ATmega161 compability mode" mask="0x10" name="M161C"/>
-                    <bitfield caption="Brownout detector trigger level" mask="0x0E" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brownout detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -441,94 +409,50 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
@@ -574,10 +498,8 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x80" name="TOIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40"
-                              name="OCIE1A"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20"
-                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x08" name="TICIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -600,24 +522,18 @@
                     <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC3">
                 <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="TICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x10"
-                              name="OCIE3A"/>
-                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x08"
-                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x10" name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x08" name="OCIE3B"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x04" name="TOIE3"/>
                 </register>
-                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
-                          ocd-rw="R">
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3A" mask="0x10" name="OCF3A"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x08" name="OCF3B"/>
@@ -637,12 +553,9 @@
                     <bitfield caption="Clock Select3 bits" mask="0x07" name="CS3" values="CLK_SEL_3BIT_SWAPPED"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counte3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counte3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -669,8 +582,7 @@
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Control Register" name="TCCR2" offset="0x47" size="1">
                     <bitfield caption="Forde Output Compare" mask="0x80" name="FOC2"/>
-                    <bitfield caption="Pulse Width Modulator Select Bit 0" mask="0x40" name="WGM20"
-                              values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Pulse Width Modulator Select Bit 0" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
                     <bitfield caption="Compare Match Output Mode" mask="0x30" name="COM2"/>
                     <bitfield caption="Pulse Width Modulator Select Bit 1" mask="0x08" name="WGM21"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
@@ -711,16 +623,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -799,8 +709,7 @@
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
                     <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
                 </register>
-                <register caption="USART Baud Rate Register Highg Byte" name="UBRR1H" offset="0x5C" size="1"
-                          mask="0x8F">
+                <register caption="USART Baud Rate Register Highg Byte" name="UBRR1H" offset="0x5C" size="1" mask="0x8F">
                     <bitfield caption="Register Select" mask="0x80" name="URSEL0"/>
                     <bitfield caption="USART Baud Rate Register High bits" mask="0x0F" name="UBRR1" lsb="8"/>
                 </register>
@@ -870,10 +779,8 @@
                     <bitfield caption="External SRAM Wait State Select" mask="0x40" name="SRW10"/>
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
                     <bitfield caption="Sleep Mode Select" mask="0x10" name="SM1"/>
-                    <bitfield caption="Interrupt Sense Control 1 bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
-                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 1 bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
@@ -887,8 +794,7 @@
                 <register caption="Extended MCU Control Register" name="EMCUCR" offset="0x56" size="1">
                     <bitfield caption="Sleep mode Select Bit 0" mask="0x80" name="SM0"/>
                     <bitfield caption="Wait State Sector Limit Bits" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS"/>
-                    <bitfield caption="Wait State Select Bit 1 for Lower Sector" mask="0x0C" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait State Select Bit 1 for Lower Sector" mask="0x0C" name="SRW0" values="CPU_WAIT_STATES"/>
                     <bitfield caption="Wait State Select Bit 1 for Upper Sector" mask="0x02" name="SRW11"/>
                     <bitfield caption="Interrupt Sense Control 2" mask="0x01" name="ISC2"/>
                 </register>
@@ -897,8 +803,7 @@
                 </register>
                 <register caption="Clock prescale register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
@@ -906,8 +811,7 @@
                     <bitfield caption="External Memory High Mask Bits" mask="0x38" name="XMM"/>
                     <bitfield caption="Pull-up Disable" mask="0x04" name="PUD"/>
                     <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
-                    <bitfield caption="Prescaler Reset Timer/Counter3, Timer/Counter1 and Timer/Counter0" mask="0x01"
-                              name="PSR310"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter3, Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
                 </register>
             </register-group>
             <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
@@ -930,8 +834,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
                 <value caption="1" name="VAL_0x00" value="0x00"/>
@@ -950,8 +853,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x24" size="1"
-                          ocd-rw="">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x24" size="1" ocd-rw="">
                     <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
@@ -1026,12 +928,10 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 0 Register" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter 0 Output Compare Register" name="OCR0" offset="0x51" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter 0 Output Compare Register" name="OCR0" offset="0x51" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x01"
-                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x01" name="OCIE0"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
@@ -1060,8 +960,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1078,10 +977,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
-                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="Extended MCU Control Register" name="EMCUCR" offset="0x56" size="1">
                     <bitfield caption="Interrupt Sense Control 2" mask="0x01" name="ISC2"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA164A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA164A.xml
index 887273c4..b23094c2 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA164A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA164A.xml
@@ -1,30 +1,20 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega164A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164A-MCH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="DRQFN_44"
-                 package="DRQFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164A-CU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VFBGA49"
-                 package="VFBGA49" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164A-MCH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="DRQFN_44" package="DRQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164A-CU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VFBGA49" package="VFBGA49" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega164A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,8 +31,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -52,8 +41,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
@@ -62,8 +50,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -71,8 +58,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -82,8 +68,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -96,8 +81,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -110,8 +94,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -124,8 +107,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -140,8 +122,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB0"/>
                         <signal group="OCB" function="default" pad="PB4"/>
@@ -151,8 +132,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="TOSC" index="1" function="default" pad="PC6"/>
                         <signal group="TOSC" index="2" function="default" pad="PC7"/>
@@ -163,14 +143,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PC2"/>
                         <signal group="TMS" function="default" pad="PC3"/>
@@ -181,14 +159,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PA0"/>
                         <signal group="PCINT" index="1" function="default" pad="PA1"/>
@@ -230,8 +206,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -246,8 +221,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -258,14 +232,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB4"/>
                         <signal group="MOSI" function="default" pad="PB5"/>
@@ -276,8 +248,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -286,8 +257,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PB1"/>
                     </signals>
@@ -298,20 +268,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -399,8 +366,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -461,8 +427,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -488,8 +453,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -520,8 +484,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -545,104 +508,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
@@ -688,16 +602,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -814,10 +726,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -831,14 +741,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -862,14 +769,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -886,10 +790,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -920,8 +822,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -941,8 +842,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -968,12 +868,9 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
@@ -1012,24 +909,20 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x80" name="ADC7D"/>
@@ -1045,10 +938,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1059,50 +950,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
             </value-group>
@@ -1131,14 +1000,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -1160,12 +1026,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA164P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA164P.xml
index 90df37cb..10d860a8 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA164P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA164P.xml
@@ -1,42 +1,26 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega164PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega164P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega164P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44"
-                 package="VQFN44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega164PV-10AN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="TQFP_VQFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164PV-10PN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164P-20AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega164P-20PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega164P-20MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44"
-                 package="VQFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega164PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega164P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega164P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44" package="VQFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega164PV-10AN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="TQFP_VQFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PV-10PN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164P-20AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega164P-20PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega164P-20MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44" package="VQFN44" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega164P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -53,8 +37,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -64,8 +47,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
@@ -74,8 +56,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -83,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -94,8 +74,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -108,8 +87,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -122,8 +100,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -136,8 +113,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -152,8 +128,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB0"/>
                         <signal group="OCB" function="default" pad="PB4"/>
@@ -163,8 +138,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PD6"/>
@@ -173,14 +147,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PC2"/>
                         <signal group="TMS" function="default" pad="PC3"/>
@@ -191,14 +163,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PA0"/>
                         <signal group="PCINT" index="1" function="default" pad="PA1"/>
@@ -240,8 +210,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -256,8 +225,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -268,14 +236,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB4"/>
                         <signal group="MOSI" function="default" pad="PB5"/>
@@ -286,8 +252,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -296,8 +261,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PB1"/>
                     </signals>
@@ -308,20 +272,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -409,8 +370,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -471,8 +431,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -498,8 +457,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -530,8 +488,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -555,104 +512,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
@@ -698,16 +606,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -824,10 +730,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -841,14 +745,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -872,14 +773,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -896,10 +794,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -930,8 +826,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -951,8 +846,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -978,12 +872,9 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
@@ -1022,24 +913,20 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x80" name="ADC7D"/>
@@ -1055,10 +942,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1069,50 +954,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
             </value-group>
@@ -1141,14 +1004,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -1170,12 +1030,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA164PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA164PA.xml
index ec639865..0ad2b644 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA164PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA164PA.xml
@@ -1,36 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega164PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164PA-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164PA-MCH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="DRQFN_44"
-                 package="DRQFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164PA-CU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VFBGA49"
-                 package="VFBGA49" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164PA-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega164PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PA-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PA-MCH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="DRQFN_44" package="DRQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PA-CU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VFBGA49" package="VFBGA49" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_QFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PA-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_QFN_44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega164PA" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -47,8 +34,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -58,8 +44,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
@@ -68,8 +53,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -77,8 +61,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -88,8 +71,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -102,8 +84,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -116,8 +97,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -130,8 +110,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -146,8 +125,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB0"/>
                         <signal group="OCB" function="default" pad="PB4"/>
@@ -157,8 +135,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="TOSC" index="1" function="default" pad="PC6"/>
                         <signal group="TOSC" index="2" function="default" pad="PC7"/>
@@ -169,14 +146,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PC2"/>
                         <signal group="TMS" function="default" pad="PC3"/>
@@ -187,14 +162,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PA0"/>
                         <signal group="PCINT" index="1" function="default" pad="PA1"/>
@@ -236,8 +209,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -252,8 +224,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -264,14 +235,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB4"/>
                         <signal group="MOSI" function="default" pad="PB5"/>
@@ -282,8 +251,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -292,8 +260,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PB1"/>
                     </signals>
@@ -304,20 +271,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -405,8 +369,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -467,8 +430,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -494,8 +456,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -526,8 +487,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -551,104 +511,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
@@ -694,16 +605,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -820,10 +729,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -837,14 +744,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -868,14 +772,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -892,10 +793,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -926,8 +825,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -947,8 +845,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -974,12 +871,9 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
@@ -1018,24 +912,20 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x80" name="ADC7D"/>
@@ -1051,10 +941,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1065,50 +953,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
             </value-group>
@@ -1137,14 +1003,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -1166,12 +1029,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165A.xml
index ef7bd2f7..3c3f5d4a 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165A.xml
@@ -7,16 +7,11 @@
     <device name="ATmega165A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -44,44 +38,37 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -94,8 +81,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -108,8 +94,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -122,8 +107,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -136,8 +120,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -150,8 +133,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -164,8 +146,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -178,50 +159,42 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -229,20 +202,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -321,8 +291,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -383,8 +352,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -415,8 +383,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -441,82 +408,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
@@ -567,14 +496,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -611,30 +538,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -662,14 +582,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -706,8 +624,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -804,16 +721,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -829,8 +744,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -878,8 +792,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -900,8 +813,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -978,8 +890,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
@@ -1033,8 +944,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165P.xml
index 989c2284..31adb127 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165P.xml
@@ -7,16 +7,11 @@
     <device name="ATmega165P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -44,44 +38,37 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTA" pad="PA0" index="0"/>
                         <signal group="P" function="PORTA" pad="PA1" index="1"/>
@@ -94,8 +81,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTB" pad="PB0" index="0"/>
                         <signal group="P" function="PORTB" pad="PB1" index="1"/>
@@ -108,8 +94,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTC" pad="PC0" index="0"/>
                         <signal group="P" function="PORTC" pad="PC1" index="1"/>
@@ -122,8 +107,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTD" pad="PD0" index="0"/>
                         <signal group="P" function="PORTD" pad="PD1" index="1"/>
@@ -136,8 +120,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTE" pad="PE0" index="0"/>
                         <signal group="P" function="PORTE" pad="PE1" index="1"/>
@@ -150,8 +133,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTF" pad="PF0" index="0"/>
                         <signal group="P" function="PORTF" pad="PF1" index="1"/>
@@ -164,8 +146,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="PORTG" pad="PG0" index="0"/>
                         <signal group="P" function="PORTG" pad="PG1" index="1"/>
@@ -178,50 +159,42 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -229,20 +202,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -321,8 +291,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -383,8 +352,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -415,8 +383,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -441,82 +408,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
@@ -567,14 +496,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -611,30 +538,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -662,14 +582,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -706,8 +624,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -804,16 +721,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -829,8 +744,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -843,8 +757,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xC0" name="PCIE"/>
@@ -907,8 +820,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -929,8 +841,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1033,8 +944,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165PA.xml
index c0ae4d33..4189d43a 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165PA.xml
@@ -7,16 +7,11 @@
     <device name="ATmega165PA" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -44,44 +38,37 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -94,8 +81,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -108,8 +94,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -122,8 +107,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -136,8 +120,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -150,8 +133,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -164,8 +146,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -178,50 +159,42 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -229,20 +202,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -321,8 +291,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -383,8 +352,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -415,8 +383,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -441,82 +408,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
@@ -567,14 +496,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -611,30 +538,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -662,14 +582,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -706,8 +624,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -804,16 +721,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -829,8 +744,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -878,8 +792,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -900,8 +813,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -978,8 +890,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
@@ -1035,8 +946,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168.xml
index fdf65f8b..42ac9365 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168.xml
@@ -1,32 +1,21 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega168V-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168V-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32"
-                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168V-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega168-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32"
-                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega168-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega168V-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168V-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168V-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega168-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega168-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega168" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,8 +32,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -54,8 +42,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -65,8 +52,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -75,8 +61,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -87,8 +72,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -97,8 +81,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -111,8 +94,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
                         <signal group="AIN" index="1" function="default" pad="PD7"/>
@@ -121,8 +103,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -135,8 +116,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -148,8 +128,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -164,8 +143,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -175,8 +153,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -208,8 +185,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -220,8 +196,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -232,32 +207,27 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -340,8 +310,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -402,8 +371,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -429,8 +397,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -470,8 +437,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -480,116 +446,61 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -714,14 +625,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -736,20 +644,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -769,14 +673,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -793,10 +694,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -827,24 +726,20 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX"
-                              values="ADC_MUX_SINGLE_NO_TEMP"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE_NO_TEMP"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -859,8 +754,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE_NO_TEMP">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -897,16 +791,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -939,10 +831,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -956,14 +846,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -987,10 +874,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1061,14 +946,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1081,8 +964,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
@@ -1140,8 +1022,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168A.xml
index ef176a2c..bd3e18d9 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168A.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega168A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168A-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
-                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
-                 vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168A-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega168A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -50,8 +40,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -61,8 +50,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -71,8 +59,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -83,8 +70,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -93,8 +79,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -107,8 +92,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
                         <signal group="AIN" index="1" function="default" pad="PD7"/>
@@ -117,8 +101,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -131,8 +114,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -144,8 +126,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -160,8 +141,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -171,8 +151,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -204,8 +183,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -216,20 +194,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -240,20 +215,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -336,8 +308,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -398,8 +369,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -425,8 +395,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -466,8 +435,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -476,116 +444,61 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -710,14 +623,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -732,20 +642,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -765,14 +671,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -789,10 +692,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -826,20 +727,17 @@
                     <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -854,8 +752,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -893,16 +790,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -935,10 +830,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -952,14 +845,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -983,10 +873,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1051,8 +939,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1099,14 +986,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1119,8 +1004,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168P.xml
index 87b13dae..fb077a90 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168P.xml
@@ -1,32 +1,21 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega168PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32"
-                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega168P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32"
-                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega168P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega168PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega168P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega168P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega168P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,8 +32,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -54,8 +42,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -65,8 +52,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -75,8 +61,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -87,8 +72,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -97,8 +81,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -111,8 +94,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
                         <signal group="AIN" index="1" function="default" pad="PD7"/>
@@ -121,8 +103,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -135,8 +116,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -148,8 +128,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -164,8 +143,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -175,8 +153,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -208,8 +185,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -220,20 +196,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -244,20 +217,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -340,8 +310,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -402,8 +371,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -429,8 +397,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -470,8 +437,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -480,116 +446,61 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -714,14 +625,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -736,20 +644,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -769,14 +673,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -793,10 +694,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -830,20 +729,17 @@
                     <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -858,8 +754,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -897,16 +792,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -939,10 +832,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -956,14 +847,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -987,10 +875,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1055,8 +941,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1103,14 +988,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1123,8 +1006,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168PA.xml
index 8e9310d4..5091fb0a 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168PA.xml
@@ -1,34 +1,22 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega168PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168PA-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
-                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32"
-                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168PA-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN32"
-                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168PA-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PA-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PA-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PA-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega168PA" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -45,8 +33,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -56,8 +43,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -67,8 +53,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -77,8 +62,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -89,8 +73,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -99,8 +82,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -113,8 +95,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
                         <signal group="AIN" index="1" function="default" pad="PD7"/>
@@ -123,8 +104,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -137,8 +117,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -150,8 +129,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -166,8 +144,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -177,8 +154,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -210,8 +186,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -222,20 +197,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -246,20 +218,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -342,8 +311,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -404,8 +372,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -431,8 +398,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -472,8 +438,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -482,116 +447,61 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -716,14 +626,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -738,20 +645,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -771,14 +674,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -795,10 +695,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -832,20 +730,17 @@
                     <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -860,8 +755,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -899,16 +793,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -941,10 +833,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -958,14 +848,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -989,10 +876,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1057,8 +942,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1105,14 +989,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1125,8 +1007,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168PB.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168PB.xml
index 7028d0c5..9f33bc92 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168PB.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168PB.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega168PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN32"
-                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN32"
-                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN32" package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN32" package="VQFN32" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega168PB" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -50,8 +40,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -61,8 +50,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -71,8 +59,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -83,8 +70,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -93,8 +79,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -109,8 +94,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AC" function="default" pad="PE0"/>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
@@ -120,8 +104,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -134,8 +117,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -147,8 +129,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -161,8 +142,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -173,8 +153,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -184,8 +163,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -217,8 +195,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -229,20 +206,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -253,26 +227,22 @@
             </module>
             <module name="DEVICEID">
                 <instance name="DEVICEID" caption="Device ID">
-                    <register-group name="DEVICEID" name-in-module="DEVICEID" offset="0x0" address-space="data"
-                                    caption="Device ID"/>
+                    <register-group name="DEVICEID" name-in-module="DEVICEID" offset="0x0" address-space="data" caption="Device ID"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -356,8 +326,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -418,8 +387,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -445,8 +413,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -486,8 +453,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -496,100 +462,53 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -732,14 +651,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -754,20 +670,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -787,14 +699,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -811,10 +720,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -848,20 +755,17 @@
                     <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -876,8 +780,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -915,16 +818,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -965,10 +866,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -982,14 +881,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1013,10 +909,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1081,8 +975,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1129,14 +1022,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1149,8 +1040,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA169A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA169A.xml
index 045bbdc4..92ed9b07 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA169A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA169A.xml
@@ -1,30 +1,20 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega169A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega169A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64"
-                 vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega169A-MCH" tempmin="-40" tempmax="85" speedmax="16000000" pinout="DRQFN64"
-                 package="DRQFN64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega169A-AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64 " vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega169A-MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="QFN64"
-                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64" package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169A-MCH" tempmin="-40" tempmax="85" speedmax="16000000" pinout="DRQFN64" package="DRQFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169A-AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFP64" package="TQFP64 " vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169A-MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega169A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,8 +31,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -52,8 +41,7 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG4"/>
                         <signal group="OCA" function="default" pad="PB4"/>
@@ -62,8 +50,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG3"/>
                         <signal group="ICP" function="default" pad="PD0"/>
@@ -75,8 +62,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB7"/>
                         <signal group="TOSC" function="default" pad="XTAL2"/>
@@ -85,20 +71,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="SCK" function="default" pad="PB1"/>
@@ -109,8 +92,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -123,8 +105,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -137,8 +118,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -151,8 +131,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -165,8 +144,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -179,8 +157,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -193,8 +170,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -207,8 +183,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -217,8 +192,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -229,8 +203,7 @@
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                     <signals>
                         <signal group="SEG" index="0" function="default" pad="PA4"/>
                         <signal group="SEG" index="1" function="default" pad="PA5"/>
@@ -266,8 +239,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PE0"/>
                         <signal group="PCINT" index="1" function="default" pad="PE1"/>
@@ -291,8 +263,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PE7"/>
                     </signals>
@@ -303,8 +274,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal group="DI" function="default" pad="PE5"/>
                         <signal group="DO" function="default" pad="PE6"/>
@@ -313,8 +283,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -329,14 +298,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" function="default" pad="PE0"/>
                         <signal group="TXD" function="default" pad="PE1"/>
@@ -347,20 +314,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -440,8 +404,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -502,8 +465,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -534,8 +496,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -560,82 +521,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
@@ -686,14 +609,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -730,30 +651,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -781,14 +695,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -825,8 +737,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -923,16 +834,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -948,8 +857,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -980,8 +888,7 @@
                     <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
                 </register>
                 <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1">
-                    <bitfield caption="LCD Display Configuration Bits" mask="0xE0" name="LCDDC"
-                              values="LCD_DISP_CONF_DRIVE"/>
+                    <bitfield caption="LCD Display Configuration Bits" mask="0xE0" name="LCDDC" values="LCD_DISP_CONF_DRIVE"/>
                     <bitfield caption="LCD Maximum Drive Time" mask="0x10" name="LCDMDT"/>
                     <bitfield caption="LCD Contrast Controls" mask="0x0F" name="LCDCC" values="LCD_CONTRAST"/>
                 </register>
@@ -1100,8 +1007,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -1122,8 +1028,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1200,8 +1105,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
@@ -1255,8 +1159,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA169P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA169P.xml
index b0d9d8ea..cea9e9f3 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA169P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA169P.xml
@@ -1,32 +1,21 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega169PV-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega169PV-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="QFN64"
-                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega169PV-8MCH" tempmin="-40" tempmax="85" speedmax="8000000" pinout="DRQFN64"
-                 package="DRQFN64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega169P-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega169P-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega169P-16MCH" tempmin="-40" tempmax="85" speedmax="16000000" pinout="DRQFN64"
-                 package="DRQFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega169PV-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP64" package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169PV-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169PV-8MCH" tempmin="-40" tempmax="85" speedmax="8000000" pinout="DRQFN64" package="DRQFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169P-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64" package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega169P-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega169P-16MCH" tempmin="-40" tempmax="85" speedmax="16000000" pinout="DRQFN64" package="DRQFN64" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega169P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,8 +32,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -54,8 +42,7 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG4"/>
                         <signal group="OCA" function="default" pad="PB4"/>
@@ -64,8 +51,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG3"/>
                         <signal group="ICP" function="default" pad="PD0"/>
@@ -77,8 +63,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB7"/>
                         <signal group="TOSC" function="default" pad="XTAL2"/>
@@ -87,20 +72,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="SCK" function="default" pad="PB1"/>
@@ -111,8 +93,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -125,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -139,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -153,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -167,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -181,8 +158,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -195,8 +171,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -209,8 +184,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -219,8 +193,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -231,8 +204,7 @@
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                     <signals>
                         <signal group="SEG" index="0" function="default" pad="PA4"/>
                         <signal group="SEG" index="1" function="default" pad="PA5"/>
@@ -268,8 +240,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PE0"/>
                         <signal group="PCINT" index="1" function="default" pad="PE1"/>
@@ -293,8 +264,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PE7"/>
                     </signals>
@@ -305,8 +275,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal group="DI" function="default" pad="PE5"/>
                         <signal group="DO" function="default" pad="PE6"/>
@@ -315,8 +284,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -331,14 +299,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" function="default" pad="PE0"/>
                         <signal group="TXD" function="default" pad="PE1"/>
@@ -349,20 +315,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -442,8 +405,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -504,8 +466,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -536,8 +497,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -562,82 +522,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
@@ -688,14 +610,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -732,30 +652,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -783,14 +696,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -827,8 +738,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -925,16 +835,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -950,8 +858,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -982,8 +889,7 @@
                     <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
                 </register>
                 <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1">
-                    <bitfield caption="LCD Display Configuration Bits" mask="0xE0" name="LCDDC"
-                              values="LCD_DISP_CONF_DRIVE"/>
+                    <bitfield caption="LCD Display Configuration Bits" mask="0xE0" name="LCDDC" values="LCD_DISP_CONF_DRIVE"/>
                     <bitfield caption="LCD Maximum Drive Time" mask="0x10" name="LCDMDT"/>
                     <bitfield caption="LCD Contrast Controls" mask="0x0F" name="LCDCC" values="LCD_CONTRAST"/>
                 </register>
@@ -1067,8 +973,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xC0" name="PCIE"/>
@@ -1131,8 +1036,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -1153,8 +1057,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1257,8 +1160,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA169PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA169PA.xml
index babef4fa..58b2abd6 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA169PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA169PA.xml
@@ -1,30 +1,20 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega169PA-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega169PA-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
-                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega169PA-MCH" tempmin="-40" tempmax="85" speedmax="16000000" pinout="DRQFN64"
-                 package="DRQFN64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega169PA-AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64 " vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega169PA-MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="QFN64"
-                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169PA-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64" package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169PA-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169PA-MCH" tempmin="-40" tempmax="85" speedmax="16000000" pinout="DRQFN64" package="DRQFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169PA-AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFP64" package="TQFP64 " vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169PA-MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega169PA" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,8 +31,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -52,8 +41,7 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG4"/>
                         <signal group="OCA" function="default" pad="PB4"/>
@@ -62,8 +50,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG3"/>
                         <signal group="ICP" function="default" pad="PD0"/>
@@ -75,8 +62,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB7"/>
                         <signal group="TOSC" function="default" pad="XTAL2"/>
@@ -85,20 +71,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="SCK" function="default" pad="PB1"/>
@@ -109,8 +92,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -123,8 +105,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -137,8 +118,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -151,8 +131,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -165,8 +144,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -179,8 +157,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -193,8 +170,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -207,8 +183,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -217,8 +192,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -229,8 +203,7 @@
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                     <signals>
                         <signal group="SEG" index="0" function="default" pad="PA4"/>
                         <signal group="SEG" index="1" function="default" pad="PA5"/>
@@ -266,8 +239,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PE0"/>
                         <signal group="PCINT" index="1" function="default" pad="PE1"/>
@@ -291,8 +263,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PE7"/>
                     </signals>
@@ -303,8 +274,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal group="DI" function="default" pad="PE5"/>
                         <signal group="DO" function="default" pad="PE6"/>
@@ -313,8 +283,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -329,14 +298,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" function="default" pad="PE0"/>
                         <signal group="TXD" function="default" pad="PE1"/>
@@ -347,20 +314,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -440,8 +404,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -502,8 +465,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -534,8 +496,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -560,82 +521,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
@@ -688,16 +611,14 @@
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 bits" mask="0xFF" name="TCNT0"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare A" mask="0xFF" name="OCR0A"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -734,8 +655,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -744,28 +664,22 @@
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare A" mask="0xFFFF" name="OCR1A"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare B" mask="0xFFFF" name="OCR1B"/>
                 </register>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Input Capture" mask="0xFFFF" name="ICR1"/>
                 </register>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -795,16 +709,14 @@
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter2 bits" mask="0xFF" name="TCNT2"/>
                 </register>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter2 Output Compare A" mask="0xFF" name="OCR2A"/>
                 </register>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -841,8 +753,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -945,16 +856,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -970,8 +879,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1002,8 +910,7 @@
                     <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
                 </register>
                 <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1">
-                    <bitfield caption="LCD Display Configuration Bits" mask="0xE0" name="LCDDC"
-                              values="LCD_DISP_CONF_DRIVE"/>
+                    <bitfield caption="LCD Display Configuration Bits" mask="0xE0" name="LCDDC" values="LCD_DISP_CONF_DRIVE"/>
                     <bitfield caption="LCD Maximum Drive Time" mask="0x10" name="LCDMDT"/>
                     <bitfield caption="LCD Contrast Controls" mask="0x0F" name="LCDCC" values="LCD_CONTRAST"/>
                 </register>
@@ -1124,8 +1031,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
                     <bitfield caption="ADC Data Bits" mask="0x03FF" name="ADC" values="ANALOG_ADC_PRESCALER"/>
@@ -1148,8 +1054,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1230,8 +1135,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
@@ -1287,8 +1191,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16A.xml
index 09b5b79d..88951d6e 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16A.xml
@@ -1,26 +1,18 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega16A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega16A-PU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega16A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
-                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16A-PU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="PDIP40" package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44" package="QFN44" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega16A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -37,8 +29,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
@@ -48,8 +39,7 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="OC" function="default" pad="PB3"/>
                         <signal group="T" function="default" pad="PB0"/>
@@ -58,8 +48,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -70,8 +59,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="2" function="default" pad="PB2"/>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
@@ -81,14 +69,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -96,8 +82,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="TOSC" index="2" function="default" pad="PC7"/>
                         <signal group="TOSC" index="1" function="default" pad="PC6"/>
@@ -107,8 +92,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SCK" function="default" pad="PB7"/>
                         <signal group="MISO" function="default" pad="PB6"/>
@@ -119,8 +103,7 @@
             </module>
             <module name="USART">
                 <instance name="USART" caption="USART">
-                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="XCK" function="default" pad="PB0"/>
                         <signal group="TXD" function="default" pad="PD1"/>
@@ -130,8 +113,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -140,8 +122,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
@@ -150,8 +131,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -166,8 +146,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TDI" function="default" pad="PC5"/>
                         <signal group="TDO" function="default" pad="PC4"/>
@@ -178,14 +157,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -198,8 +175,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -212,8 +188,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -226,8 +201,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -242,26 +216,22 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
@@ -339,8 +309,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -401,8 +370,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -428,8 +396,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -469,8 +436,7 @@
                     <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x10" name="CKOPT"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
-                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
                     <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
                 </register>
@@ -483,116 +449,61 @@
                 <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
-                       value="0x01"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
-                       value="0x11"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS"
-                       value="0x21"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
-                       value="0x02"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
-                       value="0x12"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
-                       value="0x22"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
-                       value="0x04"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
-                       value="0x14"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
-                       value="0x24"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
-                       value="0x09"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
-                       value="0x19"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
-                       value="0x29"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS" value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS" value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS" value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS" value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS" value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS" value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS" value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS" value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS" value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS" value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS" value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms" name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms" name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms" name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms" name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms" name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms" name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms" name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms" name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms" name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms" name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms" name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms" name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms" name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms" name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms" name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms" name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms" name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms" name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms" name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms" name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms" name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms" name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms" name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms" name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
@@ -643,8 +554,7 @@
                     <bitfield caption="Output Compare bits" mask="0xFF" name="OCR0"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
-                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02" name="OCIE0"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -676,10 +586,8 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
-                              name="OCIE1A"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
-                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -699,22 +607,18 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare A bits" mask="0xFFFF" name="OCR1A"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare B bits" mask="0xFFFF" name="OCR1B"/>
                 </register>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
                 </register>
             </register-group>
@@ -743,10 +647,8 @@
                     <bitfield caption="External Interrupt Flag 2" mask="0x20" name="INTF2"/>
                 </register>
                 <register caption="General Interrupt Control Register" name="MCUCR" offset="0x55" size="1">
-                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
                     <bitfield caption="Interrupt Sense Control 2" mask="0x40" name="ISC2"/>
@@ -791,10 +693,8 @@
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Sleep Mode Select" mask="0xB0" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
                     <bitfield caption="Sleep Enable" mask="0x40" name="SE"/>
-                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
@@ -856,8 +756,7 @@
                 <register caption="Timer/Counter2" name="TCNT2" offset="0x44" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter2" mask="0xFF" name="TCNT2"/>
                 </register>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2" offset="0x43" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2" offset="0x43" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter2 Output Compare bits" mask="0xFF" name="OCR2"/>
                 </register>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0x42" size="1">
@@ -1012,16 +911,14 @@
                 <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -1044,8 +941,7 @@
                     <bitfield caption="ADC Auto Trigger" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF">
                     <bitfield caption="ADC Data Bits" mask="0x03FF" name="ADC" values="ANALOG_ADC_PRESCALER"/>
@@ -1058,8 +954,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1074,8 +969,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          ocd-rw="">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" ocd-rw="">
                     <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
@@ -1124,8 +1018,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
                     <bitfield caption="RW" mask="0x10" name="WDTOE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16M1.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16M1.xml
index 7ce103e4..2ef077c0 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16M1.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16M1.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega16M1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
-                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega16M1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
-                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16M1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32" package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16M1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32" package="QFN32" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega16M1" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
@@ -60,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
@@ -74,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
@@ -88,8 +77,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
@@ -99,14 +87,12 @@
             </module>
             <module name="CAN">
                 <instance name="CAN" caption="Controller Area Network">
-                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
-                                    caption="Controller Area Network"/>
+                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data" caption="Controller Area Network"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="AC" group="ACMP" index="0" pad="PD7"/>
                         <signal function="AC" group="ACMP" index="1" pad="PC6"/>
@@ -121,8 +107,7 @@
             </module>
             <module name="DAC">
                 <instance name="DAC" caption="Digital-to-Analog Converter">
-                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
-                                    caption="Digital-to-Analog Converter"/>
+                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data" caption="Digital-to-Analog Converter"/>
                     <signals>
                         <signal function="DAC" group="D2A" pad="PC7"/>
                     </signals>
@@ -130,8 +115,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -139,8 +123,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="TC0" group="T0" pad="PC2"/>
                         <signal function="TC0" group="OC0A" pad="PD3"/>
@@ -150,8 +133,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal function="TC1" group="T1" pad="PC3"/>
                         <signal function="TC1" group="ICP1A" pad="PD4"/>
@@ -163,8 +145,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PE2"/>
                         <signal function="ADC" group="ADC" index="1" pad="PD4"/>
@@ -182,8 +163,7 @@
             </module>
             <module name="LINUART">
                 <instance name="LINUART" caption="Local Interconnect Network">
-                    <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
-                                    caption="Local Interconnect Network"/>
+                    <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data" caption="Local Interconnect Network"/>
                     <signals>
                         <signal function="LIN" group="TXLIN" pad="PD3"/>
                         <signal function="LIN" group="RXLIN" pad="PD4"/>
@@ -192,8 +172,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal function="SPI" group="MISO" pad="PB0"/>
                         <signal function="SPI_ALT" group="MISO" pad="PD2"/>
@@ -208,14 +187,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXINT" group="INT" index="0" pad="PD6"/>
                         <signal function="EXINT" group="INT" index="1" pad="PB2"/>
@@ -253,14 +230,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PSC">
                 <instance name="PSC" caption="Power Stage Controller">
-                    <register-group name="PSC" name-in-module="PSC" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC" name-in-module="PSC" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                     <signals>
                         <signal function="PSC" group="PSCIN2" pad="PD2"/>
                         <signal function="PSC" group="PSCOUT2A" pad="PB0"/>
@@ -276,20 +251,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="ANACOMP0" caption="Analog Comparator 0"/>
             <interrupt index="2" name="ANACOMP1" caption="Analog Comparator 1"/>
             <interrupt index="3" name="ANACOMP2" caption="Analog Comparator 2"/>
@@ -377,8 +349,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -439,8 +410,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -474,8 +444,7 @@
                     <bitfield caption="PSC Reset Behavior" mask="0x20" name="PSCRB"/>
                     <bitfield caption="PSCOUTnA Reset Value" mask="0x10" name="PSCRVA"/>
                     <bitfield caption="PSC0UTnB Reset Value" mask="0x08" name="PSCRVB"/>
-                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
                     <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
@@ -493,112 +462,59 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -708,19 +624,15 @@
                 <register caption="Enable MOb Register 2" name="CANEN2" offset="0xDC" size="1" ocd-rw="R">
                     <bitfield caption="Enable MObs" mask="0x3F" name="ENMOB"/>
                 </register>
-                <register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00"
-                          ocd-rw=""/>
+                <register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00" ocd-rw=""/>
                 <register caption="Enable Interrupt MOb Register 2" name="CANIE2" offset="0xDE" size="1">
                     <bitfield caption="Interrupt Enable  MObs" mask="0x3F" name="IEMOB"/>
                 </register>
-                <register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1"
-                          mask="0x00" ocd-rw=""/>
-                <register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1"
-                          ocd-rw="R">
+                <register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1" mask="0x00" ocd-rw=""/>
+                <register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1" ocd-rw="R">
                     <bitfield caption="Status of Interrupt MObs" mask="0x3F" name="SIT"/>
                 </register>
-                <register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1"
-                          mask="0x00" ocd-rw=""/>
+                <register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1" mask="0x00" ocd-rw=""/>
                 <register caption="CAN Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
                     <bitfield caption="Baud Rate Prescaler bits" mask="0x7E" name="BRP"/>
                 </register>
@@ -742,12 +654,10 @@
                 <register caption="TTC Timer Register" name="CANTTC" offset="0xE8" size="2" mask="0xFFFF" ocd-rw="">
                     <bitfield caption="TTC Timer Count" mask="0xFFFF" name="TIMTTC"/>
                 </register>
-                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
-                          ocd-rw="">
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF" ocd-rw="">
                     <bitfield caption="Transmit Error Counter bits" mask="0xFF" name="TEC"/>
                 </register>
-                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
-                          ocd-rw="">
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF" ocd-rw="">
                     <bitfield caption="Receive Error Counter bits" mask="0xFF" name="REC"/>
                 </register>
                 <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
@@ -824,23 +734,20 @@
                 <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x95" size="1">
                     <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
-                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
                     <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
                 </register>
                 <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x96" size="1">
                     <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
                     <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
-                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
                 </register>
                 <register caption="Analog Comparator 3 Control Register" name="AC3CON" offset="0x97" size="1">
                     <bitfield caption="Analog Comparator 3 Enable Bit" mask="0x80" name="AC3EN"/>
                     <bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
-                    <bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
                 </register>
                 <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
@@ -868,8 +775,7 @@
                 </register>
                 <register caption="DAC Control Register" name="DACON" offset="0x90" size="1">
                     <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
-                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
-                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS" values="ANALOG_DAC_AUTO_TRIGGER"/>
                     <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
                     <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
                     <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
@@ -921,14 +827,12 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
                     <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
@@ -993,14 +897,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1019,12 +920,10 @@
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 bits" mask="0xFF" name="TCNT0"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x47" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare bits" mask="0xFF" name="OCR0A"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare bits" mask="0xFF" name="OCR0B"/>
                 </register>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
@@ -1048,14 +947,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -1070,8 +966,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
@@ -1080,16 +975,13 @@
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register A" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register A" name="OCR1A" offset="0x88" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare bits" mask="0xFFFF" name="OCR1A"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register B" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register B" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare bits" mask="0xFFFF" name="OCR1B"/>
                 </register>
-                <register caption="Timer/Counter1 Input Capture Register" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Input Capture Register" name="ICR1" offset="0x86" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
                 </register>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
@@ -1131,8 +1023,7 @@
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
                     <bitfield caption="Current Source Enable" mask="0x40" name="ISRCEN"/>
                     <bitfield caption="Analog Reference pin Enable" mask="0x20" name="AREFEN"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
@@ -1309,8 +1200,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1331,14 +1221,10 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
@@ -1456,40 +1342,31 @@
                 <register caption="PSC Output Compare RB Register" name="POCR_RB" offset="0xB2" size="2" mask="0x0FFF">
                     <bitfield caption="PSC Output Compare RB bits" mask="0x0FFF" name="POCR_RB"/>
                 </register>
-                <register caption="PSC Module 2 Output Compare SB Register" name="POCR2SB" offset="0xB0" size="2"
-                          mask="0x0FFF">
+                <register caption="PSC Module 2 Output Compare SB Register" name="POCR2SB" offset="0xB0" size="2" mask="0x0FFF">
                     <bitfield caption="PSC Output Compare SB bits" mask="0x0FFF" name="POCR2SB"/>
                 </register>
-                <register caption="PSC Module 2 Output Compare RA Register" name="POCR2RA" offset="0xAE" size="2"
-                          mask="0x0FFF">
+                <register caption="PSC Module 2 Output Compare RA Register" name="POCR2RA" offset="0xAE" size="2" mask="0x0FFF">
                     <bitfield caption="PSC Output Compare RA bits" mask="0x0FFF" name="POCR2RA"/>
                 </register>
-                <register caption="PSC Module 2 Output Compare SA Register" name="POCR2SA" offset="0xAC" size="2"
-                          mask="0x0FFF">
+                <register caption="PSC Module 2 Output Compare SA Register" name="POCR2SA" offset="0xAC" size="2" mask="0x0FFF">
                     <bitfield caption="PSC Output Compare SA bits" mask="0x0FFF" name="POCR2SA"/>
                 </register>
-                <register caption="PSC Module 1 Output Compare SB Register" name="POCR1SB" offset="0xAA" size="2"
-                          mask="0x0FFF">
+                <register caption="PSC Module 1 Output Compare SB Register" name="POCR1SB" offset="0xAA" size="2" mask="0x0FFF">
                     <bitfield caption="PSC Output Compare SB bits" mask="0x0FFF" name="POCR1SB"/>
                 </register>
-                <register caption="PSC Module 1 Output Compare RA Register" name="POCR1RA" offset="0xA8" size="2"
-                          mask="0x0FFF">
+                <register caption="PSC Module 1 Output Compare RA Register" name="POCR1RA" offset="0xA8" size="2" mask="0x0FFF">
                     <bitfield caption="PSC Output Compare RA bits" mask="0x0FFF" name="POCR1RA"/>
                 </register>
-                <register caption="PSC Module 1 Output Compare SA Register" name="POCR1SA" offset="0xA6" size="2"
-                          mask="0x0FFF">
+                <register caption="PSC Module 1 Output Compare SA Register" name="POCR1SA" offset="0xA6" size="2" mask="0x0FFF">
                     <bitfield caption="PSC Output Compare SA bits" mask="0x0FFF" name="POCR1SA"/>
                 </register>
-                <register caption="PSC Module 0 Output Compare SB Register" name="POCR0SB" offset="0xA4" size="2"
-                          mask="0x0FFF">
+                <register caption="PSC Module 0 Output Compare SB Register" name="POCR0SB" offset="0xA4" size="2" mask="0x0FFF">
                     <bitfield caption="PSC Output Compare SB bits" mask="0x0FFF" name="POCR0SB"/>
                 </register>
-                <register caption="PSC Module 0 Output Compare RA Register" name="POCR0RA" offset="0xA2" size="2"
-                          mask="0x0FFF">
+                <register caption="PSC Module 0 Output Compare RA Register" name="POCR0RA" offset="0xA2" size="2" mask="0x0FFF">
                     <bitfield caption="PSC Output Compare RA bits" mask="0x0FFF" name="POCR0RA"/>
                 </register>
-                <register caption="PSC Module 0 Output Compare SA Register" name="POCR0SA" offset="0xA0" size="2"
-                          mask="0x0FFF">
+                <register caption="PSC Module 0 Output Compare SA Register" name="POCR0SA" offset="0xA0" size="2" mask="0x0FFF">
                     <bitfield caption="PSC Output Compare SA bits" mask="0x0FFF" name="POCR0SA"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16U2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16U2.xml
index 525ef9ac..7ccb4399 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16U2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16U2.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega16U2-AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="TQFP32" pinout="QFP32"/>
-        <variant ordercode="ATmega16U2-MU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="QFN32" pinout="QFP32"/>
+        <variant ordercode="ATmega16U2-AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5" package="TQFP32" pinout="QFP32"/>
+        <variant ordercode="ATmega16U2-MU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5" package="QFN32" pinout="QFP32"/>
     </variants>
     <device name="ATmega16U2" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -60,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -74,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -90,8 +79,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="MISO" pad="PB3" function="default"/>
                         <signal group="MOSI" pad="PB2" function="default"/>
@@ -102,20 +90,17 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="OCA" pad="PB7" function="default"/>
                         <signal group="OCB" pad="PD0" function="default"/>
@@ -125,8 +110,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="ICP" pad="PC7" function="default"/>
                         <signal group="OCA" pad="PC6" function="default"/>
@@ -138,20 +122,17 @@
             </module>
             <module name="PLL">
                 <instance name="PLL" caption="Phase Locked Loop">
-                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
-                                    caption="Phase Locked Loop"/>
+                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data" caption="Phase Locked Loop"/>
                 </instance>
             </module>
             <module name="USB_DEVICE">
                 <instance name="USB_DEVICE" caption="USB Device Registers">
-                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
-                                    caption="USB Device Registers"/>
+                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data" caption="USB Device Registers"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V3"/>
                     </parameters>
@@ -159,8 +140,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="0" pad="PD0" function="default"/>
                         <signal group="INT" index="1" pad="PD1" function="default"/>
@@ -188,8 +168,7 @@
             </module>
             <module name="USART">
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" pad="PD2" function="default"/>
                         <signal group="TXD" pad="PD3" function="default"/>
@@ -201,14 +180,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" pad="PD1" function="default"/>
                         <signal group="AIN" index="1" pad="PD2" function="default"/>
@@ -222,20 +199,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -321,8 +295,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -383,8 +356,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -415,8 +387,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF4">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
@@ -441,94 +412,50 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x03"/>
@@ -668,12 +595,10 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare B bits" mask="0xFF" name="OCR0B"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare A bits" mask="0xFF" name="OCR0A"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
@@ -691,14 +616,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -731,8 +653,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -742,34 +663,26 @@
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare A bits" mask="0xFFFF" name="OCR1A"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare B bits" mask="0xFFFF" name="OCR1B"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare C bits" mask="0xFFFF" name="OCR1C"/>
                 </register>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
                 </register>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -809,12 +722,10 @@
                     <bitfield caption="D+ Input value" mask="0x02" name="DPI"/>
                     <bitfield caption="D- Input value" mask="0x01" name="DMI"/>
                 </register>
-                <register caption="USB Endpoint Number Interrupt Register" name="UEINT" offset="0xF4" size="1"
-                          mask="0x1F">
+                <register caption="USB Endpoint Number Interrupt Register" name="UEINT" offset="0xF4" size="1" mask="0x1F">
                     <bitfield caption="Byte Count bits" mask="0x1F" name="EPINT"/>
                 </register>
-                <register caption="USB Endpoint Byte Count Register" name="UEBCLX" offset="0xF2" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="USB Endpoint Byte Count Register" name="UEBCLX" offset="0xF2" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Byte Count bits" mask="0xFF" name="BYCT"/>
                 </register>
                 <register caption="USB Data Endpoint" name="UEDATX" offset="0xF1" size="1" mask="0xFF" ocd-rw="">
@@ -874,8 +785,7 @@
                 <register caption="USB Device Micro Frame Number" name="UDMFN" offset="0xE6" size="1" ocd-rw="R">
                     <bitfield caption="Frame Number CRC Error Flag" mask="0x10" name="FNCERR"/>
                 </register>
-                <register caption="USB Device Frame Number High Register" name="UDFNUM" offset="0xE4" size="2"
-                          mask="0x07FF">
+                <register caption="USB Device Frame Number High Register" name="UDFNUM" offset="0xE4" size="2" mask="0x07FF">
                     <bitfield caption="Frame Number Upper Flag" mask="0x07FF" name="FNUM"/>
                 </register>
                 <register caption="USB Device Address Register" name="UDADDR" offset="0xE3" size="1">
@@ -937,8 +847,7 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
@@ -990,8 +899,7 @@
                     <bitfield caption="" mask="0x04" name="EXTE"/>
                     <bitfield caption="" mask="0x01" name="CLKS"/>
                 </register>
-                <register caption="debugWire communication register" name="DWDR" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw=""/>
+                <register caption="debugWire communication register" name="DWDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
             </register-group>
             <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
                 <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
@@ -1100,20 +1008,17 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Analog Comparator Input Multiplexer" name="ACMUX" offset="0x7D" size="1">
-                    <bitfield caption="Analog Comparator Selection Bits" mask="0x07" name="CMUX"
-                              values="ANALOG_COMP_SELECTION_BITS"/>
+                    <bitfield caption="Analog Comparator Selection Bits" mask="0x07" name="CMUX" values="ANALOG_COMP_SELECTION_BITS"/>
                 </register>
                 <register caption="" name="DIDR1" offset="0x7F" size="1" ocd-rw="W">
                     <bitfield caption="AIN7 Digital Input Disable" mask="0x80" name="AIN7D"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16U4.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16U4.xml
index 6b0a2c54..4a2af380 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16U4.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16U4.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega16U4-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega16U4RC-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega16U4-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN44" package="QFN44"
-                 vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega16U4RC-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN44"
-                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16U4-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16U4RC-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16U4-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN44" package="QFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16U4RC-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN44" package="QFN44" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega16U4" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0500" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -50,14 +40,12 @@
         <peripherals>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -70,16 +58,14 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC6" index="6"/>
                         <signal group="P" function="default" pad="PC7" index="7"/>
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -92,16 +78,14 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE2" index="2"/>
                         <signal group="P" function="default" pad="PE6" index="6"/>
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -113,8 +97,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="SCK" function="default" pad="PB1"/>
@@ -127,8 +110,7 @@
             </module>
             <module name="USART">
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -140,8 +122,7 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                     <signals>
                         <signal group="HWB" function="default" pad="PE2"/>
                     </signals>
@@ -149,14 +130,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PD0"/>
@@ -166,8 +145,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD6"/>
                         <signal group="ICP" function="default" pad="PD4"/>
@@ -177,8 +155,7 @@
                     </signals>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="ICP" function="default" pad="PC7"/>
                         <signal group="OCA" function="default" pad="PC6"/>
@@ -187,8 +164,7 @@
             </module>
             <module name="TC10">
                 <instance name="TC4" caption="Timer/Counter, 10-bit">
-                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 10-bit"/>
+                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 10-bit"/>
                     <signals>
                         <signal group="_OCA" function="default" pad="PC6"/>
                         <signal group="OCA" function="default" pad="PC7"/>
@@ -201,8 +177,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -213,8 +188,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PB0"/>
                         <signal group="PCINT" index="1" function="default" pad="PB1"/>
@@ -234,8 +208,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PD1"/>
                         <signal group="SCL" function="default" pad="PD0"/>
@@ -244,8 +217,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -264,8 +236,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE6"/>
                     </signals>
@@ -273,8 +244,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PC7"/>
                     </signals>
@@ -285,32 +255,27 @@
             </module>
             <module name="PLL">
                 <instance name="PLL" caption="Phase Locked Loop">
-                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
-                                    caption="Phase Locked Loop"/>
+                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data" caption="Phase Locked Loop"/>
                 </instance>
             </module>
             <module name="USB_DEVICE">
                 <instance name="USB_DEVICE" caption="USB Device Registers">
-                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
-                                    caption="USB Device Registers"/>
+                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data" caption="USB Device Registers"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -410,8 +375,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -472,8 +436,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -504,8 +467,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFB">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -530,94 +492,50 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x03"/>
@@ -667,8 +585,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -836,12 +753,10 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare B bits" mask="0xFF" name="OCR0B"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare A bits" mask="0xFF" name="OCR0A"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
@@ -859,14 +774,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -932,33 +844,25 @@
                 <register caption="Timer/Counter4" name="TC4H" offset="0xBF" size="1" mask="0x07">
                     <bitfield caption="Timer/Counter4 bits" mask="0x07" name="TC4" lsb="8"/>
                 </register>
-                <register caption="Timer/Counter4 Output Compare Register A" name="OCR4A" offset="0xCF" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter4 Output Compare Register A" name="OCR4A" offset="0xCF" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter4 Output Compare A bits" mask="0xFF" name="OCR4A"/>
                 </register>
-                <register caption="Timer/Counter4 Output Compare Register B" name="OCR4B" offset="0xD0" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter4 Output Compare Register B" name="OCR4B" offset="0xD0" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter4 Output Compare B bits" mask="0xFF" name="OCR4B"/>
                 </register>
-                <register caption="Timer/Counter4 Output Compare Register C" name="OCR4C" offset="0xD1" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter4 Output Compare Register C" name="OCR4C" offset="0xD1" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter4 Output Compare C bits" mask="0xFF" name="OCR4C"/>
                 </register>
-                <register caption="Timer/Counter4 Output Compare Register D" name="OCR4D" offset="0xD2" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter4 Output Compare Register D" name="OCR4D" offset="0xD2" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter4 Output Compare D bits" mask="0xFF" name="OCR4D"/>
                 </register>
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
-                    <bitfield caption="Timer/Counter4 Output Compare D Match Interrupt Enable" mask="0x80"
-                              name="OCIE4D"/>
-                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x40"
-                              name="OCIE4A"/>
-                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x20"
-                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare D Match Interrupt Enable" mask="0x80" name="OCIE4D"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x40" name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x20" name="OCIE4B"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x04" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 4D" mask="0x80" name="OCF4D"/>
                     <bitfield caption="Output Compare Flag 4A" mask="0x40" name="OCF4A"/>
                     <bitfield caption="Output Compare Flag 4B" mask="0x20" name="OCF4B"/>
@@ -981,8 +885,7 @@
                     <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
                     <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
@@ -992,34 +895,26 @@
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter3 bits" mask="0xFFFF" name="TCNT3"/>
                 </register>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter3 Output Compare A bits" mask="0xFFFF" name="OCR3A"/>
                 </register>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter3 Output Compare B bits" mask="0xFFFF" name="OCR3B"/>
                 </register>
-                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter3 Output Compare C bits" mask="0xFFFF" name="OCR3C"/>
                 </register>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter3 Input Capture bits" mask="0xFFFF" name="ICR3"/>
                 </register>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
@@ -1038,8 +933,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -1049,34 +943,26 @@
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare A bits" mask="0xFFFF" name="OCR1A"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare B bits" mask="0xFFFF" name="OCR1B"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare C bits" mask="0xFFFF" name="OCR1C"/>
                 </register>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
                 </register>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -1097,8 +983,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1110,24 +995,16 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1197,8 +1074,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
                     <bitfield caption="ADC Data Bits" mask="0x03FF" name="ADC"/>
@@ -1206,8 +1082,7 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x20" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
@@ -1232,8 +1107,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1261,16 +1135,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2560.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2560.xml
index dddf6d8d..3813fb0f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2560.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2560.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega2560V-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP100"
-                 package="TQFP100" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega2560V-8CU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="CBGA100"
-                 package="CBGA100" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega2560-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP100"
-                 package="TQFP100" vccmin="4.5" vccmax="5.5"/>
-        <variant ordercode="ATmega2560-16CU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="CBGA100"
-                 package="CBGA100" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega2560V-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP100" package="TQFP100" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega2560V-8CU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="CBGA100" package="CBGA100" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega2560-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP100" package="TQFP100" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega2560-16CU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="CBGA100" package="CBGA100" vccmin="4.5" vccmax="5.5"/>
     </variants>
     <device name="ATmega2560" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x40000">
-                <memory-segment start="0x0000" size="0x40000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x40000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x3fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x3f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x3f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x3e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -40,8 +31,7 @@
                 <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -51,8 +41,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -61,8 +50,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PE1"/>
                         <signal group="RXD" function="default" pad="PE0"/>
@@ -70,8 +58,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -79,8 +66,7 @@
                     </signals>
                 </instance>
                 <instance name="USART2" caption="USART">
-                    <register-group name="USART2" name-in-module="USART2" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART2" name-in-module="USART2" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PH1"/>
                         <signal group="RXD" function="default" pad="PH0"/>
@@ -88,8 +74,7 @@
                     </signals>
                 </instance>
                 <instance name="USART3" caption="USART">
-                    <register-group name="USART3" name-in-module="USART3" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART3" name-in-module="USART3" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PJ1"/>
                         <signal group="RXD" function="default" pad="PJ0"/>
@@ -99,8 +84,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PD1"/>
                         <signal group="SCL" function="default" pad="PD0"/>
@@ -109,8 +93,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="MOSI" function="default" pad="PB2"/>
@@ -121,8 +104,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -135,8 +117,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -149,8 +130,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -163,8 +143,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -177,8 +156,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -191,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -205,8 +182,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -219,8 +195,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PH0" index="0"/>
                         <signal group="P" function="default" pad="PH1" index="1"/>
@@ -233,8 +208,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PJ0" index="0"/>
                         <signal group="P" function="default" pad="PJ1" index="1"/>
@@ -247,8 +221,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTK" caption="I/O Port">
-                    <register-group name="PORTK" name-in-module="PORTK" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTK" name-in-module="PORTK" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PK0" index="0"/>
                         <signal group="P" function="default" pad="PK1" index="1"/>
@@ -261,8 +234,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTL" caption="I/O Port">
-                    <register-group name="PORTL" name-in-module="PORTL" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTL" name-in-module="PORTL" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PL0" index="0"/>
                         <signal group="P" function="default" pad="PL1" index="1"/>
@@ -277,8 +249,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PG5"/>
@@ -288,8 +259,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="TOSC" index="1" function="default" pad="PG4"/>
                         <signal group="TOSC" index="2" function="default" pad="PG3"/>
@@ -300,20 +270,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC5" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PL2"/>
                         <signal group="ICP" function="default" pad="PL1"/>
@@ -323,8 +290,7 @@
                     </signals>
                 </instance>
                 <instance name="TC4" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PBH7"/>
                         <signal group="ICP" function="default" pad="PL0"/>
@@ -334,8 +300,7 @@
                     </signals>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PE6"/>
                         <signal group="ICP" function="default" pad="PE7"/>
@@ -345,8 +310,7 @@
                     </signals>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD6"/>
                         <signal group="ICP" function="default" pad="PD4"/>
@@ -358,8 +322,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -370,8 +333,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PB0"/>
                         <signal group="PCINT" index="1" function="default" pad="PB1"/>
@@ -410,8 +372,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PE7"/>
                     </signals>
@@ -422,8 +383,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -446,26 +406,22 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -579,8 +535,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -641,8 +596,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -673,8 +627,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -698,104 +651,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$1FE00" name="512W_1FE00" value="0x03"/>
@@ -841,16 +745,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -960,8 +862,7 @@
             </register-group>
             <register-group caption="USART" name="USART3">
                 <register caption="USART I/O Data Register" name="UDR3" offset="0x136" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART Control and Status Register A" name="UCSR3A" offset="0x130" size="1"
-                          ocd-rw="R">
+                <register caption="USART Control and Status Register A" name="UCSR3A" offset="0x130" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC3"/>
                     <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC3"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE3"/>
@@ -1126,10 +1027,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -1143,14 +1042,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1174,14 +1070,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -1198,10 +1091,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -1232,8 +1123,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1281,8 +1171,7 @@
                     <bitfield caption="Input Capture 5 Noise Canceler" mask="0x80" name="ICNC5"/>
                     <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 5 Control Register C" name="TCCR5C" offset="0x122" size="1">
                     <bitfield caption="Force Output Compare 5A" mask="0x80" name="FOC5A"/>
@@ -1290,26 +1179,18 @@
                     <bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
                 </register>
                 <register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
                     <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
-                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE5C"/>
-                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE5B"/>
-                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE5A"/>
                     <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
                 </register>
-                <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1" ocd-rw="">
                     <bitfield caption="Input Capture Flag 5" mask="0x20" name="ICF5"/>
                     <bitfield caption="Output Compare Flag 5C" mask="0x08" name="OCF5C"/>
                     <bitfield caption="Output Compare Flag 5B" mask="0x04" name="OCF5B"/>
@@ -1328,8 +1209,7 @@
                     <bitfield caption="Input Capture 4 Noise Canceler" mask="0x80" name="ICNC4"/>
                     <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
                     <bitfield caption="Force Output Compare 4A" mask="0x80" name="FOC4A"/>
@@ -1337,26 +1217,18 @@
                     <bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
                 </register>
                 <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
                     <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
-                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE4C"/>
-                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE4B"/>
-                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE4A"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1" ocd-rw="">
                     <bitfield caption="Input Capture Flag 4" mask="0x20" name="ICF4"/>
                     <bitfield caption="Output Compare Flag 4C" mask="0x08" name="OCF4C"/>
                     <bitfield caption="Output Compare Flag 4B" mask="0x04" name="OCF4B"/>
@@ -1375,8 +1247,7 @@
                     <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
                     <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
@@ -1384,26 +1255,18 @@
                     <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
@@ -1422,8 +1285,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -1431,26 +1293,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -1471,8 +1325,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1484,24 +1337,16 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1561,10 +1406,8 @@
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
                     <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS2"/>
-                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
-                              values="CPU_WAIT_STATES"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1" values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0" values="CPU_WAIT_STATES"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
                     <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
@@ -1631,8 +1474,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
                 <value caption="1" name="VAL_0x00" value="0x00"/>
@@ -1664,25 +1506,21 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF6"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF6"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR2" offset="0x7D" size="1">
                     <bitfield caption="" mask="0x80" name="ADC15D"/>
@@ -1708,10 +1546,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF6">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1722,50 +1558,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
                 <value caption="ADC Single Ended Input pin 8" name="ADC8" value="0x20"/>
@@ -1776,50 +1590,28 @@
                 <value caption="ADC Single Ended Input pin 13" name="ADC13" value="0x25"/>
                 <value caption="ADC Single Ended Input pin 14" name="ADC14" value="0x26"/>
                 <value caption="ADC Single Ended Input pin 15" name="ADC15" value="0x27"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain" name="ADC8_ADC8_10X"
-                       value="0x28"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain" name="ADC9_ADC8_10X"
-                       value="0x29"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain" name="ADC8_ADC8_200x"
-                       value="0x2A"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain" name="ADC9_ADC8_200X"
-                       value="0x2B"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain" name="ADC10_ADC10_10X"
-                       value="0x2C"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain" name="ADC11_ADC10_10X"
-                       value="0x2D"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain"
-                       name="ADC10_ADC10_200X" value="0x2E"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain"
-                       name="ADC11_ADC10_200X" value="0x2F"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain" name="ADC8_ADC9_1X"
-                       value="0x30"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain" name="ADC9_ADC9_1X"
-                       value="0x31"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain" name="ADC10_ADC9_1X"
-                       value="0x32"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain" name="ADC11_ADC9_1X"
-                       value="0x33"/>
-                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain" name="ADC12_ADC9_1X"
-                       value="0x34"/>
-                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain" name="ADC13_ADC9_1X"
-                       value="0x35"/>
-                <value caption="ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain" name="ADC14_ADC9_1X"
-                       value="0x36"/>
-                <value caption="ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain" name="ADC15_ADC9_1X"
-                       value="0x37"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain" name="ADC8_ADC10_1X"
-                       value="0x38"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain" name="ADC9_ADC10_1X"
-                       value="0x39"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain" name="ADC10_ADC10_1X"
-                       value="0x3A"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain" name="ADC11_ADC10_1X"
-                       value="0x3B"/>
-                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain" name="ADC12_ADC10_1X"
-                       value="0x3C"/>
-                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain" name="ADC13_ADC10_1X"
-                       value="0x3D"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain" name="ADC8_ADC8_10X" value="0x28"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain" name="ADC9_ADC8_10X" value="0x29"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain" name="ADC8_ADC8_200x" value="0x2A"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain" name="ADC9_ADC8_200X" value="0x2B"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain" name="ADC10_ADC10_10X" value="0x2C"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain" name="ADC11_ADC10_10X" value="0x2D"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain" name="ADC10_ADC10_200X" value="0x2E"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain" name="ADC11_ADC10_200X" value="0x2F"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain" name="ADC8_ADC9_1X" value="0x30"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain" name="ADC9_ADC9_1X" value="0x31"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain" name="ADC10_ADC9_1X" value="0x32"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain" name="ADC11_ADC9_1X" value="0x33"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain" name="ADC12_ADC9_1X" value="0x34"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain" name="ADC13_ADC9_1X" value="0x35"/>
+                <value caption="ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain" name="ADC14_ADC9_1X" value="0x36"/>
+                <value caption="ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain" name="ADC15_ADC9_1X" value="0x37"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain" name="ADC8_ADC10_1X" value="0x38"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain" name="ADC9_ADC10_1X" value="0x39"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain" name="ADC10_ADC10_1X" value="0x3A"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain" name="ADC11_ADC10_1X" value="0x3B"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain" name="ADC12_ADC10_1X" value="0x3C"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain" name="ADC13_ADC10_1X" value="0x3D"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2561.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2561.xml
index b04d8bd4..ca2723b0 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2561.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2561.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega2561V-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega2561V-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="QFN64"
-                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega2561-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="4.5" vccmax="5.5"/>
-        <variant ordercode="ATmega2561-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
-                 package="QFN64" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega2561V-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP64" package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega2561V-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega2561-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64" package="TQFP64" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega2561-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="4.5" vccmax="5.5"/>
     </variants>
     <device name="ATmega2561" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x40000">
-                <memory-segment start="0x0000" size="0x40000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x40000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x3fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x3f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x3f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x3e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -40,8 +31,7 @@
                 <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -51,8 +41,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -61,8 +50,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PE1"/>
                         <signal group="RXD" function="default" pad="PE0"/>
@@ -70,8 +58,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -81,8 +68,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PD1"/>
                         <signal group="SCL" function="default" pad="PD0"/>
@@ -91,8 +77,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="MOSI" function="default" pad="PB2"/>
@@ -103,8 +88,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -117,8 +101,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -131,8 +114,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -145,8 +127,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -159,8 +140,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -173,8 +153,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -187,8 +166,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -203,8 +181,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PG5"/>
@@ -214,8 +191,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="TOSC" index="1" function="default" pad="PG4"/>
                         <signal group="TOSC" index="2" function="default" pad="PG3"/>
@@ -225,28 +201,23 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC5" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC4" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PE6"/>
                         <signal group="ICP" function="default" pad="PE7"/>
@@ -256,8 +227,7 @@
                     </signals>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD6"/>
                         <signal group="ICP" function="default" pad="PD4"/>
@@ -269,8 +239,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -281,8 +250,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PB0"/>
                         <signal group="PCINT" index="1" function="default" pad="PB1"/>
@@ -306,8 +274,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PE7"/>
                     </signals>
@@ -318,8 +285,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -334,26 +300,22 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -467,8 +429,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -529,8 +490,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -561,8 +521,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -586,104 +545,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$1FE00" name="512W_1FE00" value="0x03"/>
@@ -729,16 +639,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -931,10 +839,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -948,14 +854,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -979,14 +882,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -1003,10 +903,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -1037,8 +935,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1086,8 +983,7 @@
                     <bitfield caption="Input Capture 5 Noise Canceler" mask="0x80" name="ICNC5"/>
                     <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 5 Control Register C" name="TCCR5C" offset="0x122" size="1">
                     <bitfield caption="Force Output Compare 5A" mask="0x80" name="FOC5A"/>
@@ -1095,26 +991,18 @@
                     <bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
                 </register>
                 <register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
                     <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
-                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE5C"/>
-                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE5B"/>
-                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE5A"/>
                     <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
                 </register>
-                <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1" ocd-rw="">
                     <bitfield caption="Input Capture Flag 5" mask="0x20" name="ICF5"/>
                     <bitfield caption="Output Compare Flag 5C" mask="0x08" name="OCF5C"/>
                     <bitfield caption="Output Compare Flag 5B" mask="0x04" name="OCF5B"/>
@@ -1133,8 +1021,7 @@
                     <bitfield caption="Input Capture 4 Noise Canceler" mask="0x80" name="ICNC4"/>
                     <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
                     <bitfield caption="Force Output Compare 4A" mask="0x80" name="FOC4A"/>
@@ -1142,26 +1029,18 @@
                     <bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
                 </register>
                 <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
                     <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
-                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE4C"/>
-                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE4B"/>
-                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE4A"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1" ocd-rw="">
                     <bitfield caption="Input Capture Flag 4" mask="0x20" name="ICF4"/>
                     <bitfield caption="Output Compare Flag 4C" mask="0x08" name="OCF4C"/>
                     <bitfield caption="Output Compare Flag 4B" mask="0x04" name="OCF4B"/>
@@ -1180,8 +1059,7 @@
                     <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
                     <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
@@ -1189,26 +1067,18 @@
                     <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
@@ -1227,8 +1097,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -1236,26 +1105,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -1276,8 +1137,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1289,24 +1149,16 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1366,10 +1218,8 @@
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
                     <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS2"/>
-                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
-                              values="CPU_WAIT_STATES"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1" values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0" values="CPU_WAIT_STATES"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
                     <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
@@ -1436,8 +1286,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
                 <value caption="1" name="VAL_0x00" value="0x00"/>
@@ -1469,25 +1318,21 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF6"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF6"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR2" offset="0x7D" size="1">
                     <bitfield caption="" mask="0x80" name="ADC15D"/>
@@ -1513,10 +1358,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF6">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1527,50 +1370,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
                 <value caption="ADC Single Ended Input pin 8" name="ADC8" value="0x20"/>
@@ -1581,50 +1402,28 @@
                 <value caption="ADC Single Ended Input pin 13" name="ADC13" value="0x25"/>
                 <value caption="ADC Single Ended Input pin 14" name="ADC14" value="0x26"/>
                 <value caption="ADC Single Ended Input pin 15" name="ADC15" value="0x27"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain" name="ADC8_ADC8_10X"
-                       value="0x28"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain" name="ADC9_ADC8_10X"
-                       value="0x29"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain" name="ADC8_ADC8_200x"
-                       value="0x2A"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain" name="ADC9_ADC8_200X"
-                       value="0x2B"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain" name="ADC10_ADC10_10X"
-                       value="0x2C"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain" name="ADC11_ADC10_10X"
-                       value="0x2D"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain"
-                       name="ADC10_ADC10_200X" value="0x2E"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain"
-                       name="ADC11_ADC10_200X" value="0x2F"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain" name="ADC8_ADC9_1X"
-                       value="0x30"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain" name="ADC9_ADC9_1X"
-                       value="0x31"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain" name="ADC10_ADC9_1X"
-                       value="0x32"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain" name="ADC11_ADC9_1X"
-                       value="0x33"/>
-                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain" name="ADC12_ADC9_1X"
-                       value="0x34"/>
-                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain" name="ADC13_ADC9_1X"
-                       value="0x35"/>
-                <value caption="ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain" name="ADC14_ADC9_1X"
-                       value="0x36"/>
-                <value caption="ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain" name="ADC15_ADC9_1X"
-                       value="0x37"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain" name="ADC8_ADC10_1X"
-                       value="0x38"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain" name="ADC9_ADC10_1X"
-                       value="0x39"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain" name="ADC10_ADC10_1X"
-                       value="0x3A"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain" name="ADC11_ADC10_1X"
-                       value="0x3B"/>
-                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain" name="ADC12_ADC10_1X"
-                       value="0x3C"/>
-                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain" name="ADC13_ADC10_1X"
-                       value="0x3D"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain" name="ADC8_ADC8_10X" value="0x28"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain" name="ADC9_ADC8_10X" value="0x29"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain" name="ADC8_ADC8_200x" value="0x2A"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain" name="ADC9_ADC8_200X" value="0x2B"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain" name="ADC10_ADC10_10X" value="0x2C"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain" name="ADC11_ADC10_10X" value="0x2D"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain" name="ADC10_ADC10_200X" value="0x2E"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain" name="ADC11_ADC10_200X" value="0x2F"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain" name="ADC8_ADC9_1X" value="0x30"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain" name="ADC9_ADC9_1X" value="0x31"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain" name="ADC10_ADC9_1X" value="0x32"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain" name="ADC11_ADC9_1X" value="0x33"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain" name="ADC12_ADC9_1X" value="0x34"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain" name="ADC13_ADC9_1X" value="0x35"/>
+                <value caption="ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain" name="ADC14_ADC9_1X" value="0x36"/>
+                <value caption="ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain" name="ADC15_ADC9_1X" value="0x37"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain" name="ADC8_ADC10_1X" value="0x38"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain" name="ADC9_ADC10_1X" value="0x39"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain" name="ADC10_ADC10_1X" value="0x3A"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain" name="ADC11_ADC10_1X" value="0x3B"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain" name="ADC12_ADC10_1X" value="0x3C"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain" name="ADC13_ADC10_1X" value="0x3D"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2564RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2564RFR2.xml
index 38cde75c..9f5c981c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2564RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2564RFR2.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega2564RFR2-ZU" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega2564RFR2-ZUR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega2564RFR2-ZF" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega2564RFR2-ZFR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega2564RFR2-ZU" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega2564RFR2-ZUR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega2564RFR2-ZF" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega2564RFR2-ZFR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
     </variants>
     <device name="ATmega2564RFR2" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x40000">
-                <memory-segment start="0x0000" size="0x40000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x40000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x3fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x3f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x3f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x3e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,10 +24,8 @@
             <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
                 <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
-            <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100"
-                           size="0x0300">
-                <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="0x100"/>
+            <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100" size="0x0300">
+                <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="data" id="data" start="0x0000" size="0x8200">
                 <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
@@ -44,8 +33,7 @@
                 <memory-segment name="IRAM" start="0x0200" size="0x8000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x2000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -55,48 +43,39 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
                 <instance name="USART0_SPI" caption="Serial Peripheral Interface">
-                    <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
                 <instance name="USART1_SPI" caption="Serial Peripheral Interface">
-                    <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="MISSING_PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -109,12 +88,10 @@
                     </signals>
                 </instance>
                 <instance name="MISSING_PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -127,8 +104,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -140,8 +116,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -154,8 +129,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
                         <signal function="PORTG" group="P" index="3" pad="PG3"/>
@@ -165,86 +139,71 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC5" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC4" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TRX24">
                 <instance name="TRX24" caption="Low-Power 2.4 GHz Transceiver">
-                    <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data"
-                                    caption="Low-Power 2.4 GHz Transceiver"/>
+                    <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data" caption="Low-Power 2.4 GHz Transceiver"/>
                 </instance>
             </module>
             <module name="SYMCNT">
                 <instance name="SYMCNT" caption="MAC Symbol Counter">
-                    <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data"
-                                    caption="MAC Symbol Counter"/>
+                    <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data" caption="MAC Symbol Counter"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V3"/>
                     </parameters>
@@ -252,32 +211,27 @@
             </module>
             <module name="FLASH">
                 <instance name="FLASH" caption="FLASH Controller">
-                    <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data"
-                                    caption="FLASH Controller"/>
+                    <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data" caption="FLASH Controller"/>
                 </instance>
             </module>
             <module name="PWRCTRL">
                 <instance name="PWRCTRL" caption="Power Controller">
-                    <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data"
-                                    caption="Power Controller"/>
+                    <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data" caption="Power Controller"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -342,8 +296,7 @@
             <interrupt index="68" name="SCNT_OVFL" caption="Symbol counter - overflow interrupt"/>
             <interrupt index="69" name="SCNT_BACKOFF" caption="Symbol counter - backoff interrupt"/>
             <interrupt index="70" name="AES_READY" caption="AES engine ready interrupt"/>
-            <interrupt index="71" name="BAT_LOW"
-                       caption="Battery monitor indicates supply voltage below threshold"/>
+            <interrupt index="71" name="BAT_LOW" caption="Battery monitor indicates supply voltage below threshold"/>
             <interrupt index="72" name="TRX24_TX_START" caption="TRX24 TX start interrupt"/>
             <interrupt index="73" name="TRX24_AMI0" caption="Address match interrupt of address filter 0"/>
             <interrupt index="74" name="TRX24_AMI1" caption="Address match interrupt of address filter 1"/>
@@ -413,8 +366,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -475,8 +427,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -507,8 +458,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFE">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -522,8 +472,7 @@
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
                     <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
-                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT"
-                              values="ENUM_SUT_CKSEL"/>
+                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT" values="ENUM_SUT_CKSEL"/>
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
@@ -533,87 +482,49 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS"
-                       value="0x23"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x06"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x16"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS" value="0x23"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x06"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x16"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x26"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x36"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x07"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x17"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x27"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x37"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x08"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x18"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x36"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x07"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x17"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x27"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x37"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x08"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x18"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x28"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x38"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x09"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x19"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x29"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x39"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x38"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x09"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x19"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x29"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x39"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1A"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1C"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1E"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$1FE00" name="512W_1FE00" value="0x03"/>
@@ -670,8 +581,7 @@
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -688,8 +598,7 @@
         <module caption="USART" name="USART">
             <register-group caption="USART" name="USART0">
                 <register caption="USART0 I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
-                          ocd-rw="R">
+                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
@@ -710,8 +619,7 @@
                     <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
                 </register>
                 <register caption="USART0 Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
-                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0"
-                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT_MEGARF"/>
                     <bitfield caption="Parity Mode" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
                     <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
@@ -721,8 +629,7 @@
             </register-group>
             <register-group caption="USART" name="USART1">
                 <register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
-                          ocd-rw="R">
+                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
@@ -743,8 +650,7 @@
                     <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
                 </register>
                 <register caption="USART1 Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
-                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"
-                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT_MEGARF"/>
                     <bitfield caption="Parity Mode" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
                     <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
@@ -779,10 +685,8 @@
                 <value caption="9-bit" name="VAL_7" value="7"/>
             </value-group>
             <value-group caption="" name="USART_CLK_POLARITY_BITF">
-                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)"
-                       name="VAL_0" value="0"/>
-                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)"
-                       name="VAL_1" value="1"/>
+                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)" name="VAL_0" value="0"/>
+                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)" name="VAL_1" value="1"/>
             </value-group>
         </module>
         <module caption="Two Wire Serial Interface" name="TWI">
@@ -820,40 +724,26 @@
                 <value caption="SLA+W has been transmitted; ACK has been received." name="VAL_0x18" value="0x18"/>
                 <value caption="SLA+W has been transmitted; NOT ACK has been received." name="VAL_0x20" value="0x20"/>
                 <value caption="Data byte has been transmitted; ACK has been received." name="VAL_0x28" value="0x28"/>
-                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30"
-                       value="0x30"/>
-                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)."
-                       name="VAL_0x38" value="0x38"/>
+                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30" value="0x30"/>
+                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)." name="VAL_0x38" value="0x38"/>
                 <value caption="SLA+R has been transmitted; ACK has been received." name="VAL_0x40" value="0x40"/>
                 <value caption="SLA+R has been transmitted; NOT ACK has been received." name="VAL_0x48" value="0x48"/>
                 <value caption="Data byte has been received; ACK has been returned." name="VAL_0x50" value="0x50"/>
                 <value caption="Data byte has been received; NOT ACK has been returned." name="VAL_0x58" value="0x58"/>
                 <value caption="Own SLA+W has been received; ACK has been returned." name="VAL_0x60" value="0x60"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned."
-                       name="VAL_0x68" value="0x68"/>
-                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70"
-                       value="0x70"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned."
-                       name="VAL_0x78" value="0x78"/>
-                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned."
-                       name="VAL_0x80" value="0x80"/>
-                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned."
-                       name="VAL_0x88" value="0x88"/>
-                <value caption="Previously addressed with general call; data has been received; ACK has been returned."
-                       name="VAL_0x90" value="0x90"/>
-                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned."
-                       name="VAL_0x98" value="0x98"/>
-                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave."
-                       name="VAL_0xA0" value="0xA0"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned." name="VAL_0x68" value="0x68"/>
+                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70" value="0x70"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned." name="VAL_0x78" value="0x78"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned." name="VAL_0x80" value="0x80"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned." name="VAL_0x88" value="0x88"/>
+                <value caption="Previously addressed with general call; data has been received; ACK has been returned." name="VAL_0x90" value="0x90"/>
+                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned." name="VAL_0x98" value="0x98"/>
+                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave." name="VAL_0xA0" value="0xA0"/>
                 <value caption="Own SLA+R has been received; ACK has been returned." name="VAL_0xA8" value="0xA8"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned."
-                       name="VAL_0xB0" value="0xB0"/>
-                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8"
-                       value="0xB8"/>
-                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0"
-                       value="0xC0"/>
-                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received."
-                       name="VAL_0xC8" value="0xC8"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned." name="VAL_0xB0" value="0xB0"/>
+                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8" value="0xB8"/>
+                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0" value="0xC0"/>
+                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received." name="VAL_0xC8" value="0xC8"/>
                 <value caption="No relevant state information available; TWINT = 0." name="VAL_0xF8" value="0xF8"/>
             </value-group>
             <value-group caption="" name="COMM_TWI_PRESACLE">
@@ -872,8 +762,7 @@
                     <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
                     <bitfield caption="Clock polarity" mask="0x08" name="CPOL" values="SPI_CPOL_BITF"/>
                     <bitfield caption="Clock Phase" mask="0x04" name="CPHA" values="SPI_CPHA_BITF"/>
-                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR"
-                              values="COMM_SCK_RATE_SPI2X"/>
+                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR" values="COMM_SCK_RATE_SPI2X"/>
                 </register>
                 <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
                     <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
@@ -883,8 +772,7 @@
                 <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
             </register-group>
             <register-group caption="Serial Peripheral Interface" name="USART0_SPI">
-                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
-                          ocd-rw="R">
+                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
@@ -903,8 +791,7 @@
                 </register>
             </register-group>
             <register-group caption="Serial Peripheral Interface" name="USART1_SPI">
-                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
-                          ocd-rw="R">
+                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
@@ -976,10 +863,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Register" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -995,14 +880,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0" values="TC0_WGM_BITF"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare B Match Flag" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare A Match Flag" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1050,14 +932,11 @@
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
                     <bitfield caption="Output Compare Flag 2 B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2 A" mask="0x02" name="OCF2A"/>
@@ -1075,19 +954,15 @@
                     <bitfield caption="Clock Select" mask="0x07" name="CS2" values="TC2_CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input for AMR" mask="0x80" name="EXCLKAMR"/>
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Timer/Counter2 Asynchronous Mode" mask="0x20" name="AS2"/>
                     <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08"
-                              name="OCR2AUB"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04"
-                              name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04" name="OCR2BUB"/>
                     <bitfield caption="Timer/Counter2 Control Register A Update Busy" mask="0x02" name="TCR2AUB"/>
                     <bitfield caption="Timer/Counter2 Control Register B Update Busy" mask="0x01" name="TCR2BUB"/>
                 </register>
@@ -1134,8 +1009,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1156,20 +1030,16 @@
         <module caption="Timer/Counter, 16-bit" name="TC16">
             <register-group caption="Timer/Counter, 16-bit" name="TC5">
                 <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C"
-                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C" values="TC4_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
                     <bitfield caption="Input Capture 5 Noise Canceller" mask="0x80" name="ICNC5"/>
                     <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS5" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter5 Control Register C" name="TCCR5C" offset="0x122" size="1">
@@ -1178,26 +1048,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
                 </register>
                 <register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
                     <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
-                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE5C"/>
-                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE5B"/>
-                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE5A"/>
                     <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
                 </register>
-                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1" ocd-rw="">
                     <bitfield caption="Timer/Counter5 Input Capture Flag" mask="0x20" name="ICF5"/>
                     <bitfield caption="Timer/Counter5 Output Compare C Match Flag" mask="0x08" name="OCF5C"/>
                     <bitfield caption="Timer/Counter5 Output Compare B Match Flag" mask="0x04" name="OCF5B"/>
@@ -1207,20 +1069,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC4">
                 <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C"
-                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C" values="TC4_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
                     <bitfield caption="Input Capture 4 Noise Canceller" mask="0x80" name="ICNC4"/>
                     <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS4" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
@@ -1229,26 +1087,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
                 </register>
                 <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
                     <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
-                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE4C"/>
-                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE4B"/>
-                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE4A"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1" ocd-rw="">
                     <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
                     <bitfield caption="Timer/Counter4 Output Compare C Match Flag" mask="0x08" name="OCF4C"/>
                     <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
@@ -1258,20 +1108,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC3">
                 <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C"
-                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C" values="TC1_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
                     <bitfield caption="Input Capture 3 Noise Canceller" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
@@ -1280,26 +1126,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
                     <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
@@ -1309,20 +1147,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C"
-                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C" values="TC1_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
                     <bitfield caption="Input Capture 1 Noise Canceller" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
@@ -1331,26 +1165,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare C Match Flag" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
@@ -1395,10 +1221,8 @@
             <value-group caption="" name="TC1_COMNX_BITF">
                 <value caption="Normal port operation, OCnA/OCnB/OCnC disconnected." name="VAL_0" value="0"/>
                 <value caption="Toggle OCnA/OCnB/OCnC on Compare Match." name="VAL_1" value="1"/>
-                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2"
-                       value="2"/>
-                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3"
-                       value="3"/>
+                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2" value="2"/>
+                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3" value="3"/>
             </value-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT_MEGARF">
                 <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
@@ -1419,106 +1243,75 @@
                     <bitfield caption="Power Amplifier Ramp Down Frequency Inversion" mask="0x02" name="PARDFI"/>
                     <bitfield caption="Power Amplifier Ramp Up Frequency Inversion" mask="0x01" name="PARUFI"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L"
-                          offset="0x10E" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L" offset="0x10E" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 0" mask="0xFF" name="MAFSA0L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H"
-                          offset="0x10F" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H" offset="0x10F" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 0" mask="0xFF" name="MAFSA0H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)"
-                          name="MAFPA0L" offset="0x110" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF"
-                              name="MAFPA0L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)" name="MAFPA0L" offset="0x110" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF" name="MAFPA0L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)"
-                          name="MAFPA0H" offset="0x111" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF"
-                              name="MAFPA0H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)" name="MAFPA0H" offset="0x111" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF" name="MAFPA0H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L"
-                          offset="0x112" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L" offset="0x112" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 1" mask="0xFF" name="MAFSA1L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H"
-                          offset="0x113" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H" offset="0x113" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 1" mask="0xFF" name="MAFSA1H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)"
-                          name="MAFPA1L" offset="0x114" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF"
-                              name="MAFPA1L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)" name="MAFPA1L" offset="0x114" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF" name="MAFPA1L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)"
-                          name="MAFPA1H" offset="0x115" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF"
-                              name="MAFPA1H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)" name="MAFPA1H" offset="0x115" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF" name="MAFPA1H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L"
-                          offset="0x116" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L" offset="0x116" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 2" mask="0xFF" name="MAFSA2L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H"
-                          offset="0x117" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H" offset="0x117" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 2" mask="0xFF" name="MAFSA2H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)"
-                          name="MAFPA2L" offset="0x118" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF"
-                              name="MAFPA2L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)" name="MAFPA2L" offset="0x118" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF" name="MAFPA2L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)"
-                          name="MAFPA2H" offset="0x119" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF"
-                              name="MAFPA2H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)" name="MAFPA2H" offset="0x119" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF" name="MAFPA2H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L"
-                          offset="0x11A" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L" offset="0x11A" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 3" mask="0xFF" name="MAFSA3L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H"
-                          offset="0x11B" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H" offset="0x11B" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 3" mask="0xFF" name="MAFSA3H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)"
-                          name="MAFPA3L" offset="0x11C" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF"
-                              name="MAFPA3L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)" name="MAFPA3L" offset="0x11C" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF" name="MAFPA3L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)"
-                          name="MAFPA3H" offset="0x11D" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF"
-                              name="MAFPA3H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)" name="MAFPA3H" offset="0x11D" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF" name="MAFPA3H"/>
                 </register>
-                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C"
-                          size="1">
+                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C" size="1">
                     <bitfield caption="Reserved Bit" mask="0xF0" name="Res"/>
                     <bitfield caption="Multiple Address Filter 3 Enable" mask="0x08" name="MAF3EN"/>
                     <bitfield caption="Multiple Address Filter 2 Enable" mask="0x04" name="MAF2EN"/>
                     <bitfield caption="Multiple Address Filter 1 Enable" mask="0x02" name="MAF1EN"/>
                     <bitfield caption="Multiple Address Filter 0 Enable" mask="0x01" name="MAF0EN"/>
                 </register>
-                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D"
-                          size="1">
+                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D" size="1">
                     <bitfield caption="Set Data Pending bit for address filter 3." mask="0x80" name="AACK_3_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40"
-                              name="AACK_3_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40" name="AACK_3_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 2." mask="0x20" name="AACK_2_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10"
-                              name="AACK_2_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10" name="AACK_2_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 1." mask="0x08" name="AACK_1_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04"
-                              name="AACK_1_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04" name="AACK_1_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 0." mask="0x02" name="AACK_0_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01"
-                              name="AACK_0_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01" name="AACK_0_I_AM_COORD"/>
                 </register>
                 <register caption="AES Control Register" name="AES_CTRL" offset="0x13C" size="1">
                     <bitfield caption="Request AES Operation." mask="0x80" name="AES_REQUEST"/>
                     <bitfield caption="Set AES Operation Mode" mask="0x20" name="AES_MODE" values="AES_MODE_BITF"/>
-                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR"
-                              values="AES_DIRECTION_BITF"/>
+                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR" values="AES_DIRECTION_BITF"/>
                     <bitfield caption="AES Interrupt Enable" mask="0x04" name="AES_IM"/>
                 </register>
                 <register caption="AES Status Register" name="AES_STATUS" offset="0x13D" size="1" ocd-rw="R">
@@ -1528,8 +1321,7 @@
                 <register caption="AES Plain and Cipher Text Buffer Register" name="AES_STATE" offset="0x13E" size="1">
                     <bitfield caption="AES Plain and Cipher Text Buffer" mask="0xFF" name="AES_STATE"/>
                 </register>
-                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F"
-                          size="1">
+                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F" size="1">
                     <bitfield caption="AES Encryption/Decryption Key Buffer" mask="0xFF" name="AES_KEY"/>
                 </register>
                 <register caption="Transceiver Status Register" name="TRX_STATUS" offset="0x141" size="1" ocd-rw="R">
@@ -1554,24 +1346,18 @@
                     <bitfield caption="Enable Automatic CRC Calculation" mask="0x20" name="TX_AUTO_CRC_ON"/>
                     <bitfield caption="Enable PLL TX filter" mask="0x10" name="PLL_TX_FLT"/>
                 </register>
-                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145"
-                          size="1">
+                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145" size="1">
                     <bitfield caption="Transmit Power Setting" mask="0x0F" name="TX_PWR" values="TX_PWR_bitf"/>
                 </register>
-                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1"
-                          ocd-rw="R">
-                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID"
-                              values="RX_CRC_VALID_bitf"/>
+                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1" ocd-rw="R">
+                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID" values="RX_CRC_VALID_bitf"/>
                     <bitfield caption="Random Value" mask="0x60" name="RND_VALUE"/>
-                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI"
-                              values="RSSI_VALUE_BITF"/>
+                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI" values="RSSI_VALUE_BITF"/>
                 </register>
-                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147"
-                          size="1" ocd-rw="R">
+                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147" size="1" ocd-rw="R">
                     <bitfield caption="Energy Detection Level" mask="0xFF" name="ED_LEVEL" values="ED_LEVEL_BITF"/>
                 </register>
-                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA"
-                          offset="0x148" size="1">
+                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA" offset="0x148" size="1">
                     <bitfield caption="Manual CCA Measurement Request" mask="0x80" name="CCA_REQUEST"/>
                     <bitfield caption="Select CCA Measurement Mode" mask="0x60" name="CCA_MODE" values="CCA_MODE_bitf"/>
                     <bitfield caption="RX/TX Channel Selection" mask="0x1F" name="CHANNEL" values="CHANNEL_bitf"/>
@@ -1581,27 +1367,20 @@
                     <bitfield caption="ED Threshold Level for CCA Measurement" mask="0x0F" name="CCA_ED_THRES"/>
                 </register>
                 <register caption="Transceiver Receive Control Register" name="RX_CTRL" offset="0x14A" size="1">
-                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES"
-                              values="PDT_THRES_bitf"/>
+                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES" values="PDT_THRES_bitf"/>
                 </register>
                 <register caption="Start of Frame Delimiter Value Register" name="SFD_VALUE" offset="0x14B" size="1">
-                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE"
-                              values="SFD_VALUE_BITF"/>
+                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE" values="SFD_VALUE_BITF"/>
                 </register>
                 <register caption="Transceiver Control Register 2" name="TRX_CTRL_2" offset="0x14C" size="1">
                     <bitfield caption="RX Safe Mode" mask="0x80" name="RX_SAFE_MODE"/>
-                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE"
-                              values="OQPSK_DATA_RATE_bitf"/>
+                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE" values="OQPSK_DATA_RATE_bitf"/>
                 </register>
                 <register caption="Antenna Diversity Control Register" name="ANT_DIV" offset="0x14D" size="1">
-                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL"
-                              values="ANT_SEL_bitf"/>
-                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN"
-                              values="ANT_DIV_EN_bitf"/>
-                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN"
-                              values="ANT_EXT_SW_EN_bitf"/>
-                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL"
-                              values="ANT_CTRL_bitf"/>
+                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL" values="ANT_SEL_bitf"/>
+                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN" values="ANT_DIV_EN_bitf"/>
+                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN" values="ANT_EXT_SW_EN_bitf"/>
+                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL" values="ANT_CTRL_bitf"/>
                 </register>
                 <register caption="Transceiver Interrupt Enable Register" name="IRQ_MASK" offset="0x14E" size="1">
                     <bitfield caption="Awake Interrupt Enable" mask="0x80" name="AWAKE_EN"/>
@@ -1625,14 +1404,10 @@
                 </register>
                 <register caption="Transceiver Interrupt Enable Register 1" name="IRQ_MASK1" offset="0xBE" size="1">
                     <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10"
-                              name="MAF_3_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08"
-                              name="MAF_2_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04"
-                              name="MAF_1_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02"
-                              name="MAF_0_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10" name="MAF_3_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08" name="MAF_2_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04" name="MAF_1_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02" name="MAF_0_AMI_EN"/>
                     <bitfield caption="Transmit Start Interrupt enable" mask="0x01" name="TX_START_EN"/>
                 </register>
                 <register caption="Transceiver Interrupt Status Register 1" name="IRQ_STATUS1" offset="0xBF" size="1">
@@ -1643,29 +1418,22 @@
                     <bitfield caption="Address Match Interrupt Status Address filter 0" mask="0x02" name="MAF_0_AMI"/>
                     <bitfield caption="Transmit Start Interrupt Status" mask="0x01" name="TX_START"/>
                 </register>
-                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150"
-                          size="1">
-                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT"
-                              values="AVREG_EXT_BITF"/>
+                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150" size="1">
+                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT" values="AVREG_EXT_BITF"/>
                     <bitfield caption="AVDD Supply Voltage Valid" mask="0x40" name="AVDD_OK" values="AVDD_OK_BITF"/>
-                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT"
-                              values="DVREG_EXT_BITF"/>
+                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT" values="DVREG_EXT_BITF"/>
                     <bitfield caption="DVDD Supply Voltage Valid" mask="0x04" name="DVDD_OK" values="DVDD_OK_BITF"/>
                 </register>
                 <register caption="Battery Monitor Control and Status Register" name="BATMON" offset="0x151" size="1">
                     <bitfield caption="Battery Monitor Interrupt Status" mask="0x80" name="BAT_LOW"/>
                     <bitfield caption="Battery Monitor Interrupt Enable" mask="0x40" name="BAT_LOW_EN"/>
                     <bitfield caption="Battery Monitor Status" mask="0x20" name="BATMON_OK" values="BATMON_OK_bitf"/>
-                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR"
-                              values="BATMON_HR_bitf"/>
-                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH"
-                              values="BATMON_VTH_bitf"/>
+                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR" values="BATMON_HR_bitf"/>
+                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH" values="BATMON_VTH_bitf"/>
                 </register>
                 <register caption="Crystal Oscillator Control Register" name="XOSC_CTRL" offset="0x152" size="1">
-                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE"
-                              values="XTAL_MODE_BITF"/>
-                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM"
-                              values="XTAL_TRIM_bitf"/>
+                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE" values="XTAL_MODE_BITF"/>
+                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM" values="XTAL_TRIM_bitf"/>
                 </register>
                 <register caption="Channel Control Register 0" name="CC_CTRL_0" offset="0x153" size="1">
                     <bitfield caption="Channel Number" mask="0xFF" name="CC_NUMBER"/>
@@ -1673,54 +1441,42 @@
                 <register caption="Channel Control Register 1" name="CC_CTRL_1" offset="0x154" size="1">
                     <bitfield caption="Channel Band" mask="0x0F" name="CC_BAND"/>
                 </register>
-                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155"
-                          size="1">
+                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155" size="1">
                     <bitfield caption="Prevent Frame Reception" mask="0x80" name="RX_PDT_DIS"/>
                     <bitfield caption="Receiver Override Function" mask="0x40" name="RX_OVERRIDE"/>
-                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL"
-                              values="RX_PDT_LEVEL_BITF"/>
+                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL" values="RX_PDT_LEVEL_BITF"/>
                 </register>
-                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156"
-                          size="1">
-                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL"
-                              values="RX_RPC_CTRL_BITF"/>
+                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156" size="1">
+                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL" values="RX_RPC_CTRL_BITF"/>
                     <bitfield caption="Reciver Smart Receiving Mode Enable" mask="0x20" name="RX_RPC_EN"/>
                     <bitfield caption="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10" name="PDT_RPC_EN"/>
                     <bitfield caption="PLL Smart Receiving Mode Enable" mask="0x08" name="PLL_RPC_EN"/>
                     <bitfield caption="Reserved" mask="0x04" name="Res0"/>
                     <bitfield caption="Smart Receiving Mode IPAN Handling Enable" mask="0x02" name="IPAN_RPC_EN"/>
-                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01"
-                              name="XAH_RPC_EN"/>
+                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01" name="XAH_RPC_EN"/>
                 </register>
-                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157"
-                          size="1">
+                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157" size="1">
                     <bitfield caption="Filter Reserved Frames" mask="0x20" name="AACK_FLTR_RES_FT"/>
                     <bitfield caption="Process Reserved Frames" mask="0x10" name="AACK_UPLD_RES_FT"/>
-                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME"
-                              values="AACK_ACK_TIME_bitf"/>
+                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME" values="AACK_ACK_TIME_bitf"/>
                     <bitfield caption="Enable Promiscuous Mode" mask="0x02" name="AACK_PROM_MODE"/>
                 </register>
                 <register caption="Transceiver Filter Tuning Control Register" name="FTN_CTRL" offset="0x158" size="1">
                     <bitfield caption="Start Calibration Loop of Filter Tuning Network" mask="0x80" name="FTN_START"/>
                 </register>
-                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF"
-                          offset="0x15A" size="1">
+                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF" offset="0x15A" size="1">
                     <bitfield caption="Start Center Frequency Calibration" mask="0x80" name="PLL_CF_START"/>
                 </register>
-                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B"
-                          size="1">
+                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B" size="1">
                     <bitfield caption="Start Delay Cell Calibration" mask="0x80" name="PLL_DCU_START"/>
                 </register>
-                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1"
-                          ocd-rw="R">
+                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1" ocd-rw="R">
                     <bitfield caption="Part Number" mask="0xFF" name="PART_NUM" values="PART_NUM_bitf"/>
                 </register>
-                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D"
-                          size="1" ocd-rw="R">
+                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D" size="1" ocd-rw="R">
                     <bitfield caption="Version Number" mask="0xFF" name="VERSION_NUM" values="VERSION_NUM_2_BITF"/>
                 </register>
-                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0"
-                          offset="0x15E" size="1" ocd-rw="R">
+                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0" offset="0x15E" size="1" ocd-rw="R">
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x80" name="MAN_ID_07"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x40" name="MAN_ID_06"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x20" name="MAN_ID_05"/>
@@ -1730,13 +1486,10 @@
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x02" name="MAN_ID_01"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x01" name="MAN_ID_00" values="MAN_ID_0_BITF"/>
                 </register>
-                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1"
-                          offset="0x15F" size="1" ocd-rw="R">
-                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF"
-                              lsb="10"/>
+                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1" offset="0x15F" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF" lsb="10"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160"
-                          size="1">
+                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160" size="1">
                     <bitfield caption="MAC Short Address" mask="0x80" name="SHORT_ADDR_07"/>
                     <bitfield caption="MAC Short Address" mask="0x40" name="SHORT_ADDR_06"/>
                     <bitfield caption="MAC Short Address" mask="0x20" name="SHORT_ADDR_05"/>
@@ -1746,12 +1499,10 @@
                     <bitfield caption="MAC Short Address" mask="0x02" name="SHORT_ADDR_01"/>
                     <bitfield caption="MAC Short Address" mask="0x01" name="SHORT_ADDR_00"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1"
-                          offset="0x161" size="1">
+                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1" offset="0x161" size="1">
                     <bitfield caption="MAC Short Address" mask="0xFF" name="SHORT_ADDR_" lsb="10"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0"
-                          offset="0x162" size="1">
+                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0" offset="0x162" size="1">
                     <bitfield caption="MAC Personal Area Network ID" mask="0x80" name="PAN_ID_07"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x40" name="PAN_ID_06"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x20" name="PAN_ID_05"/>
@@ -1761,8 +1512,7 @@
                     <bitfield caption="MAC Personal Area Network ID" mask="0x02" name="PAN_ID_01"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x01" name="PAN_ID_00"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1"
-                          offset="0x163" size="1">
+                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1" offset="0x163" size="1">
                     <bitfield caption="MAC Personal Area Network ID" mask="0xFF" name="PAN_ID_" lsb="10"/>
                 </register>
                 <register caption="Transceiver MAC IEEE Address Register 0" name="IEEE_ADDR_0" offset="0x164" size="1">
@@ -1796,17 +1546,12 @@
                 <register caption="Transceiver MAC IEEE Address Register 7" name="IEEE_ADDR_7" offset="0x16B" size="1">
                     <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="70"/>
                 </register>
-                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0"
-                          offset="0x16C" size="1">
-                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0"
-                              name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
-                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E"
-                              name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
-                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION"
-                              values="SLOTTED_OPERATION_BITF"/>
+                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0" offset="0x16C" size="1">
+                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0" name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
+                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E" name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
+                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION" values="SLOTTED_OPERATION_BITF"/>
                 </register>
-                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0"
-                          offset="0x16D" size="1">
+                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0" offset="0x16D" size="1">
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x80" name="CSMA_SEED_07"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x40" name="CSMA_SEED_06"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x20" name="CSMA_SEED_05"/>
@@ -1816,27 +1561,21 @@
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x02" name="CSMA_SEED_01"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x01" name="CSMA_SEED_00"/>
                 </register>
-                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1"
-                          offset="0x16E" size="1">
-                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE"
-                              values="AACK_FVN_MODE_bitf"/>
+                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1" offset="0x16E" size="1">
+                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE" values="AACK_FVN_MODE_bitf"/>
                     <bitfield caption="Set Frame Pending Sub-field" mask="0x20" name="AACK_SET_PD"/>
                     <bitfield caption="Disable Acknowledgment Frame Transmission" mask="0x10" name="AACK_DIS_ACK"/>
                     <bitfield caption="Set Personal Area Network Coordinator" mask="0x08" name="AACK_I_AM_COORD"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x07" name="CSMA_SEED_1"/>
                 </register>
-                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F"
-                          size="1">
+                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F" size="1">
                     <bitfield caption="Maximum Back-off Exponent" mask="0xF0" name="MAX_BE" values="MAX_BE_bitf"/>
                     <bitfield caption="Minimum Back-off Exponent" mask="0x0F" name="MIN_BE" values="MIN_BE_bitf"/>
                 </register>
-                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176"
-                          size="1">
-                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG"
-                              values="TST_CTRL_DIG_BITF"/>
+                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176" size="1">
+                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG" values="TST_CTRL_DIG_BITF"/>
                 </register>
-                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B"
-                          size="1">
+                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B" size="1">
                     <bitfield caption="Received Frame Length" mask="0xFF" name="RX_LENGTH"/>
                 </register>
                 <register caption="Start of frame buffer" name="TRXFBST" offset="0x180" size="1" mask="0xFF"/>
@@ -1975,10 +1714,8 @@
                 <value caption="2480 MHz" name="F_2480MHZ" value="26"/>
             </value-group>
             <value-group caption="" name="PDT_THRES_bitf">
-                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled"
-                       name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
-                <value caption="Recommended correlator threshold for Antenna Diversity operation"
-                       name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
+                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled" name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
+                <value caption="Recommended correlator threshold for Antenna Diversity operation" name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
             </value-group>
             <value-group caption="" name="SFD_VALUE_BITF">
                 <value caption="IEEE 802.15.4 compliant value of the SFD" name="IEEE_SFD" value="0xA7"/>
@@ -2005,28 +1742,22 @@
                 <value caption="Reserved" name="VAL_0" value="0"/>
                 <value caption="Antenna 1: DIG1=H, DIG2=L" name="ANT_1" value="1"/>
                 <value caption="Antenna 0: DIG1=L, DIG2=H" name="ANT_0" value="2"/>
-                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity"
-                       name="ANT_RESET" value="3"/>
+                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity" name="ANT_RESET" value="3"/>
             </value-group>
             <value-group caption="" name="AVREG_EXT_BITF">
-                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT"
-                       value="0"/>
-                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section."
-                       name="AVDD_EXT" value="1"/>
+                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT" value="0"/>
+                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section." name="AVDD_EXT" value="1"/>
             </value-group>
             <value-group caption="" name="AVDD_OK_BITF">
                 <value caption="Analog voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
                 <value caption="Analog supply voltage has settled" name="VAL_1" value="1"/>
             </value-group>
             <value-group caption="" name="DVREG_EXT_BITF">
-                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT"
-                       value="0"/>
-                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section."
-                       name="DVDD_EXT" value="1"/>
+                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT" value="0"/>
+                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section." name="DVDD_EXT" value="1"/>
             </value-group>
             <value-group caption="" name="DVDD_OK_BITF">
-                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0"
-                       value="0"/>
+                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
                 <value caption="Digital supply voltage has settled" name="VAL_1" value="1"/>
             </value-group>
             <value-group caption="" name="BATMON_OK_bitf">
@@ -2056,10 +1787,8 @@
                 <value caption="3.675V / 2.45V (BATMON_HR=1/0)" name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="XTAL_MODE_BITF">
-                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4"
-                       value="0x4"/>
-                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled."
-                       name="VAL_0xF" value="0xF"/>
+                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4" value="0x4"/>
+                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled." name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="XTAL_TRIM_bitf">
                 <value caption="0.0 pF, trimming capacitors disconnected" name="XTAL_TRIM_MIN" value="0x0"/>
@@ -2068,21 +1797,17 @@
                 <value caption="4.5 pF, trimming capacitor switched on" name="XTAL_TRIM_MAX" value="0xF"/>
             </value-group>
             <value-group caption="" name="RX_PDT_LEVEL_BITF">
-                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered"
-                       name="RX_PDT_LEVEL_MIN" value="0x0"/>
+                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered" name="RX_PDT_LEVEL_MIN" value="0x0"/>
                 <value caption="RX_THRES &gt; RSSI_BASE_VAL + 0 · 3; RSSI &gt; -90 dBm" name="VAL_0x1" value="0x1"/>
                 <value caption="..." name="VAL_0x2" value="0x2"/>
                 <value caption="RX_THRES &gt; RSSI_BASE_VAL + 13 · 3; RSSI &gt; -51 dBm" name="VAL_0xE" value="0xE"/>
-                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX"
-                       value="0xF"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX" value="0xF"/>
             </value-group>
             <value-group caption="" name="RX_RPC_CTRL_BITF">
-                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0"
-                       value="0"/>
+                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0" value="0"/>
                 <value caption="Reserved" name="VAL_1" value="1"/>
                 <value caption="Reserved" name="VAL_2" value="2"/>
-                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3"
-                       value="3"/>
+                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3" value="3"/>
             </value-group>
             <value-group caption="" name="AACK_ACK_TIME_bitf">
                 <value caption="12 symbols acknowledgment time" name="AACK_ACK_TIME_12_SYM" value="0"/>
@@ -2100,12 +1825,10 @@
                 <value caption="Revision D" name="REV_D" value="4"/>
             </value-group>
             <value-group caption="" name="MAN_ID_0_BITF">
-                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F"
-                       name="ATMEL_BYTE_0" value="0x1f"/>
+                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F" name="ATMEL_BYTE_0" value="0x1f"/>
             </value-group>
             <value-group caption="" name="MAN_ID_1_BITF">
-                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F"
-                       name="ATMEL_BYTE_1" value="0x00"/>
+                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F" name="ATMEL_BYTE_1" value="0x00"/>
             </value-group>
             <value-group caption="" name="MAX_FRAME_RETRIES_bitf">
                 <value caption="Retransmission of frame is not attempted." name="VAL_0x0" value="0x0"/>
@@ -2122,10 +1845,8 @@
                 <value caption="Immediate frame re-transmission without performing CSMA-CA" name="VAL_0x7" value="0x7"/>
             </value-group>
             <value-group caption="" name="SLOTTED_OPERATION_BITF">
-                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested."
-                       name="SLOTTED_OP_DIS" value="0"/>
-                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller."
-                       name="SLOTTED_OP_EN" value="1"/>
+                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested." name="SLOTTED_OP_DIS" value="0"/>
+                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller." name="SLOTTED_OP_EN" value="1"/>
             </value-group>
             <value-group caption="" name="AACK_FVN_MODE_bitf">
                 <value caption="Acknowledge frames with version number 0" name="VAL_0" value="0"/>
@@ -2136,17 +1857,14 @@
             <value-group caption="" name="MAX_BE_bitf">
                 <value caption="This value is not valid for the maximum back-off exponent." name="VAL_1" value="1"/>
                 <value caption="This value is not valid for the maximum back-off exponent." name="VAL_2" value="2"/>
-                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3"
-                       value="3"/>
+                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3" value="3"/>
                 <value caption="..." name="VAL_4" value="4"/>
-                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8"
-                       value="8"/>
+                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8" value="8"/>
             </value-group>
             <value-group caption="" name="MIN_BE_bitf">
                 <value caption="Minimum value of minimum back-off exponent." name="VAL_0" value="0"/>
                 <value caption="..." name="VAL_1" value="1"/>
-                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE."
-                       name="VAL_8" value="8"/>
+                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE." name="VAL_8" value="8"/>
             </value-group>
             <value-group caption="" name="TST_CTRL_DIG_BITF">
                 <value caption="NORMAL (no test is active)" name="VAL_0" value="0"/>
@@ -2155,104 +1873,76 @@
         </module>
         <module caption="MAC Symbol Counter" name="SYMCNT">
             <register-group caption="MAC Symbol Counter" name="SYMCNT">
-                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH"
-                          offset="0xFC" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF"
-                              name="SCTSTRHH"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH" offset="0xFC" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSTRHH"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL"
-                          offset="0xFB" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF"
-                              name="SCTSTRHL"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL" offset="0xFB" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSTRHL"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH"
-                          offset="0xFA" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF"
-                              name="SCTSTRLH"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH" offset="0xFA" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSTRLH"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL"
-                          offset="0xF9" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF"
-                              name="SCTSTRLL"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL" offset="0xF9" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSTRLL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 HH-Byte" mask="0xFF" name="SCOCR1HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 HL-Byte" mask="0xFF" name="SCOCR1HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 LH-Byte" mask="0xFF" name="SCOCR1LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 LL-Byte" mask="0xFF" name="SCOCR1LL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 HH-Byte" mask="0xFF" name="SCOCR2HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 HL-Byte" mask="0xFF" name="SCOCR2HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 LH-Byte" mask="0xFF" name="SCOCR2LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 LL-Byte" mask="0xFF" name="SCOCR2LL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 HH-Byte" mask="0xFF" name="SCOCR3HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 HL-Byte" mask="0xFF" name="SCOCR3HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 LH-Byte" mask="0xFF" name="SCOCR3LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 LL-Byte" mask="0xFF" name="SCOCR3LL"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSRHH"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSRHL"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSRLH"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSRLL"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register HH-Byte" mask="0xFF" name="SCBTSRHH"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register HL-Byte" mask="0xFF" name="SCBTSRHL"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register LH-Byte" mask="0xFF" name="SCBTSRLH"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register LL-Byte" mask="0xFF" name="SCBTSRLL"/>
                 </register>
                 <register caption="Symbol Counter Register HH-Byte" name="SCCNTHH" offset="0xE4" size="1">
@@ -2286,8 +1976,7 @@
                 <register caption="Symbol Counter Control Register 1" name="SCCR1" offset="0xDD" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res" lsb="5"/>
                     <bitfield caption="Symbol Counter Beacon Timestamp Mask Register" mask="0x20" name="SCBTSM"/>
-                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"
-                              name="SCCKDIV" values="SCCKDIV_BITF"/>
+                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C" name="SCCKDIV" values="SCCKDIV_BITF"/>
                     <bitfield caption="Enable External Clock Source on PG2" mask="0x02" name="SCEECLK"/>
                     <bitfield caption="Backoff Slot Counter enable" mask="0x01" name="SCENBO"/>
                 </register>
@@ -2301,32 +1990,21 @@
                 </register>
                 <register caption="Symbol Counter Compare Source Register" name="SCCSR" offset="0xDB" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"
-                              name="SCCS3" values="SCCS3_BITF"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C"
-                              name="SCCS2" values="SCCS2_BITF"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03"
-                              name="SCCS1" values="SCCS1_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30" name="SCCS3" values="SCCS3_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C" name="SCCS2" values="SCCS2_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03" name="SCCS1" values="SCCS1_BITF"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH"
-                          offset="0xDA" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"
-                              name="SCRSTRHH"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH" offset="0xDA" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF" name="SCRSTRHH"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL"
-                          offset="0xD9" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF"
-                              name="SCRSTRHL"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL" offset="0xD9" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF" name="SCRSTRHL"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH"
-                          offset="0xD8" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF"
-                              name="SCRSTRLH"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH" offset="0xD8" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF" name="SCRSTRLH"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL"
-                          offset="0xD7" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF"
-                              name="SCRSTRLL"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL" offset="0xD7" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF" name="SCRSTRLL"/>
                 </register>
             </register-group>
             <value-group caption="" name="SCCKDIV_BITF">
@@ -2339,28 +2017,19 @@
                 <value caption="Transceiver Clock divided by 4,   (4MHz)" name="VAL_6" value="6"/>
             </value-group>
             <value-group caption="" name="SCCS3_BITF">
-                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
             <value-group caption="" name="SCCS2_BITF">
-                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
             <value-group caption="" name="SCCS1_BITF">
-                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
         </module>
         <module caption="EEPROM" name="EEPROM">
@@ -2395,39 +2064,28 @@
                 </register>
             </register-group>
             <value-group caption="" name="OCDR_DATA_BITF">
-                <value caption="Refer to the debugger documentation for further information on how to use this register."
-                       name="VAL_0" value="0"/>
+                <value caption="Refer to the debugger documentation for further information on how to use this register." name="VAL_0" value="0"/>
             </value-group>
         </module>
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL3"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL3"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
-                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT"
-                              values="INTERRUPT_REQ_ENABLE_BITF"/>
+                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT" values="INTERRUPT_REQ_ENABLE_BITF"/>
                 </register>
                 <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
-                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF"
-                              values="INTERRUPT_EXT_FLAG_BITF"/>
+                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF" values="INTERRUPT_EXT_FLAG_BITF"/>
                 </register>
                 <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
                     <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="16"/>
@@ -2449,12 +2107,9 @@
             </register-group>
             <value-group caption="" name="INTERRUPT_SENSE_CONTROL3">
                 <value caption="The low level of INTn generates an interrupt request." name="VAL_0x00" value="0x00"/>
-                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01"
-                       value="0x01"/>
-                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01" value="0x01"/>
+                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02" value="0x02"/>
+                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="INTERRUPT_REQ_ENABLE_BITF">
                 <value caption="All external pin interrupts are disabled." name="VAL_0x00" value="0x00"/>
@@ -2462,11 +2117,9 @@
             </value-group>
             <value-group caption="" name="INTERRUPT_EXT_FLAG_BITF">
                 <value caption="No edge or logic change on INT7:0 occurred." name="VAL_0x00" value="0x00"/>
-                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request."
-                       name="VAL_0x01" value="0x01"/>
+                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request." name="VAL_0x01" value="0x01"/>
                 <value caption="..." name="VAL_0x02" value="0x02"/>
-                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request."
-                       name="VAL_0x80" value="0x80"/>
+                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request." name="VAL_0x80" value="0x80"/>
             </value-group>
         </module>
         <module caption="Analog-to-Digital Converter" name="ADC">
@@ -2483,8 +2136,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="AVDD Supply Voltage OK" mask="0x80" name="AVDDOK"/>
@@ -2492,12 +2144,10 @@
                     <bitfield caption="Reference Voltage OK" mask="0x20" name="REFOK"/>
                     <bitfield caption="Analog Channel Change" mask="0x10" name="ACCH"/>
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="The ADC Control and Status Register C" name="ADCSRC" offset="0x77" size="1">
-                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT"
-                              values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
+                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT" values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
                     <bitfield caption="Reserved" mask="0x20" name="Res0"/>
                     <bitfield caption="ADC Start-up Time" mask="0x1F" name="ADSUT" values="ANALOG_ADC_STARTUP_TIME"/>
                 </register>
@@ -2525,10 +2175,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF9">
                 <value caption="AREF, Internal reference voltage generation turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVDD with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -2607,13 +2255,11 @@
                     <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
                 </register>
                 <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1">
-                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL"
-                              values="OSCCAL_BITF"/>
+                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL" values="OSCCAL_BITF"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
                 </register>
                 <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
                     <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
@@ -2686,8 +2332,7 @@
                 <value caption="Reserved" name="VAL_0xC" value="0xC"/>
                 <value caption="Reserved" name="VAL_0xD" value="0xD"/>
                 <value caption="Reserved" name="VAL_0xE" value="0xE"/>
-                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed."
-                       name="VAL_0xF" value="0xF"/>
+                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed." name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
                 <value caption="Idle" name="IDLE" value="0x00"/>
@@ -2710,8 +2355,7 @@
             <register-group caption="FLASH Controller" name="FLASH">
                 <register caption="Flash Extended-Mode Control-Register" name="NEMCR" offset="0x75" size="1">
                     <bitfield caption="Enable Extended Address Mode for Extra Rows" mask="0x40" name="ENEAM"/>
-                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM"
-                              values="NEMCR_ADDRESS_BITF"/>
+                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM" values="NEMCR_ADDRESS_BITF"/>
                 </register>
                 <register caption="Reference Voltage Calibration Register" name="BGCR" offset="0x67" size="1">
                     <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
@@ -2763,14 +2407,11 @@
                     <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
                     <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
                 </register>
-                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130"
-                          size="1">
+                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130" size="1">
                     <bitfield caption="Low-Byte Data Register Bits" mask="0x0F" name="LLDRL" values="LLDRL_VALUE_BITF"/>
                 </register>
-                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131"
-                          size="1">
-                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH"
-                              values="LLDRH_VALUE_BITF"/>
+                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131" size="1">
+                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH" values="LLDRH_VALUE_BITF"/>
                 </register>
                 <register caption="Low Leakage Voltage Regulator Control Register" name="LLCR" offset="0x12F" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
@@ -2795,16 +2436,12 @@
                 </register>
             </register-group>
             <value-group caption="" name="LLDRL_VALUE_BITF">
-                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08"
-                       value="0x08"/>
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00" value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08" value="0x08"/>
             </value-group>
             <value-group caption="" name="LLDRH_VALUE_BITF">
-                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10"
-                       value="0x10"/>
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00" value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10" value="0x10"/>
             </value-group>
             <value-group caption="" name="PAD_IO_bitf">
                 <value caption="2 mA" name="PAD_IO_2MA" value="0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA256RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA256RFR2.xml
index af4d121d..bb36d1ab 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA256RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA256RFR2.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega256RFR2-ZU" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega256RFR2-ZUR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega256RFR2-ZF" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega256RFR2-ZFR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega256RFR2-ZU" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega256RFR2-ZUR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega256RFR2-ZF" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega256RFR2-ZFR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
     </variants>
     <device name="ATmega256RFR2" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x40000">
-                <memory-segment start="0x0000" size="0x40000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0x3e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x40000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0x3fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0x3f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0x3f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0x3e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,10 +24,8 @@
             <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
                 <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
-            <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100"
-                           size="0x0300">
-                <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="0x100"/>
+            <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100" size="0x0300">
+                <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="data" id="data" start="0x0000" size="0x8200">
                 <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
@@ -44,8 +33,7 @@
                 <memory-segment name="IRAM" start="0x0200" size="0x8000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x2000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -55,48 +43,39 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
                 <instance name="USART0_SPI" caption="Serial Peripheral Interface">
-                    <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
                 <instance name="USART1_SPI" caption="Serial Peripheral Interface">
-                    <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="MISSING_PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -109,12 +88,10 @@
                     </signals>
                 </instance>
                 <instance name="MISSING_PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -127,8 +104,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -141,8 +117,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -155,8 +130,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -169,86 +143,71 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC5" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC4" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TRX24">
                 <instance name="TRX24" caption="Low-Power 2.4 GHz Transceiver">
-                    <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data"
-                                    caption="Low-Power 2.4 GHz Transceiver"/>
+                    <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data" caption="Low-Power 2.4 GHz Transceiver"/>
                 </instance>
             </module>
             <module name="SYMCNT">
                 <instance name="SYMCNT" caption="MAC Symbol Counter">
-                    <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data"
-                                    caption="MAC Symbol Counter"/>
+                    <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data" caption="MAC Symbol Counter"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V3"/>
                     </parameters>
@@ -256,32 +215,27 @@
             </module>
             <module name="FLASH">
                 <instance name="FLASH" caption="FLASH Controller">
-                    <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data"
-                                    caption="FLASH Controller"/>
+                    <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data" caption="FLASH Controller"/>
                 </instance>
             </module>
             <module name="PWRCTRL">
                 <instance name="PWRCTRL" caption="Power Controller">
-                    <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data"
-                                    caption="Power Controller"/>
+                    <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data" caption="Power Controller"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -346,8 +300,7 @@
             <interrupt index="68" name="SCNT_OVFL" caption="Symbol counter - overflow interrupt"/>
             <interrupt index="69" name="SCNT_BACKOFF" caption="Symbol counter - backoff interrupt"/>
             <interrupt index="70" name="AES_READY" caption="AES engine ready interrupt"/>
-            <interrupt index="71" name="BAT_LOW"
-                       caption="Battery monitor indicates supply voltage below threshold"/>
+            <interrupt index="71" name="BAT_LOW" caption="Battery monitor indicates supply voltage below threshold"/>
             <interrupt index="72" name="TRX24_TX_START" caption="TRX24 TX start interrupt"/>
             <interrupt index="73" name="TRX24_AMI0" caption="Address match interrupt of address filter 0"/>
             <interrupt index="74" name="TRX24_AMI1" caption="Address match interrupt of address filter 1"/>
@@ -417,8 +370,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -479,8 +431,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -511,8 +462,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFE">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -526,8 +476,7 @@
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
                     <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
-                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT"
-                              values="ENUM_SUT_CKSEL"/>
+                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT" values="ENUM_SUT_CKSEL"/>
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
@@ -537,87 +486,49 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS"
-                       value="0x23"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x06"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x16"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS" value="0x23"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x06"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x16"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x26"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x36"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x07"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x17"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x27"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x37"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x08"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x18"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x36"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x07"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x17"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x27"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x37"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x08"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x18"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x28"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x38"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x09"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x19"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x29"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x39"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x38"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x09"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x19"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x29"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x39"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1A"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1C"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1E"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$1FE00" name="512W_1FE00" value="0x03"/>
@@ -674,8 +585,7 @@
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -692,8 +602,7 @@
         <module caption="USART" name="USART">
             <register-group caption="USART" name="USART0">
                 <register caption="USART0 I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
-                          ocd-rw="R">
+                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
@@ -714,8 +623,7 @@
                     <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
                 </register>
                 <register caption="USART0 Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
-                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0"
-                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT_MEGARF"/>
                     <bitfield caption="Parity Mode" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
                     <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
@@ -725,8 +633,7 @@
             </register-group>
             <register-group caption="USART" name="USART1">
                 <register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
-                          ocd-rw="R">
+                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
@@ -747,8 +654,7 @@
                     <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
                 </register>
                 <register caption="USART1 Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
-                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"
-                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT_MEGARF"/>
                     <bitfield caption="Parity Mode" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
                     <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
@@ -783,10 +689,8 @@
                 <value caption="9-bit" name="VAL_7" value="7"/>
             </value-group>
             <value-group caption="" name="USART_CLK_POLARITY_BITF">
-                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)"
-                       name="VAL_0" value="0"/>
-                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)"
-                       name="VAL_1" value="1"/>
+                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)" name="VAL_0" value="0"/>
+                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)" name="VAL_1" value="1"/>
             </value-group>
         </module>
         <module caption="Two Wire Serial Interface" name="TWI">
@@ -824,40 +728,26 @@
                 <value caption="SLA+W has been transmitted; ACK has been received." name="VAL_0x18" value="0x18"/>
                 <value caption="SLA+W has been transmitted; NOT ACK has been received." name="VAL_0x20" value="0x20"/>
                 <value caption="Data byte has been transmitted; ACK has been received." name="VAL_0x28" value="0x28"/>
-                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30"
-                       value="0x30"/>
-                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)."
-                       name="VAL_0x38" value="0x38"/>
+                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30" value="0x30"/>
+                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)." name="VAL_0x38" value="0x38"/>
                 <value caption="SLA+R has been transmitted; ACK has been received." name="VAL_0x40" value="0x40"/>
                 <value caption="SLA+R has been transmitted; NOT ACK has been received." name="VAL_0x48" value="0x48"/>
                 <value caption="Data byte has been received; ACK has been returned." name="VAL_0x50" value="0x50"/>
                 <value caption="Data byte has been received; NOT ACK has been returned." name="VAL_0x58" value="0x58"/>
                 <value caption="Own SLA+W has been received; ACK has been returned." name="VAL_0x60" value="0x60"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned."
-                       name="VAL_0x68" value="0x68"/>
-                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70"
-                       value="0x70"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned."
-                       name="VAL_0x78" value="0x78"/>
-                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned."
-                       name="VAL_0x80" value="0x80"/>
-                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned."
-                       name="VAL_0x88" value="0x88"/>
-                <value caption="Previously addressed with general call; data has been received; ACK has been returned."
-                       name="VAL_0x90" value="0x90"/>
-                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned."
-                       name="VAL_0x98" value="0x98"/>
-                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave."
-                       name="VAL_0xA0" value="0xA0"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned." name="VAL_0x68" value="0x68"/>
+                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70" value="0x70"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned." name="VAL_0x78" value="0x78"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned." name="VAL_0x80" value="0x80"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned." name="VAL_0x88" value="0x88"/>
+                <value caption="Previously addressed with general call; data has been received; ACK has been returned." name="VAL_0x90" value="0x90"/>
+                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned." name="VAL_0x98" value="0x98"/>
+                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave." name="VAL_0xA0" value="0xA0"/>
                 <value caption="Own SLA+R has been received; ACK has been returned." name="VAL_0xA8" value="0xA8"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned."
-                       name="VAL_0xB0" value="0xB0"/>
-                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8"
-                       value="0xB8"/>
-                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0"
-                       value="0xC0"/>
-                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received."
-                       name="VAL_0xC8" value="0xC8"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned." name="VAL_0xB0" value="0xB0"/>
+                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8" value="0xB8"/>
+                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0" value="0xC0"/>
+                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received." name="VAL_0xC8" value="0xC8"/>
                 <value caption="No relevant state information available; TWINT = 0." name="VAL_0xF8" value="0xF8"/>
             </value-group>
             <value-group caption="" name="COMM_TWI_PRESACLE">
@@ -876,8 +766,7 @@
                     <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
                     <bitfield caption="Clock polarity" mask="0x08" name="CPOL" values="SPI_CPOL_BITF"/>
                     <bitfield caption="Clock Phase" mask="0x04" name="CPHA" values="SPI_CPHA_BITF"/>
-                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR"
-                              values="COMM_SCK_RATE_SPI2X"/>
+                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR" values="COMM_SCK_RATE_SPI2X"/>
                 </register>
                 <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
                     <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
@@ -887,8 +776,7 @@
                 <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
             </register-group>
             <register-group caption="Serial Peripheral Interface" name="USART0_SPI">
-                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
-                          ocd-rw="R">
+                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
@@ -907,8 +795,7 @@
                 </register>
             </register-group>
             <register-group caption="Serial Peripheral Interface" name="USART1_SPI">
-                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
-                          ocd-rw="R">
+                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
@@ -980,10 +867,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Register" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -999,14 +884,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0" values="TC0_WGM_BITF"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare B Match Flag" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare A Match Flag" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1054,14 +936,11 @@
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
                     <bitfield caption="Output Compare Flag 2 B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2 A" mask="0x02" name="OCF2A"/>
@@ -1079,19 +958,15 @@
                     <bitfield caption="Clock Select" mask="0x07" name="CS2" values="TC2_CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input for AMR" mask="0x80" name="EXCLKAMR"/>
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Timer/Counter2 Asynchronous Mode" mask="0x20" name="AS2"/>
                     <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08"
-                              name="OCR2AUB"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04"
-                              name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04" name="OCR2BUB"/>
                     <bitfield caption="Timer/Counter2 Control Register A Update Busy" mask="0x02" name="TCR2AUB"/>
                     <bitfield caption="Timer/Counter2 Control Register B Update Busy" mask="0x01" name="TCR2BUB"/>
                 </register>
@@ -1138,8 +1013,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1160,20 +1034,16 @@
         <module caption="Timer/Counter, 16-bit" name="TC16">
             <register-group caption="Timer/Counter, 16-bit" name="TC5">
                 <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C"
-                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C" values="TC4_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
                     <bitfield caption="Input Capture 5 Noise Canceller" mask="0x80" name="ICNC5"/>
                     <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS5" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter5 Control Register C" name="TCCR5C" offset="0x122" size="1">
@@ -1182,26 +1052,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
                 </register>
                 <register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
                     <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
-                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE5C"/>
-                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE5B"/>
-                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE5A"/>
                     <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
                 </register>
-                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1" ocd-rw="">
                     <bitfield caption="Timer/Counter5 Input Capture Flag" mask="0x20" name="ICF5"/>
                     <bitfield caption="Timer/Counter5 Output Compare C Match Flag" mask="0x08" name="OCF5C"/>
                     <bitfield caption="Timer/Counter5 Output Compare B Match Flag" mask="0x04" name="OCF5B"/>
@@ -1211,20 +1073,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC4">
                 <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C"
-                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C" values="TC4_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
                     <bitfield caption="Input Capture 4 Noise Canceller" mask="0x80" name="ICNC4"/>
                     <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS4" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
@@ -1233,26 +1091,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
                 </register>
                 <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
                     <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
-                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE4C"/>
-                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE4B"/>
-                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE4A"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1" ocd-rw="">
                     <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
                     <bitfield caption="Timer/Counter4 Output Compare C Match Flag" mask="0x08" name="OCF4C"/>
                     <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
@@ -1262,20 +1112,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC3">
                 <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C"
-                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C" values="TC1_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
                     <bitfield caption="Input Capture 3 Noise Canceller" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
@@ -1284,26 +1130,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
                     <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
@@ -1313,20 +1151,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C"
-                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C" values="TC1_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
                     <bitfield caption="Input Capture 1 Noise Canceller" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
@@ -1335,26 +1169,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare C Match Flag" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
@@ -1399,10 +1225,8 @@
             <value-group caption="" name="TC1_COMNX_BITF">
                 <value caption="Normal port operation, OCnA/OCnB/OCnC disconnected." name="VAL_0" value="0"/>
                 <value caption="Toggle OCnA/OCnB/OCnC on Compare Match." name="VAL_1" value="1"/>
-                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2"
-                       value="2"/>
-                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3"
-                       value="3"/>
+                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2" value="2"/>
+                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3" value="3"/>
             </value-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT_MEGARF">
                 <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
@@ -1423,106 +1247,75 @@
                     <bitfield caption="Power Amplifier Ramp Down Frequency Inversion" mask="0x02" name="PARDFI"/>
                     <bitfield caption="Power Amplifier Ramp Up Frequency Inversion" mask="0x01" name="PARUFI"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L"
-                          offset="0x10E" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L" offset="0x10E" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 0" mask="0xFF" name="MAFSA0L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H"
-                          offset="0x10F" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H" offset="0x10F" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 0" mask="0xFF" name="MAFSA0H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)"
-                          name="MAFPA0L" offset="0x110" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF"
-                              name="MAFPA0L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)" name="MAFPA0L" offset="0x110" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF" name="MAFPA0L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)"
-                          name="MAFPA0H" offset="0x111" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF"
-                              name="MAFPA0H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)" name="MAFPA0H" offset="0x111" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF" name="MAFPA0H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L"
-                          offset="0x112" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L" offset="0x112" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 1" mask="0xFF" name="MAFSA1L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H"
-                          offset="0x113" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H" offset="0x113" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 1" mask="0xFF" name="MAFSA1H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)"
-                          name="MAFPA1L" offset="0x114" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF"
-                              name="MAFPA1L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)" name="MAFPA1L" offset="0x114" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF" name="MAFPA1L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)"
-                          name="MAFPA1H" offset="0x115" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF"
-                              name="MAFPA1H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)" name="MAFPA1H" offset="0x115" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF" name="MAFPA1H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L"
-                          offset="0x116" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L" offset="0x116" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 2" mask="0xFF" name="MAFSA2L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H"
-                          offset="0x117" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H" offset="0x117" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 2" mask="0xFF" name="MAFSA2H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)"
-                          name="MAFPA2L" offset="0x118" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF"
-                              name="MAFPA2L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)" name="MAFPA2L" offset="0x118" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF" name="MAFPA2L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)"
-                          name="MAFPA2H" offset="0x119" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF"
-                              name="MAFPA2H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)" name="MAFPA2H" offset="0x119" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF" name="MAFPA2H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L"
-                          offset="0x11A" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L" offset="0x11A" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 3" mask="0xFF" name="MAFSA3L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H"
-                          offset="0x11B" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H" offset="0x11B" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 3" mask="0xFF" name="MAFSA3H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)"
-                          name="MAFPA3L" offset="0x11C" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF"
-                              name="MAFPA3L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)" name="MAFPA3L" offset="0x11C" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF" name="MAFPA3L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)"
-                          name="MAFPA3H" offset="0x11D" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF"
-                              name="MAFPA3H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)" name="MAFPA3H" offset="0x11D" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF" name="MAFPA3H"/>
                 </register>
-                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C"
-                          size="1">
+                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C" size="1">
                     <bitfield caption="Reserved Bit" mask="0xF0" name="Res"/>
                     <bitfield caption="Multiple Address Filter 3 Enable" mask="0x08" name="MAF3EN"/>
                     <bitfield caption="Multiple Address Filter 2 Enable" mask="0x04" name="MAF2EN"/>
                     <bitfield caption="Multiple Address Filter 1 Enable" mask="0x02" name="MAF1EN"/>
                     <bitfield caption="Multiple Address Filter 0 Enable" mask="0x01" name="MAF0EN"/>
                 </register>
-                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D"
-                          size="1">
+                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D" size="1">
                     <bitfield caption="Set Data Pending bit for address filter 3." mask="0x80" name="AACK_3_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40"
-                              name="AACK_3_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40" name="AACK_3_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 2." mask="0x20" name="AACK_2_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10"
-                              name="AACK_2_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10" name="AACK_2_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 1." mask="0x08" name="AACK_1_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04"
-                              name="AACK_1_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04" name="AACK_1_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 0." mask="0x02" name="AACK_0_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01"
-                              name="AACK_0_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01" name="AACK_0_I_AM_COORD"/>
                 </register>
                 <register caption="AES Control Register" name="AES_CTRL" offset="0x13C" size="1">
                     <bitfield caption="Request AES Operation." mask="0x80" name="AES_REQUEST"/>
                     <bitfield caption="Set AES Operation Mode" mask="0x20" name="AES_MODE" values="AES_MODE_BITF"/>
-                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR"
-                              values="AES_DIRECTION_BITF"/>
+                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR" values="AES_DIRECTION_BITF"/>
                     <bitfield caption="AES Interrupt Enable" mask="0x04" name="AES_IM"/>
                 </register>
                 <register caption="AES Status Register" name="AES_STATUS" offset="0x13D" size="1" ocd-rw="R">
@@ -1532,8 +1325,7 @@
                 <register caption="AES Plain and Cipher Text Buffer Register" name="AES_STATE" offset="0x13E" size="1">
                     <bitfield caption="AES Plain and Cipher Text Buffer" mask="0xFF" name="AES_STATE"/>
                 </register>
-                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F"
-                          size="1">
+                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F" size="1">
                     <bitfield caption="AES Encryption/Decryption Key Buffer" mask="0xFF" name="AES_KEY"/>
                 </register>
                 <register caption="Transceiver Status Register" name="TRX_STATUS" offset="0x141" size="1" ocd-rw="R">
@@ -1558,24 +1350,18 @@
                     <bitfield caption="Enable Automatic CRC Calculation" mask="0x20" name="TX_AUTO_CRC_ON"/>
                     <bitfield caption="Enable PLL TX filter" mask="0x10" name="PLL_TX_FLT"/>
                 </register>
-                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145"
-                          size="1">
+                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145" size="1">
                     <bitfield caption="Transmit Power Setting" mask="0x0F" name="TX_PWR" values="TX_PWR_bitf"/>
                 </register>
-                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1"
-                          ocd-rw="R">
-                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID"
-                              values="RX_CRC_VALID_bitf"/>
+                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1" ocd-rw="R">
+                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID" values="RX_CRC_VALID_bitf"/>
                     <bitfield caption="Random Value" mask="0x60" name="RND_VALUE"/>
-                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI"
-                              values="RSSI_VALUE_BITF"/>
+                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI" values="RSSI_VALUE_BITF"/>
                 </register>
-                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147"
-                          size="1" ocd-rw="R">
+                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147" size="1" ocd-rw="R">
                     <bitfield caption="Energy Detection Level" mask="0xFF" name="ED_LEVEL" values="ED_LEVEL_BITF"/>
                 </register>
-                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA"
-                          offset="0x148" size="1">
+                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA" offset="0x148" size="1">
                     <bitfield caption="Manual CCA Measurement Request" mask="0x80" name="CCA_REQUEST"/>
                     <bitfield caption="Select CCA Measurement Mode" mask="0x60" name="CCA_MODE" values="CCA_MODE_bitf"/>
                     <bitfield caption="RX/TX Channel Selection" mask="0x1F" name="CHANNEL" values="CHANNEL_bitf"/>
@@ -1585,27 +1371,20 @@
                     <bitfield caption="ED Threshold Level for CCA Measurement" mask="0x0F" name="CCA_ED_THRES"/>
                 </register>
                 <register caption="Transceiver Receive Control Register" name="RX_CTRL" offset="0x14A" size="1">
-                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES"
-                              values="PDT_THRES_bitf"/>
+                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES" values="PDT_THRES_bitf"/>
                 </register>
                 <register caption="Start of Frame Delimiter Value Register" name="SFD_VALUE" offset="0x14B" size="1">
-                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE"
-                              values="SFD_VALUE_BITF"/>
+                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE" values="SFD_VALUE_BITF"/>
                 </register>
                 <register caption="Transceiver Control Register 2" name="TRX_CTRL_2" offset="0x14C" size="1">
                     <bitfield caption="RX Safe Mode" mask="0x80" name="RX_SAFE_MODE"/>
-                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE"
-                              values="OQPSK_DATA_RATE_bitf"/>
+                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE" values="OQPSK_DATA_RATE_bitf"/>
                 </register>
                 <register caption="Antenna Diversity Control Register" name="ANT_DIV" offset="0x14D" size="1">
-                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL"
-                              values="ANT_SEL_bitf"/>
-                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN"
-                              values="ANT_DIV_EN_bitf"/>
-                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN"
-                              values="ANT_EXT_SW_EN_bitf"/>
-                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL"
-                              values="ANT_CTRL_bitf"/>
+                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL" values="ANT_SEL_bitf"/>
+                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN" values="ANT_DIV_EN_bitf"/>
+                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN" values="ANT_EXT_SW_EN_bitf"/>
+                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL" values="ANT_CTRL_bitf"/>
                 </register>
                 <register caption="Transceiver Interrupt Enable Register" name="IRQ_MASK" offset="0x14E" size="1">
                     <bitfield caption="Awake Interrupt Enable" mask="0x80" name="AWAKE_EN"/>
@@ -1629,14 +1408,10 @@
                 </register>
                 <register caption="Transceiver Interrupt Enable Register 1" name="IRQ_MASK1" offset="0xBE" size="1">
                     <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10"
-                              name="MAF_3_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08"
-                              name="MAF_2_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04"
-                              name="MAF_1_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02"
-                              name="MAF_0_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10" name="MAF_3_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08" name="MAF_2_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04" name="MAF_1_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02" name="MAF_0_AMI_EN"/>
                     <bitfield caption="Transmit Start Interrupt enable" mask="0x01" name="TX_START_EN"/>
                 </register>
                 <register caption="Transceiver Interrupt Status Register 1" name="IRQ_STATUS1" offset="0xBF" size="1">
@@ -1647,29 +1422,22 @@
                     <bitfield caption="Address Match Interrupt Status Address filter 0" mask="0x02" name="MAF_0_AMI"/>
                     <bitfield caption="Transmit Start Interrupt Status" mask="0x01" name="TX_START"/>
                 </register>
-                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150"
-                          size="1">
-                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT"
-                              values="AVREG_EXT_BITF"/>
+                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150" size="1">
+                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT" values="AVREG_EXT_BITF"/>
                     <bitfield caption="AVDD Supply Voltage Valid" mask="0x40" name="AVDD_OK" values="AVDD_OK_BITF"/>
-                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT"
-                              values="DVREG_EXT_BITF"/>
+                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT" values="DVREG_EXT_BITF"/>
                     <bitfield caption="DVDD Supply Voltage Valid" mask="0x04" name="DVDD_OK" values="DVDD_OK_BITF"/>
                 </register>
                 <register caption="Battery Monitor Control and Status Register" name="BATMON" offset="0x151" size="1">
                     <bitfield caption="Battery Monitor Interrupt Status" mask="0x80" name="BAT_LOW"/>
                     <bitfield caption="Battery Monitor Interrupt Enable" mask="0x40" name="BAT_LOW_EN"/>
                     <bitfield caption="Battery Monitor Status" mask="0x20" name="BATMON_OK" values="BATMON_OK_bitf"/>
-                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR"
-                              values="BATMON_HR_bitf"/>
-                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH"
-                              values="BATMON_VTH_bitf"/>
+                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR" values="BATMON_HR_bitf"/>
+                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH" values="BATMON_VTH_bitf"/>
                 </register>
                 <register caption="Crystal Oscillator Control Register" name="XOSC_CTRL" offset="0x152" size="1">
-                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE"
-                              values="XTAL_MODE_BITF"/>
-                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM"
-                              values="XTAL_TRIM_bitf"/>
+                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE" values="XTAL_MODE_BITF"/>
+                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM" values="XTAL_TRIM_bitf"/>
                 </register>
                 <register caption="Channel Control Register 0" name="CC_CTRL_0" offset="0x153" size="1">
                     <bitfield caption="Channel Number" mask="0xFF" name="CC_NUMBER"/>
@@ -1677,54 +1445,42 @@
                 <register caption="Channel Control Register 1" name="CC_CTRL_1" offset="0x154" size="1">
                     <bitfield caption="Channel Band" mask="0x0F" name="CC_BAND"/>
                 </register>
-                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155"
-                          size="1">
+                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155" size="1">
                     <bitfield caption="Prevent Frame Reception" mask="0x80" name="RX_PDT_DIS"/>
                     <bitfield caption="Receiver Override Function" mask="0x40" name="RX_OVERRIDE"/>
-                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL"
-                              values="RX_PDT_LEVEL_BITF"/>
+                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL" values="RX_PDT_LEVEL_BITF"/>
                 </register>
-                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156"
-                          size="1">
-                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL"
-                              values="RX_RPC_CTRL_BITF"/>
+                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156" size="1">
+                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL" values="RX_RPC_CTRL_BITF"/>
                     <bitfield caption="Reciver Smart Receiving Mode Enable" mask="0x20" name="RX_RPC_EN"/>
                     <bitfield caption="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10" name="PDT_RPC_EN"/>
                     <bitfield caption="PLL Smart Receiving Mode Enable" mask="0x08" name="PLL_RPC_EN"/>
                     <bitfield caption="Reserved" mask="0x04" name="Res0"/>
                     <bitfield caption="Smart Receiving Mode IPAN Handling Enable" mask="0x02" name="IPAN_RPC_EN"/>
-                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01"
-                              name="XAH_RPC_EN"/>
+                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01" name="XAH_RPC_EN"/>
                 </register>
-                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157"
-                          size="1">
+                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157" size="1">
                     <bitfield caption="Filter Reserved Frames" mask="0x20" name="AACK_FLTR_RES_FT"/>
                     <bitfield caption="Process Reserved Frames" mask="0x10" name="AACK_UPLD_RES_FT"/>
-                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME"
-                              values="AACK_ACK_TIME_bitf"/>
+                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME" values="AACK_ACK_TIME_bitf"/>
                     <bitfield caption="Enable Promiscuous Mode" mask="0x02" name="AACK_PROM_MODE"/>
                 </register>
                 <register caption="Transceiver Filter Tuning Control Register" name="FTN_CTRL" offset="0x158" size="1">
                     <bitfield caption="Start Calibration Loop of Filter Tuning Network" mask="0x80" name="FTN_START"/>
                 </register>
-                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF"
-                          offset="0x15A" size="1">
+                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF" offset="0x15A" size="1">
                     <bitfield caption="Start Center Frequency Calibration" mask="0x80" name="PLL_CF_START"/>
                 </register>
-                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B"
-                          size="1">
+                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B" size="1">
                     <bitfield caption="Start Delay Cell Calibration" mask="0x80" name="PLL_DCU_START"/>
                 </register>
-                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1"
-                          ocd-rw="R">
+                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1" ocd-rw="R">
                     <bitfield caption="Part Number" mask="0xFF" name="PART_NUM" values="PART_NUM_bitf"/>
                 </register>
-                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D"
-                          size="1" ocd-rw="R">
+                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D" size="1" ocd-rw="R">
                     <bitfield caption="Version Number" mask="0xFF" name="VERSION_NUM" values="VERSION_NUM_2_BITF"/>
                 </register>
-                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0"
-                          offset="0x15E" size="1" ocd-rw="R">
+                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0" offset="0x15E" size="1" ocd-rw="R">
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x80" name="MAN_ID_07"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x40" name="MAN_ID_06"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x20" name="MAN_ID_05"/>
@@ -1734,13 +1490,10 @@
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x02" name="MAN_ID_01"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x01" name="MAN_ID_00" values="MAN_ID_0_BITF"/>
                 </register>
-                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1"
-                          offset="0x15F" size="1" ocd-rw="R">
-                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF"
-                              lsb="10"/>
+                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1" offset="0x15F" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF" lsb="10"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160"
-                          size="1">
+                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160" size="1">
                     <bitfield caption="MAC Short Address" mask="0x80" name="SHORT_ADDR_07"/>
                     <bitfield caption="MAC Short Address" mask="0x40" name="SHORT_ADDR_06"/>
                     <bitfield caption="MAC Short Address" mask="0x20" name="SHORT_ADDR_05"/>
@@ -1750,12 +1503,10 @@
                     <bitfield caption="MAC Short Address" mask="0x02" name="SHORT_ADDR_01"/>
                     <bitfield caption="MAC Short Address" mask="0x01" name="SHORT_ADDR_00"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1"
-                          offset="0x161" size="1">
+                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1" offset="0x161" size="1">
                     <bitfield caption="MAC Short Address" mask="0xFF" name="SHORT_ADDR_" lsb="10"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0"
-                          offset="0x162" size="1">
+                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0" offset="0x162" size="1">
                     <bitfield caption="MAC Personal Area Network ID" mask="0x80" name="PAN_ID_07"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x40" name="PAN_ID_06"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x20" name="PAN_ID_05"/>
@@ -1765,8 +1516,7 @@
                     <bitfield caption="MAC Personal Area Network ID" mask="0x02" name="PAN_ID_01"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x01" name="PAN_ID_00"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1"
-                          offset="0x163" size="1">
+                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1" offset="0x163" size="1">
                     <bitfield caption="MAC Personal Area Network ID" mask="0xFF" name="PAN_ID_" lsb="10"/>
                 </register>
                 <register caption="Transceiver MAC IEEE Address Register 0" name="IEEE_ADDR_0" offset="0x164" size="1">
@@ -1800,17 +1550,12 @@
                 <register caption="Transceiver MAC IEEE Address Register 7" name="IEEE_ADDR_7" offset="0x16B" size="1">
                     <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="70"/>
                 </register>
-                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0"
-                          offset="0x16C" size="1">
-                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0"
-                              name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
-                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E"
-                              name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
-                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION"
-                              values="SLOTTED_OPERATION_BITF"/>
+                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0" offset="0x16C" size="1">
+                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0" name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
+                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E" name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
+                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION" values="SLOTTED_OPERATION_BITF"/>
                 </register>
-                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0"
-                          offset="0x16D" size="1">
+                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0" offset="0x16D" size="1">
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x80" name="CSMA_SEED_07"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x40" name="CSMA_SEED_06"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x20" name="CSMA_SEED_05"/>
@@ -1820,27 +1565,21 @@
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x02" name="CSMA_SEED_01"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x01" name="CSMA_SEED_00"/>
                 </register>
-                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1"
-                          offset="0x16E" size="1">
-                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE"
-                              values="AACK_FVN_MODE_bitf"/>
+                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1" offset="0x16E" size="1">
+                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE" values="AACK_FVN_MODE_bitf"/>
                     <bitfield caption="Set Frame Pending Sub-field" mask="0x20" name="AACK_SET_PD"/>
                     <bitfield caption="Disable Acknowledgment Frame Transmission" mask="0x10" name="AACK_DIS_ACK"/>
                     <bitfield caption="Set Personal Area Network Coordinator" mask="0x08" name="AACK_I_AM_COORD"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x07" name="CSMA_SEED_1"/>
                 </register>
-                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F"
-                          size="1">
+                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F" size="1">
                     <bitfield caption="Maximum Back-off Exponent" mask="0xF0" name="MAX_BE" values="MAX_BE_bitf"/>
                     <bitfield caption="Minimum Back-off Exponent" mask="0x0F" name="MIN_BE" values="MIN_BE_bitf"/>
                 </register>
-                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176"
-                          size="1">
-                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG"
-                              values="TST_CTRL_DIG_BITF"/>
+                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176" size="1">
+                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG" values="TST_CTRL_DIG_BITF"/>
                 </register>
-                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B"
-                          size="1">
+                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B" size="1">
                     <bitfield caption="Received Frame Length" mask="0xFF" name="RX_LENGTH"/>
                 </register>
                 <register caption="Start of frame buffer" name="TRXFBST" offset="0x180" size="1" mask="0xFF"/>
@@ -1979,10 +1718,8 @@
                 <value caption="2480 MHz" name="F_2480MHZ" value="26"/>
             </value-group>
             <value-group caption="" name="PDT_THRES_bitf">
-                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled"
-                       name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
-                <value caption="Recommended correlator threshold for Antenna Diversity operation"
-                       name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
+                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled" name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
+                <value caption="Recommended correlator threshold for Antenna Diversity operation" name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
             </value-group>
             <value-group caption="" name="SFD_VALUE_BITF">
                 <value caption="IEEE 802.15.4 compliant value of the SFD" name="IEEE_SFD" value="0xA7"/>
@@ -2009,28 +1746,22 @@
                 <value caption="Reserved" name="VAL_0" value="0"/>
                 <value caption="Antenna 1: DIG1=H, DIG2=L" name="ANT_1" value="1"/>
                 <value caption="Antenna 0: DIG1=L, DIG2=H" name="ANT_0" value="2"/>
-                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity"
-                       name="ANT_RESET" value="3"/>
+                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity" name="ANT_RESET" value="3"/>
             </value-group>
             <value-group caption="" name="AVREG_EXT_BITF">
-                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT"
-                       value="0"/>
-                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section."
-                       name="AVDD_EXT" value="1"/>
+                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT" value="0"/>
+                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section." name="AVDD_EXT" value="1"/>
             </value-group>
             <value-group caption="" name="AVDD_OK_BITF">
                 <value caption="Analog voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
                 <value caption="Analog supply voltage has settled" name="VAL_1" value="1"/>
             </value-group>
             <value-group caption="" name="DVREG_EXT_BITF">
-                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT"
-                       value="0"/>
-                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section."
-                       name="DVDD_EXT" value="1"/>
+                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT" value="0"/>
+                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section." name="DVDD_EXT" value="1"/>
             </value-group>
             <value-group caption="" name="DVDD_OK_BITF">
-                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0"
-                       value="0"/>
+                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
                 <value caption="Digital supply voltage has settled" name="VAL_1" value="1"/>
             </value-group>
             <value-group caption="" name="BATMON_OK_bitf">
@@ -2060,10 +1791,8 @@
                 <value caption="3.675V / 2.45V (BATMON_HR=1/0)" name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="XTAL_MODE_BITF">
-                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4"
-                       value="0x4"/>
-                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled."
-                       name="VAL_0xF" value="0xF"/>
+                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4" value="0x4"/>
+                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled." name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="XTAL_TRIM_bitf">
                 <value caption="0.0 pF, trimming capacitors disconnected" name="XTAL_TRIM_MIN" value="0x0"/>
@@ -2072,21 +1801,17 @@
                 <value caption="4.5 pF, trimming capacitor switched on" name="XTAL_TRIM_MAX" value="0xF"/>
             </value-group>
             <value-group caption="" name="RX_PDT_LEVEL_BITF">
-                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered"
-                       name="RX_PDT_LEVEL_MIN" value="0x0"/>
+                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered" name="RX_PDT_LEVEL_MIN" value="0x0"/>
                 <value caption="RX_THRES &gt; RSSI_BASE_VAL + 0 · 3; RSSI &gt; -90 dBm" name="VAL_0x1" value="0x1"/>
                 <value caption="..." name="VAL_0x2" value="0x2"/>
                 <value caption="RX_THRES &gt; RSSI_BASE_VAL + 13 · 3; RSSI &gt; -51 dBm" name="VAL_0xE" value="0xE"/>
-                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX"
-                       value="0xF"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX" value="0xF"/>
             </value-group>
             <value-group caption="" name="RX_RPC_CTRL_BITF">
-                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0"
-                       value="0"/>
+                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0" value="0"/>
                 <value caption="Reserved" name="VAL_1" value="1"/>
                 <value caption="Reserved" name="VAL_2" value="2"/>
-                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3"
-                       value="3"/>
+                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3" value="3"/>
             </value-group>
             <value-group caption="" name="AACK_ACK_TIME_bitf">
                 <value caption="12 symbols acknowledgment time" name="AACK_ACK_TIME_12_SYM" value="0"/>
@@ -2102,12 +1827,10 @@
                 <value caption="Revision B" name="REV_B" value="1"/>
             </value-group>
             <value-group caption="" name="MAN_ID_0_BITF">
-                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F"
-                       name="ATMEL_BYTE_0" value="0x1f"/>
+                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F" name="ATMEL_BYTE_0" value="0x1f"/>
             </value-group>
             <value-group caption="" name="MAN_ID_1_BITF">
-                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F"
-                       name="ATMEL_BYTE_1" value="0x00"/>
+                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F" name="ATMEL_BYTE_1" value="0x00"/>
             </value-group>
             <value-group caption="" name="MAX_FRAME_RETRIES_bitf">
                 <value caption="Retransmission of frame is not attempted." name="VAL_0x0" value="0x0"/>
@@ -2124,10 +1847,8 @@
                 <value caption="Immediate frame re-transmission without performing CSMA-CA" name="VAL_0x7" value="0x7"/>
             </value-group>
             <value-group caption="" name="SLOTTED_OPERATION_BITF">
-                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested."
-                       name="SLOTTED_OP_DIS" value="0"/>
-                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller."
-                       name="SLOTTED_OP_EN" value="1"/>
+                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested." name="SLOTTED_OP_DIS" value="0"/>
+                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller." name="SLOTTED_OP_EN" value="1"/>
             </value-group>
             <value-group caption="" name="AACK_FVN_MODE_bitf">
                 <value caption="Acknowledge frames with version number 0" name="VAL_0" value="0"/>
@@ -2138,17 +1859,14 @@
             <value-group caption="" name="MAX_BE_bitf">
                 <value caption="This value is not valid for the maximum back-off exponent." name="VAL_1" value="1"/>
                 <value caption="This value is not valid for the maximum back-off exponent." name="VAL_2" value="2"/>
-                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3"
-                       value="3"/>
+                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3" value="3"/>
                 <value caption="..." name="VAL_4" value="4"/>
-                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8"
-                       value="8"/>
+                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8" value="8"/>
             </value-group>
             <value-group caption="" name="MIN_BE_bitf">
                 <value caption="Minimum value of minimum back-off exponent." name="VAL_0" value="0"/>
                 <value caption="..." name="VAL_1" value="1"/>
-                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE."
-                       name="VAL_8" value="8"/>
+                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE." name="VAL_8" value="8"/>
             </value-group>
             <value-group caption="" name="TST_CTRL_DIG_BITF">
                 <value caption="NORMAL (no test is active)" name="VAL_0" value="0"/>
@@ -2157,104 +1875,76 @@
         </module>
         <module caption="MAC Symbol Counter" name="SYMCNT">
             <register-group caption="MAC Symbol Counter" name="SYMCNT">
-                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH"
-                          offset="0xFC" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF"
-                              name="SCTSTRHH"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH" offset="0xFC" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSTRHH"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL"
-                          offset="0xFB" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF"
-                              name="SCTSTRHL"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL" offset="0xFB" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSTRHL"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH"
-                          offset="0xFA" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF"
-                              name="SCTSTRLH"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH" offset="0xFA" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSTRLH"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL"
-                          offset="0xF9" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF"
-                              name="SCTSTRLL"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL" offset="0xF9" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSTRLL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 HH-Byte" mask="0xFF" name="SCOCR1HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 HL-Byte" mask="0xFF" name="SCOCR1HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 LH-Byte" mask="0xFF" name="SCOCR1LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 LL-Byte" mask="0xFF" name="SCOCR1LL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 HH-Byte" mask="0xFF" name="SCOCR2HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 HL-Byte" mask="0xFF" name="SCOCR2HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 LH-Byte" mask="0xFF" name="SCOCR2LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 LL-Byte" mask="0xFF" name="SCOCR2LL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 HH-Byte" mask="0xFF" name="SCOCR3HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 HL-Byte" mask="0xFF" name="SCOCR3HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 LH-Byte" mask="0xFF" name="SCOCR3LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 LL-Byte" mask="0xFF" name="SCOCR3LL"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSRHH"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSRHL"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSRLH"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSRLL"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register HH-Byte" mask="0xFF" name="SCBTSRHH"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register HL-Byte" mask="0xFF" name="SCBTSRHL"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register LH-Byte" mask="0xFF" name="SCBTSRLH"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register LL-Byte" mask="0xFF" name="SCBTSRLL"/>
                 </register>
                 <register caption="Symbol Counter Register HH-Byte" name="SCCNTHH" offset="0xE4" size="1">
@@ -2288,8 +1978,7 @@
                 <register caption="Symbol Counter Control Register 1" name="SCCR1" offset="0xDD" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res" lsb="5"/>
                     <bitfield caption="Symbol Counter Beacon Timestamp Mask Register" mask="0x20" name="SCBTSM"/>
-                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"
-                              name="SCCKDIV" values="SCCKDIV_BITF"/>
+                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C" name="SCCKDIV" values="SCCKDIV_BITF"/>
                     <bitfield caption="Enable External Clock Source on PG2" mask="0x02" name="SCEECLK"/>
                     <bitfield caption="Backoff Slot Counter enable" mask="0x01" name="SCENBO"/>
                 </register>
@@ -2303,32 +1992,21 @@
                 </register>
                 <register caption="Symbol Counter Compare Source Register" name="SCCSR" offset="0xDB" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"
-                              name="SCCS3" values="SCCS3_BITF"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C"
-                              name="SCCS2" values="SCCS2_BITF"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03"
-                              name="SCCS1" values="SCCS1_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30" name="SCCS3" values="SCCS3_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C" name="SCCS2" values="SCCS2_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03" name="SCCS1" values="SCCS1_BITF"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH"
-                          offset="0xDA" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"
-                              name="SCRSTRHH"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH" offset="0xDA" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF" name="SCRSTRHH"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL"
-                          offset="0xD9" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF"
-                              name="SCRSTRHL"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL" offset="0xD9" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF" name="SCRSTRHL"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH"
-                          offset="0xD8" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF"
-                              name="SCRSTRLH"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH" offset="0xD8" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF" name="SCRSTRLH"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL"
-                          offset="0xD7" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF"
-                              name="SCRSTRLL"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL" offset="0xD7" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF" name="SCRSTRLL"/>
                 </register>
             </register-group>
             <value-group caption="" name="SCCKDIV_BITF">
@@ -2341,28 +2019,19 @@
                 <value caption="Transceiver Clock divided by 4,   (4MHz)" name="VAL_6" value="6"/>
             </value-group>
             <value-group caption="" name="SCCS3_BITF">
-                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
             <value-group caption="" name="SCCS2_BITF">
-                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
             <value-group caption="" name="SCCS1_BITF">
-                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
         </module>
         <module caption="EEPROM" name="EEPROM">
@@ -2397,39 +2066,28 @@
                 </register>
             </register-group>
             <value-group caption="" name="OCDR_DATA_BITF">
-                <value caption="Refer to the debugger documentation for further information on how to use this register."
-                       name="VAL_0" value="0"/>
+                <value caption="Refer to the debugger documentation for further information on how to use this register." name="VAL_0" value="0"/>
             </value-group>
         </module>
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL3"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL3"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
-                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT"
-                              values="INTERRUPT_REQ_ENABLE_BITF"/>
+                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT" values="INTERRUPT_REQ_ENABLE_BITF"/>
                 </register>
                 <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
-                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF"
-                              values="INTERRUPT_EXT_FLAG_BITF"/>
+                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF" values="INTERRUPT_EXT_FLAG_BITF"/>
                 </register>
                 <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
                     <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="16"/>
@@ -2451,12 +2109,9 @@
             </register-group>
             <value-group caption="" name="INTERRUPT_SENSE_CONTROL3">
                 <value caption="The low level of INTn generates an interrupt request." name="VAL_0x00" value="0x00"/>
-                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01"
-                       value="0x01"/>
-                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01" value="0x01"/>
+                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02" value="0x02"/>
+                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="INTERRUPT_REQ_ENABLE_BITF">
                 <value caption="All external pin interrupts are disabled." name="VAL_0x00" value="0x00"/>
@@ -2464,11 +2119,9 @@
             </value-group>
             <value-group caption="" name="INTERRUPT_EXT_FLAG_BITF">
                 <value caption="No edge or logic change on INT7:0 occurred." name="VAL_0x00" value="0x00"/>
-                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request."
-                       name="VAL_0x01" value="0x01"/>
+                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request." name="VAL_0x01" value="0x01"/>
                 <value caption="..." name="VAL_0x02" value="0x02"/>
-                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request."
-                       name="VAL_0x80" value="0x80"/>
+                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request." name="VAL_0x80" value="0x80"/>
             </value-group>
         </module>
         <module caption="Analog-to-Digital Converter" name="ADC">
@@ -2485,8 +2138,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="AVDD Supply Voltage OK" mask="0x80" name="AVDDOK"/>
@@ -2494,12 +2146,10 @@
                     <bitfield caption="Reference Voltage OK" mask="0x20" name="REFOK"/>
                     <bitfield caption="Analog Channel Change" mask="0x10" name="ACCH"/>
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="The ADC Control and Status Register C" name="ADCSRC" offset="0x77" size="1">
-                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT"
-                              values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
+                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT" values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
                     <bitfield caption="Reserved" mask="0x20" name="Res0"/>
                     <bitfield caption="ADC Start-up Time" mask="0x1F" name="ADSUT" values="ANALOG_ADC_STARTUP_TIME"/>
                 </register>
@@ -2527,10 +2177,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF9">
                 <value caption="AREF, Internal reference voltage generation turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVDD with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -2609,14 +2257,12 @@
                     <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
                 </register>
                 <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1">
-                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL"
-                              values="OSCCAL_BITF"/>
+                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL" values="OSCCAL_BITF"/>
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
                 </register>
                 <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
                     <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
@@ -2689,8 +2335,7 @@
                 <value caption="Reserved" name="VAL_0xC" value="0xC"/>
                 <value caption="Reserved" name="VAL_0xD" value="0xD"/>
                 <value caption="Reserved" name="VAL_0xE" value="0xE"/>
-                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed."
-                       name="VAL_0xF" value="0xF"/>
+                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed." name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
                 <value caption="Idle" name="IDLE" value="0x00"/>
@@ -2713,8 +2358,7 @@
             <register-group caption="FLASH Controller" name="FLASH">
                 <register caption="Flash Extended-Mode Control-Register" name="NEMCR" offset="0x75" size="1">
                     <bitfield caption="Enable Extended Address Mode for Extra Rows" mask="0x40" name="ENEAM"/>
-                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM"
-                              values="NEMCR_ADDRESS_BITF"/>
+                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM" values="NEMCR_ADDRESS_BITF"/>
                 </register>
                 <register caption="Reference Voltage Calibration Register" name="BGCR" offset="0x67" size="1">
                     <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
@@ -2766,14 +2410,11 @@
                     <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
                     <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
                 </register>
-                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130"
-                          size="1">
+                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130" size="1">
                     <bitfield caption="Low-Byte Data Register Bits" mask="0x0F" name="LLDRL" values="LLDRL_VALUE_BITF"/>
                 </register>
-                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131"
-                          size="1">
-                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH"
-                              values="LLDRH_VALUE_BITF"/>
+                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131" size="1">
+                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH" values="LLDRH_VALUE_BITF"/>
                 </register>
                 <register caption="Low Leakage Voltage Regulator Control Register" name="LLCR" offset="0x12F" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
@@ -2798,16 +2439,12 @@
                 </register>
             </register-group>
             <value-group caption="" name="LLDRL_VALUE_BITF">
-                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08"
-                       value="0x08"/>
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00" value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08" value="0x08"/>
             </value-group>
             <value-group caption="" name="LLDRH_VALUE_BITF">
-                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10"
-                       value="0x10"/>
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00" value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10" value="0x10"/>
             </value-group>
             <value-group caption="" name="PAD_IO_bitf">
                 <value caption="2 mA" name="PAD_IO_2MA" value="0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32.xml
index e23723ac..3aeee0a8 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32.xml
@@ -1,32 +1,21 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega32L-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega32L-8PU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega32L-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN44"
-                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega32-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
-                 package="TQFP44" vccmin="4.5" vccmax="5.5"/>
-        <variant ordercode="ATmega32-16PU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="4.5" vccmax="5.5"/>
-        <variant ordercode="ATmega32-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
-                 package="QFN44" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega32L-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32L-8PU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="PDIP40" package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32L-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN44" package="QFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44" package="TQFP44" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega32-16PU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="PDIP40" package="PDIP40" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega32-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44" package="QFN44" vccmin="4.5" vccmax="5.5"/>
     </variants>
     <device name="ATmega32" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,8 +32,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
@@ -54,20 +42,17 @@
         <peripherals>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="2" function="default" pad="PB2"/>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
@@ -77,8 +62,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="OC" function="default" pad="PB3"/>
                         <signal group="T" function="default" pad="PB0"/>
@@ -87,8 +71,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="TOSC" index="2" function="default" pad="PC7"/>
                         <signal group="TOSC" index="1" function="default" pad="PC6"/>
@@ -98,8 +81,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -110,8 +92,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SCK" function="default" pad="PB7"/>
                         <signal group="MISO" function="default" pad="PB6"/>
@@ -122,8 +103,7 @@
             </module>
             <module name="USART">
                 <instance name="USART" caption="USART">
-                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="XCK" function="default" pad="PB0"/>
                         <signal group="TXD" function="default" pad="PD1"/>
@@ -133,8 +113,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
@@ -143,8 +122,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="7" function="default" pad="PA7"/>
                         <signal group="ADC" index="6" function="default" pad="PA6"/>
@@ -159,8 +137,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -173,8 +150,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -187,8 +163,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -201,8 +176,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -217,8 +191,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -226,14 +199,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -242,20 +213,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TDI" function="default" pad="PC5"/>
                         <signal group="TDO" function="default" pad="PC4"/>
@@ -266,8 +234,7 @@
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -345,8 +312,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -407,8 +373,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -434,8 +399,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -475,8 +439,7 @@
                     <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
-                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
                     <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
                 </register>
@@ -489,116 +452,61 @@
                 <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
-                       value="0x01"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
-                       value="0x11"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms; default value"
-                       name="INTRCOSC_1MHZ_6CK_64MS_DEFAULT" value="0x21"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
-                       value="0x02"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
-                       value="0x12"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
-                       value="0x22"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
-                       value="0x04"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
-                       value="0x14"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
-                       value="0x24"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
-                       value="0x09"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
-                       value="0x19"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
-                       value="0x29"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS" value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS" value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms; default value" name="INTRCOSC_1MHZ_6CK_64MS_DEFAULT" value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS" value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS" value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS" value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS" value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS" value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS" value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS" value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS" value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms" name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms" name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms" name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms" name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms" name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms" name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms" name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms" name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms" name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms" name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms" name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms" name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms" name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms" name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms" name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms" name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms" name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms" name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms" name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms" name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms" name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms" name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms" name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms" name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
@@ -635,8 +543,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          ocd-rw="">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" ocd-rw="">
                     <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
@@ -662,8 +569,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
                     <bitfield caption="RW" mask="0x10" name="WDTOE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -691,10 +597,8 @@
                     <bitfield caption="External Interrupt Flag 2" mask="0x20" name="INTF2"/>
                 </register>
                 <register caption="General Interrupt Control Register" name="MCUCR" offset="0x55" size="1">
-                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
                     <bitfield caption="Interrupt Sense Control 2" mask="0x40" name="ISC2"/>
@@ -719,8 +623,7 @@
                 <register caption="Timer/Counter Register" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
                 <register caption="Output Compare Register" name="OCR0" offset="0x5C" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
-                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02" name="OCIE0"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -763,8 +666,7 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0x44" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2" offset="0x43" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2" offset="0x43" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0x42" size="1">
                     <bitfield caption="Asynchronous Timer/counter2" mask="0x08" name="AS2"/>
                     <bitfield caption="Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
@@ -787,10 +689,8 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
-                              name="OCIE1A"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
-                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -810,16 +710,12 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -892,8 +788,7 @@
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ"/>
                     <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
                 </register>
-                <register caption="USART Baud Rate Register Hight Byte" name="UBRRH" offset="0x40" size="1"
-                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRRH" offset="0x40" size="1" mask="0x0F"/>
                 <register caption="USART Baud Rate Register Low Byte" name="UBRRL" offset="0x29" size="1" mask="0xFF"/>
             </register-group>
             <value-group caption="" name="COMM_USART_MODE">
@@ -920,16 +815,14 @@
                     <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -952,8 +845,7 @@
                     <bitfield caption="ADC Auto Trigger" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
@@ -964,8 +856,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1016,10 +907,8 @@
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Sleep Enable" mask="0x80" name="SE"/>
                     <bitfield caption="Sleep Mode Select" mask="0x70" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
-                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3208.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3208.xml
index 798eea89..6c2d470d 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3208.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3208.xml
@@ -1,36 +1,25 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega3208-AFR" package="TQFP32" pinout="QFP32" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
-        <variant ordercode="ATmega3208-MFR" package="VQFN32" pinout="QFN32" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
-        <variant ordercode="ATmega3208-XFR" package="SSOP28" pinout="SSOP28" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega3208-AFR" package="TQFP32" pinout="QFP32" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega3208-MFR" package="VQFN32" pinout="QFN32" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega3208-XFR" package="SSOP28" pinout="SSOP28" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
     </variants>
     <device name="ATmega3208" family="AVR8" architecture="AVR8X" avr-family="AVR MEGA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1000" start="0x3000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0x8000"
-                                start="0x00004000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40"
-                                start="0x00001300" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00004000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -80,8 +69,7 @@
                         <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
@@ -91,13 +79,11 @@
                         <signal function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1" pad="PD6"/>
                         <signal function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
                         <signal function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
-                                pad="PF6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1" pad="PF6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
                     </signals>
                 </instance>
@@ -135,18 +121,12 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -491,10 +471,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -552,10 +530,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -576,8 +552,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -672,23 +647,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -729,14 +699,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
@@ -749,14 +715,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -766,14 +729,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -783,14 +743,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -800,14 +757,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
@@ -934,8 +888,7 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
                 </register>
                 <register caption="OSC20M Calibration B" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
@@ -983,8 +936,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1012,12 +964,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1051,66 +1001,51 @@
         <module caption="Event System" id="I2600" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
-                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
-                              values="EVSYS_STROBE0"/>
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W" values="EVSYS_STROBE0"/>
                 </register>
                 <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
                 <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
@@ -1227,16 +1162,12 @@
         </module>
         <module caption="Fuses" id="I2600" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1246,16 +1177,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1283,11 +1212,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1461,8 +1388,7 @@
                     <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
                     <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
                 </register>
-                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
                     <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
                     <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
@@ -1479,21 +1405,15 @@
                     <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
                     <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
                 </register>
-                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
-                          rw="RW" size="1">
-                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
-                              values="PORTMUX_USART1"/>
-                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
-                              values="PORTMUX_USART2"/>
-                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
-                              values="PORTMUX_USART3"/>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW" values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW" values="PORTMUX_USART3"/>
                 </register>
             </register-group>
             <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
@@ -1616,12 +1536,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1683,16 +1601,11 @@
                 <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
                 <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
                 <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
-                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R" size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R" size="1"/>
                 <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
                 <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
                 <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
@@ -1707,10 +1620,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1806,8 +1717,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1920,8 +1830,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1957,8 +1866,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2033,10 +1941,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2048,8 +1954,7 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -2149,15 +2054,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2172,19 +2075,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -2207,8 +2106,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2226,8 +2124,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2359,10 +2256,8 @@
         <module caption="Voltage reference" id="I2600" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
-                              values="VREF_AC0REFSEL"/>
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW" values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3209.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3209.xml
index 5d86b096..27adf1a6 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3209.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3209.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega3209-AFR" package="TQFP48" pinout="QFP48" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
-        <variant ordercode="ATmega3209-MFR" package="UQFN48" pinout="QFN48" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega3209-AFR" package="TQFP48" pinout="QFP48" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega3209-MFR" package="UQFN48" pinout="QFN48" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
     </variants>
     <device name="ATmega3209" family="AVR8" architecture="AVR8X" avr-family="AVR MEGA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1000" start="0x3000" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0x8000"
-                                start="0x00004000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40"
-                                start="0x00001300" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00004000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -82,26 +72,22 @@
                         <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
-                                pad="PC6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1" pad="PD6"/>
                         <signal function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
                         <signal function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
-                                pad="PF6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1" pad="PF6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
                     </signals>
                 </instance>
@@ -139,24 +125,15 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2" pad="PC7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4" pad="PE2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -562,10 +539,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -623,10 +598,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -647,8 +620,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -743,23 +715,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -800,14 +767,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
@@ -820,14 +783,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -837,14 +797,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -854,14 +811,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -871,14 +825,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
@@ -1005,8 +956,7 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
                 </register>
                 <register caption="OSC20M Calibration B" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
@@ -1054,8 +1004,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1083,12 +1032,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1122,74 +1069,57 @@
         <module caption="Event System" id="I2600" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
-                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
-                              values="EVSYS_STROBE0"/>
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W" values="EVSYS_STROBE0"/>
                 </register>
                 <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
                 <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
@@ -1308,16 +1238,12 @@
         </module>
         <module caption="Fuses" id="I2600" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1327,16 +1253,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1364,11 +1288,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1542,8 +1464,7 @@
                     <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
                     <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
                 </register>
-                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
                     <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
                     <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
@@ -1560,21 +1481,15 @@
                     <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
                     <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
                 </register>
-                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
-                          rw="RW" size="1">
-                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
-                              values="PORTMUX_USART1"/>
-                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
-                              values="PORTMUX_USART2"/>
-                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
-                              values="PORTMUX_USART3"/>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW" values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW" values="PORTMUX_USART3"/>
                 </register>
             </register-group>
             <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
@@ -1704,12 +1619,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1771,16 +1684,11 @@
                 <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
                 <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
                 <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
-                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R" size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R" size="1"/>
                 <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
                 <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
                 <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
@@ -1795,10 +1703,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1894,8 +1800,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2008,8 +1913,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2045,8 +1949,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2121,10 +2024,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2136,8 +2037,7 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -2237,15 +2137,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2260,19 +2158,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -2295,8 +2189,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2314,8 +2207,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2447,10 +2339,8 @@
         <module caption="Voltage reference" id="I2600" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
-                              values="VREF_AC0REFSEL"/>
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW" values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324A.xml
index 691d52be..d563fc04 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324A.xml
@@ -1,30 +1,20 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega324A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324A-MCH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="DRQFN_44"
-                 package="DRQFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324A-CU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VFBGA49"
-                 package="VFBGA49" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324A-MCH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="DRQFN_44" package="DRQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324A-CU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VFBGA49" package="VFBGA49" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega324A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,8 +31,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -52,8 +41,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
@@ -62,8 +50,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -71,8 +58,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -82,8 +68,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -96,8 +81,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -110,8 +94,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -124,8 +107,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -140,8 +122,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB0"/>
                         <signal group="OCB" function="default" pad="PB4"/>
@@ -151,8 +132,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PD6"/>
@@ -161,14 +141,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PC2"/>
                         <signal group="TMS" function="default" pad="PC3"/>
@@ -179,14 +157,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PA0"/>
                         <signal group="PCINT" index="1" function="default" pad="PA1"/>
@@ -228,8 +204,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -244,8 +219,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -256,14 +230,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB4"/>
                         <signal group="MOSI" function="default" pad="PB5"/>
@@ -274,8 +246,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -284,8 +255,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PB1"/>
                     </signals>
@@ -296,20 +266,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -397,8 +364,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -459,8 +425,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -486,8 +451,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -518,8 +482,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -543,104 +506,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
@@ -686,16 +600,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -812,10 +724,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -829,14 +739,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -860,14 +767,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -884,10 +788,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -918,8 +820,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -939,8 +840,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -966,12 +866,9 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
@@ -1010,24 +907,20 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x80" name="ADC7D"/>
@@ -1043,10 +936,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1057,50 +948,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
             </value-group>
@@ -1129,14 +998,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -1158,12 +1024,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324P.xml
index 407a05ec..09cf0edb 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324P.xml
@@ -1,44 +1,27 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega324PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega324P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega324P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44"
-                 package="VQFN44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega324PV-10AN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="TQFP_VQFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324PV-10PN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324PV-10MN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="TQFP_VQFN_44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324P-20AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega324P-20PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega324P-20MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44"
-                 package="VQFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega324PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega324P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega324P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44" package="VQFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega324PV-10AN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="TQFP_VQFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PV-10PN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PV-10MN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="TQFP_VQFN_44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324P-20AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega324P-20PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega324P-20MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44" package="VQFN44" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega324P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -55,8 +38,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -66,8 +48,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
@@ -76,8 +57,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -85,8 +65,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -96,8 +75,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -110,8 +88,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -124,8 +101,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -138,8 +114,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -154,8 +129,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB0"/>
                         <signal group="OCB" function="default" pad="PB4"/>
@@ -165,8 +139,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PD6"/>
@@ -175,14 +148,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PC2"/>
                         <signal group="TMS" function="default" pad="PC3"/>
@@ -193,14 +164,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PA0"/>
                         <signal group="PCINT" index="1" function="default" pad="PA1"/>
@@ -242,8 +211,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -258,8 +226,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -270,14 +237,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB4"/>
                         <signal group="MOSI" function="default" pad="PB5"/>
@@ -288,8 +253,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -298,8 +262,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PB1"/>
                     </signals>
@@ -310,20 +273,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -411,8 +371,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -473,8 +432,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -500,8 +458,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -532,8 +489,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -557,104 +513,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
@@ -700,16 +607,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -826,10 +731,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -843,14 +746,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -874,14 +774,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -898,10 +795,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -932,8 +827,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -953,8 +847,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -980,12 +873,9 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
@@ -1024,24 +914,20 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x80" name="ADC7D"/>
@@ -1057,10 +943,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1071,50 +955,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
             </value-group>
@@ -1143,14 +1005,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -1172,12 +1031,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324PA.xml
index 8d8d4e25..fb743f7f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324PA.xml
@@ -1,30 +1,20 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega324PA-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATmega324PA-PU" package="PDIP40" pinout="PDIP_40" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATmega324PA-MU" package="VQFN44" pinout="QFN_QFP_44" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATmega324PA-MCH" package="DRQFN44" pinout="DRQFN_44" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATmega324PA-CU" package="VFBGA49" pinout="BGA_49" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATmega324PA-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATmega324PA-PU" package="PDIP40" pinout="PDIP_40" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATmega324PA-MU" package="VQFN44" pinout="QFN_QFP_44" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATmega324PA-MCH" package="DRQFN44" pinout="DRQFN_44" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATmega324PA-CU" package="VFBGA49" pinout="BGA_49" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATmega324PA" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,8 +31,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -52,8 +41,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
@@ -62,8 +50,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -71,8 +58,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -82,8 +68,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -96,8 +81,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -110,8 +94,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -124,8 +107,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -140,8 +122,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB0"/>
                         <signal group="OCB" function="default" pad="PB4"/>
@@ -151,8 +132,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PD6"/>
@@ -161,14 +141,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PC2"/>
                         <signal group="TMS" function="default" pad="PC3"/>
@@ -179,14 +157,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PA0"/>
                         <signal group="PCINT" index="1" function="default" pad="PA1"/>
@@ -228,8 +204,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -244,8 +219,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -256,14 +230,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB4"/>
                         <signal group="MOSI" function="default" pad="PB5"/>
@@ -274,8 +246,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -284,8 +255,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PB1"/>
                     </signals>
@@ -296,20 +266,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -397,8 +364,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -459,8 +425,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -486,8 +451,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -518,8 +482,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -543,104 +506,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
@@ -686,16 +600,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -818,12 +730,10 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare B bits" mask="0xFF" name="OCR0B"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare A bits" mask="0xFF" name="OCR0A"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
@@ -841,14 +751,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -872,14 +779,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -898,12 +802,10 @@
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter2 bits" mask="0xFF" name="TCNT2"/>
                 </register>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter2 Output Compare B bits" mask="0xFF" name="OCR2B"/>
                 </register>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare A bits" mask="0xFF" name="OCR2A"/>
                 </register>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
@@ -936,8 +838,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -957,8 +858,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -984,12 +884,9 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
@@ -1028,26 +925,22 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
                     <bitfield caption="ADC Data bits" mask="0x03FF" name="ADC"/>
                 </register>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x80" name="ADC7D"/>
@@ -1063,10 +956,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1077,50 +968,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
             </value-group>
@@ -1149,14 +1018,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -1180,16 +1046,13 @@
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare A bits" mask="0xFFFF" name="OCR1A"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare B bits" mask="0xFF" name="OCR1B"/>
                 </register>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324PB.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324PB.xml
index 760ee2a5..5887c073 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324PB.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA324PB.xml
@@ -1,36 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega324PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324PB-AUR" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324PB-MUR" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324PB-ANR" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega324PB-MNR" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PB-AUR" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PB-MUR" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PB-ANR" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PB-MNR" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega324PB" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -47,8 +34,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -58,8 +44,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AC" function="default" pad="PC5"/>
                         <signal group="AIN0" function="default" pad="PB2"/>
@@ -69,8 +54,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -78,8 +62,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -87,8 +70,7 @@
                     </signals>
                 </instance>
                 <instance name="USART2" caption="USART">
-                    <register-group name="USART2" name-in-module="USART2" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART2" name-in-module="USART2" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PE3"/>
                         <signal group="RXD" function="default" pad="PE2"/>
@@ -98,8 +80,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="PORTA" function="default" pad="PA0" index="0"/>
                         <signal group="PORTA" function="default" pad="PA1" index="1"/>
@@ -112,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="PORTB" function="default" pad="PB0" index="0"/>
                         <signal group="PORTB" function="default" pad="PB1" index="1"/>
@@ -126,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="PORTC" function="default" pad="PC0" index="0"/>
                         <signal group="PORTC" function="default" pad="PC1" index="1"/>
@@ -140,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="PORTD" function="default" pad="PD0" index="0"/>
                         <signal group="PORTD" function="default" pad="PD1" index="1"/>
@@ -154,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="PORTE" function="default" pad="PE0" index="0"/>
                         <signal group="PORTE" function="default" pad="PE1" index="1"/>
@@ -169,8 +146,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB0"/>
                         <signal group="OCB" function="default" pad="PB4"/>
@@ -180,8 +156,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -190,8 +165,7 @@
                     </signals>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD0"/>
                         <signal group="ICP" function="default" pad="PB5"/>
@@ -200,8 +174,7 @@
                     </signals>
                 </instance>
                 <instance name="TC4" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PC2"/>
                         <signal group="ICP" function="default" pad="PC3"/>
@@ -212,8 +185,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PD6"/>
@@ -222,8 +194,7 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="PTC">
@@ -282,8 +253,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PC2"/>
                         <signal group="TMS" function="default" pad="PC3"/>
@@ -294,8 +264,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PA0"/>
                         <signal group="PCINT" index="1" function="default" pad="PA1"/>
@@ -339,8 +308,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC0" function="default" pad="PA0"/>
                         <signal group="ADC1" function="default" pad="PA1"/>
@@ -355,14 +323,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI0" caption="Serial Peripheral Interface">
-                    <register-group name="SPI0" name-in-module="SPI0" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI0" name-in-module="SPI0" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB4"/>
                         <signal group="MOSI" function="default" pad="PB5"/>
@@ -371,8 +337,7 @@
                     </signals>
                 </instance>
                 <instance name="SPI1" caption="Serial Peripheral Interface">
-                    <register-group name="SPI1" name-in-module="SPI1" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI1" name-in-module="SPI1" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PD6"/>
                         <signal group="SCK" function="default" pad="PD7"/>
@@ -383,16 +348,14 @@
             </module>
             <module name="TWI">
                 <instance name="TWI0" caption="Two Wire Serial Interface">
-                    <register-group name="TWI0" name-in-module="TWI0" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI0" name-in-module="TWI0" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA0" function="default" pad="PC1"/>
                         <signal group="SCL0" function="default" pad="PC0"/>
                     </signals>
                 </instance>
                 <instance name="TWI1" caption="Two Wire Serial Interface">
-                    <register-group name="TWI1" name-in-module="TWI1" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI1" name-in-module="TWI1" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA1" function="default" pad="PE5"/>
                         <signal group="SCL1" function="default" pad="PE6"/>
@@ -401,14 +364,12 @@
             </module>
             <module name="CFD">
                 <instance name="CFD" caption="Clock Failure Detection">
-                    <register-group name="CFD" name-in-module="CFD" offset="0x00" address-space="data"
-                                    caption="Clock Failure Detection"/>
+                    <register-group name="CFD" name-in-module="CFD" offset="0x00" address-space="data" caption="Clock Failure Detection"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB1"/>
                     </signals>
@@ -419,20 +380,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -543,8 +501,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -605,8 +562,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -632,8 +588,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -665,8 +620,7 @@
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0x07">
                     <bitfield caption="Clock Failure Detection" mask="0x08" name="CFD" values="ENUM_CFD"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -688,100 +642,53 @@
                 <value caption="Enabled" name="CFD_ENABLED" value="0x01"/>
             </value-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
@@ -824,19 +731,16 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x4F" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x4F" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Output enable" mask="0x01" name="ACOE"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
@@ -1005,10 +909,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -1022,14 +924,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1054,14 +953,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -1078,10 +974,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -1108,8 +1002,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1129,8 +1022,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1142,12 +1034,9 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request Enable" mask="0x07" name="INT"/>
@@ -1189,8 +1078,7 @@
                 <register caption="ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
@@ -1199,14 +1087,12 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Enable GPIO function of PE4" mask="0x80" name="GPIOEN"/>
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x80" name="ADC7D"/>
@@ -1222,10 +1108,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1236,50 +1120,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
             </value-group>
@@ -1308,14 +1170,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -1337,24 +1196,18 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC3">
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
                     <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
                     <bitfield caption="Timer/Counter3 Output Compare A Match Flag" mask="0x02" name="OCF3A"/>
@@ -1376,24 +1229,18 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC4">
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
                     <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
-                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE4B"/>
-                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE4A"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR4" offset="0x39" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
                     <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
                     <bitfield caption="Timer/Counter4 Output Compare A Match Flag" mask="0x02" name="OCF4A"/>
@@ -1415,12 +1262,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
                 </register>
                 <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -1555,8 +1399,7 @@
         </module>
         <module caption="Clock Failure Detection" name="CFD">
             <register-group caption="Clock Failure Detection" name="CFD">
-                <register caption="XOSC Failure Detection Control and Status Register" name="XFDCSR" offset="0x62"
-                          size="1">
+                <register caption="XOSC Failure Detection Control and Status Register" name="XFDCSR" offset="0x62" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XFDIF"/>
                     <bitfield caption="Failure Detection Interrupt Enable" mask="0x01" name="XFDIE"/>
                 </register>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325.xml
index ed6a27a1..9e9eaf2c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325.xml
@@ -7,16 +7,11 @@
     <device name="ATmega325" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -44,62 +38,52 @@
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -112,8 +96,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -126,8 +109,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -140,8 +122,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -154,8 +135,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -168,8 +148,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -182,8 +161,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -196,32 +174,27 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -229,20 +202,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -321,8 +291,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -383,8 +352,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -415,8 +383,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -441,82 +408,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -570,8 +499,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -592,8 +520,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -611,16 +538,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -751,8 +676,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -765,8 +689,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -849,14 +772,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -893,30 +814,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -944,14 +858,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -988,8 +900,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1033,8 +944,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250.xml
index ad93251e..fc4e6614 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250.xml
@@ -6,16 +6,11 @@
     <device name="ATmega3250" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,44 +37,37 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -93,8 +80,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -107,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -121,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -135,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -149,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -163,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -175,8 +156,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTH" group="P" index="0" pad="PH0"/>
                         <signal function="PORTH" group="P" index="1" pad="PH1"/>
@@ -189,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
                         <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
@@ -204,26 +183,22 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -231,44 +206,37 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -350,8 +318,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -412,8 +379,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -444,8 +410,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -470,82 +435,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -596,14 +523,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -640,30 +565,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -691,14 +609,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -735,8 +651,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -843,16 +758,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -868,8 +781,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -882,8 +794,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -943,8 +854,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
@@ -1024,8 +934,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -1046,8 +955,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250A.xml
index aa5f4964..6d2f190c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250A.xml
@@ -6,16 +6,11 @@
     <device name="ATmega3250A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,44 +37,37 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -93,8 +80,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -107,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -121,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -135,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -149,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -163,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -175,8 +156,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTH" group="P" index="0" pad="PH0"/>
                         <signal function="PORTH" group="P" index="1" pad="PH1"/>
@@ -189,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
                         <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
@@ -204,26 +183,22 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -231,44 +206,37 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -350,8 +318,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -412,8 +379,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -444,8 +410,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -470,82 +435,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -596,14 +523,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -640,30 +565,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -691,14 +609,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -735,8 +651,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -843,16 +758,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -868,8 +781,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -882,8 +794,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -943,8 +854,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
@@ -1024,8 +934,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -1046,8 +955,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250P.xml
index bdbd0949..7c0306ea 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250P.xml
@@ -6,16 +6,11 @@
     <device name="ATmega3250P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,44 +37,37 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -93,8 +80,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -107,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -121,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -135,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -149,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -163,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -175,8 +156,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTH" group="P" index="0" pad="PH0"/>
                         <signal function="PORTH" group="P" index="1" pad="PH1"/>
@@ -189,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
                         <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
@@ -204,26 +183,22 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -231,44 +206,37 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -350,8 +318,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -412,8 +379,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -444,8 +410,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -470,82 +435,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -596,14 +523,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -640,30 +565,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -691,14 +609,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -735,8 +651,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -843,16 +758,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -868,8 +781,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -882,8 +794,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -945,8 +856,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
@@ -1026,8 +936,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -1048,8 +957,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250PA.xml
index 91a56282..39deeabe 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3250PA.xml
@@ -6,16 +6,11 @@
     <device name="ATmega3250PA" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,44 +37,37 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -93,8 +80,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -107,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -121,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -135,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -149,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -163,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -175,8 +156,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTH" group="P" index="0" pad="PH0"/>
                         <signal function="PORTH" group="P" index="1" pad="PH1"/>
@@ -189,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
                         <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
@@ -204,50 +183,42 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -255,20 +226,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -350,8 +318,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -412,8 +379,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -444,8 +410,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -470,82 +435,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -596,14 +523,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -640,30 +565,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -691,14 +609,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -735,8 +651,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -843,16 +758,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -868,8 +781,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -882,8 +794,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -944,8 +855,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -966,8 +876,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1073,8 +982,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325A.xml
index ca44455e..355f57eb 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325A.xml
@@ -7,16 +7,11 @@
     <device name="ATmega325A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -44,62 +38,52 @@
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -112,8 +96,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -126,8 +109,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -140,8 +122,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -154,8 +135,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -168,8 +148,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -182,8 +161,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -196,32 +174,27 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -229,20 +202,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -321,8 +291,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -383,8 +352,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -415,8 +383,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -441,82 +408,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -570,8 +499,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -592,8 +520,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -611,16 +538,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -751,8 +676,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -765,8 +689,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -849,14 +772,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -893,30 +814,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -944,14 +858,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -988,8 +900,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1034,8 +945,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325P.xml
index fcd110c4..5dc3af61 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325P.xml
@@ -7,16 +7,11 @@
     <device name="ATmega325P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -44,62 +38,52 @@
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -112,8 +96,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -126,8 +109,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -140,8 +122,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -154,8 +135,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -168,8 +148,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -182,8 +161,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -196,32 +174,27 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -229,20 +202,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -321,8 +291,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -383,8 +352,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -415,8 +383,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -441,82 +408,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -570,8 +499,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -592,8 +520,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -611,16 +538,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -751,8 +676,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -765,8 +689,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -849,14 +772,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -893,30 +814,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -944,14 +858,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -988,8 +900,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1036,8 +947,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325PA.xml
index 19968efb..9a91902c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325PA.xml
@@ -7,16 +7,11 @@
     <device name="ATmega325PA" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -44,62 +38,52 @@
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -112,8 +96,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -126,8 +109,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -140,8 +122,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -154,8 +135,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -168,8 +148,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -182,8 +161,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -196,32 +174,27 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -229,20 +202,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -321,8 +291,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -383,8 +352,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -415,8 +383,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -441,82 +408,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -570,8 +499,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -592,8 +520,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -611,16 +538,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -751,8 +676,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -765,8 +689,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -845,14 +768,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -889,30 +810,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -940,14 +854,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -984,8 +896,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1032,8 +943,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA328.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA328.xml
index 423738ee..ca0421b0 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA328.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA328.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega328-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega328-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28"
-                 vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega328-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
-                 vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega328-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega328" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -50,8 +40,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -61,8 +50,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -71,8 +59,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -83,8 +70,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -93,8 +79,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -107,8 +92,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
                         <signal group="AIN" index="1" function="default" pad="PD7"/>
@@ -117,8 +101,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -131,8 +114,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -144,8 +126,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -160,8 +141,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -171,8 +151,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -204,8 +183,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -216,20 +194,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -240,20 +215,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -336,8 +308,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -398,8 +369,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -425,8 +395,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -457,8 +426,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
                     <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
@@ -476,116 +444,61 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -718,14 +631,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -740,8 +650,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
@@ -750,16 +659,13 @@
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare A bits" mask="0xFFFF" name="OCR1A"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare B bits" mask="0xFFFF" name="OCR1B"/>
                 </register>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
                 </register>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
@@ -781,14 +687,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -807,12 +710,10 @@
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter2 bits" mask="0xFF" name="TCNT2"/>
                 </register>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter2 Output Compare B bits" mask="0xFF" name="OCR2B"/>
                 </register>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter2 Output Compare A bits" mask="0xFF" name="OCR2A"/>
                 </register>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
@@ -845,26 +746,22 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX"
-                              values="ADC_MUX_SINGLE_NO_TEMP"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE_NO_TEMP"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
                     <bitfield caption="ADC Data bits" mask="0x03FF" name="ADC"/>
                 </register>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -879,8 +776,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE_NO_TEMP">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -917,16 +813,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -959,12 +853,10 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare B bits" mask="0xFF" name="OCR0B"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare A bits" mask="0xFF" name="OCR0A"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
@@ -982,14 +874,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1013,10 +902,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1079,8 +966,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1131,14 +1017,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1151,8 +1035,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x0FFF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA328P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA328P.xml
index 803c2baa..bf88a587 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA328P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA328P.xml
@@ -1,34 +1,22 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega328P-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega328P-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
-                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega328P-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
-                 vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega328P-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega328P-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega328P-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN32"
-                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega328P-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328P-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328P-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328P-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328P-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328P-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328P-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328P-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega328P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -45,8 +33,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -56,8 +43,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -67,8 +53,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -77,8 +62,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -89,8 +73,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -99,8 +82,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -113,8 +95,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
                         <signal group="AIN" index="1" function="default" pad="PD7"/>
@@ -123,8 +104,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -137,8 +117,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -150,8 +129,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -166,8 +144,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -177,8 +154,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -210,8 +186,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -222,20 +197,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -246,20 +218,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -342,8 +311,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -404,8 +372,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -431,8 +398,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -463,8 +429,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
                     <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
@@ -482,116 +447,61 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -716,14 +626,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -738,20 +645,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -771,14 +674,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -795,10 +695,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -832,20 +730,17 @@
                     <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -860,8 +755,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -899,16 +793,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -941,10 +833,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -958,14 +848,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -989,10 +876,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1053,8 +938,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1083,14 +967,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1103,8 +985,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x0FFF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA328PB.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA328PB.xml
index d6993c0f..27086d3a 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA328PB.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA328PB.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega328PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega328PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN32"
-                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega328PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega328PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN32"
-                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN32" package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN32" package="VQFN32" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega328PB" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -147,8 +137,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -161,8 +150,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -174,8 +162,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -188,8 +175,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -347,8 +333,7 @@
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -447,8 +432,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -509,8 +493,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -536,8 +519,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -569,8 +551,7 @@
             <register-group caption="" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF7">
                     <bitfield caption="Clock Failure Detection" mask="0x08" name="CFD" values="ENUM_CFD"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
                     <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
@@ -592,100 +573,53 @@
                 <value caption="Enabled" name="CFD_ENABLED" value="0x01"/>
             </value-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -859,8 +793,7 @@
                     <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS1" values="COMM_TWI_PRESACLE"/>
                 </register>
                 <register caption="TWI Data register" name="TWDR1" offset="0xDB" size="1" mask="0xFF"/>
-                <register caption="TWI (Slave) Address register" name="TWAR1" offset="0xDA" size="1">
-                </register>
+                <register caption="TWI (Slave) Address register" name="TWAR1" offset="0xDA" size="1"></register>
             </register-group>
             <value-group caption="" name="COMM_TWI_PRESACLE">
                 <value caption="1" name="VAL_0x00" value="0x00"/>
@@ -873,14 +806,11 @@
             <register-group caption="" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -895,20 +825,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -917,14 +843,11 @@
             <register-group caption="" name="TC3">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
                     <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
@@ -947,24 +870,18 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
             </register-group>
             <register-group caption="" name="TC4">
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
                     <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
-                    <bitfield caption="Timer/Counter4 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE4B"/>
-                    <bitfield caption="Timer/Counter4 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE4A"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
                     <bitfield caption="Output Compare Flag 4B" mask="0x04" name="OCF4B"/>
                     <bitfield caption="Output Compare Flag 4A" mask="0x02" name="OCF4A"/>
@@ -987,12 +904,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
                 </register>
                 <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register Bytes" name="OCR4A" offset="0xA8" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register Bytes" name="OCR4B" offset="0xAA" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -1018,14 +932,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -1042,10 +953,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -1079,20 +988,17 @@
                     <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="ADC Digital Input Disable" mask="0x80" name="ADC7D"/>
@@ -1109,8 +1015,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="Input Channel Selection" name="ADC_MUX_SINGLE">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1148,19 +1053,15 @@
         </module>
         <module caption="" name="AC">
             <register-group caption="" name="AC">
-                <register caption="Analog Comparator Control And Status Register-A" name="ACSRA" offset="0x50" size="1"
-                          ocd-rw="R">
-                </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register-A" name="ACSRA" offset="0x50" size="1" ocd-rw="R"></register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Analog Comparator Control And Status Register-B" name="ACSRB" offset="0x4F" size="1">
                     <bitfield caption="Analog Comparator Output Enable" mask="0x01" name="ACOE"/>
@@ -1201,10 +1102,8 @@
         </module>
         <module caption="" name="TC8">
             <register-group caption="" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -1218,14 +1117,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1249,10 +1145,8 @@
         <module caption="" name="EXINT">
             <register-group caption="" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1333,8 +1227,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1354,8 +1247,7 @@
         </module>
         <module caption="" name="CFD">
             <register-group caption="" name="CFD">
-                <register caption="XOSC Failure Detection Control and Status Register" name="XFDCSR" offset="0x62"
-                          size="1">
+                <register caption="XOSC Failure Detection Control and Status Register" name="XFDCSR" offset="0x62" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XFDIF"/>
                     <bitfield caption="Failure Detection Interrupt Enable" mask="0x01" name="XFDIE"/>
                 </register>
@@ -1381,14 +1273,12 @@
                     <bitfield caption="Power Reduction Serial Peripheral Interface 1" mask="0x04" name="PRSPI1"/>
                     <bitfield caption="Power Reduction Timer/Counter3" mask="0x01" name="PRTIM3"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration" mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1401,8 +1291,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer" name="SP" offset="0x5D" size="2" mask="0x0FFF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329.xml
index 4ad891fa..308d0ece 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega329V-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega329V-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="QFN64" package="QFN64"
-                 vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega329-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64 " vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega329-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega329V-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP64" package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329V-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64" package="TQFP64 " vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega329-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega329" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -50,8 +40,7 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG4"/>
                         <signal group="OCA" function="default" pad="PB4"/>
@@ -60,8 +49,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG3"/>
                         <signal group="ICP" function="default" pad="PD0"/>
@@ -73,8 +61,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB7"/>
                         <signal group="TOSC" function="default" pad="XTAL2"/>
@@ -83,20 +70,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="SCK" function="default" pad="PB1"/>
@@ -107,8 +91,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -121,8 +104,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -135,8 +117,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -149,8 +130,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -163,8 +143,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -177,8 +156,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -191,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -205,8 +182,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -215,8 +191,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -227,8 +202,7 @@
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                     <signals>
                         <signal group="SEG" index="0" function="default" pad="PA4"/>
                         <signal group="SEG" index="1" function="default" pad="PA5"/>
@@ -264,8 +238,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PE0"/>
                         <signal group="PCINT" index="1" function="default" pad="PE1"/>
@@ -289,8 +262,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PE7"/>
                     </signals>
@@ -301,8 +273,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal group="DI" function="default" pad="PE5"/>
                         <signal group="DO" function="default" pad="PE6"/>
@@ -311,8 +282,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -327,14 +297,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" function="default" pad="PE0"/>
                         <signal group="TXD" function="default" pad="PE1"/>
@@ -345,20 +313,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -438,8 +403,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -500,8 +464,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -532,8 +495,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -558,82 +520,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -684,14 +608,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -728,30 +650,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -779,14 +694,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -823,8 +736,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -921,16 +833,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -946,8 +856,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1039,8 +948,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -1094,8 +1002,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
@@ -1176,8 +1083,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -1198,8 +1104,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290.xml
index 8443fd47..45acd85b 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290.xml
@@ -6,16 +6,11 @@
     <device name="ATmega3290" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,44 +37,37 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -93,8 +80,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -107,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -121,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -135,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -149,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -163,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -175,8 +156,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTH" group="P" index="0" pad="PH0"/>
                         <signal function="PORTH" group="P" index="1" pad="PH1"/>
@@ -189,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
                         <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
@@ -204,32 +183,27 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -237,44 +211,37 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -356,8 +323,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -418,8 +384,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -450,8 +415,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -476,82 +440,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -602,14 +528,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -646,30 +570,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -697,14 +614,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -741,8 +656,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -849,16 +763,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -874,8 +786,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -971,8 +882,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -1032,8 +942,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
@@ -1114,8 +1023,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -1136,8 +1044,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290A.xml
index dc45bd3b..f7054888 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290A.xml
@@ -6,16 +6,11 @@
     <device name="ATmega3290A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,44 +37,37 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -93,8 +80,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -107,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -121,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -135,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -149,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -163,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -175,8 +156,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTH" group="P" index="0" pad="PH0"/>
                         <signal function="PORTH" group="P" index="1" pad="PH1"/>
@@ -189,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
                         <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
@@ -204,32 +183,27 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -237,44 +211,37 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -356,8 +323,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -418,8 +384,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -450,8 +415,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -476,82 +440,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -602,14 +528,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -646,30 +570,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -697,14 +614,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -741,8 +656,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -849,16 +763,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -874,8 +786,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -971,8 +882,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -1032,8 +942,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
@@ -1114,8 +1023,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -1136,8 +1044,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290P.xml
index b36bf2de..a32d55ee 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290P.xml
@@ -6,16 +6,11 @@
     <device name="ATmega3290P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,44 +37,37 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -93,8 +80,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -107,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -121,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -135,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -149,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -163,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -175,8 +156,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTH" group="P" index="0" pad="PH0"/>
                         <signal function="PORTH" group="P" index="1" pad="PH1"/>
@@ -189,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
                         <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
@@ -204,32 +183,27 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -237,44 +211,37 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -356,8 +323,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -418,8 +384,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -450,8 +415,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -476,82 +440,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -602,14 +528,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -646,30 +570,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -697,14 +614,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -741,8 +656,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -849,16 +763,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -874,8 +786,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -907,8 +818,7 @@
                 <register caption="LCD Data Register 1" name="LCDDR01" offset="0xED" size="1" mask="0xFF"/>
                 <register caption="LCD Data Register 0" name="LCDDR00" offset="0xEC" size="1" mask="0xFF"/>
                 <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1">
-                    <bitfield caption="LCD Display Configurations" mask="0xE0" name="LCDDC"
-                              values="LCD_DISP_CONF_DRIVE"/>
+                    <bitfield caption="LCD Display Configurations" mask="0xE0" name="LCDDC" values="LCD_DISP_CONF_DRIVE"/>
                     <bitfield caption="LCD Maximum Drive Time" mask="0x10" name="LCDMDT"/>
                     <bitfield caption="LCD Contrast Control" mask="0x0F" name="LCDCC" values="LCD_CONTRAST"/>
                 </register>
@@ -1003,8 +913,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -1067,8 +976,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
@@ -1149,8 +1057,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -1171,8 +1078,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290PA.xml
index 66447c00..5af36d8c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290PA.xml
@@ -6,16 +6,11 @@
     <device name="ATmega3290PA" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,44 +37,37 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -93,8 +80,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -107,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -121,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -135,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -149,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -163,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -175,8 +156,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTH" group="P" index="0" pad="PH0"/>
                         <signal function="PORTH" group="P" index="1" pad="PH1"/>
@@ -189,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
                         <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
@@ -204,56 +183,47 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -261,20 +231,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -356,8 +323,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -418,8 +384,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -450,8 +415,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -476,82 +440,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -602,14 +528,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -646,30 +570,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -697,14 +614,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -741,8 +656,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -849,16 +763,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -874,8 +786,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -888,8 +799,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -950,8 +860,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -972,8 +881,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1069,8 +977,7 @@
                 <register caption="LCD Data Register 1" name="LCDDR1" offset="0xED" size="1" mask="0xFF"/>
                 <register caption="LCD Data Register 0" name="LCDDR0" offset="0xEC" size="1" mask="0xFF"/>
                 <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1">
-                    <bitfield caption="LCD Display Configurations" mask="0xE0" name="LCDDC"
-                              values="LCD_DISP_CONF_DRIVE"/>
+                    <bitfield caption="LCD Display Configurations" mask="0xE0" name="LCDDC" values="LCD_DISP_CONF_DRIVE"/>
                     <bitfield caption="LCD Maximum Drive Time" mask="0x10" name="LCDMDT"/>
                     <bitfield caption="LCD Contrast Controls" mask="0x0F" name="LCDCC" values="LCD_CONTRAST"/>
                 </register>
@@ -1194,8 +1101,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329A.xml
index d579464e..e13c6f19 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329A.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega329A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega329A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN64" package="QFN64"
-                 vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega329A-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP64"
-                 package="TQFP64 " vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega329A-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN64"
-                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP64" package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329A-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP64" package="TQFP64 " vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329A-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega329A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -50,8 +40,7 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG4"/>
                         <signal group="OCA" function="default" pad="PB4"/>
@@ -60,8 +49,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG3"/>
                         <signal group="ICP" function="default" pad="PD0"/>
@@ -73,8 +61,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB7"/>
                         <signal group="TOSC" function="default" pad="XTAL2"/>
@@ -83,20 +70,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="SCK" function="default" pad="PB1"/>
@@ -107,8 +91,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -121,8 +104,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -135,8 +117,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -149,8 +130,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -163,8 +143,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -177,8 +156,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -191,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -205,8 +182,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -215,8 +191,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -227,8 +202,7 @@
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                     <signals>
                         <signal group="SEG" index="0" function="default" pad="PA4"/>
                         <signal group="SEG" index="1" function="default" pad="PA5"/>
@@ -264,8 +238,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PE0"/>
                         <signal group="PCINT" index="1" function="default" pad="PE1"/>
@@ -289,8 +262,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PE7"/>
                     </signals>
@@ -301,8 +273,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal group="DI" function="default" pad="PE5"/>
                         <signal group="DO" function="default" pad="PE6"/>
@@ -311,8 +282,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -327,14 +297,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" function="default" pad="PE0"/>
                         <signal group="TXD" function="default" pad="PE1"/>
@@ -345,20 +313,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -438,8 +403,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -500,8 +464,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -532,8 +495,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -558,82 +520,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -684,14 +608,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -728,30 +650,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -779,14 +694,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -823,8 +736,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -921,16 +833,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -946,8 +856,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1119,8 +1028,7 @@
                     <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG007"/>
                 </register>
                 <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1">
-                    <bitfield caption="LCD Display Configuration" mask="0xE0" name="LCDDC"
-                              values="LCD_DISP_CONF_DRIVE"/>
+                    <bitfield caption="LCD Display Configuration" mask="0xE0" name="LCDDC" values="LCD_DISP_CONF_DRIVE"/>
                     <bitfield caption="LCD Maximum Drive Time" mask="0x10" name="LCDMDT"/>
                     <bitfield caption="LCD Contrast Controls" mask="0x0F" name="LCDCC" values="LCD_CONTRAST"/>
                 </register>
@@ -1215,8 +1123,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -1271,8 +1178,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
@@ -1353,8 +1259,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -1375,8 +1280,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329P.xml
index 27f6a261..fd3888bb 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329P.xml
@@ -1,32 +1,21 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega329PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega329PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN64"
-                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega329P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega329P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega329P-20AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP64"
-                 package="TQFP64 " vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega329P-20MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN64"
-                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP64" package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP64" package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega329P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega329P-20AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP64" package="TQFP64 " vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329P-20MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega329P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,8 +32,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -54,8 +42,7 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG4"/>
                         <signal group="OCA" function="default" pad="PB4"/>
@@ -64,8 +51,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG3"/>
                         <signal group="ICP" function="default" pad="PD0"/>
@@ -77,8 +63,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB7"/>
                         <signal group="TOSC" function="default" pad="XTAL2"/>
@@ -87,20 +72,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="SCK" function="default" pad="PB1"/>
@@ -111,8 +93,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -125,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -139,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -153,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -167,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -181,8 +158,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -195,8 +171,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -209,8 +184,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -219,8 +193,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -231,8 +204,7 @@
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                     <signals>
                         <signal group="SEG" index="0" function="default" pad="PA4"/>
                         <signal group="SEG" index="1" function="default" pad="PA5"/>
@@ -268,8 +240,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PE0"/>
                         <signal group="PCINT" index="1" function="default" pad="PE1"/>
@@ -293,8 +264,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PE7"/>
                     </signals>
@@ -305,8 +275,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal group="DI" function="default" pad="PE5"/>
                         <signal group="DO" function="default" pad="PE6"/>
@@ -315,8 +284,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -331,14 +299,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" function="default" pad="PE0"/>
                         <signal group="TXD" function="default" pad="PE1"/>
@@ -349,20 +315,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -442,8 +405,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -504,8 +466,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -536,8 +497,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -562,82 +522,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -688,14 +610,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -732,30 +652,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -783,14 +696,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -827,8 +738,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -925,16 +835,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -950,8 +858,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -964,8 +871,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -1042,8 +948,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -1064,8 +969,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1425,8 +1329,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329PA.xml
index c1f2c8b2..1add68e3 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA329PA.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega329PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega329PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN64"
-                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega329PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP64"
-                 package="TQFP64 " vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega329PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN64"
-                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP64" package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP64" package="TQFP64 " vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega329PA" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -50,8 +40,7 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG4"/>
                         <signal group="OCA" function="default" pad="PB4"/>
@@ -60,8 +49,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG3"/>
                         <signal group="ICP" function="default" pad="PD0"/>
@@ -73,8 +61,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB7"/>
                         <signal group="TOSC" function="default" pad="XTAL2"/>
@@ -83,20 +70,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="SCK" function="default" pad="PB1"/>
@@ -107,8 +91,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -121,8 +104,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -135,8 +117,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -149,8 +130,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -163,8 +143,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -177,8 +156,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -191,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -205,8 +182,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -215,8 +191,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -227,8 +202,7 @@
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                     <signals>
                         <signal group="SEG" index="0" function="default" pad="PA4"/>
                         <signal group="SEG" index="1" function="default" pad="PA5"/>
@@ -264,8 +238,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PE0"/>
                         <signal group="PCINT" index="1" function="default" pad="PE1"/>
@@ -289,8 +262,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PE7"/>
                     </signals>
@@ -301,8 +273,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal group="DI" function="default" pad="PE5"/>
                         <signal group="DO" function="default" pad="PE6"/>
@@ -311,8 +282,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -327,14 +297,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" function="default" pad="PE0"/>
                         <signal group="TXD" function="default" pad="PE1"/>
@@ -345,20 +313,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -438,8 +403,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -500,8 +464,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -532,8 +495,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -558,82 +520,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
@@ -684,14 +608,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -728,30 +650,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -779,14 +694,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -823,8 +736,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -921,16 +833,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -946,8 +856,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1119,8 +1028,7 @@
                     <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG007"/>
                 </register>
                 <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1">
-                    <bitfield caption="LCD Display Configuration" mask="0xE0" name="LCDDC"
-                              values="LCD_DISP_CONF_DRIVE"/>
+                    <bitfield caption="LCD Display Configuration" mask="0xE0" name="LCDDC" values="LCD_DISP_CONF_DRIVE"/>
                     <bitfield caption="LCD Maximum Drive Time" mask="0x10" name="LCDMDT"/>
                     <bitfield caption="LCD Contrast Controls" mask="0x0F" name="LCDCC" values="LCD_CONTRAST"/>
                 </register>
@@ -1215,8 +1123,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -1273,8 +1180,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
@@ -1355,8 +1261,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -1377,8 +1282,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32A.xml
index dff1316d..5ee89eea 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32A.xml
@@ -1,30 +1,20 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega32A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega32A-PU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega32A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
-                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega32A-AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega32A-MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN44"
-                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32A-PU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="PDIP40" package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44" package="QFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32A-AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32A-MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN44" package="QFN44" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega32A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,8 +31,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
@@ -52,20 +41,17 @@
         <peripherals>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD2"/>
                         <signal group="INT" index="0" function="default" pad="PD3"/>
@@ -74,8 +60,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB0"/>
                         <signal group="OC" function="default" pad="PB3"/>
@@ -84,8 +69,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OC" function="default" pad="PD7"/>
                     </signals>
@@ -93,8 +77,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PD5"/>
                         <signal group="OCB" function="default" pad="PD4"/>
@@ -105,8 +88,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="MISO" function="default" pad="PB6"/>
                         <signal group="MOSI" function="default" pad="PB5"/>
@@ -117,8 +99,7 @@
             </module>
             <module name="USART">
                 <instance name="USART" caption="USART">
-                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" function="default" pad="PD0"/>
                         <signal group="TXD" function="default" pad="PD1"/>
@@ -128,8 +109,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
@@ -138,8 +118,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -154,8 +133,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -168,8 +146,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -182,8 +159,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -196,8 +172,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -212,8 +187,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -221,14 +195,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -237,20 +209,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -328,8 +297,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -390,8 +358,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -417,8 +384,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -458,8 +424,7 @@
                     <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
-                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
                     <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
                 </register>
@@ -472,116 +437,61 @@
                 <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
-                       value="0x01"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
-                       value="0x11"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms; default value"
-                       name="INTRCOSC_1MHZ_6CK_64MS_DEFAULT" value="0x21"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
-                       value="0x02"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
-                       value="0x12"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
-                       value="0x22"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
-                       value="0x04"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
-                       value="0x14"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
-                       value="0x24"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
-                       value="0x09"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
-                       value="0x19"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
-                       value="0x29"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS" value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS" value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms; default value" name="INTRCOSC_1MHZ_6CK_64MS_DEFAULT" value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS" value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS" value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS" value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS" value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS" value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS" value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS" value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS" value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms" name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms" name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms" name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms" name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms" name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms" name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms" name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms" name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms" name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms" name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms" name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms" name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms" name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms" name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms" name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms" name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms" name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms" name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms" name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms" name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms" name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms" name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms" name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms" name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
@@ -633,8 +543,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
                     <bitfield caption="RW" mask="0x10" name="WDTOE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -662,10 +571,8 @@
                     <bitfield caption="External Interrupt Flag 2" mask="0x20" name="INTF2"/>
                 </register>
                 <register caption="General Interrupt Control Register" name="MCUCR" offset="0x55" size="1">
-                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
                     <bitfield caption="Interrupt Sense Control 2" mask="0x40" name="ISC2"/>
@@ -690,8 +597,7 @@
                 <register caption="Timer/Counter Register" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
                 <register caption="Output Compare Register" name="OCR0" offset="0x5C" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
-                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02" name="OCIE0"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -734,8 +640,7 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0x44" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2" offset="0x43" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2" offset="0x43" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0x42" size="1">
                     <bitfield caption="Asynchronous Timer/counter2" mask="0x08" name="AS2"/>
                     <bitfield caption="Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
@@ -758,10 +663,8 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
-                              name="OCIE1A"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
-                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -781,16 +684,12 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -863,8 +762,7 @@
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ"/>
                     <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
                 </register>
-                <register caption="USART Baud Rate Register Hight Byte" name="UBRRH" offset="0x40" size="1"
-                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRRH" offset="0x40" size="1" mask="0x0F"/>
                 <register caption="USART Baud Rate Register Low Byte" name="UBRRL" offset="0x29" size="1" mask="0xFF"/>
             </register-group>
             <value-group caption="" name="COMM_USART_MODE">
@@ -891,16 +789,14 @@
                     <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -923,8 +819,7 @@
                     <bitfield caption="ADC Auto Trigger" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
@@ -935,8 +830,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -987,10 +881,8 @@
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Sleep Enable" mask="0x80" name="SE"/>
                     <bitfield caption="Sleep Mode Select" mask="0x70" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
-                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32C1.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32C1.xml
index 347d182c..0f3eb4ce 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32C1.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32C1.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega32C1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
-                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega32C1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
-                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32C1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32" package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32C1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32" package="QFN32" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega32C1" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
@@ -60,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
@@ -74,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
@@ -88,8 +77,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
@@ -99,14 +87,12 @@
             </module>
             <module name="CAN">
                 <instance name="CAN" caption="Controller Area Network">
-                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
-                                    caption="Controller Area Network"/>
+                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data" caption="Controller Area Network"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="AC" group="ACMP" index="0" pad="PD7"/>
                         <signal function="AC" group="ACMP" index="1" pad="PC6"/>
@@ -121,8 +107,7 @@
             </module>
             <module name="DAC">
                 <instance name="DAC" caption="Digital-to-Analog Converter">
-                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
-                                    caption="Digital-to-Analog Converter"/>
+                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data" caption="Digital-to-Analog Converter"/>
                     <signals>
                         <signal function="DAC" group="D2A" pad="PC7"/>
                     </signals>
@@ -130,8 +115,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -139,8 +123,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="TC0" group="T0" pad="PC2"/>
                         <signal function="TC0" group="OC0A" pad="PD3"/>
@@ -150,8 +133,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal function="TC1" group="T1" pad="PC3"/>
                         <signal function="TC1" group="ICP1A" pad="PD4"/>
@@ -163,8 +145,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PE2"/>
                         <signal function="ADC" group="ADC" index="1" pad="PD4"/>
@@ -182,8 +163,7 @@
             </module>
             <module name="LINUART">
                 <instance name="LINUART" caption="Local Interconnect Network">
-                    <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
-                                    caption="Local Interconnect Network"/>
+                    <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data" caption="Local Interconnect Network"/>
                     <signals>
                         <signal function="LIN" group="TXLIN" pad="PD3"/>
                         <signal function="LIN" group="RXLIN" pad="PD4"/>
@@ -192,8 +172,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal function="SPI" group="MISO" pad="PB0"/>
                         <signal function="SPI_ALT" group="MISO" pad="PD2"/>
@@ -208,14 +187,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXINT" group="INT" index="0" pad="PD6"/>
                         <signal function="EXINT" group="INT" index="1" pad="PB2"/>
@@ -253,26 +230,22 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="ANACOMP0" caption="Analog Comparator 0"/>
             <interrupt index="2" name="ANACOMP1" caption="Analog Comparator 1"/>
             <interrupt index="3" name="ANACOMP2" caption="Analog Comparator 2"/>
@@ -360,8 +333,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -422,8 +394,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -457,8 +428,7 @@
                     <bitfield caption="PSC Reset Behavior" mask="0x20" name="PSCRB"/>
                     <bitfield caption="PSCOUTnA Reset Value" mask="0x10" name="PSCRVA"/>
                     <bitfield caption="PSC0UTnB Reset Value" mask="0x08" name="PSCRVB"/>
-                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
                     <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
@@ -476,112 +446,59 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -691,19 +608,15 @@
                 <register caption="Enable MOb Register 2" name="CANEN2" offset="0xDC" size="1" ocd-rw="R">
                     <bitfield caption="Enable MObs" mask="0x3F" name="ENMOB"/>
                 </register>
-                <register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00"
-                          ocd-rw=""/>
+                <register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00" ocd-rw=""/>
                 <register caption="Enable Interrupt MOb Register 2" name="CANIE2" offset="0xDE" size="1">
                     <bitfield caption="Interrupt Enable  MObs" mask="0x3F" name="IEMOB"/>
                 </register>
-                <register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1"
-                          mask="0x00" ocd-rw=""/>
-                <register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1"
-                          ocd-rw="R">
+                <register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1" mask="0x00" ocd-rw=""/>
+                <register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1" ocd-rw="R">
                     <bitfield caption="Status of Interrupt MObs" mask="0x3F" name="SIT"/>
                 </register>
-                <register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1"
-                          mask="0x00" ocd-rw=""/>
+                <register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1" mask="0x00" ocd-rw=""/>
                 <register caption="CAN Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
                     <bitfield caption="Baud Rate Prescaler bits" mask="0x7E" name="BRP"/>
                 </register>
@@ -725,12 +638,10 @@
                 <register caption="TTC Timer Register" name="CANTTC" offset="0xE8" size="2" mask="0xFFFF" ocd-rw="">
                     <bitfield caption="TTC Timer Count" mask="0xFFFF" name="TIMTTC"/>
                 </register>
-                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
-                          ocd-rw="">
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF" ocd-rw="">
                     <bitfield caption="Transmit Error Counter bits" mask="0xFF" name="TEC"/>
                 </register>
-                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
-                          ocd-rw="">
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF" ocd-rw="">
                     <bitfield caption="Receive Error Counter bits" mask="0xFF" name="REC"/>
                 </register>
                 <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
@@ -807,23 +718,20 @@
                 <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x95" size="1">
                     <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
-                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
                     <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
                 </register>
                 <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x96" size="1">
                     <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
                     <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
-                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
                 </register>
                 <register caption="Analog Comparator 3 Control Register" name="AC3CON" offset="0x97" size="1">
                     <bitfield caption="Analog Comparator 3 Enable Bit" mask="0x80" name="AC3EN"/>
                     <bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
-                    <bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
                 </register>
                 <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
@@ -852,8 +760,7 @@
                 </register>
                 <register caption="DAC Control Register" name="DACON" offset="0x90" size="1">
                     <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
-                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
-                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS" values="ANALOG_DAC_AUTO_TRIGGER"/>
                     <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
                     <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
                     <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
@@ -905,8 +812,7 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
@@ -976,14 +882,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1002,12 +905,10 @@
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 bits" mask="0xFF" name="TCNT0"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare bits" mask="0xFF" name="OCR0A"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF">
                     <bitfield caption="Timer/Counter0 Output Compare bits" mask="0xFF" name="OCR0B"/>
                 </register>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
@@ -1031,14 +932,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -1053,8 +951,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
@@ -1063,16 +960,13 @@
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare bits" mask="0xFFFF" name="OCR1A"/>
                 </register>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Output Compare bits" mask="0xFFFF" name="OCR1B"/>
                 </register>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF">
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF">
                     <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
                 </register>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
@@ -1113,8 +1007,7 @@
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
                     <bitfield caption="Current Source Enable" mask="0x40" name="ISRCEN"/>
                     <bitfield caption="Analog Reference pin Enable" mask="0x20" name="AREFEN"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
@@ -1293,8 +1186,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1315,14 +1207,10 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32M1.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32M1.xml
index 56345c4b..ddb02744 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32M1.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32M1.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega32M1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
-                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega32M1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
-                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32M1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32" package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32M1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32" package="QFN32" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega32M1" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
@@ -60,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
@@ -74,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
@@ -88,8 +77,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
@@ -99,14 +87,12 @@
             </module>
             <module name="CAN">
                 <instance name="CAN" caption="Controller Area Network">
-                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
-                                    caption="Controller Area Network"/>
+                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data" caption="Controller Area Network"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="AC" group="ACMP" index="0" pad="PD7"/>
                         <signal function="AC" group="ACMP" index="1" pad="PC6"/>
@@ -121,8 +107,7 @@
             </module>
             <module name="DAC">
                 <instance name="DAC" caption="Digital-to-Analog Converter">
-                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
-                                    caption="Digital-to-Analog Converter"/>
+                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data" caption="Digital-to-Analog Converter"/>
                     <signals>
                         <signal function="DAC" group="D2A" pad="PC7"/>
                     </signals>
@@ -130,8 +115,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -139,8 +123,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="TC0" group="T0" pad="PC2"/>
                         <signal function="TC0" group="OC0A" pad="PD3"/>
@@ -150,8 +133,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal function="TC1" group="T1" pad="PC3"/>
                         <signal function="TC1" group="ICP1A" pad="PD4"/>
@@ -163,8 +145,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PE2"/>
                         <signal function="ADC" group="ADC" index="1" pad="PD4"/>
@@ -182,8 +163,7 @@
             </module>
             <module name="LINUART">
                 <instance name="LINUART" caption="Local Interconnect Network">
-                    <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
-                                    caption="Local Interconnect Network"/>
+                    <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data" caption="Local Interconnect Network"/>
                     <signals>
                         <signal function="LIN" group="TXLIN" pad="PD3"/>
                         <signal function="LIN" group="RXLIN" pad="PD4"/>
@@ -192,8 +172,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal function="SPI" group="MISO" pad="PB0"/>
                         <signal function="SPI_ALT" group="MISO" pad="PD2"/>
@@ -208,14 +187,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXINT" group="INT" index="0" pad="PD6"/>
                         <signal function="EXINT" group="INT" index="1" pad="PB2"/>
@@ -253,14 +230,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PSC">
                 <instance name="PSC" caption="Power Stage Controller">
-                    <register-group name="PSC" name-in-module="PSC" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC" name-in-module="PSC" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                     <signals>
                         <signal function="PSC" group="PSCIN2" pad="PD2"/>
                         <signal function="PSC" group="PSCOUT2A" pad="PB0"/>
@@ -276,20 +251,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="ANACOMP0" caption="Analog Comparator 0"/>
             <interrupt index="2" name="ANACOMP1" caption="Analog Comparator 1"/>
             <interrupt index="3" name="ANACOMP2" caption="Analog Comparator 2"/>
@@ -377,8 +349,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -439,8 +410,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -474,8 +444,7 @@
                     <bitfield caption="PSC Reset Behavior" mask="0x20" name="PSCRB"/>
                     <bitfield caption="PSCOUTnA Reset Value" mask="0x10" name="PSCRVA"/>
                     <bitfield caption="PSC0UTnB Reset Value" mask="0x08" name="PSCRVB"/>
-                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
                     <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
@@ -493,112 +462,59 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -708,19 +624,15 @@
                 <register caption="Enable MOb Register 2" name="CANEN2" offset="0xDC" size="1" ocd-rw="R">
                     <bitfield caption="Enable MObs" mask="0x3F" name="ENMOB"/>
                 </register>
-                <register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00"
-                          ocd-rw=""/>
+                <register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00" ocd-rw=""/>
                 <register caption="Enable Interrupt MOb Register 2" name="CANIE2" offset="0xDE" size="1">
                     <bitfield caption="Interrupt Enable  MObs" mask="0x3F" name="IEMOB"/>
                 </register>
-                <register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1"
-                          mask="0x00" ocd-rw=""/>
-                <register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1"
-                          ocd-rw="R">
+                <register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1" mask="0x00" ocd-rw=""/>
+                <register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1" ocd-rw="R">
                     <bitfield caption="Status of Interrupt MObs" mask="0x3F" name="SIT"/>
                 </register>
-                <register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1"
-                          mask="0x00" ocd-rw=""/>
+                <register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1" mask="0x00" ocd-rw=""/>
                 <register caption="CAN Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
                     <bitfield caption="Baud Rate Prescaler bits" mask="0x7E" name="BRP"/>
                 </register>
@@ -736,10 +648,8 @@
                 <register caption="Timer Control Register" name="CANTCON" offset="0xE5" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="Timer Register" name="CANTIM" offset="0xE6" size="2" mask="0xFFFF" ocd-rw=""/>
                 <register caption="TTC Timer Register" name="CANTTC" offset="0xE8" size="2" mask="0xFFFF" ocd-rw=""/>
-                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
-                          ocd-rw="R"/>
-                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
-                          ocd-rw="R"/>
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
                     <bitfield caption="Highest Priority MOb Number bits" mask="0xF0" name="HPMOB"/>
                     <bitfield caption="CAN General Purpose bits" mask="0x0F" name="CGP"/>
@@ -810,23 +720,20 @@
                 <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x95" size="1">
                     <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
-                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
                     <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
                 </register>
                 <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x96" size="1">
                     <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
                     <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
-                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
                 </register>
                 <register caption="Analog Comparator 3 Control Register" name="AC3CON" offset="0x97" size="1">
                     <bitfield caption="Analog Comparator 3 Enable Bit" mask="0x80" name="AC3EN"/>
                     <bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
-                    <bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
                 </register>
                 <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
@@ -854,8 +761,7 @@
                 </register>
                 <register caption="DAC Control Register" name="DACON" offset="0x90" size="1">
                     <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
-                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
-                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS" values="ANALOG_DAC_AUTO_TRIGGER"/>
                     <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
                     <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
                     <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
@@ -907,14 +813,12 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
                     <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
@@ -979,14 +883,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1003,10 +904,8 @@
                     <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Timer/Counter1 Input Capture Selection" mask="0x40" name="ICPSEL1"/>
@@ -1028,14 +927,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -1050,20 +946,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Timer/Counter1 Input Capture Selection" mask="0x40" name="ICPSEL1"/>
@@ -1101,8 +993,7 @@
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
                     <bitfield caption="Current Source Enable" mask="0x40" name="ISRCEN"/>
                     <bitfield caption="Analog Reference pin Enable" mask="0x20" name="AREFEN"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
@@ -1279,8 +1170,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1301,14 +1191,10 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
@@ -1419,26 +1305,16 @@
                     <bitfield caption="Selection of Synchronization Out for ADC" mask="0x0C" name="PSYNC1"/>
                     <bitfield caption="Selection of Synchronization Out for ADC" mask="0x03" name="PSYNC0"/>
                 </register>
-                <register caption="PSC Output Compare RB Register " name="POCR_RB" offset="0xB2" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Module 2 Output Compare SB Register " name="POCR2SB" offset="0xB0" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Module 2 Output Compare RA Register " name="POCR2RA" offset="0xAE" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Module 2 Output Compare SA Register " name="POCR2SA" offset="0xAC" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Module 1 Output Compare SB Register " name="POCR1SB" offset="0xAA" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Module 1 Output Compare RA Register " name="POCR1RA" offset="0xA8" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Output Compare SA Register " name="POCR1SA" offset="0xA6" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Output Compare SB Register " name="POCR0SB" offset="0xA4" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Module 0 Output Compare RA Register " name="POCR0RA" offset="0xA2" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Module 0 Output Compare SA Register " name="POCR0SA" offset="0xA0" size="2"
-                          mask="0x0FFF"/>
+                <register caption="PSC Output Compare RB Register " name="POCR_RB" offset="0xB2" size="2" mask="0x0FFF"/>
+                <register caption="PSC Module 2 Output Compare SB Register " name="POCR2SB" offset="0xB0" size="2" mask="0x0FFF"/>
+                <register caption="PSC Module 2 Output Compare RA Register " name="POCR2RA" offset="0xAE" size="2" mask="0x0FFF"/>
+                <register caption="PSC Module 2 Output Compare SA Register " name="POCR2SA" offset="0xAC" size="2" mask="0x0FFF"/>
+                <register caption="PSC Module 1 Output Compare SB Register " name="POCR1SB" offset="0xAA" size="2" mask="0x0FFF"/>
+                <register caption="PSC Module 1 Output Compare RA Register " name="POCR1RA" offset="0xA8" size="2" mask="0x0FFF"/>
+                <register caption="PSC Output Compare SA Register " name="POCR1SA" offset="0xA6" size="2" mask="0x0FFF"/>
+                <register caption="PSC Output Compare SB Register " name="POCR0SB" offset="0xA4" size="2" mask="0x0FFF"/>
+                <register caption="PSC Module 0 Output Compare RA Register " name="POCR0RA" offset="0xA2" size="2" mask="0x0FFF"/>
+                <register caption="PSC Module 0 Output Compare SA Register " name="POCR0SA" offset="0xA0" size="2" mask="0x0FFF"/>
             </register-group>
         </module>
     </modules>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U2.xml
index 60f47274..61297dca 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U2.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega32U2-AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="TQFP32" pinout="QFP32"/>
-        <variant ordercode="ATmega32U2-MU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="QFN32" pinout="QFP32"/>
+        <variant ordercode="ATmega32U2-AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5" package="TQFP32" pinout="QFP32"/>
+        <variant ordercode="ATmega32U2-MU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5" package="QFN32" pinout="QFP32"/>
     </variants>
     <device name="ATmega32U2" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -60,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -74,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -90,8 +79,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="MISO" pad="PB3" function="default"/>
                         <signal group="MOSI" pad="PB2" function="default"/>
@@ -102,20 +90,17 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="OCA" pad="PB7" function="default"/>
                         <signal group="OCB" pad="PD0" function="default"/>
@@ -125,8 +110,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="ICP" pad="PC7" function="default"/>
                         <signal group="OCA" pad="PC6" function="default"/>
@@ -138,20 +122,17 @@
             </module>
             <module name="PLL">
                 <instance name="PLL" caption="Phase Locked Loop">
-                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
-                                    caption="Phase Locked Loop"/>
+                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data" caption="Phase Locked Loop"/>
                 </instance>
             </module>
             <module name="USB_DEVICE">
                 <instance name="USB_DEVICE" caption="USB Device Registers">
-                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
-                                    caption="USB Device Registers"/>
+                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data" caption="USB Device Registers"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V3"/>
                     </parameters>
@@ -159,8 +140,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="0" pad="PD0" function="default"/>
                         <signal group="INT" index="1" pad="PD1" function="default"/>
@@ -188,8 +168,7 @@
             </module>
             <module name="USART">
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" pad="PD2" function="default"/>
                         <signal group="TXD" pad="PD3" function="default"/>
@@ -201,14 +180,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" pad="PD1" function="default"/>
                         <signal group="AIN" index="1" pad="PD2" function="default"/>
@@ -222,20 +199,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -321,8 +295,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -383,8 +356,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -415,8 +387,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF4">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
@@ -441,94 +412,50 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
@@ -662,10 +589,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -679,14 +604,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -719,8 +641,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -728,26 +649,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -787,12 +700,10 @@
                     <bitfield caption="D+ Input value" mask="0x02" name="DPI"/>
                     <bitfield caption="D- Input value" mask="0x01" name="DMI"/>
                 </register>
-                <register caption="USB Endpoint Number Interrupt Register" name="UEINT" offset="0xF4" size="1"
-                          mask="0x1F">
+                <register caption="USB Endpoint Number Interrupt Register" name="UEINT" offset="0xF4" size="1" mask="0x1F">
                     <bitfield caption="Byte Count bits" mask="0x1F" name="EPINT"/>
                 </register>
-                <register caption="USB Endpoint Byte Count Register" name="UEBCLX" offset="0xF2" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="USB Endpoint Byte Count Register" name="UEBCLX" offset="0xF2" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Byte Count bits" mask="0xFF" name="BYCT"/>
                 </register>
                 <register caption="USB Data Endpoint" name="UEDATX" offset="0xF1" size="1" mask="0xFF" ocd-rw="">
@@ -852,8 +763,7 @@
                 <register caption="USB Device Micro Frame Number" name="UDMFN" offset="0xE6" size="1" ocd-rw="R">
                     <bitfield caption="Frame Number CRC Error Flag" mask="0x10" name="FNCERR"/>
                 </register>
-                <register caption="USB Device Frame Number High Register" name="UDFNUM" offset="0xE4" size="2"
-                          mask="0x07FF">
+                <register caption="USB Device Frame Number High Register" name="UDFNUM" offset="0xE4" size="2" mask="0x07FF">
                     <bitfield caption="Frame Number Upper Flag" mask="0x07FF" name="FNUM"/>
                 </register>
                 <register caption="USB Device Address Register" name="UDADDR" offset="0xE3" size="1">
@@ -915,8 +825,7 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
@@ -968,8 +877,7 @@
                     <bitfield caption="" mask="0x04" name="EXTE"/>
                     <bitfield caption="" mask="0x01" name="CLKS"/>
                 </register>
-                <register caption="debugWire communication register" name="DWDR" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw=""/>
+                <register caption="debugWire communication register" name="DWDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
             </register-group>
             <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
                 <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
@@ -1074,20 +982,17 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Analog Comparator Input Multiplexer" name="ACMUX" offset="0x7D" size="1">
-                    <bitfield caption="Analog Comparator Selection Bits" mask="0x07" name="CMUX"
-                              values="ANALOG_COMP_SELECTION_BITS"/>
+                    <bitfield caption="Analog Comparator Selection Bits" mask="0x07" name="CMUX" values="ANALOG_COMP_SELECTION_BITS"/>
                 </register>
                 <register caption="" name="DIDR1" offset="0x7F" size="1" ocd-rw="W">
                     <bitfield caption="AIN7 Digital Input Disable" mask="0x80" name="AIN7D"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U4.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U4.xml
index 49302de1..635b797f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U4.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U4.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega32U4-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega32U4RC-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega32U4-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN44" package="QFN44"
-                 vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega32U4RC-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN44"
-                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32U4-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32U4RC-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32U4-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN44" package="QFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32U4RC-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN44" package="QFN44" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega32U4" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0a00" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -50,14 +40,12 @@
         <peripherals>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -70,16 +58,14 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC6" index="6"/>
                         <signal group="P" function="default" pad="PC7" index="7"/>
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -92,16 +78,14 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE2" index="2"/>
                         <signal group="P" function="default" pad="PE6" index="6"/>
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -113,8 +97,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="SCK" function="default" pad="PB1"/>
@@ -127,8 +110,7 @@
             </module>
             <module name="USART">
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -140,8 +122,7 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                     <signals>
                         <signal group="HWB" function="default" pad="PE2"/>
                     </signals>
@@ -149,14 +130,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PD0"/>
@@ -166,8 +145,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD6"/>
                         <signal group="ICP" function="default" pad="PD4"/>
@@ -177,8 +155,7 @@
                     </signals>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="ICP" function="default" pad="PC7"/>
                         <signal group="OCA" function="default" pad="PC6"/>
@@ -187,8 +164,7 @@
             </module>
             <module name="TC10">
                 <instance name="TC4" caption="Timer/Counter, 10-bit">
-                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 10-bit"/>
+                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 10-bit"/>
                     <signals>
                         <signal group="_OCA" function="default" pad="PC6"/>
                         <signal group="OCA" function="default" pad="PC7"/>
@@ -201,8 +177,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -213,8 +188,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PB0"/>
                         <signal group="PCINT" index="1" function="default" pad="PB1"/>
@@ -234,8 +208,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PD1"/>
                         <signal group="SCL" function="default" pad="PD0"/>
@@ -244,8 +217,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -264,8 +236,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE6"/>
                     </signals>
@@ -273,8 +244,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PC7"/>
                     </signals>
@@ -285,32 +255,27 @@
             </module>
             <module name="PLL">
                 <instance name="PLL" caption="Phase Locked Loop">
-                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
-                                    caption="Phase Locked Loop"/>
+                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data" caption="Phase Locked Loop"/>
                 </instance>
             </module>
             <module name="USB_DEVICE">
                 <instance name="USB_DEVICE" caption="USB Device Registers">
-                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
-                                    caption="USB Device Registers"/>
+                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data" caption="USB Device Registers"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -410,8 +375,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -472,8 +436,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -504,8 +467,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFB">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -530,94 +492,50 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
@@ -667,8 +585,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -828,10 +745,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -845,14 +760,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -914,25 +826,17 @@
                 </register>
                 <register caption="Timer/Counter4 Low Bytes" name="TCNT4" offset="0xBE" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter4" name="TC4H" offset="0xBF" size="1" mask="0x07"/>
-                <register caption="Timer/Counter4 Output Compare Register A" name="OCR4A" offset="0xCF" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B" name="OCR4B" offset="0xD0" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter4 Output Compare Register C" name="OCR4C" offset="0xD1" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter4 Output Compare Register D" name="OCR4D" offset="0xD2" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A" name="OCR4A" offset="0xCF" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B" name="OCR4B" offset="0xD0" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C" name="OCR4C" offset="0xD1" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter4 Output Compare Register D" name="OCR4D" offset="0xD2" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
-                    <bitfield caption="Timer/Counter4 Output Compare D Match Interrupt Enable" mask="0x80"
-                              name="OCIE4D"/>
-                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x40"
-                              name="OCIE4A"/>
-                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x20"
-                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare D Match Interrupt Enable" mask="0x80" name="OCIE4D"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x40" name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x20" name="OCIE4B"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x04" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 4D" mask="0x80" name="OCF4D"/>
                     <bitfield caption="Output Compare Flag 4A" mask="0x40" name="OCF4A"/>
                     <bitfield caption="Output Compare Flag 4B" mask="0x20" name="OCF4B"/>
@@ -955,8 +859,7 @@
                     <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
                     <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
@@ -964,26 +867,18 @@
                     <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
@@ -1002,8 +897,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -1011,26 +905,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -1051,8 +937,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1064,24 +949,16 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1149,15 +1026,13 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x20" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x17" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x17" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
@@ -1182,8 +1057,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -1211,16 +1085,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA406.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA406.xml
index ec5e91ec..c89a456c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA406.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA406.xml
@@ -6,16 +6,11 @@
     <device name="ATmega406" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0xa000">
-                <memory-segment start="0x0000" size="0xa000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x9e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x9c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x9800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x9000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0xa000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x9e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x9c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x9800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x9000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,64 +27,54 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
         </address-spaces>
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="WAKEUP_TIMER">
                 <instance name="WAKEUP_TIMER" caption="Wakeup Timer">
-                    <register-group name="WAKEUP_TIMER" name-in-module="WAKEUP_TIMER" offset="0x00"
-                                    address-space="data" caption="Wakeup Timer"/>
+                    <register-group name="WAKEUP_TIMER" name-in-module="WAKEUP_TIMER" offset="0x00" address-space="data" caption="Wakeup Timer"/>
                 </instance>
             </module>
             <module name="BATTERY_PROTECTION">
                 <instance name="BATTERY_PROTECTION" caption="Battery Protection">
-                    <register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
-                                    address-space="data" caption="Battery Protection"/>
+                    <register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00" address-space="data" caption="Battery Protection"/>
                 </instance>
             </module>
             <module name="FET">
                 <instance name="FET" caption="FET Control">
-                    <register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
-                                    caption="FET Control"/>
+                    <register-group name="FET" name-in-module="FET" offset="0x00" address-space="data" caption="FET Control"/>
                 </instance>
             </module>
             <module name="COULOMB_COUNTER">
                 <instance name="COULOMB_COUNTER" caption="Coulomb Counter">
-                    <register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
-                                    address-space="data" caption="Coulomb Counter"/>
+                    <register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00" address-space="data" caption="Coulomb Counter"/>
                 </instance>
             </module>
             <module name="CELL_BALANCING">
                 <instance name="CELL_BALANCING" caption="Cell Balancing">
-                    <register-group name="CELL_BALANCING" name-in-module="CELL_BALANCING" offset="0x00"
-                                    address-space="data" caption="Cell Balancing"/>
+                    <register-group name="CELL_BALANCING" name-in-module="CELL_BALANCING" offset="0x00" address-space="data" caption="Cell Balancing"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -97,20 +82,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -123,8 +105,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -137,15 +118,13 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -154,44 +133,37 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                 </instance>
             </module>
             <module name="BANDGAP">
                 <instance name="BANDGAP" caption="Bandgap">
-                    <register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
-                                    caption="Bandgap"/>
+                    <register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data" caption="Bandgap"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
             <interrupt index="2" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="3" name="INT1" caption="External Interrupt Request 1"/>
@@ -235,8 +207,7 @@
                 <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -325,8 +296,7 @@
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
                 </register>
                 <register caption="VADC Data Register Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF"/>
-                <register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
                     <bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
                     <bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
@@ -337,14 +307,10 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 3 Bits" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 3 Bits" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x0F" name="INT"/>
@@ -375,16 +341,13 @@
                     <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer Counter 1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Output Compare Register 1A Low byte" name="OCR1AL" offset="0x88" size="1"
-                          mask="0xFF"/>
-                <register caption="Output Compare Register 1A High byte" name="OCR1AH" offset="0x89" size="1"
-                          mask="0xFF"/>
+                <register caption="Output Compare Register 1A Low byte" name="OCR1AL" offset="0x88" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register 1A High byte" name="OCR1AH" offset="0x89" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Output Compare Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
                 </register>
@@ -412,8 +375,7 @@
                     <bitfield caption="Wake-up timer Calibration Flag" mask="0x20" name="WUTCF"/>
                     <bitfield caption="Wake-up Timer Reset" mask="0x10" name="WUTR"/>
                     <bitfield caption="Wake-up Timer Enable" mask="0x08" name="WUTE"/>
-                    <bitfield caption="Wake-up Timer Prescaler Bits" mask="0x07" name="WUTP"
-                              values="CLK_SEL_3BIT_ONLY_PRESCALE"/>
+                    <bitfield caption="Wake-up Timer Prescaler Bits" mask="0x07" name="WUTP" values="CLK_SEL_3BIT_ONLY_PRESCALE"/>
                 </register>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_ONLY_PRESCALE">
@@ -429,8 +391,7 @@
         </module>
         <module caption="Battery Protection" name="BATTERY_PROTECTION">
             <register-group caption="Battery Protection" name="BATTERY_PROTECTION">
-                <register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xF8" size="1"
-                          ocd-rw="R">
+                <register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xF8" size="1" ocd-rw="R">
                     <bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
                     <bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
                 </register>
@@ -444,13 +405,11 @@
                     <bitfield caption="" mask="0xF0" name="SCPT" values="BAT_SHORT_CIRC_DELAY"/>
                     <bitfield caption="" mask="0x0F" name="OCPT" values="BAT_OVER_CURRENT_DELAY"/>
                 </register>
-                <register caption="Battery Protection OverCurrent Detection Level Register" name="BPOCD" offset="0xF5"
-                          size="1">
+                <register caption="Battery Protection OverCurrent Detection Level Register" name="BPOCD" offset="0xF5" size="1">
                     <bitfield caption="" mask="0xF0" name="DCDL" values="BAT_VOLT_SENSE"/>
                     <bitfield caption="" mask="0x0F" name="CCDL" values="BAT_VOLT_SENSE"/>
                 </register>
-                <register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF4"
-                          size="1">
+                <register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF4" size="1">
                     <bitfield caption="" mask="0x0F" name="SCDL" values="BAT_VOLT_SENSE2"/>
                 </register>
                 <register caption="Battery Protection Deep Under Voltage Register" name="BPDUV" offset="0xF3" size="1">
@@ -459,8 +418,7 @@
                 </register>
                 <register caption="Battery Protection Interrupt Register" name="BPIR" offset="0xF2" size="1" ocd-rw="R">
                     <bitfield caption="Deep Under-voltage Early Warning Interrupt Flag" mask="0x80" name="DUVIF"/>
-                    <bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x40"
-                              name="COCIF"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x40" name="COCIF"/>
                     <bitfield caption="" mask="0x20" name="DOCIF"/>
                     <bitfield caption="" mask="0x10" name="SCIF"/>
                     <bitfield caption="Deep Under-voltage Early Warning Interrupt Enable" mask="0x08" name="DUVIE"/>
@@ -581,21 +539,13 @@
         <module caption="Coulomb Counter" name="COULOMB_COUNTER">
             <register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
                 <register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE4" size="1">
-                    <bitfield
-                            caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
-                            mask="0x80" name="CADEN"/>
+                    <bitfield caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled." mask="0x80" name="CADEN"/>
                     <bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
-                    <bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"
-                              values="ANALOG_CADA_ACC_TIME"/>
-                    <bitfield
-                            caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
-                            mask="0x06" name="CADSI" values="ANALOG_CADA_ACC_TIME"/>
-                    <bitfield
-                            caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
-                            mask="0x01" name="CADSE"/>
+                    <bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS" values="ANALOG_CADA_ACC_TIME"/>
+                    <bitfield caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined." mask="0x06" name="CADSI" values="ANALOG_CADA_ACC_TIME"/>
+                    <bitfield caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode." mask="0x01" name="CADSE"/>
                 </register>
-                <register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE5" size="1"
-                          ocd-rw="R">
+                <register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE5" size="1" ocd-rw="R">
                     <bitfield caption="" mask="0x40" name="CADACIE"/>
                     <bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
                     <bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
@@ -651,8 +601,7 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1"
-                          mask="0xFF"/>
+                <register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1" mask="0xFF"/>
                 <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
                     <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS3"/>
                     <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
@@ -688,8 +637,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -732,8 +680,7 @@
                     <bitfield caption="Output Compare Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Output Compare Flag" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Overflow Flag" mask="0x01" name="TOV0"/>
@@ -789,8 +736,7 @@
                 <register caption="TWI Bus Control and Status Register" name="TWBCSR" offset="0xBE" size="1">
                     <bitfield caption="TWI Bus Connect/Disconnect Interrupt Flag" mask="0x80" name="TWBCIF"/>
                     <bitfield caption="TWI Bus Connect/Disconnect Interrupt Enable" mask="0x40" name="TWBCIE"/>
-                    <bitfield caption="TWI Bus Disconnect Time-out Period" mask="0x06" name="TWBDT"
-                              values="COMM_TW_BUS_TIMEOUT"/>
+                    <bitfield caption="TWI Bus Disconnect Time-out Period" mask="0x06" name="TWBDT" values="COMM_TW_BUS_TIMEOUT"/>
                     <bitfield caption="TWI Bus Connect/Disconnect Interrupt Polarity" mask="0x01" name="TWBCIP"/>
                 </register>
                 <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
@@ -831,12 +777,9 @@
         </module>
         <module caption="Bandgap" name="BANDGAP">
             <register-group caption="Bandgap" name="BANDGAP">
-                <register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
-                          mask="0xFF"/>
+                <register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1" mask="0xFF"/>
                 <register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
-                    <bitfield
-                            caption="Setting the BGD bit to one will disable the bandgap voltage reference. This bit must be cleared before enabling CC-ADC or V-ADC, and must remain unset while either ADC is enabled."
-                            mask="0x80" name="BGD"/>
+                    <bitfield caption="Setting the BGD bit to one will disable the bandgap voltage reference. This bit must be cleared before enabling CC-ADC or V-ADC, and must remain unset while either ADC is enabled." mask="0x80" name="BGD"/>
                     <bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48.xml
index 8a857e87..24534333 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48.xml
@@ -1,32 +1,21 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega48V-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48V-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32"
-                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48V-10MMU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN28"
-                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48V-10MMH" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN28"
-                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48V-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega48-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
-                 vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega48-20MMU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
-                 package="QFN28" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega48-20MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
-                 package="QFN28" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega48-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48V-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48V-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48V-10MMU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN28" package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48V-10MMH" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN28" package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48V-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48-20MMU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48-20MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega48" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,8 +32,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -54,8 +42,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -65,8 +52,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -75,8 +61,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -87,8 +72,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -97,8 +81,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -111,8 +94,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
                         <signal group="AIN" index="1" function="default" pad="PD7"/>
@@ -121,8 +103,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -135,8 +116,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -148,8 +128,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -164,8 +143,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -175,8 +153,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -208,8 +185,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -220,8 +196,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -232,32 +207,27 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -340,8 +310,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -402,8 +371,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -429,8 +397,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -469,8 +436,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -479,116 +445,61 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -693,14 +604,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -715,20 +623,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -748,14 +652,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -772,10 +673,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -806,24 +705,20 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX"
-                              values="ADC_MUX_SINGLE_NO_TEMP"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE_NO_TEMP"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -838,8 +733,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE_NO_TEMP">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -876,16 +770,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -918,10 +810,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -935,14 +825,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -966,10 +853,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1040,14 +925,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1116,8 +999,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA4808.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA4808.xml
index ea302335..554bdd29 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA4808.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA4808.xml
@@ -1,36 +1,25 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega4808-AFR" package="TQFP32" pinout="QFP32" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
-        <variant ordercode="ATmega4808-MFR" package="VQFN32" pinout="QFN32" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
-        <variant ordercode="ATmega4808-XFR" package="SSOP28" pinout="SSOP28" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega4808-AFR" package="TQFP32" pinout="QFP32" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega4808-MFR" package="VQFN32" pinout="QFN32" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega4808-XFR" package="SSOP28" pinout="SSOP28" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
     </variants>
     <device name="ATmega4808" family="AVR8" architecture="AVR8X" avr-family="AVR MEGA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1800" start="0x2800" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0xC000"
-                                start="0x00004000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40"
-                                start="0x00001300" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0xC000" start="0x00004000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0xC000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0xC000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0xC000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -80,8 +69,7 @@
                         <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
@@ -91,13 +79,11 @@
                         <signal function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1" pad="PD6"/>
                         <signal function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
                         <signal function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
-                                pad="PF6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1" pad="PF6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
                     </signals>
                 </instance>
@@ -135,18 +121,12 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -491,10 +471,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -552,10 +530,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -576,8 +552,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -672,23 +647,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -729,14 +699,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
@@ -749,14 +715,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -766,14 +729,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -783,14 +743,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -800,14 +757,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
@@ -934,8 +888,7 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
                 </register>
                 <register caption="OSC20M Calibration B" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
@@ -983,8 +936,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1012,12 +964,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1051,66 +1001,51 @@
         <module caption="Event System" id="I2600" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
-                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
-                              values="EVSYS_STROBE0"/>
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W" values="EVSYS_STROBE0"/>
                 </register>
                 <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
                 <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
@@ -1227,16 +1162,12 @@
         </module>
         <module caption="Fuses" id="I2600" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1246,16 +1177,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1283,11 +1212,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1461,8 +1388,7 @@
                     <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
                     <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
                 </register>
-                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
                     <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
                     <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
@@ -1479,21 +1405,15 @@
                     <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
                     <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
                 </register>
-                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
-                          rw="RW" size="1">
-                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
-                              values="PORTMUX_USART1"/>
-                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
-                              values="PORTMUX_USART2"/>
-                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
-                              values="PORTMUX_USART3"/>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW" values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW" values="PORTMUX_USART3"/>
                 </register>
             </register-group>
             <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
@@ -1618,12 +1538,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1685,16 +1603,11 @@
                 <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
                 <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
                 <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
-                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R" size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R" size="1"/>
                 <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
                 <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
                 <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
@@ -1709,10 +1622,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1808,8 +1719,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1922,8 +1832,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1959,8 +1868,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2035,10 +1943,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2050,8 +1956,7 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -2151,15 +2056,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2174,19 +2077,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -2209,8 +2108,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2228,8 +2126,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2361,10 +2258,8 @@
         <module caption="Voltage reference" id="I2600" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
-                              values="VREF_AC0REFSEL"/>
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW" values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA4809.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA4809.xml
index 6fb53f04..a52d2ade 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA4809.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA4809.xml
@@ -1,36 +1,25 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega4809-AFR" package="TQFP48" pinout="QFP48" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
-        <variant ordercode="ATmega4809-MFR" package="UQFN48" pinout="QFN48" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
-        <variant ordercode="ATmega4809-PF" package="PDIP40" pinout="PDIP40" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega4809-AFR" package="TQFP48" pinout="QFP48" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega4809-MFR" package="UQFN48" pinout="QFN48" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega4809-PF" package="PDIP40" pinout="PDIP40" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
     </variants>
     <device name="ATmega4809" family="AVR8" architecture="AVR8X" avr-family="AVR MEGA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1800" start="0x2800" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0xC000"
-                                start="0x00004000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40"
-                                start="0x00001300" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0xC000" start="0x00004000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0xC000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0xC000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0xC000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -84,26 +73,22 @@
                         <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
-                                pad="PC6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal function="CCL" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1" pad="PD6"/>
                         <signal function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
                         <signal function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
-                                pad="PF6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1" pad="PF6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
                     </signals>
                 </instance>
@@ -141,24 +126,15 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2" pad="PC7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4" pad="PE2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -564,10 +540,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -625,10 +599,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -649,8 +621,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -745,23 +716,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -802,14 +768,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
@@ -822,14 +784,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -839,14 +798,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -856,14 +812,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -873,14 +826,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
@@ -1007,8 +957,7 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
                 </register>
                 <register caption="OSC20M Calibration B" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
@@ -1056,8 +1005,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1085,12 +1033,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1124,74 +1070,57 @@
         <module caption="Event System" id="I2600" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
-                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
-                              values="EVSYS_STROBE0"/>
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W" values="EVSYS_STROBE0"/>
                 </register>
                 <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
                 <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
@@ -1310,16 +1239,12 @@
         </module>
         <module caption="Fuses" id="I2600" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1329,16 +1254,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1366,11 +1289,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1544,8 +1465,7 @@
                     <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
                     <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
                 </register>
-                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
                     <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
                     <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
@@ -1562,21 +1482,15 @@
                     <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
                     <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
                 </register>
-                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
-                          rw="RW" size="1">
-                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
-                              values="PORTMUX_USART1"/>
-                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
-                              values="PORTMUX_USART2"/>
-                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
-                              values="PORTMUX_USART3"/>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW" values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW" values="PORTMUX_USART3"/>
                 </register>
             </register-group>
             <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
@@ -1708,12 +1622,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1775,16 +1687,11 @@
                 <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
                 <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
                 <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
-                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R" size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R" size="1"/>
                 <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
                 <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
                 <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
@@ -1799,10 +1706,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1898,8 +1803,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2012,8 +1916,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2049,8 +1952,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2125,10 +2027,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2140,8 +2040,7 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -2241,15 +2140,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2264,19 +2161,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -2299,8 +2192,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2318,8 +2210,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2451,10 +2342,8 @@
         <module caption="Voltage reference" id="I2600" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
-                              values="VREF_AC0REFSEL"/>
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW" values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48A.xml
index 8d0973d7..55b8106a 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48A.xml
@@ -1,20 +1,15 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega48A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48A-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28"
-                 vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
-                 vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48A-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega48A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -31,8 +26,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -42,8 +36,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -53,8 +46,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -63,8 +55,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -75,8 +66,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -85,8 +75,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -99,8 +88,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
                         <signal group="AIN" index="1" function="default" pad="PD7"/>
@@ -109,8 +97,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -123,8 +110,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -136,8 +122,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -152,8 +137,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -163,8 +147,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -196,8 +179,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -208,20 +190,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -232,20 +211,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -328,8 +304,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -390,8 +365,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -417,8 +391,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -457,8 +430,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -467,116 +439,61 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -681,14 +598,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -703,20 +617,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -736,14 +646,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -760,10 +667,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -797,20 +702,17 @@
                     <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -825,8 +727,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -864,16 +765,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -906,10 +805,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -923,14 +820,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -954,10 +848,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1022,8 +914,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1074,14 +965,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1094,8 +983,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48P.xml
index a9abc6c3..4daff1c3 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48P.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega48PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48PV-10MMU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN28"
-                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32"
-                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega48P-20MMU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
-                 package="QFN28" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega48P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32"
-                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega48P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PV-10MMU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN28" package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48P-20MMU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega48P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -50,8 +40,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -61,8 +50,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -71,8 +59,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -83,8 +70,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -93,8 +79,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -107,8 +92,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
                         <signal group="AIN" index="1" function="default" pad="PD7"/>
@@ -117,8 +101,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -131,8 +114,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -144,8 +126,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -160,8 +141,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -171,8 +151,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -204,8 +183,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -216,20 +194,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -240,20 +215,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -336,8 +308,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -398,8 +369,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -425,8 +395,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -465,8 +434,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -475,116 +443,61 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -689,14 +602,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -711,20 +621,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -744,14 +650,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -768,10 +671,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -805,20 +706,17 @@
                     <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -833,8 +731,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -872,16 +769,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -914,10 +809,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -931,14 +824,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -962,10 +852,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1030,8 +918,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1078,14 +965,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1098,8 +983,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48PA.xml
index c2185efd..575281cc 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48PA.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega48PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48PA-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
-                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
-                 vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48PA-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48PA-MMN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN28"
-                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN32"
-                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48PA-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-MMN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN28" package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega48PA" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -50,8 +40,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -61,8 +50,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -71,8 +59,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -83,8 +70,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -93,8 +79,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -107,8 +92,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
                         <signal group="AIN" index="1" function="default" pad="PD7"/>
@@ -117,8 +101,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -131,8 +114,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -144,8 +126,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -160,8 +141,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -171,8 +151,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -204,8 +183,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -216,20 +194,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -240,20 +215,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -336,8 +308,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -398,8 +369,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -425,8 +395,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -465,8 +434,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -475,116 +443,61 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -689,14 +602,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -711,20 +621,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -744,14 +650,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -768,10 +671,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -805,20 +706,17 @@
                     <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -833,8 +731,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -872,16 +769,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -914,10 +809,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -931,14 +824,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -962,10 +852,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1030,8 +918,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1082,14 +969,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1102,8 +987,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48PB.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48PB.xml
index 47162f57..bfdae223 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48PB.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48PB.xml
@@ -1,20 +1,15 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega48PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN32"
-                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN32"
-                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN32" package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN32" package="VQFN32" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega48PB" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -31,8 +26,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -42,8 +36,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -53,8 +46,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -63,8 +55,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -75,8 +66,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -85,8 +75,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -101,8 +90,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AC" function="default" pad="PE0"/>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
@@ -112,8 +100,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -126,8 +113,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -139,8 +125,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -153,8 +138,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -165,8 +149,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -176,8 +159,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -209,8 +191,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -221,20 +202,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -245,26 +223,22 @@
             </module>
             <module name="DEVICEID">
                 <instance name="DEVICEID" caption="Device ID">
-                    <register-group name="DEVICEID" name-in-module="DEVICEID" offset="0x0" address-space="data"
-                                    caption="Device ID"/>
+                    <register-group name="DEVICEID" name-in-module="DEVICEID" offset="0x0" address-space="data" caption="Device ID"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -348,8 +322,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -410,8 +383,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -437,8 +409,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -477,8 +448,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -487,100 +457,53 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -703,14 +626,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -725,20 +645,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -758,14 +674,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -782,10 +695,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -819,20 +730,17 @@
                     <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -847,8 +755,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -886,16 +793,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -936,10 +841,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -953,14 +856,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -984,10 +884,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1052,8 +950,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1100,14 +997,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1120,8 +1015,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64.xml
index 0454912e..7efa45dc 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64.xml
@@ -1,36 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega64L-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN64"
-                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega64L-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega64-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
-                 package="TQFP64" vccmin="4.5" vccmax="5.5"/>
-        <variant ordercode="ATmega64-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
-                 package="QFN64" vccmin="4.5" vccmax="5.5"/>
-        <variant ordercode="ATmega64L-8AN" tempmin="-40" tempmax="105" speedmax="8000000" pinout="TQFPQFN64"
-                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega64L-8MN" tempmin="-40" tempmax="105" speedmax="8000000" pinout="TQFPQFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega64-16AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64"
-                 package="TQFP64" vccmin="4.5" vccmax="5.5"/>
-        <variant ordercode="ATmega64-16MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64"
-                 package="QFN64" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega64L-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN64" package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64L-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64" package="TQFP64" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega64-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64" package="QFN64" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega64L-8AN" tempmin="-40" tempmax="105" speedmax="8000000" pinout="TQFPQFN64" package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64L-8MN" tempmin="-40" tempmax="105" speedmax="8000000" pinout="TQFPQFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64-16AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64" package="TQFP64" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega64-16MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64" package="QFN64" vccmin="4.5" vccmax="5.5"/>
     </variants>
     <device name="ATmega64" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -48,8 +35,7 @@
                 <memory-segment name="XRAM" start="0x1100" size="0xef00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
@@ -59,8 +45,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
@@ -69,8 +54,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="7" function="default" pad="PF7"/>
                         <signal group="ADC" index="6" function="default" pad="PF6"/>
@@ -85,8 +69,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="MISO" function="default" pad="PB3"/>
                         <signal group="MOSI" function="default" pad="PB2"/>
@@ -97,8 +80,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PD1"/>
                         <signal group="SCL" function="default" pad="PD0"/>
@@ -107,8 +89,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="XCK" function="default" pad="PE2"/>
                         <signal group="TXD" function="default" pad="PE1"/>
@@ -116,8 +97,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="XCK" function="default" pad="PD5"/>
                         <signal group="TXD" function="default" pad="PD3"/>
@@ -127,8 +107,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -136,14 +115,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TDI" function="default" pad="PF7"/>
                         <signal group="TDO" function="default" pad="PF6"/>
@@ -154,8 +131,7 @@
             </module>
             <module name="MISC">
                 <instance name="MISC" caption="Other Registers">
-                    <register-group name="MISC" name-in-module="MISC" offset="0x00" address-space="data"
-                                    caption="Other Registers"/>
+                    <register-group name="MISC" name-in-module="MISC" offset="0x00" address-space="data" caption="Other Registers"/>
                     <signals>
                         <signal group="AD" index="7" function="default" pad="PA7"/>
                         <signal group="AD" index="6" function="default" pad="PA6"/>
@@ -183,8 +159,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="7" function="default" pad="PE7"/>
                         <signal group="INT" index="6" function="default" pad="PE6"/>
@@ -199,14 +174,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -219,8 +192,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -233,8 +205,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -247,8 +218,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -261,8 +231,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -275,8 +244,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -289,8 +257,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -302,8 +269,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC0" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OC" function="default" pad="PB4"/>
                         <signal group="TOSC" index="1" function="default" pad="PG4"/>
@@ -313,8 +279,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="OCC" function="default" pad="PB7"/>
                         <signal group="OCB" function="default" pad="PB6"/>
@@ -324,8 +289,7 @@
                     </signals>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="ICP" function="default" pad="PE7"/>
                         <signal group="T" function="default" pad="PE6"/>
@@ -337,8 +301,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC2" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="OC" function="default" pad="PB7"/>
                         <signal group="T" function="default" pad="PD7"/>
@@ -347,26 +310,22 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -458,8 +417,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -520,8 +478,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -565,8 +522,7 @@
                     <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x10" name="CKOPT"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
-                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
                     <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
                 </register>
@@ -579,116 +535,61 @@
                 <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
-                       value="0x01"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
-                       value="0x11"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS"
-                       value="0x21"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
-                       value="0x02"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
-                       value="0x12"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
-                       value="0x22"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
-                       value="0x04"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
-                       value="0x14"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
-                       value="0x24"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
-                       value="0x09"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
-                       value="0x19"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
-                       value="0x29"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS" value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS" value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS" value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS" value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS" value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS" value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS" value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS" value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS" value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS" value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS" value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms" name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms" name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms" name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms" name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms" name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms" name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms" name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms" name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms" name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms" name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms" name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms" name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms" name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms" name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms" name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms" name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms" name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms" name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms" name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms" name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms" name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms" name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms" name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms" name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
@@ -728,16 +629,14 @@
                 <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -755,27 +654,23 @@
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x26" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x8E" size="1">
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_ADC_V_REF2">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -886,8 +781,7 @@
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
                     <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
                 </register>
-                <register caption="USART Baud Rate Register Hight Byte" name="UBRR0H" offset="0x90" size="1"
-                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR0H" offset="0x90" size="1" mask="0x0F"/>
                 <register caption="USART Baud Rate Register Low Byte" name="UBRR0L" offset="0x29" size="1" mask="0xFF"/>
             </register-group>
             <register-group caption="USART" name="USART1">
@@ -919,8 +813,7 @@
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
                     <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
                 </register>
-                <register caption="USART Baud Rate Register Hight Byte" name="UBRR1H" offset="0x98" size="1"
-                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR1H" offset="0x98" size="1" mask="0x0F"/>
                 <register caption="USART Baud Rate Register Low Byte" name="UBRR1L" offset="0x99" size="1" mask="0xFF"/>
             </register-group>
             <value-group caption="" name="COMM_USART_MODE">
@@ -970,8 +863,7 @@
                 </register>
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x6D" size="1">
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x0C" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x0C" name="SRW0" values="CPU_WAIT_STATES"/>
                     <bitfield caption="Wait state select bit upper page" mask="0x02" name="SRW11"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x6C" size="1">
@@ -1000,8 +892,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
                 <value value="0x00" caption="1.0 MHz " name="1_0_MHz_"/>
@@ -1033,8 +924,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x42" size="1"
-                          ocd-rw="">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x42" size="1" ocd-rw="">
                     <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
@@ -1050,32 +940,23 @@
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
                     <bitfield caption="Pull Up Disable" mask="0x04" name="PUD"/>
                     <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x02" name="PSR0"/>
-                    <bitfield caption="Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1" mask="0x01"
-                              name="PSR321"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1" mask="0x01" name="PSR321"/>
                 </register>
             </register-group>
         </module>
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x5A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x59" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1158,8 +1039,7 @@
                     <bitfield caption="Timer/Counter Control Register 0 Update Busy" mask="0x01" name="TCR0UB"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
-                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02" name="OCIE0"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
@@ -1192,15 +1072,12 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
-                              name="OCIE1A"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
-                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
-                    <bitfield caption="Timer/Counter 1, Output Compare Match C Interrupt Enable" mask="0x01"
-                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter 1, Output Compare Match C Interrupt Enable" mask="0x01" name="OCIE1C"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
@@ -1208,8 +1085,7 @@
                     <bitfield caption="Output Compare Flag 1B" mask="0x08" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
                 </register>
-                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
-                          ocd-rw="R">
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter 1, Output Compare C Match Flag" mask="0x01" name="OCF1C"/>
                 </register>
                 <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
@@ -1234,28 +1110,20 @@
                     <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x78" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2" mask="0xFFFF"/>
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC3">
                 <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="TICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x10"
-                              name="OCIE3A"/>
-                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x08"
-                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x10" name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x08" name="OCIE3B"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x04" name="TOIE3"/>
-                    <bitfield caption="Timer/Counter3, Output Compare Match Interrupt Enable" mask="0x02"
-                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3, Output Compare Match Interrupt Enable" mask="0x02" name="OCIE3C"/>
                 </register>
-                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
-                          ocd-rw="R">
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3A" mask="0x10" name="OCF3A"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x08" name="OCF3B"/>
@@ -1284,14 +1152,10 @@
                     <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output compare Register C Bytes" name="OCR3C" offset="0x82" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output compare Register C Bytes" name="OCR3C" offset="0x82" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -1346,8 +1210,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA640.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA640.xml
index 47d9829f..4b2421e4 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA640.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA640.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega640V-8AU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="TQFP100" pinout="TQFP100"/>
-        <variant ordercode="ATmega640V-8CU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="CBGA100" pinout="CBGA100"/>
-        <variant ordercode="ATmega640-16AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="TQFP100" pinout="TQFP100"/>
-        <variant ordercode="ATmega640-16CU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="CBGA100" pinout="CBGA100"/>
+        <variant ordercode="ATmega640V-8AU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="TQFP100" pinout="TQFP100"/>
+        <variant ordercode="ATmega640V-8CU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="CBGA100" pinout="CBGA100"/>
+        <variant ordercode="ATmega640-16AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5" package="TQFP100" pinout="TQFP100"/>
+        <variant ordercode="ATmega640-16CU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5" package="CBGA100" pinout="CBGA100"/>
     </variants>
     <device name="ATmega640" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -40,8 +31,7 @@
                 <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -51,8 +41,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -61,8 +50,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PE1"/>
                         <signal group="RXD" function="default" pad="PE0"/>
@@ -70,8 +58,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -79,8 +66,7 @@
                     </signals>
                 </instance>
                 <instance name="USART2" caption="USART">
-                    <register-group name="USART2" name-in-module="USART2" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART2" name-in-module="USART2" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="XCK" pad="PH2" function="default"/>
                         <signal group="TXD" pad="PH1" function="default"/>
@@ -88,8 +74,7 @@
                     </signals>
                 </instance>
                 <instance name="USART3" caption="USART">
-                    <register-group name="USART3" name-in-module="USART3" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART3" name-in-module="USART3" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="XCK" pad="PJ2" function="default"/>
                         <signal group="TXD" pad="PJ1" function="default"/>
@@ -99,8 +84,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PD1"/>
                         <signal group="SCL" function="default" pad="PD0"/>
@@ -109,8 +93,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="MOSI" function="default" pad="PB2"/>
@@ -121,8 +104,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -135,8 +117,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -149,8 +130,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -163,8 +143,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -177,8 +156,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -191,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -205,8 +182,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -219,8 +195,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PH0" index="0"/>
                         <signal group="P" function="default" pad="PH1" index="1"/>
@@ -233,8 +208,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PJ0" index="0"/>
                         <signal group="P" function="default" pad="PJ1" index="1"/>
@@ -247,8 +221,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTK" caption="I/O Port">
-                    <register-group name="PORTK" name-in-module="PORTK" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTK" name-in-module="PORTK" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PK0" index="0"/>
                         <signal group="P" function="default" pad="PK1" index="1"/>
@@ -261,8 +234,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTL" caption="I/O Port">
-                    <register-group name="PORTL" name-in-module="PORTL" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTL" name-in-module="PORTL" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PL0" index="0"/>
                         <signal group="P" function="default" pad="PL1" index="1"/>
@@ -277,8 +249,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PG5"/>
@@ -288,8 +259,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="TOSC" index="1" function="default" pad="PG4"/>
                         <signal group="TOSC" index="2" function="default" pad="PG3"/>
@@ -300,20 +270,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC5" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="OCC" pad="PL5" function="default"/>
                         <signal group="OCB" pad="PL4" function="default"/>
@@ -323,8 +290,7 @@
                     </signals>
                 </instance>
                 <instance name="TC4" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" pad="PH7" function="default"/>
                         <signal group="OCC" pad="PH5" function="default"/>
@@ -334,8 +300,7 @@
                     </signals>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PE6"/>
                         <signal group="ICP" function="default" pad="PE7"/>
@@ -345,8 +310,7 @@
                     </signals>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD6"/>
                         <signal group="ICP" function="default" pad="PD4"/>
@@ -358,8 +322,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -370,8 +333,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PB0"/>
                         <signal group="PCINT" index="1" function="default" pad="PB1"/>
@@ -410,8 +372,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PE7"/>
                     </signals>
@@ -422,8 +383,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -446,26 +406,22 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -579,8 +535,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -641,8 +596,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -673,8 +627,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -698,104 +651,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
@@ -841,16 +745,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -960,8 +862,7 @@
             </register-group>
             <register-group caption="USART" name="USART3">
                 <register caption="USART I/O Data Register" name="UDR3" offset="0x136" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART Control and Status Register A" name="UCSR3A" offset="0x130" size="1"
-                          ocd-rw="R">
+                <register caption="USART Control and Status Register A" name="UCSR3A" offset="0x130" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC3"/>
                     <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC3"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE3"/>
@@ -1126,10 +1027,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -1143,14 +1042,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1174,14 +1070,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -1198,10 +1091,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -1232,8 +1123,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1281,8 +1171,7 @@
                     <bitfield caption="Input Capture 5 Noise Canceler" mask="0x80" name="ICNC5"/>
                     <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 5 Control Register C" name="TCCR5C" offset="0x122" size="1">
                     <bitfield caption="Force Output Compare 5A" mask="0x80" name="FOC5A"/>
@@ -1290,26 +1179,18 @@
                     <bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
                 </register>
                 <register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
                     <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
-                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE5C"/>
-                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE5B"/>
-                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE5A"/>
                     <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
                 </register>
-                <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1" ocd-rw="">
                     <bitfield caption="Input Capture Flag 5" mask="0x20" name="ICF5"/>
                     <bitfield caption="Output Compare Flag 5C" mask="0x08" name="OCF5C"/>
                     <bitfield caption="Output Compare Flag 5B" mask="0x04" name="OCF5B"/>
@@ -1328,8 +1209,7 @@
                     <bitfield caption="Input Capture 4 Noise Canceler" mask="0x80" name="ICNC4"/>
                     <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
                     <bitfield caption="Force Output Compare 4A" mask="0x80" name="FOC4A"/>
@@ -1337,26 +1217,18 @@
                     <bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
                 </register>
                 <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
                     <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
-                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE4C"/>
-                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE4B"/>
-                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE4A"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1" ocd-rw="">
                     <bitfield caption="Input Capture Flag 4" mask="0x20" name="ICF4"/>
                     <bitfield caption="Output Compare Flag 4C" mask="0x08" name="OCF4C"/>
                     <bitfield caption="Output Compare Flag 4B" mask="0x04" name="OCF4B"/>
@@ -1375,8 +1247,7 @@
                     <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
                     <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
@@ -1384,26 +1255,18 @@
                     <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
@@ -1422,8 +1285,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -1431,26 +1293,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -1471,8 +1325,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1484,24 +1337,16 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1555,10 +1400,8 @@
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
                     <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS2"/>
-                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
-                              values="CPU_WAIT_STATES"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1" values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0" values="CPU_WAIT_STATES"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
                     <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
@@ -1624,8 +1467,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
                 <value caption="1" name="VAL_0x00" value="0x00"/>
@@ -1657,25 +1499,21 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF6"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF6"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR2" offset="0x7D" size="1">
                     <bitfield caption="" mask="0x80" name="ADC15D"/>
@@ -1701,10 +1539,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF6">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1715,50 +1551,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
                 <value caption="ADC Single Ended Input pin 8" name="ADC8" value="0x20"/>
@@ -1769,50 +1583,28 @@
                 <value caption="ADC Single Ended Input pin 13" name="ADC13" value="0x25"/>
                 <value caption="ADC Single Ended Input pin 14" name="ADC14" value="0x26"/>
                 <value caption="ADC Single Ended Input pin 15" name="ADC15" value="0x27"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain" name="ADC8_ADC8_10X"
-                       value="0x28"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain" name="ADC9_ADC8_10X"
-                       value="0x29"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain" name="ADC8_ADC8_200x"
-                       value="0x2A"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain" name="ADC9_ADC8_200X"
-                       value="0x2B"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain" name="ADC10_ADC10_10X"
-                       value="0x2C"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain" name="ADC11_ADC10_10X"
-                       value="0x2D"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain"
-                       name="ADC10_ADC10_200X" value="0x2E"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain"
-                       name="ADC11_ADC10_200X" value="0x2F"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain" name="ADC8_ADC9_1X"
-                       value="0x30"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain" name="ADC9_ADC9_1X"
-                       value="0x31"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain" name="ADC10_ADC9_1X"
-                       value="0x32"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain" name="ADC11_ADC9_1X"
-                       value="0x33"/>
-                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain" name="ADC12_ADC9_1X"
-                       value="0x34"/>
-                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain" name="ADC13_ADC9_1X"
-                       value="0x35"/>
-                <value caption="ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain" name="ADC14_ADC9_1X"
-                       value="0x36"/>
-                <value caption="ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain" name="ADC15_ADC9_1X"
-                       value="0x37"/>
-                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain" name="ADC8_ADC10_1X"
-                       value="0x38"/>
-                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain" name="ADC9_ADC10_1X"
-                       value="0x39"/>
-                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain" name="ADC10_ADC10_1X"
-                       value="0x3A"/>
-                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain" name="ADC11_ADC10_1X"
-                       value="0x3B"/>
-                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain" name="ADC12_ADC10_1X"
-                       value="0x3C"/>
-                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain" name="ADC13_ADC10_1X"
-                       value="0x3D"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain" name="ADC8_ADC8_10X" value="0x28"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain" name="ADC9_ADC8_10X" value="0x29"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain" name="ADC8_ADC8_200x" value="0x2A"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain" name="ADC9_ADC8_200X" value="0x2B"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain" name="ADC10_ADC10_10X" value="0x2C"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain" name="ADC11_ADC10_10X" value="0x2D"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain" name="ADC10_ADC10_200X" value="0x2E"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain" name="ADC11_ADC10_200X" value="0x2F"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain" name="ADC8_ADC9_1X" value="0x30"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain" name="ADC9_ADC9_1X" value="0x31"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain" name="ADC10_ADC9_1X" value="0x32"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain" name="ADC11_ADC9_1X" value="0x33"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain" name="ADC12_ADC9_1X" value="0x34"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain" name="ADC13_ADC9_1X" value="0x35"/>
+                <value caption="ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain" name="ADC14_ADC9_1X" value="0x36"/>
+                <value caption="ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain" name="ADC15_ADC9_1X" value="0x37"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain" name="ADC8_ADC10_1X" value="0x38"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain" name="ADC9_ADC10_1X" value="0x39"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain" name="ADC10_ADC10_1X" value="0x3A"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain" name="ADC11_ADC10_1X" value="0x3B"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain" name="ADC12_ADC10_1X" value="0x3C"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain" name="ADC13_ADC10_1X" value="0x3D"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644.xml
index f8a4ea6c..cecfa098 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644.xml
@@ -1,32 +1,21 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega644V-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_QFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644V-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644V-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_QFN_44"
-                 package="QFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega644-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega644-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644V-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_QFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644V-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644V-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_QFN_44" package="QFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="QFN44" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega644" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,8 +32,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -54,8 +42,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
@@ -64,8 +51,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" index="0" function="default" pad="PD1"/>
                         <signal group="RXD" index="0" function="default" pad="PD0"/>
@@ -75,8 +61,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -89,8 +74,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -103,8 +87,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -117,8 +100,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -133,8 +115,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB0"/>
                         <signal group="OCB" function="default" pad="PB4"/>
@@ -145,8 +126,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PD6"/>
@@ -155,14 +135,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PC2"/>
                         <signal group="TMS" function="default" pad="PC3"/>
@@ -173,14 +151,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PA0"/>
                         <signal group="PCINT" index="1" function="default" pad="PA1"/>
@@ -222,8 +198,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -238,8 +213,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -250,14 +224,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -266,8 +238,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB4"/>
                         <signal group="MOSI" function="default" pad="PB5"/>
@@ -278,8 +249,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PB1"/>
                     </signals>
@@ -290,20 +260,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -388,8 +355,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -450,8 +416,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -477,8 +442,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -509,8 +473,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -534,104 +497,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot start address=$7E00" name="512W_7E00" value="0x03"/>
@@ -677,16 +591,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -772,10 +684,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -789,14 +699,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -820,14 +727,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -844,10 +748,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -878,8 +780,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -899,8 +800,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -926,12 +826,9 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
@@ -970,24 +867,20 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x80" name="ADC7D"/>
@@ -1003,10 +896,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1017,50 +908,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
             </value-group>
@@ -1089,14 +958,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -1118,12 +984,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644A.xml
index bb875057..bba6df49 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644A.xml
@@ -1,26 +1,18 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega644A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega644A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -37,8 +29,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -48,8 +39,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
@@ -58,8 +48,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -67,8 +56,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -78,8 +66,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -92,8 +79,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -106,8 +92,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -120,8 +105,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -136,8 +120,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB0"/>
                         <signal group="OCB" function="default" pad="PB4"/>
@@ -147,8 +130,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="TOSC" index="1" function="default" pad="PC6"/>
                         <signal group="TOSC" index="2" function="default" pad="PC7"/>
@@ -159,14 +141,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PC2"/>
                         <signal group="TMS" function="default" pad="PC3"/>
@@ -177,14 +157,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PA0"/>
                         <signal group="PCINT" index="1" function="default" pad="PA1"/>
@@ -226,8 +204,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -242,8 +219,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -254,14 +230,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -270,8 +244,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB4"/>
                         <signal group="MOSI" function="default" pad="PB5"/>
@@ -282,8 +255,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PB1"/>
                     </signals>
@@ -294,20 +266,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -395,8 +364,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -457,8 +425,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -484,8 +451,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -516,8 +482,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -541,104 +506,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot start address=$7E00" name="512W_7E00" value="0x03"/>
@@ -684,16 +600,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -810,10 +724,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -827,14 +739,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -858,14 +767,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -882,10 +788,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -916,8 +820,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -937,8 +840,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -964,12 +866,9 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
@@ -1008,24 +907,20 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x80" name="ADC7D"/>
@@ -1041,10 +936,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1055,50 +948,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
             </value-group>
@@ -1127,14 +998,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -1156,12 +1024,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644P.xml
index 023617dd..044d2783 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644P.xml
@@ -1,44 +1,27 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega644PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega644P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega644P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44"
-                 package="VQFN44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega644PV-10AN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="TQFP_VQFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644PV-10PN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644PV-10MN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="TQFP_VQFN_44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644P-20AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44"
-                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega644P-20PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega644P-20MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44"
-                 package="VQFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44" package="VQFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644PV-10AN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="TQFP_VQFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PV-10PN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PV-10MN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="TQFP_VQFN_44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644P-20AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44" package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644P-20PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644P-20MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44" package="VQFN44" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega644P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -55,8 +38,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -66,8 +48,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
@@ -76,8 +57,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -85,8 +65,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -96,8 +75,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -110,8 +88,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -124,8 +101,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -138,8 +114,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -154,8 +129,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB0"/>
                         <signal group="OCB" function="default" pad="PB4"/>
@@ -165,8 +139,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="TOSC" index="1" function="default" pad="PC6"/>
                         <signal group="TOSC" index="2" function="default" pad="PC7"/>
@@ -177,14 +150,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PC2"/>
                         <signal group="TMS" function="default" pad="PC3"/>
@@ -195,14 +166,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PA0"/>
                         <signal group="PCINT" index="1" function="default" pad="PA1"/>
@@ -244,8 +213,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -260,8 +228,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -272,14 +239,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -288,8 +253,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PB1"/>
                     </signals>
@@ -300,8 +264,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB4"/>
                         <signal group="MOSI" function="default" pad="PB5"/>
@@ -312,20 +275,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -413,8 +373,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -475,8 +434,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -502,8 +460,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -534,8 +491,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -559,104 +515,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot start address=$7E00" name="512W_7E00" value="0x03"/>
@@ -702,16 +609,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -828,10 +733,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -845,14 +748,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -876,14 +776,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -900,10 +797,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -934,8 +829,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -955,8 +849,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -982,12 +875,9 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
@@ -1026,24 +916,20 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x80" name="ADC7D"/>
@@ -1059,10 +945,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1073,50 +957,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
             </value-group>
@@ -1145,14 +1007,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -1174,12 +1033,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644PA.xml
index 35f247c6..4be0d4c0 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644PA.xml
@@ -1,32 +1,21 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega644PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644PA-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644PA-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP40"
-                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega644PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_QFN_44"
-                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PA-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_QFN_44" package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PA-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP40" package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_QFN_44" package="VQFN44" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega644PA" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,8 +32,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -54,8 +42,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PB2"/>
                         <signal group="AIN" index="1" function="default" pad="PB3"/>
@@ -64,8 +51,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -73,8 +59,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD3"/>
                         <signal group="RXD" function="default" pad="PD2"/>
@@ -84,8 +69,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -98,8 +82,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -112,8 +95,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -126,8 +108,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -142,8 +123,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB0"/>
                         <signal group="OCB" function="default" pad="PB4"/>
@@ -153,8 +133,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PD7"/>
                         <signal group="OCB" function="default" pad="PD6"/>
@@ -163,14 +142,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PC2"/>
                         <signal group="TMS" function="default" pad="PC3"/>
@@ -181,14 +158,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PA0"/>
                         <signal group="PCINT" index="1" function="default" pad="PA1"/>
@@ -230,8 +205,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -246,8 +220,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PB1"/>
                         <signal group="ICP" function="default" pad="PD6"/>
@@ -258,14 +231,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC1"/>
                         <signal group="SCL" function="default" pad="PC0"/>
@@ -274,8 +245,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLKO" index="0" function="default" pad="PB1"/>
                     </signals>
@@ -286,8 +256,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB4"/>
                         <signal group="MOSI" function="default" pad="PB5"/>
@@ -298,20 +267,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -399,8 +365,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -461,8 +426,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -488,8 +452,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -520,8 +483,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -545,104 +507,55 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
-                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
-                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
-                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
-                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
-                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
-                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
-                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
-                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
-                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot start address=$7E00" name="512W_7E00" value="0x03"/>
@@ -688,16 +601,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -814,10 +725,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -831,14 +740,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -862,14 +768,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -886,10 +789,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -920,8 +821,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -941,8 +841,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -968,12 +867,9 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
@@ -1012,24 +908,20 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ADC_MUX_DIFF"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ADC_MUX_DIFF"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x80" name="ADC7D"/>
@@ -1045,10 +937,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF6">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_DIFF">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -1059,50 +949,28 @@
                 <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
                 <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
                 <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
-                       value="0x08"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
-                       value="0x09"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
-                       value="0x0A"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
-                       value="0x0B"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
-                       value="0x0C"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
-                       value="0x0D"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
-                       value="0x0E"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
-                       value="0x0F"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
-                       value="0x10"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
-                       value="0x11"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
-                       value="0x12"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
-                       value="0x13"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
-                       value="0x14"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
-                       value="0x15"/>
-                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
-                       value="0x16"/>
-                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
-                       value="0x17"/>
-                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
-                       value="0x18"/>
-                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
-                       value="0x19"/>
-                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
-                       value="0x1A"/>
-                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
-                       value="0x1B"/>
-                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
-                       value="0x1C"/>
-                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
-                       value="0x1D"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X" value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X" value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x" value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X" value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X" value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X" value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X" value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X" value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X" value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X" value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X" value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X" value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X" value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X" value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X" value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X" value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X" value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X" value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X" value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X" value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X" value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X" value="0x1D"/>
                 <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
                 <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
             </value-group>
@@ -1131,14 +999,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -1160,12 +1025,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644RFR2.xml
index 3b2b9c45..65dca8b5 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644RFR2.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega644RFR2-ZU" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega644RFR2-ZUR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega644RFR2-ZF" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega644RFR2-ZFR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega644RFR2-ZU" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega644RFR2-ZUR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega644RFR2-ZF" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega644RFR2-ZFR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
     </variants>
     <device name="ATmega644RFR2" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,10 +24,8 @@
             <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
                 <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
-            <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100"
-                           size="0x0300">
-                <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="0x100"/>
+            <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100" size="0x0300">
+                <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="data" id="data" start="0x0000" size="0x2200">
                 <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
@@ -44,8 +33,7 @@
                 <memory-segment name="IRAM" start="0x0200" size="0x2000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -55,48 +43,39 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
                 <instance name="USART0_SPI" caption="Serial Peripheral Interface">
-                    <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
                 <instance name="USART1_SPI" caption="Serial Peripheral Interface">
-                    <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="MISSING_PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -109,12 +88,10 @@
                     </signals>
                 </instance>
                 <instance name="MISSING_PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -127,8 +104,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -140,8 +116,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -154,8 +129,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
                         <signal function="PORTG" group="P" index="3" pad="PG3"/>
@@ -165,86 +139,71 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC5" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC4" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TRX24">
                 <instance name="TRX24" caption="Low-Power 2.4 GHz Transceiver">
-                    <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data"
-                                    caption="Low-Power 2.4 GHz Transceiver"/>
+                    <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data" caption="Low-Power 2.4 GHz Transceiver"/>
                 </instance>
             </module>
             <module name="SYMCNT">
                 <instance name="SYMCNT" caption="MAC Symbol Counter">
-                    <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data"
-                                    caption="MAC Symbol Counter"/>
+                    <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data" caption="MAC Symbol Counter"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V3"/>
                     </parameters>
@@ -252,32 +211,27 @@
             </module>
             <module name="FLASH">
                 <instance name="FLASH" caption="FLASH Controller">
-                    <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data"
-                                    caption="FLASH Controller"/>
+                    <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data" caption="FLASH Controller"/>
                 </instance>
             </module>
             <module name="PWRCTRL">
                 <instance name="PWRCTRL" caption="Power Controller">
-                    <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data"
-                                    caption="Power Controller"/>
+                    <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data" caption="Power Controller"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -342,8 +296,7 @@
             <interrupt index="68" name="SCNT_OVFL" caption="Symbol counter - overflow interrupt"/>
             <interrupt index="69" name="SCNT_BACKOFF" caption="Symbol counter - backoff interrupt"/>
             <interrupt index="70" name="AES_READY" caption="AES engine ready interrupt"/>
-            <interrupt index="71" name="BAT_LOW"
-                       caption="Battery monitor indicates supply voltage below threshold"/>
+            <interrupt index="71" name="BAT_LOW" caption="Battery monitor indicates supply voltage below threshold"/>
             <interrupt index="72" name="TRX24_TX_START" caption="TRX24 TX start interrupt"/>
             <interrupt index="73" name="TRX24_AMI0" caption="Address match interrupt of address filter 0"/>
             <interrupt index="74" name="TRX24_AMI1" caption="Address match interrupt of address filter 1"/>
@@ -406,8 +359,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -468,8 +420,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -500,8 +451,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFE">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -515,8 +465,7 @@
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
                     <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
-                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT"
-                              values="ENUM_SUT_CKSEL"/>
+                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT" values="ENUM_SUT_CKSEL"/>
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
@@ -526,87 +475,49 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS"
-                       value="0x23"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x06"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x16"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS" value="0x23"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x06"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x16"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x26"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x36"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x07"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x17"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x27"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x37"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x08"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x18"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x36"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x07"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x17"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x27"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x37"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x08"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x18"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x28"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x38"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x09"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x19"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x29"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x39"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x38"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x09"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x19"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x29"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x39"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1A"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1C"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1E"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$7E00" name="512W_7E00" value="0x03"/>
@@ -663,8 +574,7 @@
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -681,8 +591,7 @@
         <module caption="USART" name="USART">
             <register-group caption="USART" name="USART0">
                 <register caption="USART0 I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
-                          ocd-rw="R">
+                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
@@ -703,8 +612,7 @@
                     <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
                 </register>
                 <register caption="USART0 Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
-                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0"
-                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT_MEGARF"/>
                     <bitfield caption="Parity Mode" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
                     <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
@@ -714,8 +622,7 @@
             </register-group>
             <register-group caption="USART" name="USART1">
                 <register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
-                          ocd-rw="R">
+                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
@@ -736,8 +643,7 @@
                     <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
                 </register>
                 <register caption="USART1 Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
-                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"
-                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT_MEGARF"/>
                     <bitfield caption="Parity Mode" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
                     <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
@@ -772,10 +678,8 @@
                 <value caption="9-bit" name="VAL_7" value="7"/>
             </value-group>
             <value-group caption="" name="USART_CLK_POLARITY_BITF">
-                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)"
-                       name="VAL_0" value="0"/>
-                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)"
-                       name="VAL_1" value="1"/>
+                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)" name="VAL_0" value="0"/>
+                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)" name="VAL_1" value="1"/>
             </value-group>
         </module>
         <module caption="Two Wire Serial Interface" name="TWI">
@@ -813,40 +717,26 @@
                 <value caption="SLA+W has been transmitted; ACK has been received." name="VAL_0x18" value="0x18"/>
                 <value caption="SLA+W has been transmitted; NOT ACK has been received." name="VAL_0x20" value="0x20"/>
                 <value caption="Data byte has been transmitted; ACK has been received." name="VAL_0x28" value="0x28"/>
-                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30"
-                       value="0x30"/>
-                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)."
-                       name="VAL_0x38" value="0x38"/>
+                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30" value="0x30"/>
+                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)." name="VAL_0x38" value="0x38"/>
                 <value caption="SLA+R has been transmitted; ACK has been received." name="VAL_0x40" value="0x40"/>
                 <value caption="SLA+R has been transmitted; NOT ACK has been received." name="VAL_0x48" value="0x48"/>
                 <value caption="Data byte has been received; ACK has been returned." name="VAL_0x50" value="0x50"/>
                 <value caption="Data byte has been received; NOT ACK has been returned." name="VAL_0x58" value="0x58"/>
                 <value caption="Own SLA+W has been received; ACK has been returned." name="VAL_0x60" value="0x60"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned."
-                       name="VAL_0x68" value="0x68"/>
-                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70"
-                       value="0x70"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned."
-                       name="VAL_0x78" value="0x78"/>
-                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned."
-                       name="VAL_0x80" value="0x80"/>
-                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned."
-                       name="VAL_0x88" value="0x88"/>
-                <value caption="Previously addressed with general call; data has been received; ACK has been returned."
-                       name="VAL_0x90" value="0x90"/>
-                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned."
-                       name="VAL_0x98" value="0x98"/>
-                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave."
-                       name="VAL_0xA0" value="0xA0"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned." name="VAL_0x68" value="0x68"/>
+                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70" value="0x70"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned." name="VAL_0x78" value="0x78"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned." name="VAL_0x80" value="0x80"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned." name="VAL_0x88" value="0x88"/>
+                <value caption="Previously addressed with general call; data has been received; ACK has been returned." name="VAL_0x90" value="0x90"/>
+                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned." name="VAL_0x98" value="0x98"/>
+                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave." name="VAL_0xA0" value="0xA0"/>
                 <value caption="Own SLA+R has been received; ACK has been returned." name="VAL_0xA8" value="0xA8"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned."
-                       name="VAL_0xB0" value="0xB0"/>
-                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8"
-                       value="0xB8"/>
-                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0"
-                       value="0xC0"/>
-                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received."
-                       name="VAL_0xC8" value="0xC8"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned." name="VAL_0xB0" value="0xB0"/>
+                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8" value="0xB8"/>
+                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0" value="0xC0"/>
+                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received." name="VAL_0xC8" value="0xC8"/>
                 <value caption="No relevant state information available; TWINT = 0." name="VAL_0xF8" value="0xF8"/>
             </value-group>
             <value-group caption="" name="COMM_TWI_PRESACLE">
@@ -865,8 +755,7 @@
                     <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
                     <bitfield caption="Clock polarity" mask="0x08" name="CPOL" values="SPI_CPOL_BITF"/>
                     <bitfield caption="Clock Phase" mask="0x04" name="CPHA" values="SPI_CPHA_BITF"/>
-                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR"
-                              values="COMM_SCK_RATE_SPI2X"/>
+                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR" values="COMM_SCK_RATE_SPI2X"/>
                 </register>
                 <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
                     <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
@@ -876,8 +765,7 @@
                 <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
             </register-group>
             <register-group caption="Serial Peripheral Interface" name="USART0_SPI">
-                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
-                          ocd-rw="R">
+                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
@@ -896,8 +784,7 @@
                 </register>
             </register-group>
             <register-group caption="Serial Peripheral Interface" name="USART1_SPI">
-                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
-                          ocd-rw="R">
+                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
@@ -969,10 +856,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Register" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -988,14 +873,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0" values="TC0_WGM_BITF"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare B Match Flag" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare A Match Flag" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1043,14 +925,11 @@
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
                     <bitfield caption="Output Compare Flag 2 B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2 A" mask="0x02" name="OCF2A"/>
@@ -1068,19 +947,15 @@
                     <bitfield caption="Clock Select" mask="0x07" name="CS2" values="TC2_CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input for AMR" mask="0x80" name="EXCLKAMR"/>
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Timer/Counter2 Asynchronous Mode" mask="0x20" name="AS2"/>
                     <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08"
-                              name="OCR2AUB"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04"
-                              name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04" name="OCR2BUB"/>
                     <bitfield caption="Timer/Counter2 Control Register A Update Busy" mask="0x02" name="TCR2AUB"/>
                     <bitfield caption="Timer/Counter2 Control Register B Update Busy" mask="0x01" name="TCR2BUB"/>
                 </register>
@@ -1127,8 +1002,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1149,20 +1023,16 @@
         <module caption="Timer/Counter, 16-bit" name="TC16">
             <register-group caption="Timer/Counter, 16-bit" name="TC5">
                 <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C"
-                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C" values="TC4_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
                     <bitfield caption="Input Capture 5 Noise Canceller" mask="0x80" name="ICNC5"/>
                     <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS5" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter5 Control Register C" name="TCCR5C" offset="0x122" size="1">
@@ -1171,26 +1041,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
                 </register>
                 <register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
                     <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
-                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE5C"/>
-                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE5B"/>
-                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE5A"/>
                     <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
                 </register>
-                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1" ocd-rw="">
                     <bitfield caption="Timer/Counter5 Input Capture Flag" mask="0x20" name="ICF5"/>
                     <bitfield caption="Timer/Counter5 Output Compare C Match Flag" mask="0x08" name="OCF5C"/>
                     <bitfield caption="Timer/Counter5 Output Compare B Match Flag" mask="0x04" name="OCF5B"/>
@@ -1200,20 +1062,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC4">
                 <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C"
-                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C" values="TC4_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
                     <bitfield caption="Input Capture 4 Noise Canceller" mask="0x80" name="ICNC4"/>
                     <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS4" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
@@ -1222,26 +1080,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
                 </register>
                 <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
                     <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
-                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE4C"/>
-                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE4B"/>
-                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE4A"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1" ocd-rw="">
                     <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
                     <bitfield caption="Timer/Counter4 Output Compare C Match Flag" mask="0x08" name="OCF4C"/>
                     <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
@@ -1251,20 +1101,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC3">
                 <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C"
-                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C" values="TC1_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
                     <bitfield caption="Input Capture 3 Noise Canceller" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
@@ -1273,26 +1119,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
                     <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
@@ -1302,20 +1140,16 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C"
-                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C" values="TC1_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
                     <bitfield caption="Input Capture 1 Noise Canceller" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
@@ -1324,26 +1158,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare C Match Flag" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
@@ -1388,10 +1214,8 @@
             <value-group caption="" name="TC1_COMNX_BITF">
                 <value caption="Normal port operation, OCnA/OCnB/OCnC disconnected." name="VAL_0" value="0"/>
                 <value caption="Toggle OCnA/OCnB/OCnC on Compare Match." name="VAL_1" value="1"/>
-                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2"
-                       value="2"/>
-                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3"
-                       value="3"/>
+                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2" value="2"/>
+                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3" value="3"/>
             </value-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT_MEGARF">
                 <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
@@ -1412,106 +1236,75 @@
                     <bitfield caption="Power Amplifier Ramp Down Frequency Inversion" mask="0x02" name="PARDFI"/>
                     <bitfield caption="Power Amplifier Ramp Up Frequency Inversion" mask="0x01" name="PARUFI"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L"
-                          offset="0x10E" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L" offset="0x10E" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 0" mask="0xFF" name="MAFSA0L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H"
-                          offset="0x10F" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H" offset="0x10F" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 0" mask="0xFF" name="MAFSA0H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)"
-                          name="MAFPA0L" offset="0x110" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF"
-                              name="MAFPA0L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)" name="MAFPA0L" offset="0x110" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF" name="MAFPA0L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)"
-                          name="MAFPA0H" offset="0x111" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF"
-                              name="MAFPA0H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)" name="MAFPA0H" offset="0x111" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF" name="MAFPA0H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L"
-                          offset="0x112" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L" offset="0x112" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 1" mask="0xFF" name="MAFSA1L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H"
-                          offset="0x113" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H" offset="0x113" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 1" mask="0xFF" name="MAFSA1H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)"
-                          name="MAFPA1L" offset="0x114" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF"
-                              name="MAFPA1L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)" name="MAFPA1L" offset="0x114" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF" name="MAFPA1L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)"
-                          name="MAFPA1H" offset="0x115" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF"
-                              name="MAFPA1H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)" name="MAFPA1H" offset="0x115" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF" name="MAFPA1H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L"
-                          offset="0x116" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L" offset="0x116" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 2" mask="0xFF" name="MAFSA2L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H"
-                          offset="0x117" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H" offset="0x117" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 2" mask="0xFF" name="MAFSA2H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)"
-                          name="MAFPA2L" offset="0x118" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF"
-                              name="MAFPA2L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)" name="MAFPA2L" offset="0x118" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF" name="MAFPA2L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)"
-                          name="MAFPA2H" offset="0x119" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF"
-                              name="MAFPA2H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)" name="MAFPA2H" offset="0x119" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF" name="MAFPA2H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L"
-                          offset="0x11A" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L" offset="0x11A" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 3" mask="0xFF" name="MAFSA3L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H"
-                          offset="0x11B" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H" offset="0x11B" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 3" mask="0xFF" name="MAFSA3H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)"
-                          name="MAFPA3L" offset="0x11C" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF"
-                              name="MAFPA3L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)" name="MAFPA3L" offset="0x11C" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF" name="MAFPA3L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)"
-                          name="MAFPA3H" offset="0x11D" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF"
-                              name="MAFPA3H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)" name="MAFPA3H" offset="0x11D" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF" name="MAFPA3H"/>
                 </register>
-                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C"
-                          size="1">
+                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C" size="1">
                     <bitfield caption="Reserved Bit" mask="0xF0" name="Res"/>
                     <bitfield caption="Multiple Address Filter 3 Enable" mask="0x08" name="MAF3EN"/>
                     <bitfield caption="Multiple Address Filter 2 Enable" mask="0x04" name="MAF2EN"/>
                     <bitfield caption="Multiple Address Filter 1 Enable" mask="0x02" name="MAF1EN"/>
                     <bitfield caption="Multiple Address Filter 0 Enable" mask="0x01" name="MAF0EN"/>
                 </register>
-                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D"
-                          size="1">
+                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D" size="1">
                     <bitfield caption="Set Data Pending bit for address filter 3." mask="0x80" name="AACK_3_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40"
-                              name="AACK_3_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40" name="AACK_3_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 2." mask="0x20" name="AACK_2_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10"
-                              name="AACK_2_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10" name="AACK_2_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 1." mask="0x08" name="AACK_1_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04"
-                              name="AACK_1_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04" name="AACK_1_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 0." mask="0x02" name="AACK_0_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01"
-                              name="AACK_0_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01" name="AACK_0_I_AM_COORD"/>
                 </register>
                 <register caption="AES Control Register" name="AES_CTRL" offset="0x13C" size="1">
                     <bitfield caption="Request AES Operation." mask="0x80" name="AES_REQUEST"/>
                     <bitfield caption="Set AES Operation Mode" mask="0x20" name="AES_MODE" values="AES_MODE_BITF"/>
-                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR"
-                              values="AES_DIRECTION_BITF"/>
+                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR" values="AES_DIRECTION_BITF"/>
                     <bitfield caption="AES Interrupt Enable" mask="0x04" name="AES_IM"/>
                 </register>
                 <register caption="AES Status Register" name="AES_STATUS" offset="0x13D" size="1" ocd-rw="R">
@@ -1521,8 +1314,7 @@
                 <register caption="AES Plain and Cipher Text Buffer Register" name="AES_STATE" offset="0x13E" size="1">
                     <bitfield caption="AES Plain and Cipher Text Buffer" mask="0xFF" name="AES_STATE"/>
                 </register>
-                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F"
-                          size="1">
+                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F" size="1">
                     <bitfield caption="AES Encryption/Decryption Key Buffer" mask="0xFF" name="AES_KEY"/>
                 </register>
                 <register caption="Transceiver Status Register" name="TRX_STATUS" offset="0x141" size="1" ocd-rw="R">
@@ -1547,24 +1339,18 @@
                     <bitfield caption="Enable Automatic CRC Calculation" mask="0x20" name="TX_AUTO_CRC_ON"/>
                     <bitfield caption="Enable PLL TX filter" mask="0x10" name="PLL_TX_FLT"/>
                 </register>
-                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145"
-                          size="1">
+                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145" size="1">
                     <bitfield caption="Transmit Power Setting" mask="0x0F" name="TX_PWR" values="TX_PWR_bitf"/>
                 </register>
-                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1"
-                          ocd-rw="R">
-                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID"
-                              values="RX_CRC_VALID_bitf"/>
+                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1" ocd-rw="R">
+                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID" values="RX_CRC_VALID_bitf"/>
                     <bitfield caption="Random Value" mask="0x60" name="RND_VALUE"/>
-                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI"
-                              values="RSSI_VALUE_BITF"/>
+                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI" values="RSSI_VALUE_BITF"/>
                 </register>
-                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147"
-                          size="1" ocd-rw="R">
+                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147" size="1" ocd-rw="R">
                     <bitfield caption="Energy Detection Level" mask="0xFF" name="ED_LEVEL" values="ED_LEVEL_BITF"/>
                 </register>
-                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA"
-                          offset="0x148" size="1">
+                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA" offset="0x148" size="1">
                     <bitfield caption="Manual CCA Measurement Request" mask="0x80" name="CCA_REQUEST"/>
                     <bitfield caption="Select CCA Measurement Mode" mask="0x60" name="CCA_MODE" values="CCA_MODE_bitf"/>
                     <bitfield caption="RX/TX Channel Selection" mask="0x1F" name="CHANNEL" values="CHANNEL_bitf"/>
@@ -1574,27 +1360,20 @@
                     <bitfield caption="ED Threshold Level for CCA Measurement" mask="0x0F" name="CCA_ED_THRES"/>
                 </register>
                 <register caption="Transceiver Receive Control Register" name="RX_CTRL" offset="0x14A" size="1">
-                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES"
-                              values="PDT_THRES_bitf"/>
+                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES" values="PDT_THRES_bitf"/>
                 </register>
                 <register caption="Start of Frame Delimiter Value Register" name="SFD_VALUE" offset="0x14B" size="1">
-                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE"
-                              values="SFD_VALUE_BITF"/>
+                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE" values="SFD_VALUE_BITF"/>
                 </register>
                 <register caption="Transceiver Control Register 2" name="TRX_CTRL_2" offset="0x14C" size="1">
                     <bitfield caption="RX Safe Mode" mask="0x80" name="RX_SAFE_MODE"/>
-                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE"
-                              values="OQPSK_DATA_RATE_bitf"/>
+                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE" values="OQPSK_DATA_RATE_bitf"/>
                 </register>
                 <register caption="Antenna Diversity Control Register" name="ANT_DIV" offset="0x14D" size="1">
-                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL"
-                              values="ANT_SEL_bitf"/>
-                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN"
-                              values="ANT_DIV_EN_bitf"/>
-                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN"
-                              values="ANT_EXT_SW_EN_bitf"/>
-                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL"
-                              values="ANT_CTRL_bitf"/>
+                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL" values="ANT_SEL_bitf"/>
+                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN" values="ANT_DIV_EN_bitf"/>
+                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN" values="ANT_EXT_SW_EN_bitf"/>
+                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL" values="ANT_CTRL_bitf"/>
                 </register>
                 <register caption="Transceiver Interrupt Enable Register" name="IRQ_MASK" offset="0x14E" size="1">
                     <bitfield caption="Awake Interrupt Enable" mask="0x80" name="AWAKE_EN"/>
@@ -1618,14 +1397,10 @@
                 </register>
                 <register caption="Transceiver Interrupt Enable Register 1" name="IRQ_MASK1" offset="0xBE" size="1">
                     <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10"
-                              name="MAF_3_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08"
-                              name="MAF_2_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04"
-                              name="MAF_1_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02"
-                              name="MAF_0_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10" name="MAF_3_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08" name="MAF_2_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04" name="MAF_1_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02" name="MAF_0_AMI_EN"/>
                     <bitfield caption="Transmit Start Interrupt enable" mask="0x01" name="TX_START_EN"/>
                 </register>
                 <register caption="Transceiver Interrupt Status Register 1" name="IRQ_STATUS1" offset="0xBF" size="1">
@@ -1636,29 +1411,22 @@
                     <bitfield caption="Address Match Interrupt Status Address filter 0" mask="0x02" name="MAF_0_AMI"/>
                     <bitfield caption="Transmit Start Interrupt Status" mask="0x01" name="TX_START"/>
                 </register>
-                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150"
-                          size="1">
-                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT"
-                              values="AVREG_EXT_BITF"/>
+                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150" size="1">
+                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT" values="AVREG_EXT_BITF"/>
                     <bitfield caption="AVDD Supply Voltage Valid" mask="0x40" name="AVDD_OK" values="AVDD_OK_BITF"/>
-                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT"
-                              values="DVREG_EXT_BITF"/>
+                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT" values="DVREG_EXT_BITF"/>
                     <bitfield caption="DVDD Supply Voltage Valid" mask="0x04" name="DVDD_OK" values="DVDD_OK_BITF"/>
                 </register>
                 <register caption="Battery Monitor Control and Status Register" name="BATMON" offset="0x151" size="1">
                     <bitfield caption="Battery Monitor Interrupt Status" mask="0x80" name="BAT_LOW"/>
                     <bitfield caption="Battery Monitor Interrupt Enable" mask="0x40" name="BAT_LOW_EN"/>
                     <bitfield caption="Battery Monitor Status" mask="0x20" name="BATMON_OK" values="BATMON_OK_bitf"/>
-                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR"
-                              values="BATMON_HR_bitf"/>
-                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH"
-                              values="BATMON_VTH_bitf"/>
+                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR" values="BATMON_HR_bitf"/>
+                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH" values="BATMON_VTH_bitf"/>
                 </register>
                 <register caption="Crystal Oscillator Control Register" name="XOSC_CTRL" offset="0x152" size="1">
-                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE"
-                              values="XTAL_MODE_BITF"/>
-                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM"
-                              values="XTAL_TRIM_bitf"/>
+                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE" values="XTAL_MODE_BITF"/>
+                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM" values="XTAL_TRIM_bitf"/>
                 </register>
                 <register caption="Channel Control Register 0" name="CC_CTRL_0" offset="0x153" size="1">
                     <bitfield caption="Channel Number" mask="0xFF" name="CC_NUMBER"/>
@@ -1666,54 +1434,42 @@
                 <register caption="Channel Control Register 1" name="CC_CTRL_1" offset="0x154" size="1">
                     <bitfield caption="Channel Band" mask="0x0F" name="CC_BAND"/>
                 </register>
-                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155"
-                          size="1">
+                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155" size="1">
                     <bitfield caption="Prevent Frame Reception" mask="0x80" name="RX_PDT_DIS"/>
                     <bitfield caption="Receiver Override Function" mask="0x40" name="RX_OVERRIDE"/>
-                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL"
-                              values="RX_PDT_LEVEL_BITF"/>
+                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL" values="RX_PDT_LEVEL_BITF"/>
                 </register>
-                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156"
-                          size="1">
-                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL"
-                              values="RX_RPC_CTRL_BITF"/>
+                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156" size="1">
+                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL" values="RX_RPC_CTRL_BITF"/>
                     <bitfield caption="Reciver Smart Receiving Mode Enable" mask="0x20" name="RX_RPC_EN"/>
                     <bitfield caption="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10" name="PDT_RPC_EN"/>
                     <bitfield caption="PLL Smart Receiving Mode Enable" mask="0x08" name="PLL_RPC_EN"/>
                     <bitfield caption="Reserved" mask="0x04" name="Res0"/>
                     <bitfield caption="Smart Receiving Mode IPAN Handling Enable" mask="0x02" name="IPAN_RPC_EN"/>
-                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01"
-                              name="XAH_RPC_EN"/>
+                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01" name="XAH_RPC_EN"/>
                 </register>
-                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157"
-                          size="1">
+                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157" size="1">
                     <bitfield caption="Filter Reserved Frames" mask="0x20" name="AACK_FLTR_RES_FT"/>
                     <bitfield caption="Process Reserved Frames" mask="0x10" name="AACK_UPLD_RES_FT"/>
-                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME"
-                              values="AACK_ACK_TIME_bitf"/>
+                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME" values="AACK_ACK_TIME_bitf"/>
                     <bitfield caption="Enable Promiscuous Mode" mask="0x02" name="AACK_PROM_MODE"/>
                 </register>
                 <register caption="Transceiver Filter Tuning Control Register" name="FTN_CTRL" offset="0x158" size="1">
                     <bitfield caption="Start Calibration Loop of Filter Tuning Network" mask="0x80" name="FTN_START"/>
                 </register>
-                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF"
-                          offset="0x15A" size="1">
+                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF" offset="0x15A" size="1">
                     <bitfield caption="Start Center Frequency Calibration" mask="0x80" name="PLL_CF_START"/>
                 </register>
-                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B"
-                          size="1">
+                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B" size="1">
                     <bitfield caption="Start Delay Cell Calibration" mask="0x80" name="PLL_DCU_START"/>
                 </register>
-                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1"
-                          ocd-rw="R">
+                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1" ocd-rw="R">
                     <bitfield caption="Part Number" mask="0xFF" name="PART_NUM" values="PART_NUM_bitf"/>
                 </register>
-                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D"
-                          size="1" ocd-rw="R">
+                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D" size="1" ocd-rw="R">
                     <bitfield caption="Version Number" mask="0xFF" name="VERSION_NUM" values="VERSION_NUM_2_BITF"/>
                 </register>
-                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0"
-                          offset="0x15E" size="1" ocd-rw="R">
+                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0" offset="0x15E" size="1" ocd-rw="R">
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x80" name="MAN_ID_07"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x40" name="MAN_ID_06"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x20" name="MAN_ID_05"/>
@@ -1723,13 +1479,10 @@
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x02" name="MAN_ID_01"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x01" name="MAN_ID_00" values="MAN_ID_0_BITF"/>
                 </register>
-                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1"
-                          offset="0x15F" size="1" ocd-rw="R">
-                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF"
-                              lsb="10"/>
+                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1" offset="0x15F" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF" lsb="10"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160"
-                          size="1">
+                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160" size="1">
                     <bitfield caption="MAC Short Address" mask="0x80" name="SHORT_ADDR_07"/>
                     <bitfield caption="MAC Short Address" mask="0x40" name="SHORT_ADDR_06"/>
                     <bitfield caption="MAC Short Address" mask="0x20" name="SHORT_ADDR_05"/>
@@ -1739,12 +1492,10 @@
                     <bitfield caption="MAC Short Address" mask="0x02" name="SHORT_ADDR_01"/>
                     <bitfield caption="MAC Short Address" mask="0x01" name="SHORT_ADDR_00"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1"
-                          offset="0x161" size="1">
+                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1" offset="0x161" size="1">
                     <bitfield caption="MAC Short Address" mask="0xFF" name="SHORT_ADDR_" lsb="10"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0"
-                          offset="0x162" size="1">
+                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0" offset="0x162" size="1">
                     <bitfield caption="MAC Personal Area Network ID" mask="0x80" name="PAN_ID_07"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x40" name="PAN_ID_06"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x20" name="PAN_ID_05"/>
@@ -1754,8 +1505,7 @@
                     <bitfield caption="MAC Personal Area Network ID" mask="0x02" name="PAN_ID_01"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x01" name="PAN_ID_00"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1"
-                          offset="0x163" size="1">
+                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1" offset="0x163" size="1">
                     <bitfield caption="MAC Personal Area Network ID" mask="0xFF" name="PAN_ID_" lsb="10"/>
                 </register>
                 <register caption="Transceiver MAC IEEE Address Register 0" name="IEEE_ADDR_0" offset="0x164" size="1">
@@ -1789,17 +1539,12 @@
                 <register caption="Transceiver MAC IEEE Address Register 7" name="IEEE_ADDR_7" offset="0x16B" size="1">
                     <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="70"/>
                 </register>
-                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0"
-                          offset="0x16C" size="1">
-                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0"
-                              name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
-                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E"
-                              name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
-                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION"
-                              values="SLOTTED_OPERATION_BITF"/>
+                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0" offset="0x16C" size="1">
+                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0" name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
+                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E" name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
+                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION" values="SLOTTED_OPERATION_BITF"/>
                 </register>
-                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0"
-                          offset="0x16D" size="1">
+                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0" offset="0x16D" size="1">
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x80" name="CSMA_SEED_07"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x40" name="CSMA_SEED_06"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x20" name="CSMA_SEED_05"/>
@@ -1809,27 +1554,21 @@
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x02" name="CSMA_SEED_01"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x01" name="CSMA_SEED_00"/>
                 </register>
-                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1"
-                          offset="0x16E" size="1">
-                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE"
-                              values="AACK_FVN_MODE_bitf"/>
+                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1" offset="0x16E" size="1">
+                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE" values="AACK_FVN_MODE_bitf"/>
                     <bitfield caption="Set Frame Pending Sub-field" mask="0x20" name="AACK_SET_PD"/>
                     <bitfield caption="Disable Acknowledgment Frame Transmission" mask="0x10" name="AACK_DIS_ACK"/>
                     <bitfield caption="Set Personal Area Network Coordinator" mask="0x08" name="AACK_I_AM_COORD"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x07" name="CSMA_SEED_1"/>
                 </register>
-                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F"
-                          size="1">
+                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F" size="1">
                     <bitfield caption="Maximum Back-off Exponent" mask="0xF0" name="MAX_BE" values="MAX_BE_bitf"/>
                     <bitfield caption="Minimum Back-off Exponent" mask="0x0F" name="MIN_BE" values="MIN_BE_bitf"/>
                 </register>
-                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176"
-                          size="1">
-                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG"
-                              values="TST_CTRL_DIG_BITF"/>
+                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176" size="1">
+                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG" values="TST_CTRL_DIG_BITF"/>
                 </register>
-                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B"
-                          size="1">
+                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B" size="1">
                     <bitfield caption="Received Frame Length" mask="0xFF" name="RX_LENGTH"/>
                 </register>
                 <register caption="Start of frame buffer" name="TRXFBST" offset="0x180" size="1" mask="0xFF"/>
@@ -1968,10 +1707,8 @@
                 <value caption="2480 MHz" name="F_2480MHZ" value="26"/>
             </value-group>
             <value-group caption="" name="PDT_THRES_bitf">
-                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled"
-                       name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
-                <value caption="Recommended correlator threshold for Antenna Diversity operation"
-                       name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
+                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled" name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
+                <value caption="Recommended correlator threshold for Antenna Diversity operation" name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
             </value-group>
             <value-group caption="" name="SFD_VALUE_BITF">
                 <value caption="IEEE 802.15.4 compliant value of the SFD" name="IEEE_SFD" value="0xA7"/>
@@ -1998,28 +1735,22 @@
                 <value caption="Reserved" name="VAL_0" value="0"/>
                 <value caption="Antenna 1: DIG1=H, DIG2=L" name="ANT_1" value="1"/>
                 <value caption="Antenna 0: DIG1=L, DIG2=H" name="ANT_0" value="2"/>
-                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity"
-                       name="ANT_RESET" value="3"/>
+                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity" name="ANT_RESET" value="3"/>
             </value-group>
             <value-group caption="" name="AVREG_EXT_BITF">
-                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT"
-                       value="0"/>
-                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section."
-                       name="AVDD_EXT" value="1"/>
+                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT" value="0"/>
+                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section." name="AVDD_EXT" value="1"/>
             </value-group>
             <value-group caption="" name="AVDD_OK_BITF">
                 <value caption="Analog voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
                 <value caption="Analog supply voltage has settled" name="VAL_1" value="1"/>
             </value-group>
             <value-group caption="" name="DVREG_EXT_BITF">
-                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT"
-                       value="0"/>
-                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section."
-                       name="DVDD_EXT" value="1"/>
+                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT" value="0"/>
+                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section." name="DVDD_EXT" value="1"/>
             </value-group>
             <value-group caption="" name="DVDD_OK_BITF">
-                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0"
-                       value="0"/>
+                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
                 <value caption="Digital supply voltage has settled" name="VAL_1" value="1"/>
             </value-group>
             <value-group caption="" name="BATMON_OK_bitf">
@@ -2049,10 +1780,8 @@
                 <value caption="3.675V / 2.45V (BATMON_HR=1/0)" name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="XTAL_MODE_BITF">
-                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4"
-                       value="0x4"/>
-                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled."
-                       name="VAL_0xF" value="0xF"/>
+                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4" value="0x4"/>
+                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled." name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="XTAL_TRIM_bitf">
                 <value caption="0.0 pF, trimming capacitors disconnected" name="XTAL_TRIM_MIN" value="0x0"/>
@@ -2061,21 +1790,17 @@
                 <value caption="4.5 pF, trimming capacitor switched on" name="XTAL_TRIM_MAX" value="0xF"/>
             </value-group>
             <value-group caption="" name="RX_PDT_LEVEL_BITF">
-                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered"
-                       name="RX_PDT_LEVEL_MIN" value="0x0"/>
+                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered" name="RX_PDT_LEVEL_MIN" value="0x0"/>
                 <value caption="RX_THRES &gt; RSSI_BASE_VAL + 0 · 3; RSSI &gt; -90 dBm" name="VAL_0x1" value="0x1"/>
                 <value caption="..." name="VAL_0x2" value="0x2"/>
                 <value caption="RX_THRES &gt; RSSI_BASE_VAL + 13 · 3; RSSI &gt; -51 dBm" name="VAL_0xE" value="0xE"/>
-                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX"
-                       value="0xF"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX" value="0xF"/>
             </value-group>
             <value-group caption="" name="RX_RPC_CTRL_BITF">
-                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0"
-                       value="0"/>
+                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0" value="0"/>
                 <value caption="Reserved" name="VAL_1" value="1"/>
                 <value caption="Reserved" name="VAL_2" value="2"/>
-                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3"
-                       value="3"/>
+                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3" value="3"/>
             </value-group>
             <value-group caption="" name="AACK_ACK_TIME_bitf">
                 <value caption="12 symbols acknowledgment time" name="AACK_ACK_TIME_12_SYM" value="0"/>
@@ -2093,12 +1818,10 @@
                 <value caption="Revision D" name="REV_D" value="4"/>
             </value-group>
             <value-group caption="" name="MAN_ID_0_BITF">
-                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F"
-                       name="ATMEL_BYTE_0" value="0x1f"/>
+                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F" name="ATMEL_BYTE_0" value="0x1f"/>
             </value-group>
             <value-group caption="" name="MAN_ID_1_BITF">
-                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F"
-                       name="ATMEL_BYTE_1" value="0x00"/>
+                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F" name="ATMEL_BYTE_1" value="0x00"/>
             </value-group>
             <value-group caption="" name="MAX_FRAME_RETRIES_bitf">
                 <value caption="Retransmission of frame is not attempted." name="VAL_0x0" value="0x0"/>
@@ -2115,10 +1838,8 @@
                 <value caption="Immediate frame re-transmission without performing CSMA-CA" name="VAL_0x7" value="0x7"/>
             </value-group>
             <value-group caption="" name="SLOTTED_OPERATION_BITF">
-                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested."
-                       name="SLOTTED_OP_DIS" value="0"/>
-                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller."
-                       name="SLOTTED_OP_EN" value="1"/>
+                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested." name="SLOTTED_OP_DIS" value="0"/>
+                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller." name="SLOTTED_OP_EN" value="1"/>
             </value-group>
             <value-group caption="" name="AACK_FVN_MODE_bitf">
                 <value caption="Acknowledge frames with version number 0" name="VAL_0" value="0"/>
@@ -2129,17 +1850,14 @@
             <value-group caption="" name="MAX_BE_bitf">
                 <value caption="This value is not valid for the maximum back-off exponent." name="VAL_1" value="1"/>
                 <value caption="This value is not valid for the maximum back-off exponent." name="VAL_2" value="2"/>
-                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3"
-                       value="3"/>
+                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3" value="3"/>
                 <value caption="..." name="VAL_4" value="4"/>
-                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8"
-                       value="8"/>
+                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8" value="8"/>
             </value-group>
             <value-group caption="" name="MIN_BE_bitf">
                 <value caption="Minimum value of minimum back-off exponent." name="VAL_0" value="0"/>
                 <value caption="..." name="VAL_1" value="1"/>
-                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE."
-                       name="VAL_8" value="8"/>
+                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE." name="VAL_8" value="8"/>
             </value-group>
             <value-group caption="" name="TST_CTRL_DIG_BITF">
                 <value caption="NORMAL (no test is active)" name="VAL_0" value="0"/>
@@ -2148,104 +1866,76 @@
         </module>
         <module caption="MAC Symbol Counter" name="SYMCNT">
             <register-group caption="MAC Symbol Counter" name="SYMCNT">
-                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH"
-                          offset="0xFC" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF"
-                              name="SCTSTRHH"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH" offset="0xFC" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSTRHH"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL"
-                          offset="0xFB" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF"
-                              name="SCTSTRHL"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL" offset="0xFB" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSTRHL"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH"
-                          offset="0xFA" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF"
-                              name="SCTSTRLH"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH" offset="0xFA" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSTRLH"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL"
-                          offset="0xF9" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF"
-                              name="SCTSTRLL"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL" offset="0xF9" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSTRLL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 HH-Byte" mask="0xFF" name="SCOCR1HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 HL-Byte" mask="0xFF" name="SCOCR1HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 LH-Byte" mask="0xFF" name="SCOCR1LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 LL-Byte" mask="0xFF" name="SCOCR1LL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 HH-Byte" mask="0xFF" name="SCOCR2HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 HL-Byte" mask="0xFF" name="SCOCR2HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 LH-Byte" mask="0xFF" name="SCOCR2LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 LL-Byte" mask="0xFF" name="SCOCR2LL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 HH-Byte" mask="0xFF" name="SCOCR3HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 HL-Byte" mask="0xFF" name="SCOCR3HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 LH-Byte" mask="0xFF" name="SCOCR3LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 LL-Byte" mask="0xFF" name="SCOCR3LL"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSRHH"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSRHL"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSRLH"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSRLL"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register HH-Byte" mask="0xFF" name="SCBTSRHH"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register HL-Byte" mask="0xFF" name="SCBTSRHL"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register LH-Byte" mask="0xFF" name="SCBTSRLH"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register LL-Byte" mask="0xFF" name="SCBTSRLL"/>
                 </register>
                 <register caption="Symbol Counter Register HH-Byte" name="SCCNTHH" offset="0xE4" size="1">
@@ -2278,8 +1968,7 @@
                 <register caption="Symbol Counter Control Register 1" name="SCCR1" offset="0xDD" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res" lsb="5"/>
                     <bitfield caption="Symbol Counter Beacon Timestamp Mask Register" mask="0x20" name="SCBTSM"/>
-                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"
-                              name="SCCKDIV" values="SCCKDIV_BITF"/>
+                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C" name="SCCKDIV" values="SCCKDIV_BITF"/>
                     <bitfield caption="Enable External Clock Source on PG2" mask="0x02" name="SCEECLK"/>
                     <bitfield caption="Backoff Slot Counter enable" mask="0x01" name="SCENBO"/>
                 </register>
@@ -2293,32 +1982,21 @@
                 </register>
                 <register caption="Symbol Counter Compare Source Register" name="SCCSR" offset="0xDB" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"
-                              name="SCCS3" values="SCCS3_BITF"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C"
-                              name="SCCS2" values="SCCS2_BITF"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03"
-                              name="SCCS1" values="SCCS1_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30" name="SCCS3" values="SCCS3_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C" name="SCCS2" values="SCCS2_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03" name="SCCS1" values="SCCS1_BITF"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH"
-                          offset="0xDA" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"
-                              name="SCRSTRHH"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH" offset="0xDA" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF" name="SCRSTRHH"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL"
-                          offset="0xD9" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF"
-                              name="SCRSTRHL"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL" offset="0xD9" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF" name="SCRSTRHL"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH"
-                          offset="0xD8" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF"
-                              name="SCRSTRLH"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH" offset="0xD8" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF" name="SCRSTRLH"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL"
-                          offset="0xD7" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF"
-                              name="SCRSTRLL"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL" offset="0xD7" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF" name="SCRSTRLL"/>
                 </register>
             </register-group>
             <value-group caption="" name="SCCKDIV_BITF">
@@ -2331,28 +2009,19 @@
                 <value caption="Transceiver Clock divided by 4,   (4MHz)" name="VAL_6" value="6"/>
             </value-group>
             <value-group caption="" name="SCCS3_BITF">
-                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
             <value-group caption="" name="SCCS2_BITF">
-                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
             <value-group caption="" name="SCCS1_BITF">
-                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
         </module>
         <module caption="EEPROM" name="EEPROM">
@@ -2387,39 +2056,28 @@
                 </register>
             </register-group>
             <value-group caption="" name="OCDR_DATA_BITF">
-                <value caption="Refer to the debugger documentation for further information on how to use this register."
-                       name="VAL_0" value="0"/>
+                <value caption="Refer to the debugger documentation for further information on how to use this register." name="VAL_0" value="0"/>
             </value-group>
         </module>
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL3"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL3"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
-                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT"
-                              values="INTERRUPT_REQ_ENABLE_BITF"/>
+                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT" values="INTERRUPT_REQ_ENABLE_BITF"/>
                 </register>
                 <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
-                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF"
-                              values="INTERRUPT_EXT_FLAG_BITF"/>
+                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF" values="INTERRUPT_EXT_FLAG_BITF"/>
                 </register>
                 <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
                     <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="16"/>
@@ -2441,12 +2099,9 @@
             </register-group>
             <value-group caption="" name="INTERRUPT_SENSE_CONTROL3">
                 <value caption="The low level of INTn generates an interrupt request." name="VAL_0x00" value="0x00"/>
-                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01"
-                       value="0x01"/>
-                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01" value="0x01"/>
+                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02" value="0x02"/>
+                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="INTERRUPT_REQ_ENABLE_BITF">
                 <value caption="All external pin interrupts are disabled." name="VAL_0x00" value="0x00"/>
@@ -2454,11 +2109,9 @@
             </value-group>
             <value-group caption="" name="INTERRUPT_EXT_FLAG_BITF">
                 <value caption="No edge or logic change on INT7:0 occurred." name="VAL_0x00" value="0x00"/>
-                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request."
-                       name="VAL_0x01" value="0x01"/>
+                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request." name="VAL_0x01" value="0x01"/>
                 <value caption="..." name="VAL_0x02" value="0x02"/>
-                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request."
-                       name="VAL_0x80" value="0x80"/>
+                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request." name="VAL_0x80" value="0x80"/>
             </value-group>
         </module>
         <module caption="Analog-to-Digital Converter" name="ADC">
@@ -2475,8 +2128,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="AVDD Supply Voltage OK" mask="0x80" name="AVDDOK"/>
@@ -2484,12 +2136,10 @@
                     <bitfield caption="Reference Voltage OK" mask="0x20" name="REFOK"/>
                     <bitfield caption="Analog Channel Change" mask="0x10" name="ACCH"/>
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="The ADC Control and Status Register C" name="ADCSRC" offset="0x77" size="1">
-                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT"
-                              values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
+                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT" values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
                     <bitfield caption="Reserved" mask="0x20" name="Res0"/>
                     <bitfield caption="ADC Start-up Time" mask="0x1F" name="ADSUT" values="ANALOG_ADC_STARTUP_TIME"/>
                 </register>
@@ -2517,10 +2167,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF9">
                 <value caption="AREF, Internal reference voltage generation turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVDD with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -2599,13 +2247,11 @@
                     <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
                 </register>
                 <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1">
-                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL"
-                              values="OSCCAL_BITF"/>
+                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL" values="OSCCAL_BITF"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
                 </register>
                 <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
                     <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
@@ -2674,8 +2320,7 @@
                 <value caption="Reserved" name="VAL_0xC" value="0xC"/>
                 <value caption="Reserved" name="VAL_0xD" value="0xD"/>
                 <value caption="Reserved" name="VAL_0xE" value="0xE"/>
-                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed."
-                       name="VAL_0xF" value="0xF"/>
+                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed." name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
                 <value caption="Idle" name="IDLE" value="0x00"/>
@@ -2695,8 +2340,7 @@
             <register-group caption="FLASH Controller" name="FLASH">
                 <register caption="Flash Extended-Mode Control-Register" name="NEMCR" offset="0x75" size="1">
                     <bitfield caption="Enable Extended Address Mode for Extra Rows" mask="0x40" name="ENEAM"/>
-                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM"
-                              values="NEMCR_ADDRESS_BITF"/>
+                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM" values="NEMCR_ADDRESS_BITF"/>
                 </register>
                 <register caption="Reference Voltage Calibration Register" name="BGCR" offset="0x67" size="1">
                     <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
@@ -2748,14 +2392,11 @@
                     <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
                     <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
                 </register>
-                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130"
-                          size="1">
+                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130" size="1">
                     <bitfield caption="Low-Byte Data Register Bits" mask="0x0F" name="LLDRL" values="LLDRL_VALUE_BITF"/>
                 </register>
-                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131"
-                          size="1">
-                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH"
-                              values="LLDRH_VALUE_BITF"/>
+                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131" size="1">
+                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH" values="LLDRH_VALUE_BITF"/>
                 </register>
                 <register caption="Low Leakage Voltage Regulator Control Register" name="LLCR" offset="0x12F" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
@@ -2780,16 +2421,12 @@
                 </register>
             </register-group>
             <value-group caption="" name="LLDRL_VALUE_BITF">
-                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08"
-                       value="0x08"/>
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00" value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08" value="0x08"/>
             </value-group>
             <value-group caption="" name="LLDRH_VALUE_BITF">
-                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10"
-                       value="0x10"/>
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00" value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10" value="0x10"/>
             </value-group>
             <value-group caption="" name="PAD_IO_bitf">
                 <value caption="2 mA" name="PAD_IO_2MA" value="0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA645.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA645.xml
index e8c41909..eaa52d93 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA645.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA645.xml
@@ -7,16 +7,11 @@
     <device name="ATmega645" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -44,32 +38,27 @@
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -77,26 +66,22 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -109,8 +94,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -123,8 +107,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -137,8 +120,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -151,8 +133,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -165,8 +146,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -179,8 +159,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -193,56 +172,47 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -321,8 +291,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -383,8 +352,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -415,8 +383,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -441,82 +408,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
@@ -570,8 +499,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -592,8 +520,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -611,16 +538,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -719,8 +644,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
@@ -763,8 +687,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -777,8 +700,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -857,14 +779,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -900,14 +820,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -950,30 +868,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -996,8 +907,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6450.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6450.xml
index edbacbc2..f9752994 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6450.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6450.xml
@@ -6,16 +6,11 @@
     <device name="ATmega6450" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,38 +37,32 @@
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -82,20 +70,17 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -108,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -122,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -136,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -150,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -164,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -178,8 +158,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -190,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTH" group="P" index="0" pad="PH0"/>
                         <signal function="PORTH" group="P" index="1" pad="PH1"/>
@@ -204,8 +182,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
                         <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
@@ -219,56 +196,47 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -350,8 +318,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -412,8 +379,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -444,8 +410,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -470,82 +435,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
@@ -599,8 +526,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -621,8 +547,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -640,16 +565,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -795,8 +718,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
@@ -839,8 +761,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -918,14 +839,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -961,14 +880,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -1011,30 +928,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -1057,8 +967,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1089,8 +998,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6450A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6450A.xml
index b711aa2d..d77ab7db 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6450A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6450A.xml
@@ -6,16 +6,11 @@
     <device name="ATmega6450A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,38 +37,32 @@
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -82,20 +70,17 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -108,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -122,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -136,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -150,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -164,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -178,8 +158,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -190,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTH" group="P" index="0" pad="PH0"/>
                         <signal function="PORTH" group="P" index="1" pad="PH1"/>
@@ -204,8 +182,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
                         <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
@@ -219,56 +196,47 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -350,8 +318,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -412,8 +379,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -444,8 +410,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -470,82 +435,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
@@ -599,8 +526,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -621,8 +547,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -640,16 +565,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -795,8 +718,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
@@ -839,8 +761,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -918,14 +839,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -961,14 +880,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -1011,30 +928,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -1057,8 +967,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1089,8 +998,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6450P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6450P.xml
index 9184788d..b01f9e9f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6450P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6450P.xml
@@ -6,16 +6,11 @@
     <device name="ATmega6450P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,38 +37,32 @@
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -82,20 +70,17 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -108,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -122,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -136,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -150,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -164,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -178,8 +158,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -190,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTH" group="P" index="0" pad="PH0"/>
                         <signal function="PORTH" group="P" index="1" pad="PH1"/>
@@ -204,8 +182,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
                         <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
@@ -219,56 +196,47 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -350,8 +318,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -412,8 +379,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -444,8 +410,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -470,82 +435,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
@@ -599,8 +526,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -621,8 +547,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -640,16 +565,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -795,8 +718,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
@@ -839,8 +761,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -918,14 +839,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -961,14 +880,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -1011,30 +928,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -1057,8 +967,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1089,8 +998,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA645A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA645A.xml
index 526e092e..f9c095c4 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA645A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA645A.xml
@@ -7,16 +7,11 @@
     <device name="ATmega645A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -44,32 +38,27 @@
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -77,26 +66,22 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -109,8 +94,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -123,8 +107,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -137,8 +120,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -151,8 +133,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -165,8 +146,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -179,8 +159,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -193,56 +172,47 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -321,8 +291,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -383,8 +352,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -415,8 +383,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -441,82 +408,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
@@ -570,8 +499,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -592,8 +520,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -611,16 +538,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -719,8 +644,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
@@ -764,8 +688,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -778,8 +701,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -858,14 +780,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -901,14 +821,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -951,30 +869,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -997,8 +908,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA645P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA645P.xml
index a682bc99..defb7ea9 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA645P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA645P.xml
@@ -7,16 +7,11 @@
     <device name="ATmega645P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -44,32 +38,27 @@
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -77,26 +66,22 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -109,8 +94,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -123,8 +107,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -137,8 +120,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -151,8 +133,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -165,8 +146,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -179,8 +159,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -193,56 +172,47 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -321,8 +291,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -383,8 +352,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -415,8 +383,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -441,82 +408,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
@@ -570,8 +499,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -592,8 +520,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -611,16 +538,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -721,8 +646,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
@@ -766,8 +690,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -780,8 +703,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -860,14 +782,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -903,14 +823,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -953,30 +871,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -999,8 +910,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA649.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA649.xml
index bb2c8d50..c4d93ab5 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA649.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA649.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega649V-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega649V-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="QFN64" package="QFN64"
-                 vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega649-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64 " vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega649-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega649V-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP64" package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega649V-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega649-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64" package="TQFP64 " vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega649-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega649" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -50,8 +40,7 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG4"/>
                         <signal group="OCA" function="default" pad="PB4"/>
@@ -60,8 +49,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG3"/>
                         <signal group="ICP" function="default" pad="PD0"/>
@@ -73,8 +61,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB7"/>
                         <signal group="TOSC" function="default" pad="XTAL2"/>
@@ -83,20 +70,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="SCK" function="default" pad="PB1"/>
@@ -107,8 +91,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -121,8 +104,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -135,8 +117,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -149,8 +130,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -163,8 +143,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -177,8 +156,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -191,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -205,8 +182,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -215,8 +191,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -227,8 +202,7 @@
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                     <signals>
                         <signal group="SEG" index="0" function="default" pad="PA4"/>
                         <signal group="SEG" index="1" function="default" pad="PA5"/>
@@ -264,8 +238,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PE0"/>
                         <signal group="PCINT" index="1" function="default" pad="PE1"/>
@@ -289,8 +262,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PE7"/>
                     </signals>
@@ -301,8 +273,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal group="DI" function="default" pad="PE5"/>
                         <signal group="DO" function="default" pad="PE6"/>
@@ -311,8 +282,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -327,14 +297,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" function="default" pad="PE0"/>
                         <signal group="TXD" function="default" pad="PE1"/>
@@ -345,20 +313,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -438,8 +403,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -500,8 +464,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -532,8 +495,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -558,82 +520,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
@@ -687,8 +611,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -709,8 +632,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -728,16 +650,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -883,8 +803,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
@@ -928,8 +847,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1018,8 +936,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -1098,14 +1015,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -1142,30 +1057,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -1193,14 +1101,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -1237,8 +1143,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490.xml
index 22536e93..835870a2 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490.xml
@@ -6,16 +6,11 @@
     <device name="ATmega6490" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,38 +37,32 @@
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -82,20 +70,17 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -108,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -122,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -136,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -150,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -164,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -178,8 +158,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -190,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTH" group="P" index="0" pad="PH0"/>
                         <signal function="PORTH" group="P" index="1" pad="PH1"/>
@@ -204,8 +182,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
                         <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
@@ -219,62 +196,52 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -356,8 +323,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -418,8 +384,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -450,8 +415,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -476,82 +440,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
@@ -605,8 +531,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -627,8 +552,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -646,16 +570,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -801,8 +723,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
@@ -846,8 +767,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -925,14 +845,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -969,30 +887,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -1020,14 +931,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -1064,8 +973,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1176,8 +1084,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490A.xml
index a4572007..0e9f3df2 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490A.xml
@@ -6,16 +6,11 @@
     <device name="ATmega6490A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,38 +37,32 @@
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -82,20 +70,17 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -108,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -122,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -136,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -150,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -164,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -178,8 +158,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -190,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTH" group="P" index="0" pad="PH0"/>
                         <signal function="PORTH" group="P" index="1" pad="PH1"/>
@@ -204,8 +182,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
                         <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
@@ -219,62 +196,52 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -356,8 +323,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -418,8 +384,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -450,8 +415,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -476,82 +440,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
@@ -605,8 +531,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -627,8 +552,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -646,16 +570,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -801,8 +723,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
@@ -846,8 +767,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -925,14 +845,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -969,30 +887,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -1020,14 +931,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -1064,8 +973,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1176,8 +1084,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490P.xml
index 4a167dc1..1df2da54 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490P.xml
@@ -6,16 +6,11 @@
     <device name="ATmega6490P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -32,8 +27,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -43,38 +37,32 @@
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -82,20 +70,17 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -108,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -122,8 +106,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -136,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -150,8 +132,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -164,8 +145,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -178,8 +158,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -190,8 +169,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
-                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTH" group="P" index="0" pad="PH0"/>
                         <signal function="PORTH" group="P" index="1" pad="PH1"/>
@@ -204,8 +182,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
-                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
                         <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
@@ -219,62 +196,52 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -356,8 +323,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -418,8 +384,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -450,8 +415,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -476,82 +440,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
@@ -605,8 +531,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -627,8 +552,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -646,16 +570,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -801,8 +723,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
@@ -846,8 +767,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -925,14 +845,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -969,30 +887,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -1020,14 +931,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -1064,8 +973,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
@@ -1176,8 +1084,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA649A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA649A.xml
index f23aff55..db8d1116 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA649A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA649A.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega649A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega649A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64"
-                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega649A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64" package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega649A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega649A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG4"/>
                         <signal group="OCA" function="default" pad="PB4"/>
@@ -56,8 +47,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG3"/>
                         <signal group="ICP" function="default" pad="PD0"/>
@@ -69,8 +59,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB7"/>
                         <signal group="TOSC" function="default" pad="XTAL2"/>
@@ -79,20 +68,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="SCK" function="default" pad="PB1"/>
@@ -103,8 +89,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -117,8 +102,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -131,8 +115,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -145,8 +128,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -159,8 +141,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -173,8 +154,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -187,8 +167,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -201,8 +180,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -211,8 +189,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -223,8 +200,7 @@
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                     <signals>
                         <signal group="SEG" index="0" function="default" pad="PA4"/>
                         <signal group="SEG" index="1" function="default" pad="PA5"/>
@@ -260,8 +236,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PE0"/>
                         <signal group="PCINT" index="1" function="default" pad="PE1"/>
@@ -285,8 +260,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PE7"/>
                     </signals>
@@ -297,8 +271,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal group="DI" function="default" pad="PE5"/>
                         <signal group="DO" function="default" pad="PE6"/>
@@ -307,8 +280,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -323,14 +295,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" function="default" pad="PE0"/>
                         <signal group="TXD" function="default" pad="PE1"/>
@@ -341,20 +311,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -434,8 +401,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -496,8 +462,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -528,8 +493,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -554,82 +518,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
@@ -683,8 +609,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -705,8 +630,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -724,16 +648,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -879,8 +801,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
@@ -924,8 +845,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1014,8 +934,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -1094,14 +1013,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -1138,30 +1055,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -1189,14 +1099,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -1233,8 +1141,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA649P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA649P.xml
index b4c6cd42..3da765b9 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA649P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA649P.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega649P-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
-                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega649P-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64"
-                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega649P-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64" package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega649P-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega649P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG4"/>
                         <signal group="OCA" function="default" pad="PB4"/>
@@ -56,8 +47,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PG3"/>
                         <signal group="ICP" function="default" pad="PD0"/>
@@ -69,8 +59,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB7"/>
                         <signal group="TOSC" function="default" pad="XTAL2"/>
@@ -79,20 +68,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB0"/>
                         <signal group="SCK" function="default" pad="PB1"/>
@@ -103,8 +89,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -117,8 +102,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -131,8 +115,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -145,8 +128,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -159,8 +141,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -173,8 +154,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -187,8 +167,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -201,8 +180,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -211,8 +189,7 @@
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -223,8 +200,7 @@
             </module>
             <module name="LCD">
                 <instance name="LCD" caption="Liquid Crystal Display">
-                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
-                                    caption="Liquid Crystal Display"/>
+                    <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data" caption="Liquid Crystal Display"/>
                     <signals>
                         <signal group="SEG" index="0" function="default" pad="PA4"/>
                         <signal group="SEG" index="1" function="default" pad="PA5"/>
@@ -260,8 +236,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" function="default" pad="PE0"/>
                         <signal group="PCINT" index="1" function="default" pad="PE1"/>
@@ -285,8 +260,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PE7"/>
                     </signals>
@@ -297,8 +271,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal group="DI" function="default" pad="PE5"/>
                         <signal group="DO" function="default" pad="PE6"/>
@@ -307,8 +280,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -323,14 +295,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" function="default" pad="PE0"/>
                         <signal group="TXD" function="default" pad="PE1"/>
@@ -341,20 +311,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -434,8 +401,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -496,8 +462,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -528,8 +493,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
@@ -554,82 +518,44 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
@@ -683,8 +609,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
@@ -705,8 +630,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -724,16 +648,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -879,8 +801,7 @@
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
                     <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
@@ -924,8 +845,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
-                          mask="0xFF" ocd-rw=""/>
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
                 </register>
@@ -1014,8 +934,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
                     <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
@@ -1094,14 +1013,12 @@
                     <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
                     <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -1138,30 +1055,23 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -1189,14 +1099,12 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
                     <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
                 </register>
@@ -1233,8 +1141,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64A.xml
index 802649df..bd9e3f90 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64A.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega64A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
-                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega64A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega64A-AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64"
-                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega64A-MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64"
-                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64" package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64A-AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64" package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64A-MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64" package="QFN64" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega64A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -40,8 +31,7 @@
                 <memory-segment name="XRAM" start="0x1100" size="0xef00" type="ram" external="true"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
@@ -51,8 +41,7 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PE2"/>
                         <signal group="AIN" index="1" function="default" pad="PE3"/>
@@ -61,8 +50,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PF0"/>
                         <signal group="ADC" index="1" function="default" pad="PF1"/>
@@ -77,8 +65,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="MISO" function="default" pad="PB3"/>
                         <signal group="MOSI" function="default" pad="PB2"/>
@@ -89,8 +76,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PD1"/>
                         <signal group="SCL" function="default" pad="PD0"/>
@@ -99,8 +85,7 @@
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" function="default" pad="PE0"/>
                         <signal group="TXD" function="default" pad="PE1"/>
@@ -108,8 +93,7 @@
                     </signals>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" function="default" pad="PD2"/>
                         <signal group="TXD" function="default" pad="PD3"/>
@@ -119,8 +103,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -128,14 +111,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                     <signals>
                         <signal group="TCK" function="default" pad="PF4"/>
                         <signal group="TMS" function="default" pad="PF5"/>
@@ -146,8 +127,7 @@
             </module>
             <module name="MISC">
                 <instance name="MISC" caption="Other Registers">
-                    <register-group name="MISC" name-in-module="MISC" offset="0x00" address-space="data"
-                                    caption="Other Registers"/>
+                    <register-group name="MISC" name-in-module="MISC" offset="0x00" address-space="data" caption="Other Registers"/>
                     <signals>
                         <signal group="PDI" function="default" pad="PE0"/>
                         <signal group="PDO" function="default" pad="PE1"/>
@@ -178,8 +158,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="0" function="default" pad="PD0"/>
                         <signal group="INT" index="1" function="default" pad="PD1"/>
@@ -194,14 +173,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -214,8 +191,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -228,8 +204,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -242,8 +217,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -256,8 +230,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -270,8 +243,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PF0" index="0"/>
                         <signal group="P" function="default" pad="PF1" index="1"/>
@@ -284,8 +256,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PG0" index="0"/>
                         <signal group="P" function="default" pad="PG1" index="1"/>
@@ -297,8 +268,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC0" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OC" function="default" pad="PB4"/>
                     </signals>
@@ -306,8 +276,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB5"/>
                         <signal group="OCB" function="default" pad="PB6"/>
@@ -317,8 +286,7 @@
                     </signals>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PE3"/>
                         <signal group="OCB" function="default" pad="PE4"/>
@@ -329,8 +297,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC2" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD7"/>
                         <signal group="OC" function="default" pad="PB7"/>
@@ -339,26 +306,22 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -450,8 +413,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -512,8 +474,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -557,8 +518,7 @@
                     <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x10" name="CKOPT"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
-                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
                     <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
                 </register>
@@ -571,116 +531,61 @@
                 <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
                 <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
-                       value="0x01"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
-                       value="0x11"/>
-                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS"
-                       value="0x21"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
-                       value="0x02"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
-                       value="0x12"/>
-                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
-                       value="0x22"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
-                       value="0x13"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
-                       value="0x23"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
-                       value="0x04"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
-                       value="0x14"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
-                       value="0x24"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
-                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
-                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
-                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
-                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
-                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
-                       value="0x09"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
-                       value="0x19"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
-                       value="0x29"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
-                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
-                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
-                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
-                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
-                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
-                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
-                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
-                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
-                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
-                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
-                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS" value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS" value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS" value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS" value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS" value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS" value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS" value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS" value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS" value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS" value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS" value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS" value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms" name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms" name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms" name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms" name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms" name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms" name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms" name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms" name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms" name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms" name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms" name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms" name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms" name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms" name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms" name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms" name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms" name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms" name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms" name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms" name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms" name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms" name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms" name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms" name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
@@ -720,16 +625,14 @@
                 <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -747,27 +650,23 @@
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x26" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x8E" size="1">
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_ADC_V_REF2">
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -878,8 +777,7 @@
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
                     <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
                 </register>
-                <register caption="USART Baud Rate Register Hight Byte" name="UBRR0H" offset="0x90" size="1"
-                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR0H" offset="0x90" size="1" mask="0x0F"/>
                 <register caption="USART Baud Rate Register Low Byte" name="UBRR0L" offset="0x29" size="1" mask="0xFF"/>
             </register-group>
             <register-group caption="USART" name="USART1">
@@ -911,8 +809,7 @@
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
                     <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
                 </register>
-                <register caption="USART Baud Rate Register Hight Byte" name="UBRR1H" offset="0x98" size="1"
-                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR1H" offset="0x98" size="1" mask="0x0F"/>
                 <register caption="USART Baud Rate Register Low Byte" name="UBRR1L" offset="0x99" size="1" mask="0xFF"/>
             </register-group>
             <value-group caption="" name="COMM_USART_MODE">
@@ -962,8 +859,7 @@
                 </register>
                 <register caption="External Memory Control Register A" name="XMCRA" offset="0x6D" size="1">
                     <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS"/>
-                    <bitfield caption="Wait state select bit lower page" mask="0x0C" name="SRW0"
-                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x0C" name="SRW0" values="CPU_WAIT_STATES"/>
                     <bitfield caption="Wait state select bit upper page" mask="0x02" name="SRW11"/>
                 </register>
                 <register caption="External Memory Control Register B" name="XMCRB" offset="0x6C" size="1">
@@ -992,8 +888,7 @@
                 <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
                 <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
                 <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
-                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
                 <value value="0x00" caption="1.0 MHz " name="1_0_MHz_"/>
@@ -1025,8 +920,7 @@
         </module>
         <module caption="JTAG Interface" name="JTAG">
             <register-group caption="JTAG Interface" name="JTAG">
-                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x42" size="1"
-                          ocd-rw="">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x42" size="1" ocd-rw="">
                     <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
                 </register>
                 <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
@@ -1042,32 +936,23 @@
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
                     <bitfield caption="Pull Up Disable" mask="0x04" name="PUD"/>
                     <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x02" name="PSR0"/>
-                    <bitfield caption="Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1" mask="0x01"
-                              name="PSR321"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1" mask="0x01" name="PSR321"/>
                 </register>
             </register-group>
         </module>
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x5A" size="1">
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x59" size="1">
                     <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
@@ -1150,8 +1035,7 @@
                     <bitfield caption="Timer/Counter Control Register 0 Update Busy" mask="0x01" name="TCR0UB"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
-                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02" name="OCIE0"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
@@ -1184,15 +1068,12 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
-                              name="OCIE1A"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
-                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
-                    <bitfield caption="Timer/Counter 1, Output Compare Match C Interrupt Enable" mask="0x01"
-                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter 1, Output Compare Match C Interrupt Enable" mask="0x01" name="OCIE1C"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
@@ -1200,8 +1081,7 @@
                     <bitfield caption="Output Compare Flag 1B" mask="0x08" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
                 </register>
-                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
-                          ocd-rw="R">
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter 1, Output Compare C Match Flag" mask="0x01" name="OCF1C"/>
                 </register>
                 <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
@@ -1226,28 +1106,20 @@
                     <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x78" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2" mask="0xFFFF"/>
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC3">
                 <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="TICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x10"
-                              name="OCIE3A"/>
-                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x08"
-                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x10" name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x08" name="OCIE3B"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x04" name="TOIE3"/>
-                    <bitfield caption="Timer/Counter3, Output Compare Match Interrupt Enable" mask="0x02"
-                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3, Output Compare Match Interrupt Enable" mask="0x02" name="OCIE3C"/>
                 </register>
-                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
-                          ocd-rw="R">
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
                     <bitfield caption="Output Compare Flag 3A" mask="0x10" name="OCF3A"/>
                     <bitfield caption="Output Compare Flag 3B" mask="0x08" name="OCF3B"/>
@@ -1276,14 +1148,10 @@
                     <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output compare Register C Bytes" name="OCR3C" offset="0x82" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output compare Register C Bytes" name="OCR3C" offset="0x82" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -1338,8 +1206,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
-                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
                 </register>
             </register-group>
             <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64C1.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64C1.xml
index 8948109d..5ef6376e 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64C1.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64C1.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega64C1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
-                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega64C1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
-                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64C1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32" package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64C1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32" package="QFN32" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega64C1" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
@@ -60,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
@@ -74,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
@@ -88,8 +77,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
@@ -99,14 +87,12 @@
             </module>
             <module name="CAN">
                 <instance name="CAN" caption="Controller Area Network">
-                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
-                                    caption="Controller Area Network"/>
+                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data" caption="Controller Area Network"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="AC" group="ACMP" index="0" pad="PD7"/>
                         <signal function="AC" group="ACMP" index="1" pad="PC6"/>
@@ -121,8 +107,7 @@
             </module>
             <module name="DAC">
                 <instance name="DAC" caption="Digital-to-Analog Converter">
-                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
-                                    caption="Digital-to-Analog Converter"/>
+                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data" caption="Digital-to-Analog Converter"/>
                     <signals>
                         <signal function="DAC" group="D2A" pad="PC7"/>
                     </signals>
@@ -130,8 +115,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -139,8 +123,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="TC0" group="T0" pad="PC2"/>
                         <signal function="TC0" group="OC0A" pad="PD3"/>
@@ -150,8 +133,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal function="TC1" group="T1" pad="PC3"/>
                         <signal function="TC1" group="ICP1A" pad="PD4"/>
@@ -163,8 +145,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PE2"/>
                         <signal function="ADC" group="ADC" index="1" pad="PD4"/>
@@ -182,8 +163,7 @@
             </module>
             <module name="LINUART">
                 <instance name="LINUART" caption="Local Interconnect Network">
-                    <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
-                                    caption="Local Interconnect Network"/>
+                    <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data" caption="Local Interconnect Network"/>
                     <signals>
                         <signal function="LIN" group="TXLIN" pad="PD3"/>
                         <signal function="LIN" group="RXLIN" pad="PD4"/>
@@ -192,8 +172,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal function="SPI" group="MISO" pad="PB0"/>
                         <signal function="SPI_ALT" group="MISO" pad="PD2"/>
@@ -208,14 +187,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXINT" group="INT" index="0" pad="PD6"/>
                         <signal function="EXINT" group="INT" index="1" pad="PB2"/>
@@ -253,26 +230,22 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="ANACOMP0" caption="Analog Comparator 0"/>
             <interrupt index="2" name="ANACOMP1" caption="Analog Comparator 1"/>
             <interrupt index="3" name="ANACOMP2" caption="Analog Comparator 2"/>
@@ -360,8 +333,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -422,8 +394,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -457,8 +428,7 @@
                     <bitfield caption="PSC Reset Behavior" mask="0x20" name="PSCRB"/>
                     <bitfield caption="PSCOUTnA Reset Value" mask="0x10" name="PSCRVA"/>
                     <bitfield caption="PSC0UTnB Reset Value" mask="0x08" name="PSCRVB"/>
-                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
                     <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
@@ -476,112 +446,59 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -691,19 +608,15 @@
                 <register caption="Enable MOb Register 2" name="CANEN2" offset="0xDC" size="1" ocd-rw="R">
                     <bitfield caption="Enable MObs" mask="0x3F" name="ENMOB"/>
                 </register>
-                <register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00"
-                          ocd-rw=""/>
+                <register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00" ocd-rw=""/>
                 <register caption="Enable Interrupt MOb Register 2" name="CANIE2" offset="0xDE" size="1">
                     <bitfield caption="Interrupt Enable  MObs" mask="0x3F" name="IEMOB"/>
                 </register>
-                <register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1"
-                          mask="0x00" ocd-rw=""/>
-                <register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1"
-                          ocd-rw="R">
+                <register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1" mask="0x00" ocd-rw=""/>
+                <register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1" ocd-rw="R">
                     <bitfield caption="Status of Interrupt MObs" mask="0x3F" name="SIT"/>
                 </register>
-                <register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1"
-                          mask="0x00" ocd-rw=""/>
+                <register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1" mask="0x00" ocd-rw=""/>
                 <register caption="CAN Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
                     <bitfield caption="Baud Rate Prescaler bits" mask="0x7E" name="BRP"/>
                 </register>
@@ -720,12 +633,9 @@
                 <register caption="Timer Register Low" name="CANTIML" offset="0xE6" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="Timer Register High" name="CANTIMH" offset="0xE7" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="TTC Timer Register Low" name="CANTTCL" offset="0xE8" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="TTC Timer Register High" name="CANTTCH" offset="0xE9" size="1" mask="0xFF"
-                          ocd-rw=""/>
-                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
-                          ocd-rw="R"/>
-                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
-                          ocd-rw="R"/>
+                <register caption="TTC Timer Register High" name="CANTTCH" offset="0xE9" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
                     <bitfield caption="Highest Priority MOb Number bits" mask="0xF0" name="HPMOB"/>
                     <bitfield caption="CAN General Purpose bits" mask="0x0F" name="CGP"/>
@@ -781,23 +691,20 @@
                 <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x95" size="1">
                     <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
-                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
                     <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
                 </register>
                 <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x96" size="1">
                     <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
                     <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
-                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
                 </register>
                 <register caption="Analog Comparator 3 Control Register" name="AC3CON" offset="0x97" size="1">
                     <bitfield caption="Analog Comparator 3 Enable Bit" mask="0x80" name="AC3EN"/>
                     <bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
-                    <bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
                 </register>
                 <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
@@ -828,8 +735,7 @@
                 </register>
                 <register caption="DAC Control Register" name="DACON" offset="0x90" size="1">
                     <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
-                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
-                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS" values="ANALOG_DAC_AUTO_TRIGGER"/>
                     <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
                     <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
                 </register>
@@ -880,8 +786,7 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
@@ -951,14 +856,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -975,10 +877,8 @@
                     <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Timer1 Input Capture Selection Bit" mask="0x40" name="ICPSEL1"/>
@@ -1000,14 +900,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -1022,20 +919,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -1057,8 +950,7 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
-                              values="ANALOG_ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX" values="ANALOG_ADC_MUXPOS"/>
                 </register>
                 <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
@@ -1073,8 +965,7 @@
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
                     <bitfield caption="Current Source Enable" mask="0x40" name="ISRCEN"/>
                     <bitfield caption="Analog Reference pin Enable" mask="0x20" name="AREFEN"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
@@ -1254,8 +1145,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1276,14 +1166,10 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64M1.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64M1.xml
index b1e0b01f..591499c6 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64M1.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64M1.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega64M1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
-                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega64M1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
-                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64M1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32" package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64M1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32" package="QFN32" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega64M1" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
@@ -60,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
@@ -74,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
@@ -88,8 +77,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
                         <signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
@@ -99,14 +87,12 @@
             </module>
             <module name="CAN">
                 <instance name="CAN" caption="Controller Area Network">
-                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
-                                    caption="Controller Area Network"/>
+                    <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data" caption="Controller Area Network"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="AC" group="ACMP" index="0" pad="PD7"/>
                         <signal function="AC" group="ACMP" index="1" pad="PC6"/>
@@ -121,8 +107,7 @@
             </module>
             <module name="DAC">
                 <instance name="DAC" caption="Digital-to-Analog Converter">
-                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
-                                    caption="Digital-to-Analog Converter"/>
+                    <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data" caption="Digital-to-Analog Converter"/>
                     <signals>
                         <signal function="DAC" group="D2A" pad="PC7"/>
                     </signals>
@@ -130,8 +115,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2E"/>
                     </parameters>
@@ -139,8 +123,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="TC0" group="T0" pad="PC2"/>
                         <signal function="TC0" group="OC0A" pad="PD3"/>
@@ -150,8 +133,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal function="TC1" group="T1" pad="PC3"/>
                         <signal function="TC1" group="ICP1A" pad="PD4"/>
@@ -163,8 +145,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PE2"/>
                         <signal function="ADC" group="ADC" index="1" pad="PD4"/>
@@ -182,8 +163,7 @@
             </module>
             <module name="LINUART">
                 <instance name="LINUART" caption="Local Interconnect Network">
-                    <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
-                                    caption="Local Interconnect Network"/>
+                    <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data" caption="Local Interconnect Network"/>
                     <signals>
                         <signal function="LIN" group="TXLIN" pad="PD3"/>
                         <signal function="LIN" group="RXLIN" pad="PD4"/>
@@ -192,8 +172,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal function="SPI" group="MISO" pad="PB0"/>
                         <signal function="SPI_ALT" group="MISO" pad="PD2"/>
@@ -208,14 +187,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXINT" group="INT" index="0" pad="PD6"/>
                         <signal function="EXINT" group="INT" index="1" pad="PB2"/>
@@ -253,14 +230,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="PSC">
                 <instance name="PSC" caption="Power Stage Controller">
-                    <register-group name="PSC" name-in-module="PSC" offset="0x00" address-space="data"
-                                    caption="Power Stage Controller"/>
+                    <register-group name="PSC" name-in-module="PSC" offset="0x00" address-space="data" caption="Power Stage Controller"/>
                     <signals>
                         <signal function="PSC" group="PSCIN2" pad="PD2"/>
                         <signal function="PSC" group="PSCOUT2A" pad="PB0"/>
@@ -276,20 +251,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
             <interrupt index="1" name="ANACOMP0" caption="Analog Comparator 0"/>
             <interrupt index="2" name="ANACOMP1" caption="Analog Comparator 1"/>
             <interrupt index="3" name="ANACOMP2" caption="Analog Comparator 2"/>
@@ -377,8 +349,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -439,8 +410,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -474,8 +444,7 @@
                     <bitfield caption="PSC Reset Behavior" mask="0x20" name="PSCRB"/>
                     <bitfield caption="PSCOUTnA Reset Value" mask="0x10" name="PSCRVA"/>
                     <bitfield caption="PSC0UTnB Reset Value" mask="0x08" name="PSCRVB"/>
-                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
                     <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
@@ -493,112 +462,59 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
-                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
-                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
-                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
-                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -708,19 +624,15 @@
                 <register caption="Enable MOb Register 2" name="CANEN2" offset="0xDC" size="1" ocd-rw="R">
                     <bitfield caption="Enable MObs" mask="0x3F" name="ENMOB"/>
                 </register>
-                <register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00"
-                          ocd-rw=""/>
+                <register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00" ocd-rw=""/>
                 <register caption="Enable Interrupt MOb Register 2" name="CANIE2" offset="0xDE" size="1">
                     <bitfield caption="Interrupt Enable  MObs" mask="0x3F" name="IEMOB"/>
                 </register>
-                <register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1"
-                          mask="0x00" ocd-rw=""/>
-                <register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1"
-                          ocd-rw="R">
+                <register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1" mask="0x00" ocd-rw=""/>
+                <register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1" ocd-rw="R">
                     <bitfield caption="Status of Interrupt MObs" mask="0x3F" name="SIT"/>
                 </register>
-                <register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1"
-                          mask="0x00" ocd-rw=""/>
+                <register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1" mask="0x00" ocd-rw=""/>
                 <register caption="CAN Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
                     <bitfield caption="Baud Rate Prescaler bits" mask="0x7E" name="BRP"/>
                 </register>
@@ -736,10 +648,8 @@
                 <register caption="Timer Control Register" name="CANTCON" offset="0xE5" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="Timer Register" name="CANTIM" offset="0xE6" size="2" mask="0xFFFF" ocd-rw=""/>
                 <register caption="TTC Timer Register" name="CANTTC" offset="0xE8" size="2" mask="0xFFFF" ocd-rw=""/>
-                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
-                          ocd-rw="R"/>
-                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
-                          ocd-rw="R"/>
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
                     <bitfield caption="Highest Priority MOb Number bits" mask="0xF0" name="HPMOB"/>
                     <bitfield caption="CAN General Purpose bits" mask="0x0F" name="CGP"/>
@@ -810,23 +720,20 @@
                 <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x95" size="1">
                     <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
-                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
                     <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
                 </register>
                 <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x96" size="1">
                     <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
                     <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
-                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
                 </register>
                 <register caption="Analog Comparator 3 Control Register" name="AC3CON" offset="0x97" size="1">
                     <bitfield caption="Analog Comparator 3 Enable Bit" mask="0x80" name="AC3EN"/>
                     <bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
-                    <bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS" values="ANALOG_COMP_INTERRUPT"/>
                     <bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
                 </register>
                 <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
@@ -854,8 +761,7 @@
                 </register>
                 <register caption="DAC Control Register" name="DACON" offset="0x90" size="1">
                     <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
-                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
-                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS" values="ANALOG_DAC_AUTO_TRIGGER"/>
                     <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
                     <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
                     <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
@@ -907,14 +813,12 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
                     <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
@@ -979,14 +883,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1003,10 +904,8 @@
                     <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Timer/Counter1 Input Capture Selection" mask="0x40" name="ICPSEL1"/>
@@ -1028,14 +927,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -1050,20 +946,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Timer/Counter1 Input Capture Selection" mask="0x40" name="ICPSEL1"/>
@@ -1101,8 +993,7 @@
                     <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
                     <bitfield caption="Current Source Enable" mask="0x40" name="ISRCEN"/>
                     <bitfield caption="Analog Reference pin Enable" mask="0x20" name="AREFEN"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
@@ -1279,8 +1170,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1301,14 +1191,10 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
@@ -1419,26 +1305,16 @@
                     <bitfield caption="Selection of Synchronization Out for ADC" mask="0x0C" name="PSYNC1"/>
                     <bitfield caption="Selection of Synchronization Out for ADC" mask="0x03" name="PSYNC0"/>
                 </register>
-                <register caption="PSC Output Compare RB Register " name="POCR_RB" offset="0xB2" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Module 2 Output Compare SB Register " name="POCR2SB" offset="0xB0" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Module 2 Output Compare RA Register " name="POCR2RA" offset="0xAE" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Module 2 Output Compare SA Register " name="POCR2SA" offset="0xAC" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Module 1 Output Compare SB Register " name="POCR1SB" offset="0xAA" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Module 1 Output Compare RA Register " name="POCR1RA" offset="0xA8" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Output Compare SA Register " name="POCR1SA" offset="0xA6" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Output Compare SB Register " name="POCR0SB" offset="0xA4" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Module 0 Output Compare RA Register " name="POCR0RA" offset="0xA2" size="2"
-                          mask="0x0FFF"/>
-                <register caption="PSC Module 0 Output Compare SA Register " name="POCR0SA" offset="0xA0" size="2"
-                          mask="0x0FFF"/>
+                <register caption="PSC Output Compare RB Register " name="POCR_RB" offset="0xB2" size="2" mask="0x0FFF"/>
+                <register caption="PSC Module 2 Output Compare SB Register " name="POCR2SB" offset="0xB0" size="2" mask="0x0FFF"/>
+                <register caption="PSC Module 2 Output Compare RA Register " name="POCR2RA" offset="0xAE" size="2" mask="0x0FFF"/>
+                <register caption="PSC Module 2 Output Compare SA Register " name="POCR2SA" offset="0xAC" size="2" mask="0x0FFF"/>
+                <register caption="PSC Module 1 Output Compare SB Register " name="POCR1SB" offset="0xAA" size="2" mask="0x0FFF"/>
+                <register caption="PSC Module 1 Output Compare RA Register " name="POCR1RA" offset="0xA8" size="2" mask="0x0FFF"/>
+                <register caption="PSC Output Compare SA Register " name="POCR1SA" offset="0xA6" size="2" mask="0x0FFF"/>
+                <register caption="PSC Output Compare SB Register " name="POCR0SB" offset="0xA4" size="2" mask="0x0FFF"/>
+                <register caption="PSC Module 0 Output Compare RA Register " name="POCR0RA" offset="0xA2" size="2" mask="0x0FFF"/>
+                <register caption="PSC Module 0 Output Compare SA Register " name="POCR0SA" offset="0xA0" size="2" mask="0x0FFF"/>
             </register-group>
         </module>
     </modules>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64RFR2.xml
index 0c9878b2..99313463 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64RFR2.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega64RFR2-ZU" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega64RFR2-ZUR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega64RFR2-ZF" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega64RFR2-ZFR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125"
-                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega64RFR2-ZU" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega64RFR2-ZUR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega64RFR2-ZF" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega64RFR2-ZFR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125" tempmin="-40" vccmax="3.6" vccmin="1.8"/>
     </variants>
     <device name="ATmega64RFR2" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x100"/>
-                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x100"/>
-                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x100"/>
-                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x100"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
+                <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
+                <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
+                <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
+                <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,10 +24,8 @@
             <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
                 <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
-            <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100"
-                           size="0x0300">
-                <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="0x100"/>
+            <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100" size="0x0300">
+                <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="0x100"/>
             </address-space>
             <address-space endianness="little" name="data" id="data" start="0x0000" size="0x2200">
                 <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
@@ -44,8 +33,7 @@
                 <memory-segment name="IRAM" start="0x0200" size="0x2000" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x08"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -55,48 +43,39 @@
         <peripherals>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
                 <instance name="USART0_SPI" caption="Serial Peripheral Interface">
-                    <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
                 <instance name="USART1_SPI" caption="Serial Peripheral Interface">
-                    <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="MISSING_PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -109,12 +88,10 @@
                     </signals>
                 </instance>
                 <instance name="MISSING_PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -127,8 +104,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTE" group="P" index="0" pad="PE0"/>
                         <signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -141,8 +117,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
-                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTF" group="P" index="0" pad="PF0"/>
                         <signal function="PORTF" group="P" index="1" pad="PF1"/>
@@ -155,8 +130,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
-                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTG" group="P" index="0" pad="PG0"/>
                         <signal function="PORTG" group="P" index="1" pad="PG1"/>
@@ -169,86 +143,71 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC5" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC4" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC3" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TRX24">
                 <instance name="TRX24" caption="Low-Power 2.4 GHz Transceiver">
-                    <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data"
-                                    caption="Low-Power 2.4 GHz Transceiver"/>
+                    <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data" caption="Low-Power 2.4 GHz Transceiver"/>
                 </instance>
             </module>
             <module name="SYMCNT">
                 <instance name="SYMCNT" caption="MAC Symbol Counter">
-                    <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data"
-                                    caption="MAC Symbol Counter"/>
+                    <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data" caption="MAC Symbol Counter"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="JTAG">
                 <instance name="JTAG" caption="JTAG Interface">
-                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
-                                    caption="JTAG Interface"/>
+                    <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V3"/>
                     </parameters>
@@ -256,32 +215,27 @@
             </module>
             <module name="FLASH">
                 <instance name="FLASH" caption="FLASH Controller">
-                    <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data"
-                                    caption="FLASH Controller"/>
+                    <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data" caption="FLASH Controller"/>
                 </instance>
             </module>
             <module name="PWRCTRL">
                 <instance name="PWRCTRL" caption="Power Controller">
-                    <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data"
-                                    caption="Power Controller"/>
+                    <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data" caption="Power Controller"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -346,8 +300,7 @@
             <interrupt index="68" name="SCNT_OVFL" caption="Symbol counter - overflow interrupt"/>
             <interrupt index="69" name="SCNT_BACKOFF" caption="Symbol counter - backoff interrupt"/>
             <interrupt index="70" name="AES_READY" caption="AES engine ready interrupt"/>
-            <interrupt index="71" name="BAT_LOW"
-                       caption="Battery monitor indicates supply voltage below threshold"/>
+            <interrupt index="71" name="BAT_LOW" caption="Battery monitor indicates supply voltage below threshold"/>
             <interrupt index="72" name="TRX24_TX_START" caption="TRX24 TX start interrupt"/>
             <interrupt index="73" name="TRX24_AMI0" caption="Address match interrupt of address filter 0"/>
             <interrupt index="74" name="TRX24_AMI1" caption="Address match interrupt of address filter 1"/>
@@ -410,8 +363,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -472,8 +424,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -504,8 +455,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFE">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
                     <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
@@ -519,8 +469,7 @@
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
                     <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
-                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT"
-                              values="ENUM_SUT_CKSEL"/>
+                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT" values="ENUM_SUT_CKSEL"/>
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
@@ -530,87 +479,49 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1"
-                       value="0x13"/>
-                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS"
-                       value="0x23"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x06"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x16"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1" value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS" value="0x23"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x06"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x16"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x26"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x36"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x07"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x17"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x27"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x37"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x08"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x18"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x36"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x07"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x17"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x27"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x37"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x08"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x18"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x28"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x38"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x09"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x19"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x29"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x39"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x38"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x09"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x19"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x29"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x39"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1A"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3A"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3B"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1C"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3C"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3D"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
-                       value="0x0E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
-                       value="0x1E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1" value="0x0E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS" value="0x1E"/>
                 <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
-                       value="0x3E"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
-                       value="0x0F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
-                       value="0x1F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
-                       value="0x2F"/>
-                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
-                       value="0x3F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1" value="0x3E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS" value="0x0F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS" value="0x1F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1" value="0x2F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=512 words start address=$7E00" name="512W_7E00" value="0x03"/>
@@ -667,8 +578,7 @@
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -685,8 +595,7 @@
         <module caption="USART" name="USART">
             <register-group caption="USART" name="USART0">
                 <register caption="USART0 I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
-                          ocd-rw="R">
+                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
@@ -707,8 +616,7 @@
                     <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
                 </register>
                 <register caption="USART0 Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
-                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0"
-                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT_MEGARF"/>
                     <bitfield caption="Parity Mode" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
                     <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
@@ -718,8 +626,7 @@
             </register-group>
             <register-group caption="USART" name="USART1">
                 <register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
-                          ocd-rw="R">
+                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
@@ -740,8 +647,7 @@
                     <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
                 </register>
                 <register caption="USART1 Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
-                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"
-                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT_MEGARF"/>
                     <bitfield caption="Parity Mode" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
                     <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
                     <bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
@@ -776,10 +682,8 @@
                 <value caption="9-bit" name="VAL_7" value="7"/>
             </value-group>
             <value-group caption="" name="USART_CLK_POLARITY_BITF">
-                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)"
-                       name="VAL_0" value="0"/>
-                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)"
-                       name="VAL_1" value="1"/>
+                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)" name="VAL_0" value="0"/>
+                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)" name="VAL_1" value="1"/>
             </value-group>
         </module>
         <module caption="Two Wire Serial Interface" name="TWI">
@@ -814,40 +718,26 @@
                 <value caption="SLA+W has been transmitted; ACK has been received." name="VAL_0x18" value="0x18"/>
                 <value caption="SLA+W has been transmitted; NOT ACK has been received." name="VAL_0x20" value="0x20"/>
                 <value caption="Data byte has been transmitted; ACK has been received." name="VAL_0x28" value="0x28"/>
-                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30"
-                       value="0x30"/>
-                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)."
-                       name="VAL_0x38" value="0x38"/>
+                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30" value="0x30"/>
+                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)." name="VAL_0x38" value="0x38"/>
                 <value caption="SLA+R has been transmitted; ACK has been received." name="VAL_0x40" value="0x40"/>
                 <value caption="SLA+R has been transmitted; NOT ACK has been received." name="VAL_0x48" value="0x48"/>
                 <value caption="Data byte has been received; ACK has been returned." name="VAL_0x50" value="0x50"/>
                 <value caption="Data byte has been received; NOT ACK has been returned." name="VAL_0x58" value="0x58"/>
                 <value caption="Own SLA+W has been received; ACK has been returned." name="VAL_0x60" value="0x60"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned."
-                       name="VAL_0x68" value="0x68"/>
-                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70"
-                       value="0x70"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned."
-                       name="VAL_0x78" value="0x78"/>
-                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned."
-                       name="VAL_0x80" value="0x80"/>
-                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned."
-                       name="VAL_0x88" value="0x88"/>
-                <value caption="Previously addressed with general call; data has been received; ACK has been returned."
-                       name="VAL_0x90" value="0x90"/>
-                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned."
-                       name="VAL_0x98" value="0x98"/>
-                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave."
-                       name="VAL_0xA0" value="0xA0"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned." name="VAL_0x68" value="0x68"/>
+                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70" value="0x70"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned." name="VAL_0x78" value="0x78"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned." name="VAL_0x80" value="0x80"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned." name="VAL_0x88" value="0x88"/>
+                <value caption="Previously addressed with general call; data has been received; ACK has been returned." name="VAL_0x90" value="0x90"/>
+                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned." name="VAL_0x98" value="0x98"/>
+                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave." name="VAL_0xA0" value="0xA0"/>
                 <value caption="Own SLA+R has been received; ACK has been returned." name="VAL_0xA8" value="0xA8"/>
-                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned."
-                       name="VAL_0xB0" value="0xB0"/>
-                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8"
-                       value="0xB8"/>
-                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0"
-                       value="0xC0"/>
-                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received."
-                       name="VAL_0xC8" value="0xC8"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned." name="VAL_0xB0" value="0xB0"/>
+                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8" value="0xB8"/>
+                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0" value="0xC0"/>
+                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received." name="VAL_0xC8" value="0xC8"/>
                 <value caption="No relevant state information available; TWINT = 0." name="VAL_0xF8" value="0xF8"/>
             </value-group>
             <value-group caption="" name="COMM_TWI_PRESACLE">
@@ -866,8 +756,7 @@
                     <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
                     <bitfield caption="Clock polarity" mask="0x08" name="CPOL" values="SPI_CPOL_BITF"/>
                     <bitfield caption="Clock Phase" mask="0x04" name="CPHA" values="SPI_CPHA_BITF"/>
-                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR"
-                              values="COMM_SCK_RATE_SPI2X"/>
+                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR" values="COMM_SCK_RATE_SPI2X"/>
                 </register>
                 <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
                     <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
@@ -877,8 +766,7 @@
                 <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
             </register-group>
             <register-group caption="Serial Peripheral Interface" name="USART0_SPI">
-                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
-                          ocd-rw="R">
+                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
@@ -897,8 +785,7 @@
                 </register>
             </register-group>
             <register-group caption="Serial Peripheral Interface" name="USART1_SPI">
-                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
-                          ocd-rw="R">
+                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
                     <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
                     <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
                     <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
@@ -970,10 +857,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Register" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -987,14 +872,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0" values="TC0_WGM_BITF"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare B Match Flag" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare A Match Flag" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1041,14 +923,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2 B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2 A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -1065,19 +944,15 @@
                     <bitfield caption="Clock Select" mask="0x07" name="CS2" values="TC2_CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input for AMR" mask="0x80" name="EXCLKAMR"/>
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Timer/Counter2 Asynchronous Mode" mask="0x20" name="AS2"/>
                     <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08"
-                              name="OCR2AUB"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04"
-                              name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04" name="OCR2BUB"/>
                     <bitfield caption="Timer/Counter2 Control Register A Update Busy" mask="0x02" name="TCR2AUB"/>
                     <bitfield caption="Timer/Counter2 Control Register B Update Busy" mask="0x01" name="TCR2BUB"/>
                 </register>
@@ -1124,8 +999,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1146,19 +1020,15 @@
         <module caption="Timer/Counter, 16-bit" name="TC16">
             <register-group caption="Timer/Counter, 16-bit" name="TC5">
                 <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C"
-                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C" values="TC4_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
                     <bitfield caption="Input Capture 5 Noise Canceller" mask="0x80" name="ICNC5"/>
                     <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS5" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter5 Control Register C" name="TCCR5C" offset="0x122" size="1">
@@ -1167,26 +1037,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
                 </register>
                 <register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
                     <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
-                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE5C"/>
-                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE5B"/>
-                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE5A"/>
                     <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
                 </register>
-                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1" ocd-rw="">
                     <bitfield caption="Timer/Counter5 Input Capture Flag" mask="0x20" name="ICF5"/>
                     <bitfield caption="Timer/Counter5 Output Compare C Match Flag" mask="0x08" name="OCF5C"/>
                     <bitfield caption="Timer/Counter5 Output Compare B Match Flag" mask="0x04" name="OCF5B"/>
@@ -1196,19 +1058,15 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC4">
                 <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B"
-                              values="TC4_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C"
-                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B" values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C" values="TC4_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
                     <bitfield caption="Input Capture 4 Noise Canceller" mask="0x80" name="ICNC4"/>
                     <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS4" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
@@ -1217,26 +1075,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
                 </register>
                 <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
                     <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
-                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE4C"/>
-                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE4B"/>
-                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE4A"/>
                     <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
                 </register>
-                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1"
-                          ocd-rw="">
+                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1" ocd-rw="">
                     <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
                     <bitfield caption="Timer/Counter4 Output Compare C Match Flag" mask="0x08" name="OCF4C"/>
                     <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
@@ -1246,19 +1096,15 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC3">
                 <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C"
-                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C" values="TC1_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
                     <bitfield caption="Input Capture 3 Noise Canceller" mask="0x80" name="ICNC3"/>
                     <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
@@ -1267,26 +1113,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
                 </register>
                 <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
                     <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
-                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE3C"/>
-                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE3B"/>
-                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
                     <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
                 </register>
-                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
                     <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x08" name="OCF3C"/>
                     <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
@@ -1296,19 +1134,15 @@
             </register-group>
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
-                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"
-                              values="TC1_COMNX_BITF"/>
-                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C"
-                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B" values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C" values="TC1_COMNX_BITF"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1" values="TC1_WGMX_BITF"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
                     <bitfield caption="Input Capture 1 Noise Canceller" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
-                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF"
-                              lsb="2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF" lsb="2"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT_MEGARF"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
@@ -1317,26 +1151,18 @@
                     <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare C Match Flag" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
@@ -1381,10 +1207,8 @@
             <value-group caption="" name="TC1_COMNX_BITF">
                 <value caption="Normal port operation, OCnA/OCnB/OCnC disconnected." name="VAL_0" value="0"/>
                 <value caption="Toggle OCnA/OCnB/OCnC on Compare Match." name="VAL_1" value="1"/>
-                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2"
-                       value="2"/>
-                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3"
-                       value="3"/>
+                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2" value="2"/>
+                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3" value="3"/>
             </value-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT_MEGARF">
                 <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
@@ -1405,105 +1229,74 @@
                     <bitfield caption="Power Amplifier Ramp Down Frequency Inversion" mask="0x02" name="PARDFI"/>
                     <bitfield caption="Power Amplifier Ramp Up Frequency Inversion" mask="0x01" name="PARUFI"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L"
-                          offset="0x10E" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L" offset="0x10E" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 0" mask="0xFF" name="MAFSA0L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H"
-                          offset="0x10F" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H" offset="0x10F" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 0" mask="0xFF" name="MAFSA0H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)"
-                          name="MAFPA0L" offset="0x110" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF"
-                              name="MAFPA0L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)" name="MAFPA0L" offset="0x110" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF" name="MAFPA0L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)"
-                          name="MAFPA0H" offset="0x111" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF"
-                              name="MAFPA0H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)" name="MAFPA0H" offset="0x111" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF" name="MAFPA0H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L"
-                          offset="0x112" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L" offset="0x112" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 1" mask="0xFF" name="MAFSA1L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H"
-                          offset="0x113" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H" offset="0x113" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 1" mask="0xFF" name="MAFSA1H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)"
-                          name="MAFPA1L" offset="0x114" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF"
-                              name="MAFPA1L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)" name="MAFPA1L" offset="0x114" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF" name="MAFPA1L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)"
-                          name="MAFPA1H" offset="0x115" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF"
-                              name="MAFPA1H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)" name="MAFPA1H" offset="0x115" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF" name="MAFPA1H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L"
-                          offset="0x116" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L" offset="0x116" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 2" mask="0xFF" name="MAFSA2L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H"
-                          offset="0x117" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H" offset="0x117" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 2" mask="0xFF" name="MAFSA2H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)"
-                          name="MAFPA2L" offset="0x118" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF"
-                              name="MAFPA2L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)" name="MAFPA2L" offset="0x118" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF" name="MAFPA2L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)"
-                          name="MAFPA2H" offset="0x119" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF"
-                              name="MAFPA2H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)" name="MAFPA2H" offset="0x119" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF" name="MAFPA2H"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L"
-                          offset="0x11A" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L" offset="0x11A" size="1">
                     <bitfield caption="MAC Short Address low Byte for Frame Filter 3" mask="0xFF" name="MAFSA3L"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H"
-                          offset="0x11B" size="1">
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H" offset="0x11B" size="1">
                     <bitfield caption="MAC Short Address high Byte for Frame Filter 3" mask="0xFF" name="MAFSA3H"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)"
-                          name="MAFPA3L" offset="0x11C" size="1">
-                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF"
-                              name="MAFPA3L"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)" name="MAFPA3L" offset="0x11C" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF" name="MAFPA3L"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)"
-                          name="MAFPA3H" offset="0x11D" size="1">
-                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF"
-                              name="MAFPA3H"/>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)" name="MAFPA3H" offset="0x11D" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF" name="MAFPA3H"/>
                 </register>
-                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C"
-                          size="1">
+                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C" size="1">
                     <bitfield caption="Multiple Address Filter 3 Enable" mask="0x08" name="MAF3EN"/>
                     <bitfield caption="Multiple Address Filter 2 Enable" mask="0x04" name="MAF2EN"/>
                     <bitfield caption="Multiple Address Filter 1 Enable" mask="0x02" name="MAF1EN"/>
                     <bitfield caption="Multiple Address Filter 0 Enable" mask="0x01" name="MAF0EN"/>
                 </register>
-                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D"
-                          size="1">
+                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D" size="1">
                     <bitfield caption="Set Data Pending bit for address filter 3." mask="0x80" name="AACK_3_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40"
-                              name="AACK_3_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40" name="AACK_3_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 2." mask="0x20" name="AACK_2_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10"
-                              name="AACK_2_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10" name="AACK_2_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 1." mask="0x08" name="AACK_1_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04"
-                              name="AACK_1_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04" name="AACK_1_I_AM_COORD"/>
                     <bitfield caption="Set Data Pending bit for address filter 0." mask="0x02" name="AACK_0_SET_PD"/>
-                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01"
-                              name="AACK_0_I_AM_COORD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01" name="AACK_0_I_AM_COORD"/>
                 </register>
                 <register caption="AES Control Register" name="AES_CTRL" offset="0x13C" size="1">
                     <bitfield caption="Request AES Operation." mask="0x80" name="AES_REQUEST"/>
                     <bitfield caption="Set AES Operation Mode" mask="0x20" name="AES_MODE" values="AES_MODE_BITF"/>
-                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR"
-                              values="AES_DIRECTION_BITF"/>
+                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR" values="AES_DIRECTION_BITF"/>
                     <bitfield caption="AES Interrupt Enable" mask="0x04" name="AES_IM"/>
                 </register>
                 <register caption="AES Status Register" name="AES_STATUS" offset="0x13D" size="1" ocd-rw="R">
@@ -1513,8 +1306,7 @@
                 <register caption="AES Plain and Cipher Text Buffer Register" name="AES_STATE" offset="0x13E" size="1">
                     <bitfield caption="AES Plain and Cipher Text Buffer" mask="0xFF" name="AES_STATE"/>
                 </register>
-                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F"
-                          size="1">
+                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F" size="1">
                     <bitfield caption="AES Encryption/Decryption Key Buffer" mask="0xFF" name="AES_KEY"/>
                 </register>
                 <register caption="Transceiver Status Register" name="TRX_STATUS" offset="0x141" size="1" ocd-rw="R">
@@ -1539,24 +1331,18 @@
                     <bitfield caption="Enable Automatic CRC Calculation" mask="0x20" name="TX_AUTO_CRC_ON"/>
                     <bitfield caption="Enable PLL TX filter" mask="0x10" name="PLL_TX_FLT"/>
                 </register>
-                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145"
-                          size="1">
+                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145" size="1">
                     <bitfield caption="Transmit Power Setting" mask="0x0F" name="TX_PWR" values="TX_PWR_bitf"/>
                 </register>
-                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1"
-                          ocd-rw="R">
-                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID"
-                              values="RX_CRC_VALID_bitf"/>
+                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1" ocd-rw="R">
+                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID" values="RX_CRC_VALID_bitf"/>
                     <bitfield caption="Random Value" mask="0x60" name="RND_VALUE"/>
-                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI"
-                              values="RSSI_VALUE_BITF"/>
+                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI" values="RSSI_VALUE_BITF"/>
                 </register>
-                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147"
-                          size="1" ocd-rw="R">
+                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147" size="1" ocd-rw="R">
                     <bitfield caption="Energy Detection Level" mask="0xFF" name="ED_LEVEL" values="ED_LEVEL_BITF"/>
                 </register>
-                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA"
-                          offset="0x148" size="1">
+                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA" offset="0x148" size="1">
                     <bitfield caption="Manual CCA Measurement Request" mask="0x80" name="CCA_REQUEST"/>
                     <bitfield caption="Select CCA Measurement Mode" mask="0x60" name="CCA_MODE" values="CCA_MODE_bitf"/>
                     <bitfield caption="RX/TX Channel Selection" mask="0x1F" name="CHANNEL" values="CHANNEL_bitf"/>
@@ -1566,27 +1352,20 @@
                     <bitfield caption="ED Threshold Level for CCA Measurement" mask="0x0F" name="CCA_ED_THRES"/>
                 </register>
                 <register caption="Transceiver Receive Control Register" name="RX_CTRL" offset="0x14A" size="1">
-                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES"
-                              values="PDT_THRES_bitf"/>
+                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES" values="PDT_THRES_bitf"/>
                 </register>
                 <register caption="Start of Frame Delimiter Value Register" name="SFD_VALUE" offset="0x14B" size="1">
-                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE"
-                              values="SFD_VALUE_BITF"/>
+                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE" values="SFD_VALUE_BITF"/>
                 </register>
                 <register caption="Transceiver Control Register 2" name="TRX_CTRL_2" offset="0x14C" size="1">
                     <bitfield caption="RX Safe Mode" mask="0x80" name="RX_SAFE_MODE"/>
-                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE"
-                              values="OQPSK_DATA_RATE_bitf"/>
+                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE" values="OQPSK_DATA_RATE_bitf"/>
                 </register>
                 <register caption="Antenna Diversity Control Register" name="ANT_DIV" offset="0x14D" size="1">
-                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL"
-                              values="ANT_SEL_bitf"/>
-                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN"
-                              values="ANT_DIV_EN_bitf"/>
-                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN"
-                              values="ANT_EXT_SW_EN_bitf"/>
-                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL"
-                              values="ANT_CTRL_bitf"/>
+                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL" values="ANT_SEL_bitf"/>
+                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN" values="ANT_DIV_EN_bitf"/>
+                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN" values="ANT_EXT_SW_EN_bitf"/>
+                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL" values="ANT_CTRL_bitf"/>
                 </register>
                 <register caption="Transceiver Interrupt Enable Register" name="IRQ_MASK" offset="0x14E" size="1">
                     <bitfield caption="Awake Interrupt Enable" mask="0x80" name="AWAKE_EN"/>
@@ -1609,14 +1388,10 @@
                     <bitfield caption="PLL Lock Interrupt Status" mask="0x01" name="PLL_LOCK"/>
                 </register>
                 <register caption="Transceiver Interrupt Enable Register 1" name="IRQ_MASK1" offset="0xBE" size="1">
-                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10"
-                              name="MAF_3_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08"
-                              name="MAF_2_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04"
-                              name="MAF_1_AMI_EN"/>
-                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02"
-                              name="MAF_0_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10" name="MAF_3_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08" name="MAF_2_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04" name="MAF_1_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02" name="MAF_0_AMI_EN"/>
                     <bitfield caption="Transmit Start Interrupt enable" mask="0x01" name="TX_START_EN"/>
                 </register>
                 <register caption="Transceiver Interrupt Status Register 1" name="IRQ_STATUS1" offset="0xBF" size="1">
@@ -1626,29 +1401,22 @@
                     <bitfield caption="Address Match Interrupt Status Address filter 0" mask="0x02" name="MAF_0_AMI"/>
                     <bitfield caption="Transmit Start Interrupt Status" mask="0x01" name="TX_START"/>
                 </register>
-                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150"
-                          size="1">
-                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT"
-                              values="AVREG_EXT_BITF"/>
+                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150" size="1">
+                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT" values="AVREG_EXT_BITF"/>
                     <bitfield caption="AVDD Supply Voltage Valid" mask="0x40" name="AVDD_OK" values="AVDD_OK_BITF"/>
-                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT"
-                              values="DVREG_EXT_BITF"/>
+                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT" values="DVREG_EXT_BITF"/>
                     <bitfield caption="DVDD Supply Voltage Valid" mask="0x04" name="DVDD_OK" values="DVDD_OK_BITF"/>
                 </register>
                 <register caption="Battery Monitor Control and Status Register" name="BATMON" offset="0x151" size="1">
                     <bitfield caption="Battery Monitor Interrupt Status" mask="0x80" name="BAT_LOW"/>
                     <bitfield caption="Battery Monitor Interrupt Enable" mask="0x40" name="BAT_LOW_EN"/>
                     <bitfield caption="Battery Monitor Status" mask="0x20" name="BATMON_OK" values="BATMON_OK_bitf"/>
-                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR"
-                              values="BATMON_HR_bitf"/>
-                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH"
-                              values="BATMON_VTH_bitf"/>
+                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR" values="BATMON_HR_bitf"/>
+                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH" values="BATMON_VTH_bitf"/>
                 </register>
                 <register caption="Crystal Oscillator Control Register" name="XOSC_CTRL" offset="0x152" size="1">
-                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE"
-                              values="XTAL_MODE_BITF"/>
-                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM"
-                              values="XTAL_TRIM_bitf"/>
+                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE" values="XTAL_MODE_BITF"/>
+                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM" values="XTAL_TRIM_bitf"/>
                 </register>
                 <register caption="Channel Control Register 0" name="CC_CTRL_0" offset="0x153" size="1">
                     <bitfield caption="Channel Number" mask="0xFF" name="CC_NUMBER"/>
@@ -1656,54 +1424,42 @@
                 <register caption="Channel Control Register 1" name="CC_CTRL_1" offset="0x154" size="1">
                     <bitfield caption="Channel Band" mask="0x0F" name="CC_BAND"/>
                 </register>
-                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155"
-                          size="1">
+                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155" size="1">
                     <bitfield caption="Prevent Frame Reception" mask="0x80" name="RX_PDT_DIS"/>
                     <bitfield caption="Receiver Override Function" mask="0x40" name="RX_OVERRIDE"/>
-                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL"
-                              values="RX_PDT_LEVEL_BITF"/>
+                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL" values="RX_PDT_LEVEL_BITF"/>
                 </register>
-                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156"
-                          size="1">
-                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL"
-                              values="RX_RPC_CTRL_BITF"/>
+                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156" size="1">
+                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL" values="RX_RPC_CTRL_BITF"/>
                     <bitfield caption="Reciver Smart Receiving Mode Enable" mask="0x20" name="RX_RPC_EN"/>
                     <bitfield caption="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10" name="PDT_RPC_EN"/>
                     <bitfield caption="PLL Smart Receiving Mode Enable" mask="0x08" name="PLL_RPC_EN"/>
                     <bitfield caption="Reserved" mask="0x04" name="Res0"/>
                     <bitfield caption="Smart Receiving Mode IPAN Handling Enable" mask="0x02" name="IPAN_RPC_EN"/>
-                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01"
-                              name="XAH_RPC_EN"/>
+                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01" name="XAH_RPC_EN"/>
                 </register>
-                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157"
-                          size="1">
+                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157" size="1">
                     <bitfield caption="Filter Reserved Frames" mask="0x20" name="AACK_FLTR_RES_FT"/>
                     <bitfield caption="Process Reserved Frames" mask="0x10" name="AACK_UPLD_RES_FT"/>
-                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME"
-                              values="AACK_ACK_TIME_bitf"/>
+                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME" values="AACK_ACK_TIME_bitf"/>
                     <bitfield caption="Enable Promiscuous Mode" mask="0x02" name="AACK_PROM_MODE"/>
                 </register>
                 <register caption="Transceiver Filter Tuning Control Register" name="FTN_CTRL" offset="0x158" size="1">
                     <bitfield caption="Start Calibration Loop of Filter Tuning Network" mask="0x80" name="FTN_START"/>
                 </register>
-                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF"
-                          offset="0x15A" size="1">
+                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF" offset="0x15A" size="1">
                     <bitfield caption="Start Center Frequency Calibration" mask="0x80" name="PLL_CF_START"/>
                 </register>
-                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B"
-                          size="1">
+                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B" size="1">
                     <bitfield caption="Start Delay Cell Calibration" mask="0x80" name="PLL_DCU_START"/>
                 </register>
-                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1"
-                          ocd-rw="R">
+                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1" ocd-rw="R">
                     <bitfield caption="Part Number" mask="0xFF" name="PART_NUM" values="PART_NUM_bitf"/>
                 </register>
-                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D"
-                          size="1" ocd-rw="R">
+                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D" size="1" ocd-rw="R">
                     <bitfield caption="Version Number" mask="0xFF" name="VERSION_NUM" values="VERSION_NUM_2_BITF"/>
                 </register>
-                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0"
-                          offset="0x15E" size="1" ocd-rw="R">
+                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0" offset="0x15E" size="1" ocd-rw="R">
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x80" name="MAN_ID_07"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x40" name="MAN_ID_06"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x20" name="MAN_ID_05"/>
@@ -1713,13 +1469,10 @@
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x02" name="MAN_ID_01"/>
                     <bitfield caption="Manufacturer ID (Low Byte)" mask="0x01" name="MAN_ID_00" values="MAN_ID_0_BITF"/>
                 </register>
-                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1"
-                          offset="0x15F" size="1" ocd-rw="R">
-                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF"
-                              lsb="10"/>
+                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1" offset="0x15F" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF" lsb="10"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160"
-                          size="1">
+                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160" size="1">
                     <bitfield caption="MAC Short Address" mask="0x80" name="SHORT_ADDR_07"/>
                     <bitfield caption="MAC Short Address" mask="0x40" name="SHORT_ADDR_06"/>
                     <bitfield caption="MAC Short Address" mask="0x20" name="SHORT_ADDR_05"/>
@@ -1729,12 +1482,10 @@
                     <bitfield caption="MAC Short Address" mask="0x02" name="SHORT_ADDR_01"/>
                     <bitfield caption="MAC Short Address" mask="0x01" name="SHORT_ADDR_00"/>
                 </register>
-                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1"
-                          offset="0x161" size="1">
+                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1" offset="0x161" size="1">
                     <bitfield caption="MAC Short Address" mask="0xFF" name="SHORT_ADDR_" lsb="10"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0"
-                          offset="0x162" size="1">
+                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0" offset="0x162" size="1">
                     <bitfield caption="MAC Personal Area Network ID" mask="0x80" name="PAN_ID_07"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x40" name="PAN_ID_06"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x20" name="PAN_ID_05"/>
@@ -1744,8 +1495,7 @@
                     <bitfield caption="MAC Personal Area Network ID" mask="0x02" name="PAN_ID_01"/>
                     <bitfield caption="MAC Personal Area Network ID" mask="0x01" name="PAN_ID_00"/>
                 </register>
-                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1"
-                          offset="0x163" size="1">
+                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1" offset="0x163" size="1">
                     <bitfield caption="MAC Personal Area Network ID" mask="0xFF" name="PAN_ID_" lsb="10"/>
                 </register>
                 <register caption="Transceiver MAC IEEE Address Register 0" name="IEEE_ADDR_0" offset="0x164" size="1">
@@ -1779,17 +1529,12 @@
                 <register caption="Transceiver MAC IEEE Address Register 7" name="IEEE_ADDR_7" offset="0x16B" size="1">
                     <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="70"/>
                 </register>
-                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0"
-                          offset="0x16C" size="1">
-                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0"
-                              name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
-                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E"
-                              name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
-                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION"
-                              values="SLOTTED_OPERATION_BITF"/>
+                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0" offset="0x16C" size="1">
+                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0" name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
+                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E" name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
+                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION" values="SLOTTED_OPERATION_BITF"/>
                 </register>
-                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0"
-                          offset="0x16D" size="1">
+                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0" offset="0x16D" size="1">
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x80" name="CSMA_SEED_07"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x40" name="CSMA_SEED_06"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x20" name="CSMA_SEED_05"/>
@@ -1799,27 +1544,21 @@
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x02" name="CSMA_SEED_01"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x01" name="CSMA_SEED_00"/>
                 </register>
-                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1"
-                          offset="0x16E" size="1">
-                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE"
-                              values="AACK_FVN_MODE_bitf"/>
+                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1" offset="0x16E" size="1">
+                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE" values="AACK_FVN_MODE_bitf"/>
                     <bitfield caption="Set Frame Pending Sub-field" mask="0x20" name="AACK_SET_PD"/>
                     <bitfield caption="Disable Acknowledgment Frame Transmission" mask="0x10" name="AACK_DIS_ACK"/>
                     <bitfield caption="Set Personal Area Network Coordinator" mask="0x08" name="AACK_I_AM_COORD"/>
                     <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x07" name="CSMA_SEED_1"/>
                 </register>
-                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F"
-                          size="1">
+                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F" size="1">
                     <bitfield caption="Maximum Back-off Exponent" mask="0xF0" name="MAX_BE" values="MAX_BE_bitf"/>
                     <bitfield caption="Minimum Back-off Exponent" mask="0x0F" name="MIN_BE" values="MIN_BE_bitf"/>
                 </register>
-                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176"
-                          size="1">
-                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG"
-                              values="TST_CTRL_DIG_BITF"/>
+                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176" size="1">
+                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG" values="TST_CTRL_DIG_BITF"/>
                 </register>
-                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B"
-                          size="1">
+                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B" size="1">
                     <bitfield caption="Received Frame Length" mask="0xFF" name="RX_LENGTH"/>
                 </register>
                 <register caption="Start of frame buffer" name="TRXFBST" offset="0x180" size="1" mask="0xFF"/>
@@ -1958,10 +1697,8 @@
                 <value caption="2480 MHz" name="F_2480MHZ" value="26"/>
             </value-group>
             <value-group caption="" name="PDT_THRES_bitf">
-                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled"
-                       name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
-                <value caption="Recommended correlator threshold for Antenna Diversity operation"
-                       name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
+                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled" name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
+                <value caption="Recommended correlator threshold for Antenna Diversity operation" name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
             </value-group>
             <value-group caption="" name="SFD_VALUE_BITF">
                 <value caption="IEEE 802.15.4 compliant value of the SFD" name="IEEE_SFD" value="0xA7"/>
@@ -1988,28 +1725,22 @@
                 <value caption="Reserved" name="VAL_0" value="0"/>
                 <value caption="Antenna 1: DIG1=H, DIG2=L" name="ANT_1" value="1"/>
                 <value caption="Antenna 0: DIG1=L, DIG2=H" name="ANT_0" value="2"/>
-                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity"
-                       name="ANT_RESET" value="3"/>
+                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity" name="ANT_RESET" value="3"/>
             </value-group>
             <value-group caption="" name="AVREG_EXT_BITF">
-                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT"
-                       value="0"/>
-                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section."
-                       name="AVDD_EXT" value="1"/>
+                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT" value="0"/>
+                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section." name="AVDD_EXT" value="1"/>
             </value-group>
             <value-group caption="" name="AVDD_OK_BITF">
                 <value caption="Analog voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
                 <value caption="Analog supply voltage has settled" name="VAL_1" value="1"/>
             </value-group>
             <value-group caption="" name="DVREG_EXT_BITF">
-                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT"
-                       value="0"/>
-                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section."
-                       name="DVDD_EXT" value="1"/>
+                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT" value="0"/>
+                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section." name="DVDD_EXT" value="1"/>
             </value-group>
             <value-group caption="" name="DVDD_OK_BITF">
-                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0"
-                       value="0"/>
+                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
                 <value caption="Digital supply voltage has settled" name="VAL_1" value="1"/>
             </value-group>
             <value-group caption="" name="BATMON_OK_bitf">
@@ -2039,10 +1770,8 @@
                 <value caption="3.675V / 2.45V (BATMON_HR=1/0)" name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="XTAL_MODE_BITF">
-                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4"
-                       value="0x4"/>
-                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled."
-                       name="VAL_0xF" value="0xF"/>
+                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4" value="0x4"/>
+                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled." name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="XTAL_TRIM_bitf">
                 <value caption="0.0 pF, trimming capacitors disconnected" name="XTAL_TRIM_MIN" value="0x0"/>
@@ -2051,21 +1780,17 @@
                 <value caption="4.5 pF, trimming capacitor switched on" name="XTAL_TRIM_MAX" value="0xF"/>
             </value-group>
             <value-group caption="" name="RX_PDT_LEVEL_BITF">
-                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered"
-                       name="RX_PDT_LEVEL_MIN" value="0x0"/>
+                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered" name="RX_PDT_LEVEL_MIN" value="0x0"/>
                 <value caption="RX_THRES &gt; RSSI_BASE_VAL + 0 · 3; RSSI &gt; -90 dBm" name="VAL_0x1" value="0x1"/>
                 <value caption="..." name="VAL_0x2" value="0x2"/>
                 <value caption="RX_THRES &gt; RSSI_BASE_VAL + 13 · 3; RSSI &gt; -51 dBm" name="VAL_0xE" value="0xE"/>
-                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX"
-                       value="0xF"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX" value="0xF"/>
             </value-group>
             <value-group caption="" name="RX_RPC_CTRL_BITF">
-                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0"
-                       value="0"/>
+                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0" value="0"/>
                 <value caption="Reserved" name="VAL_1" value="1"/>
                 <value caption="Reserved" name="VAL_2" value="2"/>
-                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3"
-                       value="3"/>
+                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3" value="3"/>
             </value-group>
             <value-group caption="" name="AACK_ACK_TIME_bitf">
                 <value caption="12 symbols acknowledgment time" name="AACK_ACK_TIME_12_SYM" value="0"/>
@@ -2081,12 +1806,10 @@
                 <value caption="Revision B" name="REV_B" value="1"/>
             </value-group>
             <value-group caption="" name="MAN_ID_0_BITF">
-                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F"
-                       name="ATMEL_BYTE_0" value="0x1f"/>
+                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F" name="ATMEL_BYTE_0" value="0x1f"/>
             </value-group>
             <value-group caption="" name="MAN_ID_1_BITF">
-                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F"
-                       name="ATMEL_BYTE_1" value="0x00"/>
+                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F" name="ATMEL_BYTE_1" value="0x00"/>
             </value-group>
             <value-group caption="" name="MAX_FRAME_RETRIES_bitf">
                 <value caption="Retransmission of frame is not attempted." name="VAL_0x0" value="0x0"/>
@@ -2103,10 +1826,8 @@
                 <value caption="Immediate frame re-transmission without performing CSMA-CA" name="VAL_0x7" value="0x7"/>
             </value-group>
             <value-group caption="" name="SLOTTED_OPERATION_BITF">
-                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested."
-                       name="SLOTTED_OP_DIS" value="0"/>
-                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller."
-                       name="SLOTTED_OP_EN" value="1"/>
+                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested." name="SLOTTED_OP_DIS" value="0"/>
+                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller." name="SLOTTED_OP_EN" value="1"/>
             </value-group>
             <value-group caption="" name="AACK_FVN_MODE_bitf">
                 <value caption="Acknowledge frames with version number 0" name="VAL_0" value="0"/>
@@ -2117,17 +1838,14 @@
             <value-group caption="" name="MAX_BE_bitf">
                 <value caption="This value is not valid for the maximum back-off exponent." name="VAL_1" value="1"/>
                 <value caption="This value is not valid for the maximum back-off exponent." name="VAL_2" value="2"/>
-                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3"
-                       value="3"/>
+                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3" value="3"/>
                 <value caption="..." name="VAL_4" value="4"/>
-                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8"
-                       value="8"/>
+                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8" value="8"/>
             </value-group>
             <value-group caption="" name="MIN_BE_bitf">
                 <value caption="Minimum value of minimum back-off exponent." name="VAL_0" value="0"/>
                 <value caption="..." name="VAL_1" value="1"/>
-                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE."
-                       name="VAL_8" value="8"/>
+                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE." name="VAL_8" value="8"/>
             </value-group>
             <value-group caption="" name="TST_CTRL_DIG_BITF">
                 <value caption="NORMAL (no test is active)" name="VAL_0" value="0"/>
@@ -2136,104 +1854,76 @@
         </module>
         <module caption="MAC Symbol Counter" name="SYMCNT">
             <register-group caption="MAC Symbol Counter" name="SYMCNT">
-                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH"
-                          offset="0xFC" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF"
-                              name="SCTSTRHH"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH" offset="0xFC" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSTRHH"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL"
-                          offset="0xFB" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF"
-                              name="SCTSTRHL"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL" offset="0xFB" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSTRHL"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH"
-                          offset="0xFA" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF"
-                              name="SCTSTRLH"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH" offset="0xFA" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSTRLH"/>
                 </register>
-                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL"
-                          offset="0xF9" size="1">
-                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF"
-                              name="SCTSTRLL"/>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL" offset="0xF9" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSTRLL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 HH-Byte" mask="0xFF" name="SCOCR1HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 HL-Byte" mask="0xFF" name="SCOCR1HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 LH-Byte" mask="0xFF" name="SCOCR1LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 1 LL-Byte" mask="0xFF" name="SCOCR1LL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 HH-Byte" mask="0xFF" name="SCOCR2HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 HL-Byte" mask="0xFF" name="SCOCR2HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 LH-Byte" mask="0xFF" name="SCOCR2LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 2 LL-Byte" mask="0xFF" name="SCOCR2LL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 HH-Byte" mask="0xFF" name="SCOCR3HH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 HL-Byte" mask="0xFF" name="SCOCR3HL"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 LH-Byte" mask="0xFF" name="SCOCR3LH"/>
                 </register>
-                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED"
-                          size="1">
+                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED" size="1">
                     <bitfield caption="Symbol Counter Output Compare Register 3 LL-Byte" mask="0xFF" name="SCOCR3LL"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSRHH"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSRHL"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSRLH"/>
                 </register>
-                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9"
-                          size="1" ocd-rw="R">
+                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9" size="1" ocd-rw="R">
                     <bitfield caption="Symbol Counter Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSRLL"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register HH-Byte" mask="0xFF" name="SCBTSRHH"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register HL-Byte" mask="0xFF" name="SCBTSRHL"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register LH-Byte" mask="0xFF" name="SCBTSRLH"/>
                 </register>
-                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5"
-                          size="1">
+                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5" size="1">
                     <bitfield caption="Symbol Counter Beacon Timestamp Register LL-Byte" mask="0xFF" name="SCBTSRLL"/>
                 </register>
                 <register caption="Symbol Counter Register HH-Byte" name="SCCNTHH" offset="0xE4" size="1">
@@ -2264,8 +1954,7 @@
                 <register caption="Symbol Counter Control Register 1" name="SCCR1" offset="0xDD" size="1">
                     <bitfield caption="Reserved Bit" mask="0xC0" name="Res" lsb="5"/>
                     <bitfield caption="Symbol Counter Beacon Timestamp Mask Register" mask="0x20" name="SCBTSM"/>
-                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"
-                              name="SCCKDIV" values="SCCKDIV_BITF"/>
+                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C" name="SCCKDIV" values="SCCKDIV_BITF"/>
                     <bitfield caption="Enable External Clock Source on PG2" mask="0x02" name="SCEECLK"/>
                     <bitfield caption="Backoff Slot Counter enable" mask="0x01" name="SCENBO"/>
                 </register>
@@ -2278,32 +1967,21 @@
                     <bitfield caption="Symbol Counter Compare Unit 3 Mode select" mask="0x07" name="SCCMP" lsb="1"/>
                 </register>
                 <register caption="Symbol Counter Compare Source Register" name="SCCSR" offset="0xDB" size="1">
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"
-                              name="SCCS3" values="SCCS3_BITF"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C"
-                              name="SCCS2" values="SCCS2_BITF"/>
-                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03"
-                              name="SCCS1" values="SCCS1_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30" name="SCCS3" values="SCCS3_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C" name="SCCS2" values="SCCS2_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03" name="SCCS1" values="SCCS1_BITF"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH"
-                          offset="0xDA" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"
-                              name="SCRSTRHH"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH" offset="0xDA" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF" name="SCRSTRHH"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL"
-                          offset="0xD9" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF"
-                              name="SCRSTRHL"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL" offset="0xD9" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF" name="SCRSTRHL"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH"
-                          offset="0xD8" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF"
-                              name="SCRSTRLH"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH" offset="0xD8" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF" name="SCRSTRLH"/>
                 </register>
-                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL"
-                          offset="0xD7" size="1">
-                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF"
-                              name="SCRSTRLL"/>
+                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL" offset="0xD7" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF" name="SCRSTRLL"/>
                 </register>
             </register-group>
             <value-group caption="" name="SCCKDIV_BITF">
@@ -2316,28 +1994,19 @@
                 <value caption="Transceiver Clock divided by 4,   (4MHz)" name="VAL_6" value="6"/>
             </value-group>
             <value-group caption="" name="SCCS3_BITF">
-                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
             <value-group caption="" name="SCCS2_BITF">
-                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
             <value-group caption="" name="SCCS1_BITF">
-                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
-                       value="0"/>
-                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
-                       value="1"/>
-                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
-                       value="2"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0" value="0"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1" value="1"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2" value="2"/>
             </value-group>
         </module>
         <module caption="EEPROM" name="EEPROM">
@@ -2372,39 +2041,28 @@
                 </register>
             </register-group>
             <value-group caption="" name="OCDR_DATA_BITF">
-                <value caption="Refer to the debugger documentation for further information on how to use this register."
-                       name="VAL_0" value="0"/>
+                <value caption="Refer to the debugger documentation for further information on how to use this register." name="VAL_0" value="0"/>
             </value-group>
         </module>
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL3"/>
                 </register>
                 <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
-                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
-                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4"
-                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL3"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
-                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT"
-                              values="INTERRUPT_REQ_ENABLE_BITF"/>
+                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT" values="INTERRUPT_REQ_ENABLE_BITF"/>
                 </register>
                 <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
-                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF"
-                              values="INTERRUPT_EXT_FLAG_BITF"/>
+                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF" values="INTERRUPT_EXT_FLAG_BITF"/>
                 </register>
                 <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
                     <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="16"/>
@@ -2424,12 +2082,9 @@
             </register-group>
             <value-group caption="" name="INTERRUPT_SENSE_CONTROL3">
                 <value caption="The low level of INTn generates an interrupt request." name="VAL_0x00" value="0x00"/>
-                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01"
-                       value="0x01"/>
-                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01" value="0x01"/>
+                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02" value="0x02"/>
+                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="INTERRUPT_REQ_ENABLE_BITF">
                 <value caption="All external pin interrupts are disabled." name="VAL_0x00" value="0x00"/>
@@ -2437,11 +2092,9 @@
             </value-group>
             <value-group caption="" name="INTERRUPT_EXT_FLAG_BITF">
                 <value caption="No edge or logic change on INT7:0 occurred." name="VAL_0x00" value="0x00"/>
-                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request."
-                       name="VAL_0x01" value="0x01"/>
+                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request." name="VAL_0x01" value="0x01"/>
                 <value caption="..." name="VAL_0x02" value="0x02"/>
-                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request."
-                       name="VAL_0x80" value="0x80"/>
+                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request." name="VAL_0x80" value="0x80"/>
             </value-group>
         </module>
         <module caption="Analog-to-Digital Converter" name="ADC">
@@ -2458,8 +2111,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="AVDD Supply Voltage OK" mask="0x80" name="AVDDOK"/>
@@ -2467,12 +2119,10 @@
                     <bitfield caption="Reference Voltage OK" mask="0x20" name="REFOK"/>
                     <bitfield caption="Analog Channel Change" mask="0x10" name="ACCH"/>
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="The ADC Control and Status Register C" name="ADCSRC" offset="0x77" size="1">
-                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT"
-                              values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
+                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT" values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
                     <bitfield caption="Reserved" mask="0x20" name="Res0"/>
                     <bitfield caption="ADC Start-up Time" mask="0x1F" name="ADSUT" values="ANALOG_ADC_STARTUP_TIME"/>
                 </register>
@@ -2500,10 +2150,8 @@
             <value-group caption="" name="ANALOG_ADC_V_REF9">
                 <value caption="AREF, Internal reference voltage generation turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVDD with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
-                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02"
-                       value="0x02"/>
-                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -2582,14 +2230,12 @@
                     <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
                 </register>
                 <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1">
-                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL"
-                              values="OSCCAL_BITF"/>
+                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL" values="OSCCAL_BITF"/>
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
                 </register>
                 <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
                     <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
@@ -2657,8 +2303,7 @@
                 <value caption="Reserved" name="VAL_0xC" value="0xC"/>
                 <value caption="Reserved" name="VAL_0xD" value="0xD"/>
                 <value caption="Reserved" name="VAL_0xE" value="0xE"/>
-                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed."
-                       name="VAL_0xF" value="0xF"/>
+                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed." name="VAL_0xF" value="0xF"/>
             </value-group>
             <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
                 <value caption="Idle" name="IDLE" value="0x00"/>
@@ -2678,8 +2323,7 @@
             <register-group caption="FLASH Controller" name="FLASH">
                 <register caption="Flash Extended-Mode Control-Register" name="NEMCR" offset="0x75" size="1">
                     <bitfield caption="Enable Extended Address Mode for Extra Rows" mask="0x40" name="ENEAM"/>
-                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM"
-                              values="NEMCR_ADDRESS_BITF"/>
+                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM" values="NEMCR_ADDRESS_BITF"/>
                 </register>
                 <register caption="Reference Voltage Calibration Register" name="BGCR" offset="0x67" size="1">
                     <bitfield caption="Fine Calibration Bits" mask="0x78" name="BGCAL_FINE" values="BGCAL_FINE_BITF"/>
@@ -2729,14 +2373,11 @@
                     <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
                     <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
                 </register>
-                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130"
-                          size="1">
+                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130" size="1">
                     <bitfield caption="Low-Byte Data Register Bits" mask="0x0F" name="LLDRL" values="LLDRL_VALUE_BITF"/>
                 </register>
-                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131"
-                          size="1">
-                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH"
-                              values="LLDRH_VALUE_BITF"/>
+                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131" size="1">
+                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH" values="LLDRH_VALUE_BITF"/>
                 </register>
                 <register caption="Low Leakage Voltage Regulator Control Register" name="LLCR" offset="0x12F" size="1">
                     <bitfield caption="Calibration Done" mask="0x20" name="LLDONE"/>
@@ -2760,16 +2401,12 @@
                 </register>
             </register-group>
             <value-group caption="" name="LLDRL_VALUE_BITF">
-                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08"
-                       value="0x08"/>
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00" value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08" value="0x08"/>
             </value-group>
             <value-group caption="" name="LLDRH_VALUE_BITF">
-                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10"
-                       value="0x10"/>
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00" value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10" value="0x10"/>
             </value-group>
             <value-group caption="" name="PAD_IO_bitf">
                 <value caption="2 mA" name="PAD_IO_2MA" value="0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA808.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA808.xml
index ad8f404f..6504de6d 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA808.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA808.xml
@@ -1,36 +1,25 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega808-AFR" package="TQFP32" pinout="QFP32" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
-        <variant ordercode="ATmega808-MFR" package="VQFN32" pinout="QFN32" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
-        <variant ordercode="ATmega808-XFR" package="SSOP28" pinout="SSOP28" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega808-AFR" package="TQFP32" pinout="QFP32" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega808-MFR" package="VQFN32" pinout="QFN32" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega808-XFR" package="SSOP28" pinout="SSOP28" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
     </variants>
     <device name="ATmega808" family="AVR8" architecture="AVR8X" avr-family="AVR MEGA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x2000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0400" start="0x3c00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000"
-                                start="0x00004000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001300" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00004000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -80,8 +69,7 @@
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
@@ -91,13 +79,11 @@
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
-                                pad="PF6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1" pad="PF6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
                     </signals>
                 </instance>
@@ -135,18 +121,12 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT5" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT5" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -492,10 +472,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -553,10 +531,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -577,8 +553,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -673,23 +648,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -730,14 +700,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
@@ -750,14 +716,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -767,14 +730,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -784,14 +744,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -801,14 +758,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
@@ -935,12 +889,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -985,8 +937,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1014,12 +965,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1053,66 +1002,51 @@
         <module caption="Event System" id="I2118" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
-                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
-                              values="EVSYS_STROBE0"/>
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W" values="EVSYS_STROBE0"/>
                 </register>
                 <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
                 <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
@@ -1229,16 +1163,12 @@
         </module>
         <module caption="Fuses" id="I2600" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1248,16 +1178,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1285,11 +1213,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1463,8 +1389,7 @@
                     <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
                     <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
                 </register>
-                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
                     <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
                     <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
@@ -1481,21 +1406,15 @@
                     <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
                     <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
                 </register>
-                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
-                          rw="RW" size="1">
-                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
-                              values="PORTMUX_USART1"/>
-                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
-                              values="PORTMUX_USART2"/>
-                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
-                              values="PORTMUX_USART3"/>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW" values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW" values="PORTMUX_USART3"/>
                 </register>
             </register-group>
             <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
@@ -1618,12 +1537,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1685,16 +1602,11 @@
                 <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
                 <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
                 <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
-                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R" size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R" size="1"/>
                 <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
                 <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
                 <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
@@ -1709,10 +1621,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1808,8 +1718,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1922,8 +1831,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1959,8 +1867,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2035,10 +1942,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2050,8 +1955,7 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -2151,15 +2055,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2174,19 +2076,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -2209,8 +2107,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2228,8 +2125,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2361,10 +2257,8 @@
         <module caption="Voltage reference" id="I2600" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
-                              values="VREF_AC0REFSEL"/>
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW" values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA809.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA809.xml
index b91ec9d5..169f69db 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA809.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA809.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega809-AFR" package="TQFP48" pinout="QFP48" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
-        <variant ordercode="ATmega809-MFR" package="UQFN48" pinout="QFN48" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega809-AFR" package="TQFP48" pinout="QFP48" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega809-MFR" package="UQFN48" pinout="QFN48" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
     </variants>
     <device name="ATmega809" family="AVR8" architecture="AVR8X" avr-family="AVR MEGA">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x2000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0400" start="0x3c00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000"
-                                start="0x00004000" type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D"
-                                start="0x00001103" type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
-                                start="0x00001300" type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00004000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -82,26 +72,22 @@
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
-                                pad="PA6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
-                                pad="PC6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="0" pad="PD0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
-                                pad="PD6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1" pad="PD6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
-                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
-                                pad="PF6"/>
+                        <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1" pad="PF6"/>
                         <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
                     </signals>
                 </instance>
@@ -139,24 +125,15 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS" group="EVOUT" index="0"
-                                pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT1" function="EVSYS" group="EVOUT" index="1"
-                                pad="PB2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS_ALT" group="EVOUT" index="2"
-                                pad="PC7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS" group="EVOUT" index="2"
-                                pad="PC2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS_ALT" group="EVOUT" index="3"
-                                pad="PD7"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS" group="EVOUT" index="3"
-                                pad="PD2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT4" function="EVSYS" group="EVOUT" index="4"
-                                pad="PE2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT5" function="EVSYS" group="EVOUT" index="5"
-                                pad="PF2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS_ALT" group="EVOUT" index="2" pad="PC7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT4" function="EVSYS" group="EVOUT" index="4" pad="PE2"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUT5" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
                     </signals>
                 </instance>
             </module>
@@ -563,10 +540,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -624,10 +599,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -648,8 +621,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -744,23 +716,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -801,14 +768,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
@@ -821,14 +784,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -838,14 +798,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -855,14 +812,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -872,14 +826,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
@@ -1006,12 +957,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -1056,8 +1005,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1085,12 +1033,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1124,74 +1070,57 @@
         <module caption="Event System" id="I2118" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
-                              values="EVSYS_GENERATOR"/>
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
                 </register>
                 <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
-                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
-                              values="EVSYS_STROBE0"/>
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W" values="EVSYS_STROBE0"/>
                 </register>
                 <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
-                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
                 </register>
                 <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
@@ -1310,16 +1239,12 @@
         </module>
         <module caption="Fuses" id="I2600" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1329,16 +1254,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1366,11 +1289,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1544,8 +1465,7 @@
                     <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
                     <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
                 </register>
-                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
                     <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
                     <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
@@ -1562,21 +1482,15 @@
                     <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
                     <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
                 </register>
-                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
                 </register>
-                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
-                          rw="RW" size="1">
-                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
-                              values="PORTMUX_USART1"/>
-                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
-                              values="PORTMUX_USART2"/>
-                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
-                              values="PORTMUX_USART3"/>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW" values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW" values="PORTMUX_USART3"/>
                 </register>
             </register-group>
             <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
@@ -1708,12 +1622,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1775,16 +1687,11 @@
                 <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
                 <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
                 <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
-                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R" size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R" size="1"/>
                 <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
                 <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
                 <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
@@ -1799,10 +1706,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1898,8 +1803,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2012,8 +1916,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2049,8 +1952,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2125,10 +2027,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2140,8 +2040,7 @@
                     <mode name="DEFAULT">
                         <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
                     </mode>
                 </register>
                 <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
@@ -2241,15 +2140,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2264,19 +2161,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -2299,8 +2192,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2318,8 +2210,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2451,10 +2342,8 @@
         <module caption="Voltage reference" id="I2600" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
-                              values="VREF_AC0REFSEL"/>
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW" values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88.xml
index 6099b21d..5e749cfa 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88.xml
@@ -1,32 +1,21 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega88V-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88V-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32"
-                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88V-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega88-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
-                 vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega88-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega88V-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88V-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88V-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega88-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega88-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega88" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x40"/>
+                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x40"/>
+                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x40"/>
+                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,8 +32,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -54,8 +42,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -65,8 +52,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -75,8 +61,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -87,8 +72,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -97,8 +81,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -111,8 +94,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
                         <signal group="AIN" index="1" function="default" pad="PD7"/>
@@ -121,8 +103,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -135,8 +116,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -148,8 +128,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -164,8 +143,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -175,8 +153,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -208,8 +185,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -220,8 +196,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -232,32 +207,27 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -340,8 +310,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -402,8 +371,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -429,8 +397,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -470,8 +437,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -480,116 +446,61 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -714,14 +625,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -736,20 +644,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -769,14 +673,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -793,10 +694,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -827,24 +726,20 @@
                 <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
                     <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
                     <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX"
-                              values="ADC_MUX_SINGLE_NO_TEMP"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE_NO_TEMP"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -859,8 +754,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE_NO_TEMP">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -897,16 +791,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -939,10 +831,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -956,14 +846,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -987,10 +874,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1061,14 +946,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1081,8 +964,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
@@ -1140,8 +1022,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88A.xml
index b681e584..13c3da54 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88A.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega88A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88A-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28"
-                 vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
-                 vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88A-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega88A" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x40"/>
+                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x40"/>
+                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x40"/>
+                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -50,8 +40,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -61,8 +50,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -71,8 +59,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -83,8 +70,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -93,8 +79,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -107,8 +92,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
                         <signal group="AIN" index="1" function="default" pad="PD7"/>
@@ -117,8 +101,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -131,8 +114,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -144,8 +126,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -160,8 +141,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -171,8 +151,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -204,8 +183,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -216,20 +194,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -240,20 +215,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -336,8 +308,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -398,8 +369,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -425,8 +395,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -466,8 +435,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -476,116 +444,61 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -710,14 +623,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -732,20 +642,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -765,14 +671,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -789,10 +692,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -826,20 +727,17 @@
                     <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -854,8 +752,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -893,16 +790,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -935,10 +830,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -952,14 +845,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -983,10 +873,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1051,8 +939,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1099,14 +986,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1119,8 +1004,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88P.xml
index d35acda8..345106e5 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88P.xml
@@ -1,32 +1,21 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega88PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32"
-                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega88P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32"
-                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
-        <variant ordercode="ATmega88P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega88PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega88P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega88P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="2.7" vccmax="5.5"/>
     </variants>
     <device name="ATmega88P" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x40"/>
+                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x40"/>
+                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x40"/>
+                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,8 +32,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -54,8 +42,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -65,8 +52,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -75,8 +61,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -87,8 +72,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -97,8 +81,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -111,8 +94,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
                         <signal group="AIN" index="1" function="default" pad="PD7"/>
@@ -121,8 +103,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -135,8 +116,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -148,8 +128,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -164,8 +143,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -175,8 +153,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -208,8 +185,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -220,20 +196,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -244,20 +217,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -340,8 +310,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -402,8 +371,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -429,8 +397,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -470,8 +437,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -480,116 +446,61 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -714,14 +625,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -736,20 +644,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -769,14 +673,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -793,10 +694,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -830,20 +729,17 @@
                     <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -858,8 +754,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -897,16 +792,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -939,10 +832,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -956,14 +847,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -987,10 +875,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1055,8 +941,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1103,14 +988,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1123,8 +1006,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88PA.xml
index 8ec6107c..ba7e91a7 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88PA.xml
@@ -1,36 +1,23 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega88PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88PA-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
-                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
-                 vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88PA-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88PA-MMN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN28"
-                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN32"
-                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88PA-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP28"
-                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-MMN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN28" package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN32" package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP28" package="PDIP28" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega88PA" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x40"/>
+                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x40"/>
+                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x40"/>
+                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -47,8 +34,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -58,8 +44,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -69,8 +54,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -79,8 +63,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -91,8 +74,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -101,8 +83,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -115,8 +96,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
                         <signal group="AIN" index="1" function="default" pad="PD7"/>
@@ -125,8 +105,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -139,8 +118,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -152,8 +130,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -168,8 +145,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -179,8 +155,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -212,8 +187,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -224,20 +198,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -248,20 +219,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -344,8 +312,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -406,8 +373,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -433,8 +399,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -474,8 +439,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -484,116 +448,61 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
-                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -718,14 +627,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -740,20 +646,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -773,14 +675,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -797,10 +696,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -834,20 +731,17 @@
                     <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -862,8 +756,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -901,16 +794,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -943,10 +834,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -960,14 +849,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -991,10 +877,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1059,8 +943,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1107,14 +990,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1127,8 +1008,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88PB.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88PB.xml
index d90f7288..d7115ff3 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88PB.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88PB.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega88PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN32"
-                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
-                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN32"
-                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN32" package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN32" package="VQFN32" vccmin="1.8" vccmax="5.5"/>
     </variants>
     <device name="ATmega88PB" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x40"/>
+                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x40"/>
+                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x40"/>
+                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -50,8 +40,7 @@
         <peripherals>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="TXD" function="default" pad="PD1"/>
                         <signal group="RXD" function="default" pad="PD0"/>
@@ -61,8 +50,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SDA" function="default" pad="PC4"/>
                         <signal group="SCL" function="default" pad="PC5"/>
@@ -71,8 +59,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD5"/>
                         <signal group="ICP" function="default" pad="PB0"/>
@@ -83,8 +70,7 @@
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC2" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                     <signals>
                         <signal group="OCA" function="default" pad="PB3"/>
                         <signal group="OCB" function="default" pad="PD3"/>
@@ -93,8 +79,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PC0"/>
                         <signal group="ADC" index="1" function="default" pad="PC1"/>
@@ -109,8 +94,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AC" function="default" pad="PE0"/>
                         <signal group="AIN" index="0" function="default" pad="PD6"/>
@@ -120,8 +104,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -134,8 +117,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -147,8 +129,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -161,8 +142,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
-                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PE0" index="0"/>
                         <signal group="P" function="default" pad="PE1" index="1"/>
@@ -173,8 +153,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" function="default" pad="PD4"/>
                         <signal group="OCB" function="default" pad="PD5"/>
@@ -184,8 +163,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="1" function="default" pad="PD3"/>
                         <signal group="PCINT" index="19" function="default" pad="PD3"/>
@@ -217,8 +195,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SS" function="default" pad="PB2"/>
                         <signal group="MOSI" function="default" pad="PB3"/>
@@ -229,20 +206,17 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <signals>
                         <signal group="CLK" index="0" function="default" pad="PB0"/>
                     </signals>
@@ -253,26 +227,22 @@
             </module>
             <module name="DEVICEID">
                 <instance name="DEVICEID" caption="Device ID">
-                    <register-group name="DEVICEID" name-in-module="DEVICEID" offset="0x0" address-space="data"
-                                    caption="Device ID"/>
+                    <register-group name="DEVICEID" name-in-module="DEVICEID" offset="0x0" address-space="data" caption="Device ID"/>
                 </instance>
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -356,8 +326,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -418,8 +387,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -445,8 +413,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -486,8 +453,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -496,100 +462,53 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -732,14 +651,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -754,20 +670,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -787,14 +699,11 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
                 <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
-                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
@@ -811,10 +720,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
@@ -848,20 +755,17 @@
                     <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
                     <bitfield caption="" mask="0x20" name="ADC5D"/>
@@ -876,8 +780,7 @@
                 <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
                 <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
                 <value caption="Reserved" name="VAL_0x02" value="0x02"/>
-                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
-                       value="0x03"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ADC_MUX_SINGLE">
                 <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
@@ -915,16 +818,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -965,10 +866,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -982,14 +881,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -1013,10 +909,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -1081,8 +975,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -1129,14 +1022,12 @@
                     <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -1149,8 +1040,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA8U2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA8U2.xml
index 154e4ae7..3aa1a2df 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA8U2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA8U2.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega8U2-AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="TQFP32" pinout="QFP32"/>
-        <variant ordercode="ATmega8U2-MU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="QFN32" pinout="QFP32"/>
+        <variant ordercode="ATmega8U2-AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5" package="TQFP32" pinout="QFP32"/>
+        <variant ordercode="ATmega8U2-MU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5" package="QFN32" pinout="QFP32"/>
     </variants>
     <device name="ATmega8U2" family="AVR8" architecture="AVR8" avr-family="megaAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
-                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x80"/>
-                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x80"/>
-                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x80"/>
-                <memory-segment start="0x1000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
+                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
+                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
+                <memory-segment start="0x1000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -60,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -74,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -90,8 +79,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="MISO" pad="PB3" function="default"/>
                         <signal group="MOSI" pad="PB2" function="default"/>
@@ -102,20 +90,17 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="OCA" pad="PB7" function="default"/>
                         <signal group="OCB" pad="PD0" function="default"/>
@@ -125,8 +110,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="ICP" pad="PC7" function="default"/>
                         <signal group="OCA" pad="PC6" function="default"/>
@@ -138,20 +122,17 @@
             </module>
             <module name="PLL">
                 <instance name="PLL" caption="Phase Locked Loop">
-                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
-                                    caption="Phase Locked Loop"/>
+                    <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data" caption="Phase Locked Loop"/>
                 </instance>
             </module>
             <module name="USB_DEVICE">
                 <instance name="USB_DEVICE" caption="USB Device Registers">
-                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
-                                    caption="USB Device Registers"/>
+                    <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data" caption="USB Device Registers"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V3"/>
                     </parameters>
@@ -159,8 +140,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="INT" index="0" pad="PD0" function="default"/>
                         <signal group="INT" index="1" pad="PD1" function="default"/>
@@ -188,8 +168,7 @@
             </module>
             <module name="USART">
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal group="RXD" pad="PD2" function="default"/>
                         <signal group="TXD" pad="PD3" function="default"/>
@@ -201,14 +180,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" pad="PD1" function="default"/>
                         <signal group="AIN" index="1" pad="PD2" function="default"/>
@@ -222,20 +199,17 @@
             </module>
             <module name="FUSE">
                 <instance name="FUSE" caption="Fuses">
-                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
-                                    caption="Fuses"/>
+                    <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
                 </instance>
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+            <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
@@ -321,8 +295,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -383,8 +356,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -415,8 +387,7 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF4">
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                     <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
@@ -441,94 +412,50 @@
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
                 <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
-                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
-                       value="0x05"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
-                       value="0x15"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
-                       value="0x25"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
-                       value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
-                       value="0x24"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap." name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap." name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap." name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BOOTSZ">
                 <value caption="Boot Flash size=256 words start address=$F00" name="256W_F00" value="0x03"/>
@@ -662,10 +589,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -679,14 +604,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -719,8 +641,7 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
@@ -728,26 +649,18 @@
                     <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
-                              name="OCIE1C"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
@@ -787,12 +700,10 @@
                     <bitfield caption="D+ Input value" mask="0x02" name="DPI"/>
                     <bitfield caption="D- Input value" mask="0x01" name="DMI"/>
                 </register>
-                <register caption="USB Endpoint Number Interrupt Register" name="UEINT" offset="0xF4" size="1"
-                          mask="0x1F">
+                <register caption="USB Endpoint Number Interrupt Register" name="UEINT" offset="0xF4" size="1" mask="0x1F">
                     <bitfield caption="Byte Count bits" mask="0x1F" name="EPINT"/>
                 </register>
-                <register caption="USB Endpoint Byte Count Register" name="UEBCLX" offset="0xF2" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="USB Endpoint Byte Count Register" name="UEBCLX" offset="0xF2" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Byte Count bits" mask="0xFF" name="BYCT"/>
                 </register>
                 <register caption="USB Data Endpoint" name="UEDATX" offset="0xF1" size="1" mask="0xFF" ocd-rw="">
@@ -852,8 +763,7 @@
                 <register caption="USB Device Micro Frame Number" name="UDMFN" offset="0xE6" size="1" ocd-rw="R">
                     <bitfield caption="Frame Number CRC Error Flag" mask="0x10" name="FNCERR"/>
                 </register>
-                <register caption="USB Device Frame Number High Register" name="UDFNUM" offset="0xE4" size="2"
-                          mask="0x07FF">
+                <register caption="USB Device Frame Number High Register" name="UDFNUM" offset="0xE4" size="2" mask="0x07FF">
                     <bitfield caption="Frame Number Upper Flag" mask="0x07FF" name="FNUM"/>
                 </register>
                 <register caption="USB Device Address Register" name="UDADDR" offset="0xE3" size="1">
@@ -915,8 +825,7 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
@@ -968,8 +877,7 @@
                     <bitfield caption="" mask="0x04" name="EXTE"/>
                     <bitfield caption="" mask="0x01" name="CLKS"/>
                 </register>
-                <register caption="debugWire communication register" name="DWDR" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw=""/>
+                <register caption="debugWire communication register" name="DWDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
             </register-group>
             <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
                 <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
@@ -1074,20 +982,17 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Analog Comparator Input Multiplexer" name="ACMUX" offset="0x7D" size="1">
-                    <bitfield caption="Analog Comparator Selection Bits" mask="0x07" name="CMUX"
-                              values="ANALOG_COMP_SELECTION_BITS"/>
+                    <bitfield caption="Analog Comparator Selection Bits" mask="0x07" name="CMUX" values="ANALOG_COMP_SELECTION_BITS"/>
                 </register>
                 <register caption="" name="DIDR1" offset="0x7F" size="1" ocd-rw="W">
                     <bitfield caption="AIN7 Digital Input Disable" mask="0x80" name="AIN7D"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13.xml
index 2c62000f..c8fc55e0 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13.xml
@@ -1,32 +1,21 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny13V-10PU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="PDIP8" pinout="PDIP_SOIC_8"/>
-        <variant ordercode="ATtiny13V-10SU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP_SOIC_8"/>
-        <variant ordercode="ATtiny13V-10SSU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP_SOIC_8"/>
-        <variant ordercode="ATtiny13V-10MU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="MLF20" pinout="MLF20"/>
-        <variant ordercode="ATtiny13V-10MMU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="MLF10" pinout="MLF10"/>
-        <variant ordercode="ATtiny13-20PU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="PDIP8" pinout="PDIP_SOIC_8"/>
-        <variant ordercode="ATtiny13-20SU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP_SOIC_8"/>
-        <variant ordercode="ATtiny13-20SSU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP_SOIC_8"/>
-        <variant ordercode="ATtiny13-20MU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="MLF20" pinout="MLF20"/>
-        <variant ordercode="ATtiny13-20MMU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="MLF10" pinout="MLF10"/>
+        <variant ordercode="ATtiny13V-10PU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="PDIP8" pinout="PDIP_SOIC_8"/>
+        <variant ordercode="ATtiny13V-10SU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
+        <variant ordercode="ATtiny13V-10SSU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
+        <variant ordercode="ATtiny13V-10MU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="MLF20" pinout="MLF20"/>
+        <variant ordercode="ATtiny13V-10MMU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="MLF10" pinout="MLF10"/>
+        <variant ordercode="ATtiny13-20PU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="PDIP8" pinout="PDIP_SOIC_8"/>
+        <variant ordercode="ATtiny13-20SU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
+        <variant ordercode="ATtiny13-20SSU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
+        <variant ordercode="ATtiny13-20MU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="MLF20" pinout="MLF20"/>
+        <variant ordercode="ATtiny13-20MMU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="MLF10" pinout="MLF10"/>
     </variants>
     <device name="ATtiny13" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x20"/>
+                <memory-segment start="0x0000" size="0x0400" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,8 +32,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0040" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
@@ -54,8 +42,7 @@
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -66,8 +53,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="1" pad="PB1" function="default"/>
                         <signal group="AIN" index="0" pad="PB0" function="default"/>
@@ -76,14 +62,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -92,8 +76,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -106,8 +89,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT5" pad="PB5" function="default"/>
                         <signal group="PCINT4" pad="PB4" function="default"/>
@@ -121,8 +103,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" pad="PB2" function="default"/>
                         <signal group="OCB" pad="PB1" function="default"/>
@@ -132,8 +113,7 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="FUSE">
@@ -143,8 +123,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -216,8 +195,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -277,8 +255,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE_STK600">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -325,24 +302,15 @@
                 <value caption="Ext. Clock; Start-up time: 14 CK + 0 ms" name="EXTCLK_14CK_0MS" value="0x00"/>
                 <value caption="Ext. Clock; Start-up time: 14 CK + 4 ms" name="EXTCLK_14CK_4MS" value="0x04"/>
                 <value caption="Ext. Clock; Start-up time: 14 CK + 64 ms" name="EXTCLK_14CK_64MS" value="0x08"/>
-                <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_4MHZ8_14CK_0MS"
-                       value="0x01"/>
-                <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_4MHZ8_14CK_4MS"
-                       value="0x05"/>
-                <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_4MHZ8_14CK_64MS"
-                       value="0x09"/>
-                <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_9MHZ6_14CK_0MS"
-                       value="0x02"/>
-                <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_9MHZ6_14CK_4MS"
-                       value="0x06"/>
-                <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_9MHZ6_14CK_64MS"
-                       value="0x0A"/>
-                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS"
-                       value="0x07"/>
-                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS"
-                       value="0x0B"/>
+                <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_4MHZ8_14CK_0MS" value="0x01"/>
+                <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_4MHZ8_14CK_4MS" value="0x05"/>
+                <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_4MHZ8_14CK_64MS" value="0x09"/>
+                <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_9MHZ6_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_9MHZ6_14CK_4MS" value="0x06"/>
+                <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_9MHZ6_14CK_64MS" value="0x0A"/>
+                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS" value="0x07"/>
+                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS" value="0x0B"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
@@ -376,13 +344,11 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x34" size="1">
                     <bitfield caption="ADC0 Digital input Disable" mask="0x20" name="ADC0D"/>
@@ -417,15 +383,13 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR0" offset="0x34" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -474,8 +438,7 @@
                     <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
                     <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
-                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
                     <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
@@ -483,18 +446,15 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Debug Wire Data Register" name="DWDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1" ocd-rw="R">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
@@ -541,8 +501,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
@@ -564,20 +523,16 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x04"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x04" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x04" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x4F" size="1">
                     <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A"/>
                     <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B"/>
@@ -590,8 +545,7 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM02"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x49" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x49" size="1" mask="0xFF"/>
                 <register caption="General Timer Conuter Register" name="GTCCR" offset="0x48" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x01" name="PSR10"/>
@@ -613,8 +567,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDTIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDTIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13A.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13A.xml
index e81fb296..db19fae7 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13A.xml
@@ -1,34 +1,22 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny13A-PU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="PDIP8" pinout="PDIP_SOIC_8"/>
-        <variant ordercode="ATtiny13A-SH" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP_SOIC_8"/>
-        <variant ordercode="ATtiny13A-SSH" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP_SOIC_8"/>
-        <variant ordercode="ATtiny13A-SSU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP_SOIC_8"/>
-        <variant ordercode="ATtiny13A-SU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP_SOIC_8"/>
-        <variant ordercode="ATtiny13A-MMU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="MLF10" pinout="MLF10"/>
-        <variant ordercode="ATtiny13A-MU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="MLF20" pinout="MLF20"/>
-        <variant ordercode="ATtiny13A-SN" speedmax="20000000" tempmin="-40" tempmax="105" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP_SOIC_8"/>
-        <variant ordercode="ATtiny13A-SS7" speedmax="20000000" tempmin="-40" tempmax="105" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP_SOIC_8"/>
-        <variant ordercode="ATtiny13A-SF" speedmax="20000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP_SOIC_8"/>
-        <variant ordercode="ATtiny13A-MMF" speedmax="20000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5"
-                 package="MLF10" pinout="MLF10"/>
+        <variant ordercode="ATtiny13A-PU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="PDIP8" pinout="PDIP_SOIC_8"/>
+        <variant ordercode="ATtiny13A-SH" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
+        <variant ordercode="ATtiny13A-SSH" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
+        <variant ordercode="ATtiny13A-SSU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
+        <variant ordercode="ATtiny13A-SU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
+        <variant ordercode="ATtiny13A-MMU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="MLF10" pinout="MLF10"/>
+        <variant ordercode="ATtiny13A-MU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="MLF20" pinout="MLF20"/>
+        <variant ordercode="ATtiny13A-SN" speedmax="20000000" tempmin="-40" tempmax="105" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
+        <variant ordercode="ATtiny13A-SS7" speedmax="20000000" tempmin="-40" tempmax="105" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
+        <variant ordercode="ATtiny13A-SF" speedmax="20000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
+        <variant ordercode="ATtiny13A-MMF" speedmax="20000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5" package="MLF10" pinout="MLF10"/>
     </variants>
     <device name="ATtiny13A" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x20"/>
+                <memory-segment start="0x0000" size="0x0400" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -45,8 +33,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0040" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
@@ -56,8 +43,7 @@
         <peripherals>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" function="default" pad="PA0"/>
                         <signal group="ADC" index="1" function="default" pad="PA1"/>
@@ -68,8 +54,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="1" pad="PB1" function="default"/>
                         <signal group="AIN" index="0" pad="PB0" function="default"/>
@@ -78,14 +63,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -94,8 +77,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -108,8 +90,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT5" pad="PB5" function="default"/>
                         <signal group="PCINT4" pad="PB4" function="default"/>
@@ -123,8 +104,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" pad="PB2" function="default"/>
                         <signal group="OCB" pad="PB1" function="default"/>
@@ -134,8 +114,7 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="FUSE">
@@ -145,8 +124,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -218,8 +196,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -279,8 +256,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE_STK600">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -327,24 +303,15 @@
                 <value caption="Ext. Clock; Start-up time: 14 CK + 0 ms" name="EXTCLK_14CK_0MS" value="0x00"/>
                 <value caption="Ext. Clock; Start-up time: 14 CK + 4 ms" name="EXTCLK_14CK_4MS" value="0x04"/>
                 <value caption="Ext. Clock; Start-up time: 14 CK + 64 ms" name="EXTCLK_14CK_64MS" value="0x08"/>
-                <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_4MHZ8_14CK_0MS"
-                       value="0x01"/>
-                <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_4MHZ8_14CK_4MS"
-                       value="0x05"/>
-                <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_4MHZ8_14CK_64MS"
-                       value="0x09"/>
-                <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_9MHZ6_14CK_0MS"
-                       value="0x02"/>
-                <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_9MHZ6_14CK_4MS"
-                       value="0x06"/>
-                <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_9MHZ6_14CK_64MS"
-                       value="0x0A"/>
-                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS"
-                       value="0x03"/>
-                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS"
-                       value="0x07"/>
-                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS"
-                       value="0x0B"/>
+                <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_4MHZ8_14CK_0MS" value="0x01"/>
+                <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_4MHZ8_14CK_4MS" value="0x05"/>
+                <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_4MHZ8_14CK_64MS" value="0x09"/>
+                <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_9MHZ6_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_9MHZ6_14CK_4MS" value="0x06"/>
+                <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_9MHZ6_14CK_64MS" value="0x0A"/>
+                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS" value="0x07"/>
+                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS" value="0x0B"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
@@ -378,13 +345,11 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x34" size="1">
                     <bitfield caption="ADC0 Digital input Disable" mask="0x20" name="ADC0D"/>
@@ -419,15 +384,13 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR0" offset="0x34" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -470,8 +433,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
@@ -493,20 +455,16 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x04"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x04" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x04" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x4F" size="1">
                     <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A"/>
                     <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B"/>
@@ -519,8 +477,7 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM02"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x49" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x49" size="1" mask="0xFF"/>
                 <register caption="General Timer Conuter Register" name="GTCCR" offset="0x48" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x01" name="PSR10"/>
@@ -542,8 +499,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDTIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDTIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -578,8 +534,7 @@
                     <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
                     <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
-                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
                     <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
@@ -587,18 +542,15 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Debug Wire Data Register" name="DWDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1" ocd-rw="R">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1604.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1604.xml
index 6d90d71f..bf7f404a 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1604.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1604.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny1604-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny1604-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1604-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1604-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny1604" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0xC000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0400" start="0x3c00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -370,10 +360,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -426,10 +414,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -450,8 +436,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -542,23 +527,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -606,14 +586,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -623,14 +600,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -716,12 +690,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -754,8 +726,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -783,12 +754,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -821,99 +790,61 @@
         </module>
         <module caption="Event System" id="I2603" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11"
-                          offset="0x1D" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11"
-                              rw="RW" values="EVSYS_ASYNCUSER11"/>
+                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
                 </register>
-                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12"
-                          offset="0x1E" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12"
-                              rw="RW" values="EVSYS_ASYNCUSER12"/>
+                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW"
-                              values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW"
-                              values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -973,29 +904,25 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1025,8 +952,7 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1079,16 +1005,12 @@
         </module>
         <module caption="Fuses" id="I2603" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1098,16 +1020,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1135,11 +1055,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1305,39 +1223,26 @@
         </module>
         <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1432,12 +1337,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1512,10 +1415,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1607,8 +1508,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1721,8 +1621,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1758,8 +1657,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -1834,10 +1732,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -1942,15 +1838,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -1965,19 +1859,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -1997,8 +1887,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2016,8 +1905,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2111,10 +1999,8 @@
         <module caption="Voltage reference" id="I2603" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x4">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1606.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1606.xml
index e29e1f7a..585566e2 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1606.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1606.xml
@@ -1,38 +1,26 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny1606-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny1606-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny1606-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny1606-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1606-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1606-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1606-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1606-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny1606" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0xC000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0400" start="0x3c00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -414,10 +402,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -470,10 +456,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -494,8 +478,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -586,23 +569,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -650,14 +628,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -667,14 +642,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -760,12 +732,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -798,8 +768,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -827,12 +796,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -865,99 +832,61 @@
         </module>
         <module caption="Event System" id="I2603" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11"
-                          offset="0x1D" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11"
-                              rw="RW" values="EVSYS_ASYNCUSER11"/>
+                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
                 </register>
-                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12"
-                          offset="0x1E" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12"
-                              rw="RW" values="EVSYS_ASYNCUSER12"/>
+                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW"
-                              values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW"
-                              values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1017,29 +946,25 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1069,8 +994,7 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1123,16 +1047,12 @@
         </module>
         <module caption="Fuses" id="I2603" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1142,16 +1062,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1179,11 +1097,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1349,39 +1265,26 @@
         </module>
         <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1476,12 +1379,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1556,10 +1457,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1651,8 +1550,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1765,8 +1663,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1802,8 +1699,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -1878,10 +1774,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -1986,15 +1880,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2009,19 +1901,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2041,8 +1929,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2060,8 +1947,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2155,10 +2041,8 @@
         <module caption="Voltage reference" id="I2603" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x4">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1607.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1607.xml
index 7397d271..95814524 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1607.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1607.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny1607-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny1607-MRF" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1607-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1607-MRF" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny1607" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0xC000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0400" start="0x3c00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -427,10 +417,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -483,10 +471,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -507,8 +493,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -599,23 +584,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -663,14 +643,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -680,14 +657,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -773,12 +747,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -811,8 +783,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -840,12 +811,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -878,99 +847,61 @@
         </module>
         <module caption="Event System" id="I2603" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11"
-                          offset="0x1D" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11"
-                              rw="RW" values="EVSYS_ASYNCUSER11"/>
+                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
                 </register>
-                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12"
-                          offset="0x1E" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12"
-                              rw="RW" values="EVSYS_ASYNCUSER12"/>
+                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW"
-                              values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW"
-                              values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1030,29 +961,25 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1082,8 +1009,7 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1136,16 +1062,12 @@
         </module>
         <module caption="Fuses" id="I2603" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1155,16 +1077,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1192,11 +1112,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1362,39 +1280,26 @@
         </module>
         <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1489,12 +1394,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1569,10 +1472,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1664,8 +1565,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1778,8 +1678,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1815,8 +1714,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -1891,10 +1789,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -1999,15 +1895,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2022,19 +1916,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2054,8 +1944,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2073,8 +1962,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2168,10 +2056,8 @@
         <module caption="Voltage reference" id="I2603" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x4">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1614.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1614.xml
index e78cf5ef..800b139c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1614.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1614.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny1614-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny1614-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1614-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1614-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny1614" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0xC000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -456,10 +446,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -517,10 +505,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -541,8 +527,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -635,23 +620,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -699,14 +679,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -716,14 +693,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -809,12 +783,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -859,8 +831,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -888,12 +859,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -943,114 +912,70 @@
         </module>
         <module caption="Event System" id="I2603" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2"
-                          offset="0x04" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW"
-                              values="EVSYS_ASYNCCH2"/>
+                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
                 </register>
-                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3"
-                          offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW"
-                              values="EVSYS_ASYNCCH3"/>
+                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11"
-                          offset="0x1D" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11"
-                              rw="RW" values="EVSYS_ASYNCUSER11"/>
+                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
                 </register>
-                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12"
-                          offset="0x1E" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12"
-                              rw="RW" values="EVSYS_ASYNCUSER12"/>
+                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW"
-                              values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW"
-                              values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1158,8 +1083,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1168,8 +1092,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1178,8 +1101,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1188,8 +1110,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1234,8 +1155,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1317,16 +1237,12 @@
         </module>
         <module caption="Fuses" id="I2603" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1336,8 +1252,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1354,8 +1269,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1383,11 +1297,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1553,40 +1465,27 @@
         </module>
         <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                     <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
                 </register>
@@ -1691,12 +1590,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1771,10 +1668,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1866,8 +1761,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1980,8 +1874,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2017,8 +1910,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2100,18 +1992,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2253,17 +2142,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x0"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x3"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
@@ -2278,10 +2164,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2386,15 +2270,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2409,19 +2291,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2441,8 +2319,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2460,8 +2337,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2555,10 +2431,8 @@
         <module caption="Voltage reference" id="I2603" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x4">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
@@ -2568,14 +2442,11 @@
                     <bitfield caption="DAC2/AC2 reference enable" mask="0x20" name="DAC2REFEN" rw="RW"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
-                    <bitfield caption="ADC1 reference select" mask="0x70" name="ADC1REFSEL" rw="RW"
-                              values="VREF_ADC1REFSEL"/>
-                    <bitfield caption="DAC1/AC1 reference select" mask="0x7" name="DAC1REFSEL" rw="RW"
-                              values="VREF_DAC1REFSEL"/>
+                    <bitfield caption="ADC1 reference select" mask="0x70" name="ADC1REFSEL" rw="RW" values="VREF_ADC1REFSEL"/>
+                    <bitfield caption="DAC1/AC1 reference select" mask="0x7" name="DAC1REFSEL" rw="RW" values="VREF_DAC1REFSEL"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
-                    <bitfield caption="DAC2/AC2 reference select" mask="0x7" name="DAC2REFSEL" rw="RW"
-                              values="VREF_DAC2REFSEL"/>
+                    <bitfield caption="DAC2/AC2 reference select" mask="0x7" name="DAC2REFSEL" rw="RW" values="VREF_DAC2REFSEL"/>
                 </register>
             </register-group>
             <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1616.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1616.xml
index adb78f55..800dd53a 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1616.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1616.xml
@@ -1,38 +1,26 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny1616-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny1616-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny1616-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny1616-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1616-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1616-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1616-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1616-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny1616" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0xC000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -522,10 +510,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -583,10 +569,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -607,8 +591,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -701,23 +684,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -765,14 +743,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -782,14 +757,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -875,12 +847,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -925,8 +895,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -954,12 +923,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1009,114 +976,70 @@
         </module>
         <module caption="Event System" id="I2603" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2"
-                          offset="0x04" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW"
-                              values="EVSYS_ASYNCCH2"/>
+                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
                 </register>
-                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3"
-                          offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW"
-                              values="EVSYS_ASYNCCH3"/>
+                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11"
-                          offset="0x1D" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11"
-                              rw="RW" values="EVSYS_ASYNCUSER11"/>
+                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
                 </register>
-                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12"
-                          offset="0x1E" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12"
-                              rw="RW" values="EVSYS_ASYNCUSER12"/>
+                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW"
-                              values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW"
-                              values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1224,8 +1147,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1234,8 +1156,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1244,8 +1165,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1254,8 +1174,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1300,8 +1219,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1383,16 +1301,12 @@
         </module>
         <module caption="Fuses" id="I2603" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1402,8 +1316,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1420,8 +1333,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1449,11 +1361,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1619,40 +1529,27 @@
         </module>
         <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                     <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
                 </register>
@@ -1757,12 +1654,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1837,10 +1732,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1932,8 +1825,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2046,8 +1938,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2083,8 +1974,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2166,18 +2056,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2319,17 +2206,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x0"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x3"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
@@ -2344,10 +2228,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2452,15 +2334,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2475,19 +2355,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2507,8 +2383,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2526,8 +2401,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2621,10 +2495,8 @@
         <module caption="Voltage reference" id="I2603" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x4">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
@@ -2634,14 +2506,11 @@
                     <bitfield caption="DAC2/AC2 reference enable" mask="0x20" name="DAC2REFEN" rw="RW"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
-                    <bitfield caption="ADC1 reference select" mask="0x70" name="ADC1REFSEL" rw="RW"
-                              values="VREF_ADC1REFSEL"/>
-                    <bitfield caption="DAC1/AC1 reference select" mask="0x7" name="DAC1REFSEL" rw="RW"
-                              values="VREF_DAC1REFSEL"/>
+                    <bitfield caption="ADC1 reference select" mask="0x70" name="ADC1REFSEL" rw="RW" values="VREF_ADC1REFSEL"/>
+                    <bitfield caption="DAC1/AC1 reference select" mask="0x7" name="DAC1REFSEL" rw="RW" values="VREF_DAC1REFSEL"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
-                    <bitfield caption="DAC2/AC2 reference select" mask="0x7" name="DAC2REFSEL" rw="RW"
-                              values="VREF_DAC2REFSEL"/>
+                    <bitfield caption="DAC2/AC2 reference select" mask="0x7" name="DAC2REFSEL" rw="RW" values="VREF_DAC2REFSEL"/>
                 </register>
             </register-group>
             <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1617.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1617.xml
index 0d533492..544d0f02 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1617.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1617.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny1617-MFR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny1617-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1617-MFR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1617-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny1617" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0xC000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -548,10 +538,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -609,10 +597,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -633,8 +619,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -727,23 +712,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -791,14 +771,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -808,14 +785,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -901,12 +875,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -951,8 +923,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -980,12 +951,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1035,114 +1004,70 @@
         </module>
         <module caption="Event System" id="I2603" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2"
-                          offset="0x04" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW"
-                              values="EVSYS_ASYNCCH2"/>
+                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
                 </register>
-                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3"
-                          offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW"
-                              values="EVSYS_ASYNCCH3"/>
+                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11"
-                          offset="0x1D" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11"
-                              rw="RW" values="EVSYS_ASYNCUSER11"/>
+                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
                 </register>
-                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12"
-                          offset="0x1E" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12"
-                              rw="RW" values="EVSYS_ASYNCUSER12"/>
+                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW"
-                              values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW"
-                              values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1250,8 +1175,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1260,8 +1184,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1270,8 +1193,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1280,8 +1202,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1326,8 +1247,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1409,16 +1329,12 @@
         </module>
         <module caption="Fuses" id="I2603" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1428,8 +1344,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1446,8 +1361,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1475,11 +1389,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1645,40 +1557,27 @@
         </module>
         <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                     <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
                 </register>
@@ -1783,12 +1682,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1863,10 +1760,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1958,8 +1853,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2072,8 +1966,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2109,8 +2002,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2192,18 +2084,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2345,17 +2234,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x0"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x3"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
@@ -2370,10 +2256,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2478,15 +2362,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2501,19 +2383,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2533,8 +2411,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2552,8 +2429,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2647,10 +2523,8 @@
         <module caption="Voltage reference" id="I2603" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x4">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
@@ -2660,14 +2534,11 @@
                     <bitfield caption="DAC2/AC2 reference enable" mask="0x20" name="DAC2REFEN" rw="RW"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
-                    <bitfield caption="ADC1 reference select" mask="0x70" name="ADC1REFSEL" rw="RW"
-                              values="VREF_ADC1REFSEL"/>
-                    <bitfield caption="DAC1/AC1 reference select" mask="0x7" name="DAC1REFSEL" rw="RW"
-                              values="VREF_DAC1REFSEL"/>
+                    <bitfield caption="ADC1 reference select" mask="0x70" name="ADC1REFSEL" rw="RW" values="VREF_ADC1REFSEL"/>
+                    <bitfield caption="DAC1/AC1 reference select" mask="0x7" name="DAC1REFSEL" rw="RW" values="VREF_DAC1REFSEL"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
-                    <bitfield caption="DAC2/AC2 reference select" mask="0x7" name="DAC2REFSEL" rw="RW"
-                              values="VREF_DAC2REFSEL"/>
+                    <bitfield caption="DAC2/AC2 reference select" mask="0x7" name="DAC2REFSEL" rw="RW" values="VREF_DAC2REFSEL"/>
                 </register>
             </register-group>
             <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1624.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1624.xml
index 9f2e17a6..2fa94acd 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1624.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1624.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny1624-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny1624-SSUR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1624-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1624-SSUR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny1624" family="AVR8" architecture="AVR8X" avr-family="tinyAVR 2">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -117,8 +107,7 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
                         <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
                         <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
                     </signals>
@@ -384,10 +373,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -470,18 +457,15 @@
                     <bitfield caption="Window Comparator Interrupt Flag" mask="0x4" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x0D" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                     <bitfield caption="VIA" mask="0xc0" name="VIA" rw="RW" values="ADC_VIA"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x0C" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                     <bitfield caption="VIA" mask="0xc0" name="VIA" rw="RW" values="ADC_VIA"/>
                 </register>
                 <register caption="PGA Control" initval="0x00" name="PGACTRL" offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="ADC PGA Sample Duration" mask="0x6" name="ADCPGASAMPDUR" rw="RW"
-                              values="ADC_ADCPGASAMPDUR"/>
+                    <bitfield caption="ADC PGA Sample Duration" mask="0x6" name="ADCPGASAMPDUR" rw="RW" values="ADC_ADCPGASAMPDUR"/>
                     <bitfield caption="Gain" mask="0xe0" name="GAIN" rw="RW" values="ADC_GAIN"/>
                     <bitfield caption="PGA BIAS Select" mask="0x18" name="PGABIASSEL" rw="RW" values="ADC_PGABIASSEL"/>
                     <bitfield caption="PGA Enable" mask="0x1" name="PGAEN" rw="RW"/>
@@ -629,23 +613,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -686,14 +665,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag 0" mask="0x1" name="INT0" rw="RW"/>
@@ -709,14 +684,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -726,14 +698,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -743,14 +712,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -760,14 +726,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
@@ -892,12 +855,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -942,8 +903,7 @@
         </module>
         <module caption="CPU" id="cpu_avr_v2" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -971,12 +931,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1010,98 +968,75 @@
         <module caption="Event System" id="ev_ctrl_v1" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="User ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User EVOUT Port A" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User EVOUT Port A" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User EVOUT Port B" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User EVOUT Port B" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCA0 count event" initval="0x00" name="USERTCA0CNTA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User TCA0 count event" initval="0x00" name="USERTCA0CNTA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCA0 Restart event" initval="0x00" name="USERTCA0CNTB" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User TCA0 Restart event" initval="0x00" name="USERTCA0CNTB" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCB0 Event in A" initval="0x00" name="USERTCB0CAPT" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User TCB0 Event in A" initval="0x00" name="USERTCB0CAPT" offset="0x30" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCB0 Event in B" initval="0x00" name="USERTCB0COUNT" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User TCB0 Event in B" initval="0x00" name="USERTCB0COUNT" offset="0x31" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCB1 Event in A" initval="0x00" name="USERTCB1CAPT" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User TCB1 Event in A" initval="0x00" name="USERTCB1CAPT" offset="0x32" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCB1 Event in B" initval="0x00" name="USERTCB1COUNT" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User TCB1 Event in B" initval="0x00" name="USERTCB1COUNT" offset="0x33" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
                 <register caption="User USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2C" rw="RW" size="1">
@@ -1145,12 +1080,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1190,12 +1122,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1231,12 +1160,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1272,12 +1198,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1309,12 +1232,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1346,12 +1266,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1377,16 +1294,12 @@
         </module>
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1396,16 +1309,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1433,11 +1344,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1681,40 +1590,29 @@
                     <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
                     <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
-                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
                     <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
                     <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
                 </register>
-                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="SPIROUTEA" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="SPIROUTEA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                 </register>
                 <register caption="Port Multiplexer TCA" initval="0x00" name="TCAROUTEA" offset="0x4" rw="RW" size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
                 <register caption="Port Multiplexer TCB" initval="0x00" name="TCBROUTEA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                     <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
                 </register>
-                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
-                          rw="RW" size="1">
-                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
-                              values="PORTMUX_USART1"/>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW" values="PORTMUX_USART1"/>
                 </register>
             </register-group>
             <value-group caption="CCL LUT0 select" name="PORTMUX_LUT0">
@@ -1829,12 +1727,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1896,16 +1792,11 @@
                 <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
                 <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
                 <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
-                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R" size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R" size="1"/>
                 <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
                 <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
                 <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
@@ -1920,10 +1811,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v1" name="SLPCTRL">
@@ -2020,8 +1909,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2139,8 +2027,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2176,12 +2063,10 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2267,10 +2152,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="Fast-mode Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2374,17 +2257,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2399,19 +2279,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -2434,8 +2310,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2453,8 +2328,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2553,8 +2427,7 @@
         <module caption="Voltage reference" id="chip" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
-                              values="VREF_AC0REFSEL"/>
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW" values="VREF_AC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1626.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1626.xml
index efa55679..4f9c4376 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1626.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1626.xml
@@ -1,38 +1,26 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file schema-version="4.4">
     <variants>
-        <variant ordercode="ATtiny1626-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny1626-MUR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny1626-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny1626-SUR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1626-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1626-MUR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1626-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1626-SUR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny1626" family="AVR8" architecture="AVR8X" avr-family="tinyAVR 2">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -136,8 +124,7 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
                         <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
                         <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
                         <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
@@ -428,10 +415,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -516,18 +501,15 @@
                     <bitfield caption="Window Comparator Interrupt Flag" mask="0x4" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x0D" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                     <bitfield caption="VIA" mask="0xc0" name="VIA" rw="RW" values="ADC_VIA"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x0C" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                     <bitfield caption="VIA" mask="0xc0" name="VIA" rw="RW" values="ADC_VIA"/>
                 </register>
                 <register caption="PGA Control" initval="0x00" name="PGACTRL" offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="ADC PGA Sample Duration" mask="0x6" name="ADCPGASAMPDUR" rw="RW"
-                              values="ADC_ADCPGASAMPDUR"/>
+                    <bitfield caption="ADC PGA Sample Duration" mask="0x6" name="ADCPGASAMPDUR" rw="RW" values="ADC_ADCPGASAMPDUR"/>
                     <bitfield caption="Gain" mask="0xe0" name="GAIN" rw="RW" values="ADC_GAIN"/>
                     <bitfield caption="PGA BIAS Select" mask="0x18" name="PGABIASSEL" rw="RW" values="ADC_PGABIASSEL"/>
                     <bitfield caption="PGA Enable" mask="0x1" name="PGAEN" rw="RW"/>
@@ -681,23 +663,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -738,14 +715,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag 0" mask="0x1" name="INT0" rw="RW"/>
@@ -761,14 +734,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -778,14 +748,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -795,14 +762,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -812,14 +776,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
@@ -944,12 +905,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -994,8 +953,7 @@
         </module>
         <module caption="CPU" id="cpu_avr_v2" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1023,12 +981,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1062,102 +1018,78 @@
         <module caption="Event System" id="ev_ctrl_v1" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="User ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User EVOUT Port A" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User EVOUT Port A" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User EVOUT Port B" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User EVOUT Port B" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User EVOUT Port C" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User EVOUT Port C" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCA0 count event" initval="0x00" name="USERTCA0CNTA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User TCA0 count event" initval="0x00" name="USERTCA0CNTA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCA0 Restart event" initval="0x00" name="USERTCA0CNTB" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User TCA0 Restart event" initval="0x00" name="USERTCA0CNTB" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCB0 Event in A" initval="0x00" name="USERTCB0CAPT" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User TCB0 Event in A" initval="0x00" name="USERTCB0CAPT" offset="0x30" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCB0 Event in B" initval="0x00" name="USERTCB0COUNT" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User TCB0 Event in B" initval="0x00" name="USERTCB0COUNT" offset="0x31" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCB1 Event in A" initval="0x00" name="USERTCB1CAPT" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User TCB1 Event in A" initval="0x00" name="USERTCB1CAPT" offset="0x32" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCB1 Event in B" initval="0x00" name="USERTCB1COUNT" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User TCB1 Event in B" initval="0x00" name="USERTCB1COUNT" offset="0x33" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
                 <register caption="User USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2C" rw="RW" size="1">
@@ -1201,12 +1133,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1248,12 +1177,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1291,12 +1217,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1336,12 +1259,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1377,12 +1297,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1420,12 +1337,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1457,16 +1371,12 @@
         </module>
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1476,16 +1386,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1513,11 +1421,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1761,40 +1667,29 @@
                     <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
                     <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
-                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
                     <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
                     <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
                 </register>
-                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="SPIROUTEA" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="SPIROUTEA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                 </register>
                 <register caption="Port Multiplexer TCA" initval="0x00" name="TCAROUTEA" offset="0x4" rw="RW" size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
                 <register caption="Port Multiplexer TCB" initval="0x00" name="TCBROUTEA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                     <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
                 </register>
-                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
-                          rw="RW" size="1">
-                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
-                              values="PORTMUX_USART1"/>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW" values="PORTMUX_USART1"/>
                 </register>
             </register-group>
             <value-group caption="CCL LUT0 select" name="PORTMUX_LUT0">
@@ -1917,12 +1812,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1984,16 +1877,11 @@
                 <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
                 <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
                 <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
-                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R" size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R" size="1"/>
                 <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
                 <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
                 <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
@@ -2008,10 +1896,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v1" name="SLPCTRL">
@@ -2108,8 +1994,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2227,8 +2112,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2264,12 +2148,10 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2355,10 +2237,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="Fast-mode Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2462,17 +2342,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2487,19 +2364,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -2522,8 +2395,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2541,8 +2413,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2641,8 +2512,7 @@
         <module caption="Voltage reference" id="chip" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
-                              values="VREF_AC0REFSEL"/>
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW" values="VREF_AC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1627.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1627.xml
index 275736d0..55cd13aa 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1627.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1627.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file schema-version="4.4">
     <variants>
-        <variant ordercode="ATtiny1627-MFR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny1627-MUR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1627-MFR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny1627-MUR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny1627" family="AVR8" architecture="AVR8X" avr-family="tinyAVR 2">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -138,11 +128,9 @@
                 <instance name="EVSYS">
                     <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
                     <signals>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
-                                pad="PA7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
                         <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
-                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS_ALT" group="EVOUT" index="1"
-                                pad="PB7"/>
+                        <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS_ALT" group="EVOUT" index="1" pad="PB7"/>
                         <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
                         <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
                     </signals>
@@ -439,10 +427,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -528,18 +514,15 @@
                     <bitfield caption="Window Comparator Interrupt Flag" mask="0x4" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x0D" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXNEG" rw="RW"
-                              values="ADC_MUXNEG"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
                     <bitfield caption="VIA" mask="0xc0" name="VIA" rw="RW" values="ADC_VIA"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x0C" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                     <bitfield caption="VIA" mask="0xc0" name="VIA" rw="RW" values="ADC_VIA"/>
                 </register>
                 <register caption="PGA Control" initval="0x00" name="PGACTRL" offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="ADC PGA Sample Duration" mask="0x6" name="ADCPGASAMPDUR" rw="RW"
-                              values="ADC_ADCPGASAMPDUR"/>
+                    <bitfield caption="ADC PGA Sample Duration" mask="0x6" name="ADCPGASAMPDUR" rw="RW" values="ADC_ADCPGASAMPDUR"/>
                     <bitfield caption="Gain" mask="0xe0" name="GAIN" rw="RW" values="ADC_GAIN"/>
                     <bitfield caption="PGA BIAS Select" mask="0x18" name="PGABIASSEL" rw="RW" values="ADC_PGABIASSEL"/>
                     <bitfield caption="PGA Enable" mask="0x1" name="PGAEN" rw="RW"/>
@@ -693,23 +676,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -750,14 +728,10 @@
                     <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
                 </register>
                 <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
-                              values="CCL_INTMODE0"/>
-                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
-                              values="CCL_INTMODE1"/>
-                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
-                              values="CCL_INTMODE2"/>
-                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
-                              values="CCL_INTMODE3"/>
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
                 </register>
                 <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
                     <bitfield caption="Interrupt Flag 0" mask="0x1" name="INT0" rw="RW"/>
@@ -773,14 +747,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -790,14 +761,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -807,14 +775,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
@@ -824,14 +789,11 @@
                     <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
@@ -956,12 +918,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -1006,8 +966,7 @@
         </module>
         <module caption="CPU" id="cpu_avr_v2" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -1035,12 +994,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1074,102 +1031,78 @@
         <module caption="Event System" id="ev_ctrl_v1" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
                 <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
-                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW"
-                              values="EVSYS_CHANNEL0"/>
+                    <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
                 </register>
                 <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
-                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW"
-                              values="EVSYS_CHANNEL1"/>
+                    <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
                 </register>
                 <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW"
-                              values="EVSYS_CHANNEL2"/>
+                    <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
                 </register>
                 <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW"
-                              values="EVSYS_CHANNEL3"/>
+                    <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
                 </register>
                 <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW"
-                              values="EVSYS_CHANNEL4"/>
+                    <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
                 </register>
                 <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW"
-                              values="EVSYS_CHANNEL5"/>
+                    <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
                 </register>
                 <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
-                    <bitfield caption="Software event on channel" mask="0xff" name="SWEVENTA" rw="W"
-                              values="EVSYS_SWEVENTA"/>
+                    <bitfield caption="Software event on channel" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
                 </register>
                 <register caption="User ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
-                          size="1">
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User EVOUT Port A" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW"
-                          size="1">
+                <register caption="User EVOUT Port A" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User EVOUT Port B" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2A" rw="RW"
-                          size="1">
+                <register caption="User EVOUT Port B" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2A" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User EVOUT Port C" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2B" rw="RW"
-                          size="1">
+                <register caption="User EVOUT Port C" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2B" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCA0 count event" initval="0x00" name="USERTCA0CNTA" offset="0x2E" rw="RW"
-                          size="1">
+                <register caption="User TCA0 count event" initval="0x00" name="USERTCA0CNTA" offset="0x2E" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCA0 Restart event" initval="0x00" name="USERTCA0CNTB" offset="0x2F" rw="RW"
-                          size="1">
+                <register caption="User TCA0 Restart event" initval="0x00" name="USERTCA0CNTB" offset="0x2F" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCB0 Event in A" initval="0x00" name="USERTCB0CAPT" offset="0x30" rw="RW"
-                          size="1">
+                <register caption="User TCB0 Event in A" initval="0x00" name="USERTCB0CAPT" offset="0x30" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCB0 Event in B" initval="0x00" name="USERTCB0COUNT" offset="0x31" rw="RW"
-                          size="1">
+                <register caption="User TCB0 Event in B" initval="0x00" name="USERTCB0COUNT" offset="0x31" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCB1 Event in A" initval="0x00" name="USERTCB1CAPT" offset="0x32" rw="RW"
-                          size="1">
+                <register caption="User TCB1 Event in A" initval="0x00" name="USERTCB1CAPT" offset="0x32" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
-                <register caption="User TCB1 Event in B" initval="0x00" name="USERTCB1COUNT" offset="0x33" rw="RW"
-                          size="1">
+                <register caption="User TCB1 Event in B" initval="0x00" name="USERTCB1COUNT" offset="0x33" rw="RW" size="1">
                     <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
                 </register>
                 <register caption="User USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2C" rw="RW" size="1">
@@ -1213,12 +1146,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1262,12 +1192,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1307,12 +1234,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1354,12 +1278,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1397,12 +1318,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1444,12 +1362,9 @@
                 <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
                 <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
                 <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
-                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0"
-                       value="0x84"/>
-                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1"
-                       value="0x85"/>
-                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2"
-                       value="0x86"/>
+                <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
                 <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
                 <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
                 <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
@@ -1485,16 +1400,12 @@
         </module>
         <module caption="Fuses" id="chip" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1504,16 +1415,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1541,11 +1450,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1789,40 +1696,29 @@
                     <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
                     <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
                 </register>
-                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
                     <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
                     <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
                 </register>
-                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="SPIROUTEA" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="SPIROUTEA" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                 </register>
                 <register caption="Port Multiplexer TCA" initval="0x00" name="TCAROUTEA" offset="0x4" rw="RW" size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
                 <register caption="Port Multiplexer TCB" initval="0x00" name="TCBROUTEA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                     <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
                 </register>
-                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
-                          rw="RW" size="1">
-                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
-                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
-                              values="PORTMUX_USART1"/>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW" values="PORTMUX_USART1"/>
                 </register>
             </register-group>
             <value-group caption="CCL LUT0 select" name="PORTMUX_LUT0">
@@ -1951,12 +1847,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -2018,16 +1912,11 @@
                 <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
                 <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
                 <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
-                          size="1"/>
-                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
-                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R" size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R" size="1"/>
                 <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
                 <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
                 <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
@@ -2042,10 +1931,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v1" name="SLPCTRL">
@@ -2142,8 +2029,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2261,8 +2147,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2298,12 +2183,10 @@
                 <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
                 <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
                 <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
                 <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
@@ -2389,10 +2272,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="Fast-mode Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2496,17 +2377,14 @@
                 <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
             </value-group>
         </module>
-        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4"
-                name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2521,19 +2399,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
@@ -2556,8 +2430,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2575,8 +2448,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2675,8 +2547,7 @@
         <module caption="Voltage reference" id="chip" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
-                              values="VREF_AC0REFSEL"/>
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW" values="VREF_AC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1634.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1634.xml
index b6804b86..7bcd5d31 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1634.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1634.xml
@@ -7,8 +7,7 @@
     <device name="ATtiny1634" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x20"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -25,22 +24,19 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
         </address-spaces>
         <peripherals>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -49,8 +45,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -61,8 +56,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -77,44 +71,37 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -123,24 +110,20 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="FUSE">
@@ -150,14 +133,12 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -262,8 +243,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -324,8 +304,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -356,10 +335,8 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield caption="BOD mode of operation when the device is in sleep mode" mask="0x18" name="BODPD"
-                              values="ENUM_BODMODE"/>
-                    <bitfield caption="BOD mode of operation when the device is active or idle" mask="0x06"
-                              name="BODACT" values="ENUM_BODMODE"/>
+                    <bitfield caption="BOD mode of operation when the device is in sleep mode" mask="0x18" name="BODPD" values="ENUM_BODMODE"/>
+                    <bitfield caption="BOD mode of operation when the device is active or idle" mask="0x06" name="BODACT" values="ENUM_BODMODE"/>
                     <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
@@ -368,8 +345,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -378,36 +354,21 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="EXTCLK_6CK_16CK_16MS"
-                       value="0x00"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms"
-                       name="INTRCOSC_8MHZ_6CK_16CK_16MS" value="0x02"/>
-                <value caption="Int. ULP Osc. 32 kHz; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms"
-                       name="INTULPOSC_32KHZ_6CK_16CK_16MS" value="0x04"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_16CK_16MS" value="0x08"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_16CK_16MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_16CK_16MS" value="0x09"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_16CK_16MS" value="0x0a"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_16CK_16MS" value="0x1a"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_16CK_16MS" value="0x0b"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_16CK_16MS" value="0x0c"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_16CK_16MS" value="0x1c"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_16CK_16MS" value="0x0d"/>
-                <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_16CK_16MS" value="0x0e"/>
-                <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_16CK_16MS" value="0x1e"/>
-                <value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_16CK_16MS" value="0x0f"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="EXTCLK_6CK_16CK_16MS" value="0x00"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="INTRCOSC_8MHZ_6CK_16CK_16MS" value="0x02"/>
+                <value caption="Int. ULP Osc. 32 kHz; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="INTULPOSC_32KHZ_6CK_16CK_16MS" value="0x04"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_16CK_16MS" value="0x08"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_16CK_16MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_16CK_16MS" value="0x09"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_16CK_16MS" value="0x0a"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_16CK_16MS" value="0x1a"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_16CK_16MS" value="0x0b"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_3MHZ_8MHZ_258CK_16CK_16MS" value="0x0c"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_16CK_16MS" value="0x1c"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_16CK_16MS" value="0x0d"/>
+                <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_8MHZ_XX_258CK_16CK_16MS" value="0x0e"/>
+                <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_8MHZ_XX_1KCK_16CK_16MS" value="0x1e"/>
+                <value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_8MHZ_XX_16KCK_16CK_16MS" value="0x0f"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -515,16 +476,14 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x20" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x22" size="1">
                     <bitfield caption="" mask="0x80" name="VDEN"/>
                     <bitfield caption="" mask="0x40" name="VDPD"/>
                     <bitfield caption="" mask="0x08" name="ADLAR"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register 2" name="DIDR2" offset="0x62" size="1">
                     <bitfield caption="ADC11 Digital input Disable" mask="0x04" name="ADC11D"/>
@@ -586,8 +545,7 @@
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -619,10 +577,8 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x5A" size="1">
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x80" name="TOIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40"
-                              name="OCIE1A"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20"
-                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x59" size="1" ocd-rw="R">
@@ -647,12 +603,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x6E" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x6C" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x6A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x68" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x6C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x6A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x68" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x67" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
@@ -672,21 +625,17 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x5A" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x01"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x01" name="OCIE0A"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x59" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x01" name="OCF0A"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x37" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x38" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x37" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x38" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x3B" size="1">
                     <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A"/>
                     <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B"/>
@@ -748,14 +697,12 @@
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
                 <register caption="Configuration Change Protection" name="CCP" offset="0x4F" size="1" mask="0xFF"/>
-                <register caption="Oscillator Calibration Value" name="OSCCAL0" offset="0x63" size="1" mask="0xFF"
-                          ocd-rw="R"/>
+                <register caption="Oscillator Calibration Value" name="OSCCAL0" offset="0x63" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="" name="OSCCAL1" offset="0x66" size="1" mask="0x03" ocd-rw="R"/>
                 <register caption="" name="OSCTCAL0A" offset="0x64" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="" name="OSCTCAL0B" offset="0x65" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x53" size="1">
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Clock Setting Register" name="CLKSR" offset="0x52" size="1">
                     <bitfield caption="Oscillator Ready" mask="0x80" name="OSCRDY"/>
@@ -789,8 +736,7 @@
                 <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x36" size="1" mask="0xFF"/>
                 <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x35" size="1" mask="0xFF"/>
                 <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x34" size="1" mask="0xFF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1" ocd-rw="R">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Read Device Signature Imprint Table" mask="0x20" name="RSIG"/>
                     <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
@@ -938,8 +884,7 @@
                 <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x50" size="1">
                     <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS_32KHZ"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS_32KHZ"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY167.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY167.xml
index f0a4dadf..65193707 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY167.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY167.xml
@@ -8,8 +8,7 @@
     <device name="ATtiny167" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -26,8 +25,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -37,8 +35,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -51,8 +48,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -67,80 +63,67 @@
             </module>
             <module name="LINUART">
                 <instance name="LINUART" caption="Local Interconnect Network">
-                    <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
-                                    caption="Local Interconnect Network"/>
+                    <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data" caption="Local Interconnect Network"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC0" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="CURRENT_SOURCE">
                 <instance name="CURRENT_SOURCE" caption="Current Source">
-                    <register-group name="CURRENT_SOURCE" name-in-module="CURRENT_SOURCE" offset="0x00"
-                                    address-space="data" caption="Current Source"/>
+                    <register-group name="CURRENT_SOURCE" name-in-module="CURRENT_SOURCE" offset="0x00" address-space="data" caption="Current Source"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -154,8 +137,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -237,8 +219,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -299,8 +280,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -339,8 +319,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always ON" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -349,94 +328,50 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK 4 ms"
-                       name="EXTLOFXTAL_1KCK_4MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK + 64 ms"
-                       name="EXTLOFXTAL_1KCK_64MS" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32768 CK + 64 ms"
-                       name="EXTLOFXTAL_32KCK_64MS" value="0x24"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_16MHZ_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_16MHZ_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms"
-                       name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK 4 ms" name="EXTLOFXTAL_1KCK_4MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32768 CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS" value="0x24"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_16MHZ_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_16MHZ_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -564,12 +499,10 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC0">
                 <register caption="Timer/Counter0 Interrupt Mask register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -582,8 +515,7 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x47" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x48" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x48" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter0" mask="0x20" name="AS0"/>
@@ -613,14 +545,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -635,38 +564,26 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Timer/Counter1 Clock Select bits" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Timer/Counter1 Clock Select bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Timer/Counter1 Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Timer/Counter1 Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register D" name="TCCR1D" offset="0x83" size="1">
-                    <bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel B" mask="0x80"
-                              name="OC1BX"/>
-                    <bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel B" mask="0x40"
-                              name="OC1BW"/>
-                    <bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel B" mask="0x20"
-                              name="OC1BV"/>
-                    <bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel B" mask="0x10"
-                              name="OC1BU"/>
-                    <bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel A" mask="0x08"
-                              name="OC1AX"/>
-                    <bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel A" mask="0x04"
-                              name="OC1AW"/>
-                    <bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel A" mask="0x02"
-                              name="OC1AV"/>
-                    <bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel A" mask="0x01"
-                              name="OC1AU"/>
+                    <bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel B" mask="0x80" name="OC1BX"/>
+                    <bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel B" mask="0x40" name="OC1BW"/>
+                    <bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel B" mask="0x20" name="OC1BV"/>
+                    <bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel B" mask="0x10" name="OC1BU"/>
+                    <bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel A" mask="0x08" name="OC1AX"/>
+                    <bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel A" mask="0x04" name="OC1AW"/>
+                    <bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel A" mask="0x02" name="OC1AV"/>
+                    <bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel A" mask="0x01" name="OC1AU"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -684,8 +601,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -758,24 +674,19 @@
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
-                <register caption="The ADC Control and Status register B (Shared with ANALOG_COMPARATOR IO_MODULE)"
-                          name="ADCSRB" offset="0x7B" size="1">
+                <register caption="The ADC Control and Status register B (Shared with ANALOG_COMPARATOR IO_MODULE)" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER4"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER4"/>
                 </register>
-                <register caption="Analog Miscellaneous Control Register (Shared with CURRENT_SOURCE IO_MODULE)"
-                          name="AMISCR" offset="0x77" size="1">
+                <register caption="Analog Miscellaneous Control Register (Shared with CURRENT_SOURCE IO_MODULE)" name="AMISCR" offset="0x77" size="1">
                     <bitfield caption="External Voltage Reference Input Enable" mask="0x04" name="AREFEN"/>
                     <bitfield caption="Internal Voltage Reference Output Enable" mask="0x02" name="XREFEN"/>
                 </register>
@@ -796,14 +707,10 @@
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_ADC_V_REF8">
-                <value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference.  "
-                       name="VAL_0x00" value="0x00"/>
-                <value caption="If AREFEN==0 then Internal 1.1V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 1.1V as Voltage Reference with external capacitor at AREF pin."
-                       name="VAL_0x01" value="0x01"/>
-                <value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference.  "
-                       name="VAL_0x02" value="0x02"/>
-                <value caption="If AREFEN==0 then Internal 2.56V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 2.56V as Voltage Reference with external capacitor at AREF pin."
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference.  " name="VAL_0x00" value="0x00"/>
+                <value caption="If AREFEN==0 then Internal 1.1V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 1.1V as Voltage Reference with external capacitor at AREF pin." name="VAL_0x01" value="0x01"/>
+                <value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference.  " name="VAL_0x02" value="0x02"/>
+                <value caption="If AREFEN==0 then Internal 2.56V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 2.56V as Voltage Reference with external capacitor at AREF pin." name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -828,31 +735,25 @@
         </module>
         <module caption="Current Source" name="CURRENT_SOURCE">
             <register-group caption="Current Source" name="CURRENT_SOURCE">
-                <register caption="Analog Miscellaneous Control Register (Shared with AD_CONVERTER IO_MODULE)"
-                          name="AMISCR" offset="0x77" size="1">
+                <register caption="Analog Miscellaneous Control Register (Shared with AD_CONVERTER IO_MODULE)" name="AMISCR" offset="0x77" size="1">
                     <bitfield caption="Current Source Enable" mask="0x01" name="ISRCEN"/>
                 </register>
             </register-group>
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register
-                        caption="Analog Comparator &amp; ADC Control and Status Register B (Shared with AD_CONVERTER IO_MODULE)"
-                        name="ADCSRB" offset="0x7B" size="1">
+                <register caption="Analog Comparator &amp; ADC Control and Status Register B (Shared with AD_CONVERTER IO_MODULE)" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
-                    <bitfield caption="Analog Comparator Internal Voltage Reference Select Bits" mask="0x30"
-                              name="ACIR"/>
+                    <bitfield caption="Analog Comparator Internal Voltage Reference Select Bits" mask="0x30" name="ACIR"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Internal Reference Select" mask="0x40" name="ACIRS"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -865,10 +766,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -945,14 +844,12 @@
                     <bitfield caption="Sleep Mode Select Bits" mask="0x06" name="SM" values="CPU_SLEEP_MODE2"/>
                     <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Clock Selection Register" name="CLKSELR" offset="0x63" size="1">
                     <bitfield caption="Clock Out - CKOUT fuse substitution" mask="0x40" name="COUT"/>
@@ -962,8 +859,7 @@
                 <register caption="Clock Control &amp; Status Register" name="CLKCSR" offset="0x62" size="1">
                     <bitfield caption="Clock Control Change Enable" mask="0x80" name="CLKCCE"/>
                     <bitfield caption="Clock Ready Flag" mask="0x10" name="CLKRDY"/>
-                    <bitfield caption="Clock Control bits" mask="0x0F" name="CLKC"
-                              values="CPU_CLK_COMMAND_LIST_4_BITS"/>
+                    <bitfield caption="Clock Control bits" mask="0x0F" name="CLKC" values="CPU_CLK_COMMAND_LIST_4_BITS"/>
                 </register>
                 <register caption="DebugWire data register" name="DWDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="General Purpose IO register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY202.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY202.xml
index 4bae1c7e..e2751662 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY202.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY202.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny202-SSFR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny202-SSNR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny202-SSFR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny202-SSNR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny202" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x8800" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0040" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0040" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0080" start="0x3f80" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x0800" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -334,10 +324,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -386,10 +374,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -410,8 +396,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -502,23 +487,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -566,14 +546,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -583,14 +560,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -676,12 +650,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -714,8 +686,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -743,12 +714,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -788,89 +757,55 @@
         </module>
         <module caption="Event System" id="I2601" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0"
-                          offset="0x22" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0"
-                              rw="RW" values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -926,29 +861,25 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -978,8 +909,7 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1032,16 +962,12 @@
         </module>
         <module caption="Fuses" id="I2601" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1051,8 +977,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1069,8 +994,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1098,11 +1022,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1268,35 +1190,24 @@
         </module>
         <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1383,12 +1294,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1463,10 +1372,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1558,8 +1465,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1672,8 +1578,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1709,8 +1614,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -1887,15 +1791,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -1910,19 +1812,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -1942,8 +1840,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -1961,8 +1858,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2056,10 +1952,8 @@
         <module caption="Voltage reference" id="I2601" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY204.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY204.xml
index 32ddb037..f1dcf43a 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY204.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY204.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny204-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny204-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny204-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny204-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny204" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x8800" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0040" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0040" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0080" start="0x3f80" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x0800" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -370,10 +360,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -422,10 +410,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -446,8 +432,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -538,23 +523,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -602,14 +582,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -619,14 +596,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -712,12 +686,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -750,8 +722,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -779,12 +750,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -824,89 +793,55 @@
         </module>
         <module caption="Event System" id="I2601" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0"
-                          offset="0x22" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0"
-                              rw="RW" values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1"
-                          offset="0x23" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1"
-                              rw="RW" values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -968,8 +903,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -978,8 +912,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -988,8 +921,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -998,8 +930,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1044,8 +975,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1090,16 +1020,12 @@
         </module>
         <module caption="Fuses" id="I2601" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1109,8 +1035,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1127,8 +1052,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1156,11 +1080,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1326,40 +1248,27 @@
         </module>
         <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1458,12 +1367,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1538,10 +1445,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1633,8 +1538,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1747,8 +1651,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1784,8 +1687,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -1962,15 +1864,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -1985,19 +1885,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2017,8 +1913,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2036,8 +1931,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2131,10 +2025,8 @@
         <module caption="Voltage reference" id="I2601" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY212.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY212.xml
index 64e111b8..9e073c97 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY212.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY212.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny212-SSFR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny212-SSNR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny212-SSFR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny212-SSNR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny212" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x8800" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0040" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0040" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0080" start="0x3f80" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x0800" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -354,10 +344,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -411,10 +399,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -435,8 +421,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -527,23 +512,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -591,14 +571,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -608,14 +585,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -701,12 +675,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -751,8 +723,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -780,12 +751,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -835,104 +804,64 @@
         </module>
         <module caption="Event System" id="I2601" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2"
-                          offset="0x04" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW"
-                              values="EVSYS_ASYNCCH2"/>
+                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
                 </register>
-                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3"
-                          offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW"
-                              values="EVSYS_ASYNCCH3"/>
+                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0"
-                          offset="0x22" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0"
-                              rw="RW" values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1"
-                          offset="0x23" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1"
-                              rw="RW" values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1032,8 +961,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1042,8 +970,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1052,8 +979,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1062,8 +988,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1108,8 +1033,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1171,16 +1095,12 @@
         </module>
         <module caption="Fuses" id="I2601" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1190,8 +1110,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1208,8 +1127,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1237,11 +1155,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1407,35 +1323,24 @@
         </module>
         <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1522,12 +1427,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1602,10 +1505,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1697,8 +1598,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1811,8 +1711,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1848,8 +1747,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -1931,18 +1829,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2084,17 +1979,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x0"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x3"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
@@ -2211,15 +2103,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2234,19 +2124,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2266,8 +2152,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2285,8 +2170,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2380,10 +2264,8 @@
         <module caption="Voltage reference" id="I2601" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY214.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY214.xml
index 8ea6464d..9b057d9c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY214.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY214.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny214-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny214-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny214-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny214-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny214" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x8800" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0040" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0040" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0080" start="0x3f80" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x0800" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -392,10 +382,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -449,10 +437,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -473,8 +459,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -565,23 +550,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -629,14 +609,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -646,14 +623,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -739,12 +713,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -789,8 +761,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -818,12 +789,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -873,104 +842,64 @@
         </module>
         <module caption="Event System" id="I2601" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2"
-                          offset="0x04" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW"
-                              values="EVSYS_ASYNCCH2"/>
+                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
                 </register>
-                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3"
-                          offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW"
-                              values="EVSYS_ASYNCCH3"/>
+                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0"
-                          offset="0x22" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0"
-                              rw="RW" values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1"
-                          offset="0x23" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1"
-                              rw="RW" values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1070,8 +999,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1080,8 +1008,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1090,8 +1017,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1100,8 +1026,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1146,8 +1071,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1209,16 +1133,12 @@
         </module>
         <module caption="Fuses" id="I2601" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1228,8 +1148,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1246,8 +1165,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1275,11 +1193,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1445,40 +1361,27 @@
         </module>
         <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1577,12 +1480,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1657,10 +1558,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1752,8 +1651,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1866,8 +1764,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1903,8 +1800,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -1986,18 +1882,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2139,17 +2032,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x0"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x3"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
@@ -2266,15 +2156,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2289,19 +2177,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2321,8 +2205,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2340,8 +2223,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2435,10 +2317,8 @@
         <module caption="Voltage reference" id="I2601" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY2313.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY2313.xml
index 0fa67e6e..3b6f66dc 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY2313.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY2313.xml
@@ -8,8 +8,7 @@
     <device name="ATtiny2313" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x20"/>
+                <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -26,8 +25,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0080" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0080">
-                <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
@@ -37,8 +35,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -51,8 +48,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -64,8 +60,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -75,50 +70,42 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART" caption="USART">
-                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -127,8 +114,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="FUSE">
@@ -138,8 +124,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -220,8 +205,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -282,8 +266,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -309,8 +292,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x04 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x04 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -348,8 +330,7 @@
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
                     <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
-                              values="ENUM_EESAVE_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_EESAVE_BODLEVEL"/>
                     <bitfield caption="External reset disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x64">
@@ -362,88 +343,47 @@
                 <value caption="Ext. Clock; Start-up time: 14 CK + 0   ms" name="EXTCLK_14CK_0MS" value="0x00"/>
                 <value caption="Ext. Clock; Start-up time: 14 CK + 4.1 ms" name="EXTCLK_14CK_4MS1" value="0x10"/>
                 <value caption="Ext. Clock; Start-up time: 14 CK + 65  ms" name="EXTCLK_14CK_65MS" value="0x20"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_4MHZ_14CK_0MS"
-                       value="0x02"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_4MHZ_14CK_4MS1"
-                       value="0x12"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_4MHZ_14CK_65MS"
-                       value="0x22"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_8MHZ_14CK_0MS"
-                       value="0x04"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_8MHZ_14CK_4MS1"
-                       value="0x14"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_8MHZ_14CK_65MS"
-                       value="0x24"/>
-                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS"
-                       value="0x06"/>
-                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS"
-                       value="0x16"/>
-                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x3F"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_4MHZ_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_4MHZ_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_4MHZ_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_8MHZ_14CK_0MS" value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_8MHZ_14CK_4MS1" value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_8MHZ_14CK_65MS" value="0x24"/>
+                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS" value="0x06"/>
+                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS" value="0x16"/>
+                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_EESAVE_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -484,21 +424,17 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x01"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x01" name="OCIE0A"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x01" name="OCF0A"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x5C" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x50" size="1">
                     <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A"/>
                     <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B"/>
@@ -527,10 +463,8 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x80" name="TOIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40"
-                              name="OCIE1A"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20"
-                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -555,12 +489,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -578,8 +509,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -659,16 +589,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR" offset="0x21" size="1" mask="0x03"/>
             </register-group>
@@ -710,8 +638,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer Low Byte" name="SPL" offset="0x5D" size="1" mask="0xFF"/>
-                <register caption="Store Program Memory Control and Status register" name="SPMCSR" offset="0x57"
-                          size="1" ocd-rw="">
+                <register caption="Store Program Memory Control and Status register" name="SPMCSR" offset="0x57" size="1" ocd-rw="">
                     <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
@@ -722,10 +649,8 @@
                     <bitfield caption="Pull-up Disable" mask="0x80" name="PUD"/>
                     <bitfield caption="Sleep Mode Select Bits" mask="0x50" name="SM" values="CPU_SLEEP_MODE_2BITS"/>
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
-                    <bitfield caption="Interrupt Sense Control 1 bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
-                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 1 bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
                     <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
@@ -733,14 +658,12 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="General Timer Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="" mask="0x01" name="PSR10"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY2313A.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY2313A.xml
index 1a874382..b87d74bb 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY2313A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY2313A.xml
@@ -12,8 +12,7 @@
     <device name="ATtiny2313A" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x20"/>
+                <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -30,8 +29,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0080" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0080">
-                <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
@@ -41,8 +39,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -55,8 +52,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -68,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -79,56 +74,47 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART" caption="USART">
-                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -142,8 +128,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -226,8 +211,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -288,8 +272,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -315,8 +298,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x04 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x04 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -354,8 +336,7 @@
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
                     <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
-                              values="ENUM_EESAVE_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_EESAVE_BODLEVEL"/>
                     <bitfield caption="External reset disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
@@ -368,88 +349,47 @@
                 <value caption="Ext. Clock; Start-up time: 14 CK + 0   ms" name="EXTCLK_14CK_0MS" value="0x00"/>
                 <value caption="Ext. Clock; Start-up time: 14 CK + 4.1 ms" name="EXTCLK_14CK_4MS1" value="0x10"/>
                 <value caption="Ext. Clock; Start-up time: 14 CK + 65  ms" name="EXTCLK_14CK_65MS" value="0x20"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_4MHZ_14CK_0MS"
-                       value="0x02"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_4MHZ_14CK_4MS1"
-                       value="0x12"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_4MHZ_14CK_65MS"
-                       value="0x22"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_8MHZ_14CK_0MS"
-                       value="0x04"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_8MHZ_14CK_4MS1"
-                       value="0x14"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_8MHZ_14CK_65MS"
-                       value="0x24"/>
-                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS"
-                       value="0x06"/>
-                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS"
-                       value="0x16"/>
-                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x3F"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_4MHZ_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_4MHZ_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_4MHZ_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_8MHZ_14CK_0MS" value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_8MHZ_14CK_4MS1" value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_8MHZ_14CK_65MS" value="0x24"/>
+                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS" value="0x06"/>
+                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS" value="0x16"/>
+                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_EESAVE_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -490,21 +430,17 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x01"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x01" name="OCIE0A"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x01" name="OCF0A"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x5C" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x50" size="1">
                     <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A"/>
                     <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B"/>
@@ -533,10 +469,8 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x80" name="TOIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40"
-                              name="OCIE1A"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20"
-                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -561,12 +495,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -584,8 +515,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -654,16 +584,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR" offset="0x21" size="1" mask="0x03"/>
             </register-group>
@@ -728,16 +656,13 @@
                     <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
                     <bitfield caption="Pin Change Interrupt Flags" mask="0x38" name="PCIF"/>
                 </register>
-                <register caption="Pin Change Interrupt Mask Register 2" name="PCMSK2" offset="0x25" size="1"
-                          ocd-rw="R">
+                <register caption="Pin Change Interrupt Mask Register 2" name="PCMSK2" offset="0x25" size="1" ocd-rw="R">
                     <bitfield caption="Pin Change Interrupt Masks" mask="0x7F" name="PCINT" lsb="11"/>
                 </register>
-                <register caption="Pin Change Interrupt Mask Register 1" name="PCMSK1" offset="0x24" size="1"
-                          ocd-rw="R">
+                <register caption="Pin Change Interrupt Mask Register 1" name="PCMSK1" offset="0x24" size="1" ocd-rw="R">
                     <bitfield caption="Pin Change Interrupt Masks" mask="0x07" name="PCINT" lsb="8"/>
                 </register>
-                <register caption="Pin Change Interrupt Mask Register 0" name="PCMSK0" offset="0x40" size="1"
-                          mask="0xFF"/>
+                <register caption="Pin Change Interrupt Mask Register 0" name="PCMSK0" offset="0x40" size="1" mask="0xFF"/>
             </register-group>
         </module>
         <module caption="CPU Registers" name="CPU">
@@ -753,8 +678,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer Low Byte" name="SPL" offset="0x5D" size="1" mask="0xFF"/>
-                <register caption="Store Program Memory Control and Status register" name="SPMCSR" offset="0x57"
-                          size="1" ocd-rw="">
+                <register caption="Store Program Memory Control and Status register" name="SPMCSR" offset="0x57" size="1" ocd-rw="">
                     <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
@@ -765,10 +689,8 @@
                     <bitfield caption="Pull-up Disable" mask="0x80" name="PUD"/>
                     <bitfield caption="Sleep Mode Select Bits" mask="0x50" name="SM" values="CPU_SLEEP_MODE_2BITS"/>
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
-                    <bitfield caption="Interrupt Sense Control 1 bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
-                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 1 bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
                     <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
@@ -776,14 +698,12 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="General Timer Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="" mask="0x01" name="PSR10"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24.xml
index d8a79183..86314cef 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24.xml
@@ -8,8 +8,7 @@
     <device name="ATtiny24" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x20"/>
+                <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -26,8 +25,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0080" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0080">
-                <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -37,8 +35,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -51,8 +48,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -63,56 +59,47 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -121,8 +108,7 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="FUSE">
@@ -132,8 +118,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -212,8 +197,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -273,8 +257,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE_STK600">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -312,8 +295,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -322,94 +304,50 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -447,16 +385,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR0" offset="0x21" size="1">
                     <bitfield caption="ADC 1 Digital input buffer disable" mask="0x02" name="ADC1D"/>
@@ -479,15 +415,13 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
                     <bitfield caption="ADC Left Adjust Result" mask="0x10" name="ADLAR"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1" mask="0xFF"/>
             </register-group>
@@ -543,8 +477,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
@@ -587,8 +520,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -609,14 +541,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -633,10 +562,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
@@ -657,14 +584,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2C" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -686,12 +610,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -712,14 +633,12 @@
                     <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -770,8 +689,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24A.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24A.xml
index 54bd8d6c..ef63d490 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24A.xml
@@ -1,30 +1,20 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny24A-CCU" package="UFBGA16" pinout="BGA_16" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny24A-MMH" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny24A-MU" package="QFN20" pinout="QFN20" speedmax="20000000" tempmax="85" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny24A-PU" package="PDIP14" pinout="SOIC_14" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny24A-SSU" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny24A-SSN" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny24A-MF" package="QFN20" pinout="QFN20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny24A-MM8" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny24A-SSF" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny24A-CCU" package="UFBGA16" pinout="BGA_16" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny24A-MMH" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny24A-MU" package="QFN20" pinout="QFN20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny24A-PU" package="PDIP14" pinout="SOIC_14" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny24A-SSU" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny24A-SSN" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny24A-MF" package="QFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny24A-MM8" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny24A-SSF" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny24A" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x20"/>
+                <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,8 +31,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0080" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0080">
-                <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -52,8 +41,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -66,8 +54,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -78,8 +65,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="ACIN" group="AIN" index="0" pad="PA1"/>
                         <signal function="ACIN" group="AIN" index="1" pad="PA2"/>
@@ -88,8 +74,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PA0"/>
                         <signal function="ADC" group="ADC" index="1" pad="PA1"/>
@@ -105,8 +90,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal function="TWI" group="SCL" pad="PA4"/>
                         <signal function="TWI" group="SDA" pad="PA6"/>
@@ -118,8 +102,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
                         <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
@@ -139,20 +122,17 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="T0" group="T0" pad="PA3"/>
                         <signal function="T0" group="OC0B" pad="PA7"/>
@@ -162,8 +142,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal function="T1" group="T1" pad="PA4"/>
                         <signal function="T1" group="OC1B" pad="PA5"/>
@@ -174,8 +153,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -184,8 +162,7 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="FUSE">
@@ -195,8 +172,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -275,8 +251,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -336,8 +311,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE_STK600">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -375,8 +349,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -385,94 +358,50 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -510,16 +439,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR0" offset="0x21" size="1">
                     <bitfield caption="ADC 1 Digital input buffer disable" mask="0x02" name="ADC1D"/>
@@ -545,23 +472,19 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
                     <bitfield caption="ADC Left Adjust Result" mask="0x10" name="ADLAR"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1" mask="0xFF"/>
             </register-group>
             <value-group caption="" name="ANALOG_ADC_V_REF">
-                <value caption="VCC used as analog reference, disconnected from PA0 (AREF)" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="External voltage reference at PA0 (AREF) pin, internal reference turned off"
-                       name="VAL_0x01" value="0x01"/>
+                <value caption="VCC used as analog reference, disconnected from PA0 (AREF)" name="VAL_0x00" value="0x00"/>
+                <value caption="External voltage reference at PA0 (AREF) pin, internal reference turned off" name="VAL_0x01" value="0x01"/>
                 <value caption="Internal 1.1V voltage reference" name="VAL_0x02" value="0x02"/>
                 <value caption="Reserved" name="VAL_0x03" value="0x03"/>
             </value-group>
@@ -616,8 +539,7 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
-                    <bitfield caption="Interrupt Sense Control 0" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
@@ -660,8 +582,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -682,14 +603,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -706,10 +624,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
@@ -730,14 +646,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2C" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -759,12 +672,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -785,14 +695,12 @@
                     <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -843,8 +751,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY25.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY25.xml
index a3ae1c41..aaba4e07 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY25.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY25.xml
@@ -1,48 +1,29 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny25V-10PU" package="PDIP8" pinout="SOIC_8" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny25V-10SU" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny25V-10SH" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny25V-10SSU" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny25V-10SSH" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny25V-10MU" package="MLF20" pinout="QFN_20" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny25V-10SN" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny25V-10SSN" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny25V-10MF" package="MLF20" pinout="QFN_20" speedmax="10000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny25V-20PU" package="PDIP8" pinout="SOIC_8" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny25V-20SU" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny25V-20SH" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny25V-20SSU" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny25V-20SSH" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny25V-20MU" package="MLF20" pinout="QFN_20" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny25V-20SN" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny25V-20SSN" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny25V-20MF" package="MLF20" pinout="QFN_20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny25V-10PU" package="PDIP8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny25V-10SU" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny25V-10SH" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny25V-10SSU" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny25V-10SSH" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny25V-10MU" package="MLF20" pinout="QFN_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny25V-10SN" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny25V-10SSN" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny25V-10MF" package="MLF20" pinout="QFN_20" speedmax="10000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny25V-20PU" package="PDIP8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny25V-20SU" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny25V-20SH" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny25V-20SSU" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny25V-20SSH" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny25V-20MU" package="MLF20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny25V-20SN" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny25V-20SSN" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny25V-20MF" package="MLF20" pinout="QFN_20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
     </variants>
     <device name="ATtiny25" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x20"/>
+                <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -59,8 +40,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0080" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0080">
-                <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
@@ -70,8 +50,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -84,8 +63,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="ACIN" group="AIN" index="1" pad="PB1"/>
                         <signal function="ACIN" group="AIN" index="0" pad="PB0"/>
@@ -94,8 +72,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PB5"/>
                         <signal function="ADC" group="ADC" index="1" pad="PB2"/>
@@ -106,8 +83,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal function="TWI" group="SDA" pad="PB0"/>
                         <signal function="TWI" group="SCL" pad="PB2"/>
@@ -119,8 +95,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXTINT" group="PCINT" index="0" pad="PB0"/>
                         <signal function="EXTINT" group="PCINT" index="1" pad="PB1"/>
@@ -134,20 +109,17 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="T0" group="T0" pad="PB2"/>
                         <signal function="T0" group="OC0B" pad="PB1"/>
@@ -155,8 +127,7 @@
                     </signals>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="T1" group="OC1B" pad="PB4"/>
                         <signal function="T1" group="OC1BINV" pad="PB3"/>
@@ -167,14 +138,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -188,8 +157,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -266,8 +234,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -327,8 +294,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE_STK600">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -366,8 +332,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -376,108 +341,57 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_1KCK_14CK_4MS"
-                       value="0x01"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_16KCK_14CK_4MS"
-                       value="0x11"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 64 ms" name="PLLCLK_1KCK_14CK_64MS"
-                       value="0x21"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="PLLCLK_16KCK_14CK_64MS" value="0x31"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
-                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="INTRCOSC_6MHZ4_6CK_14CK_64MS" value="0x03"/>
-                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_6MHZ4_6CK_14CK_4MS" value="0x23"/>
-                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 1 CK/14 CK + 0 ms"
-                       name="INTRCOSC_6MHZ4_1CK_14CK_0MS" value="0x33"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_1KCK_14CK_4MS" value="0x01"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_16KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 64 ms" name="PLLCLK_1KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="PLLCLK_16KCK_14CK_64MS" value="0x31"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_6MHZ4_6CK_14CK_64MS" value="0x03"/>
+                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_6MHZ4_6CK_14CK_4MS" value="0x23"/>
+                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 1 CK/14 CK + 0 ms" name="INTRCOSC_6MHZ4_1CK_14CK_0MS" value="0x33"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -510,15 +424,13 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR0" offset="0x34" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -546,15 +458,13 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
                     <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x34" size="1">
                     <bitfield caption="ADC0 Digital input Disable" mask="0x20" name="ADC0D"/>
@@ -615,8 +525,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
@@ -658,8 +567,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -680,10 +588,8 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10"
-                              name="OCIE0A"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08"
-                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1">
@@ -703,10 +609,8 @@
                     <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x49" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x49" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x4C" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR0"/>
@@ -716,8 +620,7 @@
                 <register caption="Timer/Counter Control Register" name="TCCR1" offset="0x50" size="1">
                     <bitfield caption="Clear Timer/Counter on Compare Match" mask="0x80" name="CTC1"/>
                     <bitfield caption="Pulse Width Modulator Enable" mask="0x40" name="PWM1A"/>
-                    <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1A"
-                              values="CLK_COMP_MATCH_OUT_MODE"/>
+                    <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1A" values="CLK_COMP_MATCH_OUT_MODE"/>
                     <bitfield caption="Clock Select Bits" mask="0x0F" name="CS1" values="CLK_SEL_4BIT"/>
                 </register>
                 <register caption="Timer/Counter Register" name="TCNT1" offset="0x4F" size="1" mask="0xFF" ocd-rw="R"/>
@@ -725,10 +628,8 @@
                 <register caption="Output Compare Register" name="OCR1B" offset="0x4B" size="1" mask="0xFF"/>
                 <register caption="Output compare register" name="OCR1C" offset="0x4D" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40"
-                              name="OCIE1A"/>
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20"
-                              name="OCIE1B"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1">
@@ -792,8 +693,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Read Device Signature Imprint Table" mask="0x20" name="RSIG"/>
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
@@ -826,8 +726,7 @@
                     <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
                     <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
-                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
@@ -835,14 +734,12 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="PLL Control and status register" name="PLLCSR" offset="0x47" size="1">
                     <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY261.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY261.xml
index b6a074f4..fb4a4811 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY261.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY261.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny261V-10MU" package="MLF32" pinout="QFN_32" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny261V-10PU" package="PDIP20" pinout="SOIC_20" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny261V-10SU" package="SOIC20" pinout="SOIC_20" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny261-20MU" package="MLF32" pinout="QFN_32" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny261-20PU" package="PDIP20" pinout="SOIC_20" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny261-20SU" package="SOIC20" pinout="SOIC_20" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny261V-10MU" package="MLF32" pinout="QFN_32" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny261V-10PU" package="PDIP20" pinout="SOIC_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny261V-10SU" package="SOIC20" pinout="SOIC_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny261-20MU" package="MLF32" pinout="QFN_32" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny261-20PU" package="PDIP20" pinout="SOIC_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny261-20SU" package="SOIC20" pinout="SOIC_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
     </variants>
     <device name="ATtiny261" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x20"/>
+                <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0080" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0080">
-                <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -60,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -76,8 +66,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PA0"/>
                         <signal function="ADC" group="ADC" index="1" pad="PA1"/>
@@ -96,8 +85,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="ACIN" group="AIN" index="0" pad="PA7"/>
                         <signal function="ACIN" group="AIN" index="1" pad="PA6"/>
@@ -107,8 +95,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal field="USIPOS" function="USI" group="SDA" pad="PB0"/>
                         <signal field="USIPOS" function="USI" group="SCL" pad="PB2"/>
@@ -125,28 +112,24 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="T0" group="ICP0" pad="PA4"/>
                         <signal function="T0" group="T0" pad="PB6"/>
                     </signals>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="T1" group="OC1AINV" pad="PB0"/>
                         <signal function="T1" group="OC1A" pad="PB1"/>
@@ -159,14 +142,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
                         <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
@@ -191,8 +172,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -206,8 +186,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -288,8 +267,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -350,8 +328,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -377,8 +354,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -417,8 +393,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -427,102 +402,54 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS"
-                       value="0x20"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS"
-                       value="0x01"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS"
-                       value="0x11"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS"
-                       value="0x21"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms"
-                       name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms"
-                       name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms"
-                       name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -572,8 +499,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
@@ -582,8 +508,7 @@
                     <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
                     <bitfield caption="" mask="0x10" name="REFS2"/>
                     <bitfield caption="" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER3"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x22" size="1">
                     <bitfield caption="ADC10 Digital input Disable" mask="0x80" name="ADC10D"/>
@@ -637,8 +562,7 @@
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -699,8 +623,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -721,15 +644,12 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10"
-                              name="OCIE0A"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08"
-                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
                     <bitfield caption="Timer/Counter0 Input Capture Interrupt Enable" mask="0x01" name="TICIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
@@ -750,10 +670,8 @@
                 </register>
                 <register caption="Timer/Counter0 High" name="TCNT0H" offset="0x34" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Low" name="TCNT0L" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1" mask="0xFF"/>
             </register-group>
             <register-group caption="Timer/Counter, 8-bit" name="TC1">
                 <register caption="Timer/Counter Control Register A" name="TCCR1A" offset="0x50" size="1">
@@ -786,8 +704,7 @@
                     <bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES1"/>
                     <bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC1"/>
                     <bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF1"/>
-                    <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1"
-                              values="PULSE_WIDTH_MODU2"/>
+                    <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1" values="PULSE_WIDTH_MODU2"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register E" name="TCCR1E" offset="0x20" size="1">
                     <bitfield caption="Ouput Compare Override Enable Bits" mask="0x3F" name="OC1OE"/>
@@ -799,12 +716,9 @@
                 <register caption="Output compare register" name="OCR1C" offset="0x4B" size="1" mask="0xFF"/>
                 <register caption="Output compare register" name="OCR1D" offset="0x4A" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80"
-                              name="OCIE1D"/>
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40"
-                              name="OCIE1A"/>
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20"
-                              name="OCIE1B"/>
+                    <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80" name="OCIE1D"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -861,8 +775,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
@@ -875,8 +788,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
@@ -919,8 +831,7 @@
                     <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
                     <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
-                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
                     <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
@@ -928,14 +839,12 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x48" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="PLL Control and status register" name="PLLCSR" offset="0x49" size="1">
                     <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY261A.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY261A.xml
index d0769aa1..5fc9b42e 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY261A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY261A.xml
@@ -16,8 +16,7 @@
     <device name="ATtiny261A" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x20"/>
+                <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -34,8 +33,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0080" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0080">
-                <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -45,8 +43,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -59,8 +56,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -75,60 +71,50 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -142,8 +128,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -224,8 +209,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -286,8 +270,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -313,8 +296,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -353,8 +335,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -363,102 +344,54 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS"
-                       value="0x20"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS"
-                       value="0x01"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS"
-                       value="0x11"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS"
-                       value="0x21"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms"
-                       name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms"
-                       name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms"
-                       name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -508,8 +441,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
@@ -518,8 +450,7 @@
                     <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
                     <bitfield caption="" mask="0x10" name="REFS2"/>
                     <bitfield caption="" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER3"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x22" size="1">
                     <bitfield caption="ADC10 Digital input Disable" mask="0x80" name="ADC10D"/>
@@ -573,8 +504,7 @@
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -635,8 +565,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -657,15 +586,12 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10"
-                              name="OCIE0A"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08"
-                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
                     <bitfield caption="Timer/Counter0 Input Capture Interrupt Enable" mask="0x01" name="TICIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
@@ -686,10 +612,8 @@
                 </register>
                 <register caption="Timer/Counter0 High" name="TCNT0H" offset="0x34" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Low" name="TCNT0L" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1" mask="0xFF"/>
             </register-group>
             <register-group caption="Timer/Counter, 8-bit" name="TC1">
                 <register caption="Timer/Counter Control Register A" name="TCCR1A" offset="0x50" size="1">
@@ -722,8 +646,7 @@
                     <bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES1"/>
                     <bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC1"/>
                     <bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF1"/>
-                    <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1"
-                              values="PULSE_WIDTH_MODU2"/>
+                    <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1" values="PULSE_WIDTH_MODU2"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register E" name="TCCR1E" offset="0x20" size="1">
                     <bitfield caption="Ouput Compare Override Enable Bits" mask="0x3F" name="OC1OE"/>
@@ -735,12 +658,9 @@
                 <register caption="Output compare register" name="OCR1C" offset="0x4B" size="1" mask="0xFF"/>
                 <register caption="Output compare register" name="OCR1D" offset="0x4A" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80"
-                              name="OCIE1D"/>
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40"
-                              name="OCIE1A"/>
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20"
-                              name="OCIE1B"/>
+                    <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80" name="OCIE1D"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -797,8 +717,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
@@ -811,8 +730,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
@@ -857,8 +775,7 @@
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
                     <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
                     <bitfield caption="BOD Sleep Enable" mask="0x04" name="BODSE"/>
-                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
                     <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
@@ -866,14 +783,12 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x48" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="PLL Control and status register" name="PLLCSR" offset="0x49" size="1">
                     <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY3216.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY3216.xml
index b5c6ec44..3150360d 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY3216.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY3216.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny3216-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny3216-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny3216-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny3216-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny3216" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -518,10 +508,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -579,10 +567,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -603,8 +589,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -697,23 +682,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -761,14 +741,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -778,14 +755,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -871,12 +845,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -921,8 +893,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -950,12 +921,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -998,114 +967,70 @@
         </module>
         <module caption="Event System" id="I2603" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2"
-                          offset="0x04" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW"
-                              values="EVSYS_ASYNCCH2"/>
+                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
                 </register>
-                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3"
-                          offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW"
-                              values="EVSYS_ASYNCCH3"/>
+                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11"
-                          offset="0x1D" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11"
-                              rw="RW" values="EVSYS_ASYNCUSER11"/>
+                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
                 </register>
-                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12"
-                          offset="0x1E" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12"
-                              rw="RW" values="EVSYS_ASYNCUSER12"/>
+                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW"
-                              values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW"
-                              values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1213,8 +1138,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1223,8 +1147,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1233,8 +1156,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1243,8 +1165,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1289,8 +1210,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1372,16 +1292,12 @@
         </module>
         <module caption="Fuses" id="I2603" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1391,8 +1307,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1409,8 +1324,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1438,11 +1352,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1608,40 +1520,27 @@
         </module>
         <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                     <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
                 </register>
@@ -1746,12 +1645,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1826,10 +1723,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1921,8 +1816,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2035,8 +1929,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2072,8 +1965,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2155,18 +2047,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2308,17 +2197,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x0"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x3"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
@@ -2333,10 +2219,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2441,15 +2325,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2464,19 +2346,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2496,8 +2374,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2515,8 +2392,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2642,10 +2518,8 @@
         <module caption="Voltage reference" id="I2603" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x4">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
@@ -2655,14 +2529,11 @@
                     <bitfield caption="DAC2/AC2 reference enable" mask="0x20" name="DAC2REFEN" rw="RW"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
-                    <bitfield caption="ADC1 reference select" mask="0x70" name="ADC1REFSEL" rw="RW"
-                              values="VREF_ADC1REFSEL"/>
-                    <bitfield caption="DAC1/AC1 reference select" mask="0x7" name="DAC1REFSEL" rw="RW"
-                              values="VREF_DAC1REFSEL"/>
+                    <bitfield caption="ADC1 reference select" mask="0x70" name="ADC1REFSEL" rw="RW" values="VREF_ADC1REFSEL"/>
+                    <bitfield caption="DAC1/AC1 reference select" mask="0x7" name="DAC1REFSEL" rw="RW" values="VREF_DAC1REFSEL"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
-                    <bitfield caption="DAC2/AC2 reference select" mask="0x7" name="DAC2REFSEL" rw="RW"
-                              values="VREF_DAC2REFSEL"/>
+                    <bitfield caption="DAC2/AC2 reference select" mask="0x7" name="DAC2REFSEL" rw="RW" values="VREF_DAC2REFSEL"/>
                 </register>
             </register-group>
             <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY3217.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY3217.xml
index 05d5451a..51e15b92 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY3217.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY3217.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny3217-MFR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny3217-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny3217-MFR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny3217-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny3217" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -548,10 +538,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -609,10 +597,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -633,8 +619,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -727,23 +712,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -791,14 +771,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -808,14 +785,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -901,12 +875,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -951,8 +923,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -980,12 +951,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -1028,114 +997,70 @@
         </module>
         <module caption="Event System" id="I2603" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2"
-                          offset="0x04" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW"
-                              values="EVSYS_ASYNCCH2"/>
+                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
                 </register>
-                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3"
-                          offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW"
-                              values="EVSYS_ASYNCCH3"/>
+                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11"
-                          offset="0x1D" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11"
-                              rw="RW" values="EVSYS_ASYNCUSER11"/>
+                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
                 </register>
-                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12"
-                          offset="0x1E" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12"
-                              rw="RW" values="EVSYS_ASYNCUSER12"/>
+                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW"
-                              values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW"
-                              values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1243,8 +1168,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1253,8 +1177,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1263,8 +1186,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1273,8 +1195,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1319,8 +1240,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1402,16 +1322,12 @@
         </module>
         <module caption="Fuses" id="I2603" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1421,8 +1337,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1439,8 +1354,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1468,11 +1382,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1638,40 +1550,27 @@
         </module>
         <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                     <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
                 </register>
@@ -1776,12 +1675,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1856,10 +1753,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1951,8 +1846,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -2065,8 +1959,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -2102,8 +1995,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2185,18 +2077,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2338,17 +2227,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x0"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x3"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
@@ -2363,10 +2249,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -2471,15 +2355,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2494,19 +2376,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2526,8 +2404,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2545,8 +2422,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2672,10 +2548,8 @@
         <module caption="Voltage reference" id="I2603" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x4">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
@@ -2685,14 +2559,11 @@
                     <bitfield caption="DAC2/AC2 reference enable" mask="0x20" name="DAC2REFEN" rw="RW"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
-                    <bitfield caption="ADC1 reference select" mask="0x70" name="ADC1REFSEL" rw="RW"
-                              values="VREF_ADC1REFSEL"/>
-                    <bitfield caption="DAC1/AC1 reference select" mask="0x7" name="DAC1REFSEL" rw="RW"
-                              values="VREF_DAC1REFSEL"/>
+                    <bitfield caption="ADC1 reference select" mask="0x70" name="ADC1REFSEL" rw="RW" values="VREF_ADC1REFSEL"/>
+                    <bitfield caption="DAC1/AC1 reference select" mask="0x7" name="DAC1REFSEL" rw="RW" values="VREF_DAC1REFSEL"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
-                    <bitfield caption="DAC2/AC2 reference select" mask="0x7" name="DAC2REFSEL" rw="RW"
-                              values="VREF_DAC2REFSEL"/>
+                    <bitfield caption="DAC2/AC2 reference select" mask="0x7" name="DAC2REFSEL" rw="RW" values="VREF_DAC2REFSEL"/>
                 </register>
             </register-group>
             <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY402.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY402.xml
index 2c0514eb..51b28873 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY402.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY402.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny402-SSFR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny402-SSNR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny402-SSFR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny402-SSNR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny402" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x9000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0100" start="0x3f00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x1000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -334,10 +324,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -386,10 +374,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -410,8 +396,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -502,23 +487,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -566,14 +546,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -583,14 +560,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -676,12 +650,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -714,8 +686,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -743,12 +714,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -788,89 +757,55 @@
         </module>
         <module caption="Event System" id="I2601" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0"
-                          offset="0x22" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0"
-                              rw="RW" values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -926,29 +861,25 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -978,8 +909,7 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1032,16 +962,12 @@
         </module>
         <module caption="Fuses" id="I2601" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1051,8 +977,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1069,8 +994,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1098,11 +1022,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1268,35 +1190,24 @@
         </module>
         <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1383,12 +1294,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1463,10 +1372,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1558,8 +1465,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1672,8 +1578,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1709,8 +1614,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -1887,15 +1791,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -1910,19 +1812,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -1942,8 +1840,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -1961,8 +1858,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2056,10 +1952,8 @@
         <module caption="Voltage reference" id="I2601" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY404.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY404.xml
index d0f219dd..dc87a50b 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY404.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY404.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny404-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny404-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny404-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny404-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny404" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x9000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0100" start="0x3f00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x1000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -370,10 +360,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -422,10 +410,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -446,8 +432,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -538,23 +523,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -602,14 +582,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -619,14 +596,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -712,12 +686,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -750,8 +722,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -779,12 +750,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -824,89 +793,55 @@
         </module>
         <module caption="Event System" id="I2601" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0"
-                          offset="0x22" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0"
-                              rw="RW" values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1"
-                          offset="0x23" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1"
-                              rw="RW" values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -968,8 +903,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -978,8 +912,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -988,8 +921,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -998,8 +930,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1044,8 +975,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1090,16 +1020,12 @@
         </module>
         <module caption="Fuses" id="I2601" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1109,8 +1035,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1127,8 +1052,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1156,11 +1080,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1326,40 +1248,27 @@
         </module>
         <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1458,12 +1367,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1538,10 +1445,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1633,8 +1538,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1747,8 +1651,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1784,8 +1687,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -1962,15 +1864,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -1985,19 +1885,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2017,8 +1913,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2036,8 +1931,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2131,10 +2025,8 @@
         <module caption="Voltage reference" id="I2601" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY406.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY406.xml
index c965235c..4681c8c9 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY406.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY406.xml
@@ -1,38 +1,26 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny406-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny406-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny406-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny406-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny406-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny406-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny406-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny406-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny406" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x9000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0100" start="0x3f00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x1000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -413,10 +401,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -467,10 +453,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -491,8 +475,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -583,23 +566,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -647,14 +625,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -664,14 +639,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -757,12 +729,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -795,8 +765,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -824,12 +793,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -869,89 +836,55 @@
         </module>
         <module caption="Event System" id="I2601" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0"
-                          offset="0x22" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0"
-                              rw="RW" values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1007,29 +940,25 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1059,8 +988,7 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1113,16 +1041,12 @@
         </module>
         <module caption="Fuses" id="I2601" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1132,8 +1056,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1150,8 +1073,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1179,11 +1101,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1349,39 +1269,26 @@
         </module>
         <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1476,12 +1383,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1556,10 +1461,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1651,8 +1554,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1765,8 +1667,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1802,8 +1703,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -1980,15 +1880,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2003,19 +1901,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2035,8 +1929,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2054,8 +1947,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2149,10 +2041,8 @@
         <module caption="Voltage reference" id="I2601" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY412.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY412.xml
index 4f45b7cb..6d223dbd 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY412.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY412.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny412-SSFR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny412-SSNR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny412-SSFR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny412-SSNR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny412" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x9000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0100" start="0x3f00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x1000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -354,10 +344,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -411,10 +399,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -435,8 +421,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -527,23 +512,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -591,14 +571,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -608,14 +585,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -701,12 +675,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -751,8 +723,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -780,12 +751,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -835,104 +804,64 @@
         </module>
         <module caption="Event System" id="I2601" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2"
-                          offset="0x04" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW"
-                              values="EVSYS_ASYNCCH2"/>
+                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
                 </register>
-                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3"
-                          offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW"
-                              values="EVSYS_ASYNCCH3"/>
+                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0"
-                          offset="0x22" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0"
-                              rw="RW" values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1"
-                          offset="0x23" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1"
-                              rw="RW" values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1032,8 +961,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1042,8 +970,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1052,8 +979,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1062,8 +988,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1108,8 +1033,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1171,16 +1095,12 @@
         </module>
         <module caption="Fuses" id="I2601" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1190,8 +1110,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1208,8 +1127,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1237,11 +1155,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1407,35 +1323,24 @@
         </module>
         <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1522,12 +1427,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1602,10 +1505,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1697,8 +1598,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1811,8 +1711,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1848,8 +1747,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -1931,18 +1829,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2084,17 +1979,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x0"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x3"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
@@ -2211,15 +2103,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2234,19 +2124,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2266,8 +2152,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2285,8 +2170,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2380,10 +2264,8 @@
         <module caption="Voltage reference" id="I2601" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY414.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY414.xml
index e8b1f313..c421eeff 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY414.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY414.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny414-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny414-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny414-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny414-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny414" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x9000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0100" start="0x3f00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x1000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -392,10 +382,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -449,10 +437,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -473,8 +459,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -565,23 +550,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -629,14 +609,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -646,14 +623,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -739,12 +713,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -789,8 +761,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -818,12 +789,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -873,104 +842,64 @@
         </module>
         <module caption="Event System" id="I2601" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2"
-                          offset="0x04" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW"
-                              values="EVSYS_ASYNCCH2"/>
+                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
                 </register>
-                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3"
-                          offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW"
-                              values="EVSYS_ASYNCCH3"/>
+                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0"
-                          offset="0x22" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0"
-                              rw="RW" values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1"
-                          offset="0x23" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1"
-                              rw="RW" values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1070,8 +999,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1080,8 +1008,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1090,8 +1017,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1100,8 +1026,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1146,8 +1071,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1209,16 +1133,12 @@
         </module>
         <module caption="Fuses" id="I2601" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1228,8 +1148,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1246,8 +1165,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1275,11 +1193,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1445,40 +1361,27 @@
         </module>
         <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1577,12 +1480,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1657,10 +1558,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1752,8 +1651,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1866,8 +1764,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1903,8 +1800,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -1986,18 +1882,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2139,17 +2032,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x0"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x3"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
@@ -2266,15 +2156,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2289,19 +2177,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2321,8 +2205,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2340,8 +2223,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2435,10 +2317,8 @@
         <module caption="Voltage reference" id="I2601" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY416.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY416.xml
index 7ed3e9cd..e3aa086c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY416.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY416.xml
@@ -1,38 +1,26 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny416-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny416-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny416-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny416-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny416-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny416-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny416-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny416-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny416" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x9000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0100" start="0x3f00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x1000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -437,10 +425,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -496,10 +482,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -520,8 +504,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -612,23 +595,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -676,14 +654,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -693,14 +668,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -786,12 +758,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -836,8 +806,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -865,12 +834,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -920,104 +887,64 @@
         </module>
         <module caption="Event System" id="I2601" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2"
-                          offset="0x04" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW"
-                              values="EVSYS_ASYNCCH2"/>
+                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
                 </register>
-                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3"
-                          offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW"
-                              values="EVSYS_ASYNCCH3"/>
+                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0"
-                          offset="0x22" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0"
-                              rw="RW" values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1"
-                          offset="0x23" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1"
-                              rw="RW" values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1117,8 +1044,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1127,8 +1053,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1137,8 +1062,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1147,8 +1071,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1193,8 +1116,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1256,16 +1178,12 @@
         </module>
         <module caption="Fuses" id="I2601" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1275,8 +1193,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1293,8 +1210,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1322,11 +1238,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1492,40 +1406,27 @@
         </module>
         <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1624,12 +1525,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1704,10 +1603,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1799,8 +1696,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1913,8 +1809,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1950,8 +1845,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2033,18 +1927,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2186,17 +2077,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x0"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x3"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
@@ -2313,15 +2201,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2336,19 +2222,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2368,8 +2250,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2387,8 +2268,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2482,10 +2362,8 @@
         <module caption="Voltage reference" id="I2601" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY417.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY417.xml
index ccb133aa..35107d0c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY417.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY417.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny417-MFR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny417-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny417-MFR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny417-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny417" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0x9000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0100" start="0x3f00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x1000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -471,10 +461,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x8" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x8" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -530,10 +518,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -554,8 +540,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -646,23 +631,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -715,14 +695,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -732,14 +709,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -825,12 +799,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -875,8 +847,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -904,12 +875,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -959,104 +928,64 @@
         </module>
         <module caption="Event System" id="I2600" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2"
-                          offset="0x04" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW"
-                              values="EVSYS_ASYNCCH2"/>
+                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
                 </register>
-                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3"
-                          offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW"
-                              values="EVSYS_ASYNCCH3"/>
+                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0"
-                          offset="0x22" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0"
-                              rw="RW" values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1"
-                          offset="0x23" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1"
-                              rw="RW" values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1156,8 +1085,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1166,8 +1094,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1176,8 +1103,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1186,8 +1112,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1232,8 +1157,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1295,16 +1219,12 @@
         </module>
         <module caption="Fuses" id="I2600" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1314,8 +1234,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1332,8 +1251,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1361,11 +1279,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1531,40 +1447,27 @@
         </module>
         <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1664,12 +1567,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1744,10 +1645,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1839,8 +1738,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1953,8 +1851,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1990,8 +1887,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2073,18 +1969,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2226,17 +2119,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x0"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x3"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
@@ -2353,15 +2243,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2376,19 +2264,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2407,8 +2291,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2426,8 +2309,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2521,10 +2403,8 @@
         <module caption="Voltage reference" id="I2600" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY4313.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY4313.xml
index 636686e6..0fc51643 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY4313.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY4313.xml
@@ -12,8 +12,7 @@
     <device name="ATtiny4313" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -30,8 +29,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0100" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
@@ -41,8 +39,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -55,8 +52,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -68,8 +64,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -79,56 +74,47 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART" caption="USART">
-                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -142,8 +128,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -226,8 +211,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -288,8 +272,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -315,8 +298,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x04 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x04 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -354,8 +336,7 @@
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
                     <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
-                              values="ENUM_EESAVE_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_EESAVE_BODLEVEL"/>
                     <bitfield caption="External reset disable" mask="0x01" name="RSTDISBL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
@@ -368,88 +349,47 @@
                 <value caption="Ext. Clock; Start-up time: 14 CK + 0   ms" name="EXTCLK_14CK_0MS" value="0x00"/>
                 <value caption="Ext. Clock; Start-up time: 14 CK + 4.1 ms" name="EXTCLK_14CK_4MS1" value="0x10"/>
                 <value caption="Ext. Clock; Start-up time: 14 CK + 65  ms" name="EXTCLK_14CK_65MS" value="0x20"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_4MHZ_14CK_0MS"
-                       value="0x02"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_4MHZ_14CK_4MS1"
-                       value="0x12"/>
-                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_4MHZ_14CK_65MS"
-                       value="0x22"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_8MHZ_14CK_0MS"
-                       value="0x04"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_8MHZ_14CK_4MS1"
-                       value="0x14"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_8MHZ_14CK_65MS"
-                       value="0x24"/>
-                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS"
-                       value="0x06"/>
-                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS"
-                       value="0x16"/>
-                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS"
-                       value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x3F"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_4MHZ_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_4MHZ_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_4MHZ_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_8MHZ_14CK_0MS" value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_8MHZ_14CK_4MS1" value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_8MHZ_14CK_65MS" value="0x24"/>
+                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS" value="0x06"/>
+                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS" value="0x16"/>
+                <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_EESAVE_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -490,21 +430,17 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x01"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x01" name="OCIE0A"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x01" name="OCF0A"/>
                 </register>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x5C" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x50" size="1">
                     <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A"/>
                     <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B"/>
@@ -533,10 +469,8 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x80" name="TOIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40"
-                              name="OCIE1A"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20"
-                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -561,12 +495,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -584,8 +515,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -654,16 +584,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR" offset="0x21" size="1" mask="0x03"/>
             </register-group>
@@ -728,16 +656,13 @@
                     <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
                     <bitfield caption="Pin Change Interrupt Flags" mask="0x38" name="PCIF"/>
                 </register>
-                <register caption="Pin Change Interrupt Mask Register 2" name="PCMSK2" offset="0x25" size="1"
-                          ocd-rw="R">
+                <register caption="Pin Change Interrupt Mask Register 2" name="PCMSK2" offset="0x25" size="1" ocd-rw="R">
                     <bitfield caption="Pin Change Interrupt Masks" mask="0x7F" name="PCINT" lsb="11"/>
                 </register>
-                <register caption="Pin Change Interrupt Mask Register 1" name="PCMSK1" offset="0x24" size="1"
-                          ocd-rw="R">
+                <register caption="Pin Change Interrupt Mask Register 1" name="PCMSK1" offset="0x24" size="1" ocd-rw="R">
                     <bitfield caption="Pin Change Interrupt Masks" mask="0x07" name="PCINT" lsb="8"/>
                 </register>
-                <register caption="Pin Change Interrupt Mask Register 0" name="PCMSK0" offset="0x40" size="1"
-                          mask="0xFF"/>
+                <register caption="Pin Change Interrupt Mask Register 0" name="PCMSK0" offset="0x40" size="1" mask="0xFF"/>
             </register-group>
         </module>
         <module caption="CPU Registers" name="CPU">
@@ -753,8 +678,7 @@
                     <bitfield caption="Carry Flag" mask="0x01" name="C"/>
                 </register>
                 <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
-                <register caption="Store Program Memory Control and Status register" name="SPMCSR" offset="0x57"
-                          size="1" ocd-rw="">
+                <register caption="Store Program Memory Control and Status register" name="SPMCSR" offset="0x57" size="1" ocd-rw="">
                     <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
@@ -765,10 +689,8 @@
                     <bitfield caption="Pull-up Disable" mask="0x80" name="PUD"/>
                     <bitfield caption="Sleep Mode Select Bits" mask="0x50" name="SM" values="CPU_SLEEP_MODE3"/>
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
-                    <bitfield caption="Interrupt Sense Control 1 bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
-                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 1 bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
                     <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
@@ -776,14 +698,12 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="General Timer Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="" mask="0x01" name="PSR10"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY43U.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY43U.xml
index 13c9c3e0..e1b611e5 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY43U.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY43U.xml
@@ -7,8 +7,7 @@
     <device name="ATtiny43U" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -25,8 +24,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0100" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -36,8 +34,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -50,8 +47,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -66,36 +62,30 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -104,26 +94,22 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="FUSE">
@@ -133,8 +119,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -212,8 +197,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -274,8 +258,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -314,8 +297,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -324,102 +306,54 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS"
-                       value="0x20"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS"
-                       value="0x01"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS"
-                       value="0x11"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS"
-                       value="0x21"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms"
-                       name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms"
-                       name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms"
-                       name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -488,8 +422,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -510,14 +443,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -534,10 +464,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
@@ -545,14 +473,11 @@
             </register-group>
             <register-group caption="Timer/Counter, 8-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x2C" size="1">
-                    <bitfield caption="Timer/Counter1 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x2B" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x2B" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
@@ -569,10 +494,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1" name="TCNT1" offset="0x4D" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A" name="OCR1A" offset="0x4C" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B" name="OCR1B" offset="0x4B" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A" name="OCR1A" offset="0x4C" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B" name="OCR1B" offset="0x4B" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
@@ -591,8 +514,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
@@ -609,14 +531,12 @@
                     <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -635,8 +555,7 @@
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
                     <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
                     <bitfield caption="BOD Sleep Enable" mask="0x04" name="BODSE"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
                     <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
@@ -679,8 +598,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
@@ -705,15 +623,13 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR0" offset="0x21" size="1">
                     <bitfield caption="ADC 1 Digital input buffer disable" mask="0x02" name="ADC1D"/>
@@ -739,16 +655,14 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Boost Regulator Status Bit" mask="0x80" name="BVRON"/>
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                     <bitfield caption="ADC Left Adjust Result" mask="0x10" name="ADLAR"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER_T43U"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_T43U"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1">
                     <bitfield caption="Analog Comparator IO" mask="0x20" name="AIN1D"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY44.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY44.xml
index 0921bd09..8f6912ed 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY44.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY44.xml
@@ -8,8 +8,7 @@
     <device name="ATtiny44" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -26,8 +25,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0100" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -37,8 +35,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -51,8 +48,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -63,62 +59,52 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -132,8 +118,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -212,8 +197,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -273,8 +257,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE_STK600">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -312,8 +295,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -322,94 +304,50 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -447,16 +385,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR0" offset="0x21" size="1">
                     <bitfield caption="ADC 1 Digital input buffer disable" mask="0x02" name="ADC1D"/>
@@ -479,15 +415,13 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
                     <bitfield caption="ADC Left Adjust Result" mask="0x10" name="ADLAR"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1" mask="0xFF"/>
             </register-group>
@@ -543,8 +477,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
@@ -587,8 +520,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -609,14 +541,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -633,10 +562,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
@@ -657,14 +584,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2C" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -686,12 +610,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -706,8 +627,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
@@ -724,14 +644,12 @@
                     <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY441.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY441.xml
index f91c9375..5569bf3b 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY441.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY441.xml
@@ -1,18 +1,14 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny441-SSU" package="SOIC14" pinout="SOIC_14" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.7"/>
-        <variant ordercode="ATtiny441-MU" package="MLF20" pinout="QFN_20" speedmax="16000000" tempmax="85" tempmin="-40"
-                 vccmax="5.5" vccmin="1.7"/>
-        <variant ordercode="ATtiny441-MMH" package="VQFN20" pinout="QFN_20" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.7"/>
+        <variant ordercode="ATtiny441-SSU" package="SOIC14" pinout="SOIC_14" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.7"/>
+        <variant ordercode="ATtiny441-MU" package="MLF20" pinout="QFN_20" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.7"/>
+        <variant ordercode="ATtiny441-MMH" package="VQFN20" pinout="QFN_20" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.7"/>
     </variants>
     <device name="ATtiny441" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x10"/>
+                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x10"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -29,8 +25,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0100" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
@@ -40,8 +35,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -50,8 +44,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -66,8 +59,7 @@
             </module>
             <module name="USART">
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal function="USART" group="RXD" pad="PA4"/>
                         <signal function="USART" group="TXD" pad="PA5"/>
@@ -75,8 +67,7 @@
                     </signals>
                 </instance>
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal field="U0MAP" function="USART" group="TXD" pad="PA1"/>
                         <signal field="U0MAP" function="USART" group="RXD" pad="PA2"/>
@@ -89,14 +80,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal function="TWI" group="SCL" pad="PA4"/>
                         <signal function="TWI" group="SDA" pad="PA6"/>
@@ -105,8 +94,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PA0"/>
                         <signal function="ADC" group="ADC" index="1" pad="PA1"/>
@@ -126,8 +114,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="ACIN0" group="AIN0" index="0" pad="PA1"/>
                         <signal function="ACIN0" group="AIN0" index="1" pad="PA2"/>
@@ -140,14 +127,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal function="OC" group="TOCC" index="0" pad="PA1"/>
                         <signal function="OC" group="TOCC" index="1" pad="PA2"/>
@@ -164,8 +149,7 @@
                     </signals>
                 </instance>
                 <instance name="TC2" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal function="OC" group="TOCC" index="0" pad="PA1"/>
                         <signal function="OC" group="TOCC" index="1" pad="PA2"/>
@@ -184,8 +168,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="OC" group="TOCC" index="0" pad="PA1"/>
                         <signal function="OC" group="TOCC" index="0" pad="PA2"/>
@@ -203,8 +186,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
                         <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
@@ -224,8 +206,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -234,14 +215,12 @@
             </module>
             <module name="TOCPM">
                 <instance name="TOCPM" caption="Timer/Counter Output Compare Pin">
-                    <register-group name="TOCPM" name-in-module="TOCPM" offset="0x00" address-space="data"
-                                    caption="Timer/Counter Output Compare Pin"/>
+                    <register-group name="TOCPM" name-in-module="TOCPM" offset="0x00" address-space="data" caption="Timer/Counter Output Compare Pin"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal field="SPIMAP" function="SPI_ALT" group="MISO" pad="PA0"/>
                         <signal field="SPIMAP" function="SPI_ALT" group="MOSI" pad="PA1"/>
@@ -261,14 +240,12 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -356,8 +333,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE_STK600">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -417,8 +393,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -448,13 +423,9 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield
-                            caption="Frequency selection for internal ULP oscillator. The selection only affects system clock, watchdog and reset timeout always use 32 kHz clock."
-                            mask="0xE0" name="ULPOSCSEL" values="ENUM_ULPOSCSEL"/>
-                    <bitfield caption="BOD mode of operation when the device is in sleep mode" mask="0x18" name="BODPD"
-                              values="ENUM_BODMODE"/>
-                    <bitfield caption="BOD mode of operation when the device is active or idle" mask="0x06"
-                              name="BODACT" values="ENUM_BODMODE"/>
+                    <bitfield caption="Frequency selection for internal ULP oscillator. The selection only affects system clock, watchdog and reset timeout always use 32 kHz clock." mask="0xE0" name="ULPOSCSEL" values="ENUM_ULPOSCSEL"/>
+                    <bitfield caption="BOD mode of operation when the device is in sleep mode" mask="0x18" name="BODPD" values="ENUM_BODMODE"/>
+                    <bitfield caption="BOD mode of operation when the device is active or idle" mask="0x06" name="BODACT" values="ENUM_BODMODE"/>
                     <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
@@ -463,8 +434,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -473,40 +443,23 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="EXTCLK_6CK_16CK_16MS"
-                       value="0x00"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms"
-                       name="INTRCOSC_8MHZ_6CK_16CK_16MS" value="0x02"/>
-                <value caption="Int. ULP Osc.; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms"
-                       name="INTULPOSC_32KHZ_6CK_16CK_16MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms"
-                       name="EXTLOFXTAL_1KCK_16CK_16MS" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/16 CK + 16 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_16MS" value="0x16"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_16CK_16MS" value="0x08"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_16CK_16MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_16CK_16MS" value="0x09"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_16CK_16MS" value="0x0a"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_16CK_16MS" value="0x1a"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_16CK_16MS" value="0x0b"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_16CK_16MS" value="0x0c"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_16CK_16MS" value="0x1c"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_16CK_16MS" value="0x0d"/>
-                <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_16CK_16MS" value="0x0e"/>
-                <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_16CK_16MS" value="0x1e"/>
-                <value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_16CK_16MS" value="0x0f"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="EXTCLK_6CK_16CK_16MS" value="0x00"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="INTRCOSC_8MHZ_6CK_16CK_16MS" value="0x02"/>
+                <value caption="Int. ULP Osc.; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="INTULPOSC_32KHZ_6CK_16CK_16MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTLOFXTAL_1KCK_16CK_16MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/16 CK + 16 ms" name="EXTLOFXTAL_32KCK_14CK_16MS" value="0x16"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_16CK_16MS" value="0x08"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_16CK_16MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_16CK_16MS" value="0x09"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_16CK_16MS" value="0x0a"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_16CK_16MS" value="0x1a"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_16CK_16MS" value="0x0b"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_3MHZ_8MHZ_258CK_16CK_16MS" value="0x0c"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_16CK_16MS" value="0x1c"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_16CK_16MS" value="0x0d"/>
+                <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_8MHZ_XX_258CK_16CK_16MS" value="0x0e"/>
+                <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_8MHZ_XX_1KCK_16CK_16MS" value="0x1e"/>
+                <value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_8MHZ_XX_16KCK_16CK_16MS" value="0x0f"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -658,8 +611,7 @@
                 <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x41" size="1">
                     <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS_32KHZ"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS_32KHZ"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
             </register-group>
@@ -702,8 +654,7 @@
                     <bitfield caption="TWI Read/Write Direction" mask="0x02" name="TWDIR"/>
                     <bitfield caption="TWI Address or Stop" mask="0x01" name="TWAS"/>
                 </register>
-                <register caption="TWI Slave Address Register" name="TWSA" offset="0xA2" size="1" mask="0xFF"
-                          ocd-rw="R"/>
+                <register caption="TWI Slave Address Register" name="TWSA" offset="0xA2" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="TWI Slave Data Register" name="TWSD" offset="0xA0" size="1" ocd-rw="R">
                     <bitfield caption="TWI slave data bit" mask="0xFF" name="TWSD"/>
                 </register>
@@ -728,14 +679,12 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x26" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x24" size="1">
                     <bitfield caption="" mask="0x08" name="ADLAR"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER_T841"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_T841"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x61" size="1">
                     <bitfield caption="ADC9 Digital Input Disable" mask="0x08" name="ADC9D"/>
@@ -777,44 +726,36 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator 0 Control And Status Register B" name="ACSR0B" offset="0x2B"
-                          size="1">
+                <register caption="Analog Comparator 0 Control And Status Register B" name="ACSR0B" offset="0x2B" size="1">
                     <bitfield caption="Analog Comparator 0 Hysteresis Select" mask="0x80" name="HSEL0"/>
                     <bitfield caption="Analog Comparator 0 Hysteresis Level" mask="0x40" name="HLEV0"/>
                     <bitfield caption="Analog Comparator 0 Output Pin Enable" mask="0x10" name="ACOE0"/>
                     <bitfield caption="Analog Comparator 0 Negative Input Multiplexer" mask="0x0C" name="ACNMUX"/>
-                    <bitfield caption="Analog Comparator 0 Positive Input Multiplexer Bits 1:0" mask="0x03"
-                              name="ACPMUX"/>
+                    <bitfield caption="Analog Comparator 0 Positive Input Multiplexer Bits 1:0" mask="0x03" name="ACPMUX"/>
                 </register>
-                <register caption="Analog Comparator 0 Control And Status Register A" name="ACSR0A" offset="0x2A"
-                          size="1">
+                <register caption="Analog Comparator 0 Control And Status Register A" name="ACSR0A" offset="0x2A" size="1">
                     <bitfield caption="Analog Comparator 0 Disable" mask="0x80" name="ACD0"/>
-                    <bitfield caption="Analog Comparator 0 Positive Input Multiplexer Bit 2" mask="0x40"
-                              name="ACPMUX2"/>
+                    <bitfield caption="Analog Comparator 0 Positive Input Multiplexer Bit 2" mask="0x40" name="ACPMUX2"/>
                     <bitfield caption="Analog Comparator 0 Output" mask="0x20" name="ACO0"/>
                     <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x10" name="ACI0"/>
                     <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x08" name="ACIE0"/>
                     <bitfield caption="Analog Comparator 0 Input Capture Enable" mask="0x04" name="ACIC0"/>
-                    <bitfield caption="Analog Comparator 0 Interrupt Mode Select bits" mask="0x03" name="ACIS0"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Mode Select bits" mask="0x03" name="ACIS0" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
-                <register caption="Analog Comparator 1 Control And Status Register B" name="ACSR1B" offset="0x2D"
-                          size="1">
+                <register caption="Analog Comparator 1 Control And Status Register B" name="ACSR1B" offset="0x2D" size="1">
                     <bitfield caption="Analog Comparator 1 Hysteresis Select" mask="0x80" name="HSEL1"/>
                     <bitfield caption="Analog Comparator 1 Hysteresis Level" mask="0x40" name="HLEV1"/>
                     <bitfield caption="Analog Comparator 1 Output Pin Enable" mask="0x10" name="ACOE1"/>
                     <bitfield caption="Analog Comparator 1 Multiplexer Enable" mask="0x04" name="ACME1"/>
                 </register>
-                <register caption="Analog Comparator 1 Control And Status Register A" name="ACSR1A" offset="0x2C"
-                          size="1">
+                <register caption="Analog Comparator 1 Control And Status Register A" name="ACSR1A" offset="0x2C" size="1">
                     <bitfield caption="Analog Comparator 1 Disable" mask="0x80" name="ACD1"/>
                     <bitfield caption="Analog Comparator 1 Bandgap Select" mask="0x40" name="ACBG1"/>
                     <bitfield caption="Analog Comparator 1 Output" mask="0x20" name="ACO1"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x10" name="ACI1"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Enable" mask="0x08" name="ACIE1"/>
                     <bitfield caption="Analog Comparator 1 Input Capture Enable" mask="0x04" name="ACIC1"/>
-                    <bitfield caption="Analog Comparator 1 Interrupt Mode Select bits" mask="0x03" name="ACIS1"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Mode Select bits" mask="0x03" name="ACIS1" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -846,14 +787,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2E" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2E" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -875,12 +813,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR"/>
@@ -889,14 +824,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC2">
                 <register caption="Timer/Counter2 Interrupt Mask Register" name="TIMSK2" offset="0x31" size="1">
                     <bitfield caption="Timer/Counter2 Input Capture Interrupt Enable" mask="0x20" name="ICIE2"/>
-                    <bitfield caption="Timer/Counter2 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR2" offset="0x30" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR2" offset="0x30" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Input Capture Flag" mask="0x20" name="ICF2"/>
                     <bitfield caption="Timer/Counter2 Output Compare B Match Flag" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Timer/Counter2 Output Compare A Match Flag" mask="0x02" name="OCF2A"/>
@@ -918,12 +850,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC2B"/>
                 </register>
                 <register caption="Timer/Counter2 Bytes" name="TCNT2" offset="0xC6" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A Bytes" name="OCR2A" offset="0xC4" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B Bytes" name="OCR2B" offset="0xC2" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter2 Input Capture Register Bytes" name="ICR2" offset="0xC0" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A Bytes" name="OCR2A" offset="0xC4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B Bytes" name="OCR2B" offset="0xC2" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter2 Input Capture Register Bytes" name="ICR2" offset="0xC0" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR"/>
@@ -943,14 +872,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -967,10 +893,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR"/>
@@ -991,8 +915,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
@@ -1040,8 +963,7 @@
                 </register>
                 <register caption="Configuration Change Protection" name="CCP" offset="0x71" size="1" mask="0xFF"/>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x73" size="1">
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Clock Control Register" name="CLKCR" offset="0x72" size="1">
                     <bitfield caption="Oscillator Ready" mask="0x80" name="OSCRDY"/>
@@ -1075,8 +997,7 @@
                 <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x35" size="1" mask="0xFF"/>
                 <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x34" size="1" mask="0xFF"/>
                 <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x33" size="1" mask="0xFF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1" ocd-rw="R">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Read Device Signature Imprint Table" mask="0x20" name="RSIG"/>
                     <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
@@ -1084,14 +1005,10 @@
                     <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
                     <bitfield caption="Store program Memory Enable" mask="0x01" name="SPMEN"/>
                 </register>
-                <register caption="Oscillator Calibration Register 8MHz" name="OSCCAL0" offset="0x74" size="1"
-                          mask="0xFF"/>
-                <register caption="Oscillator Calibration Register 32kHz" name="OSCCAL1" offset="0x77" size="1"
-                          mask="0x03"/>
-                <register caption="Oscillator Temperature Calibration Register A" name="OSCTCAL0A" offset="0x75"
-                          size="1" mask="0xFF"/>
-                <register caption="Oscillator Temperature Calibration Register B" name="OSCTCAL0B" offset="0x76"
-                          size="1" mask="0xFF"/>
+                <register caption="Oscillator Calibration Register 8MHz" name="OSCCAL0" offset="0x74" size="1" mask="0xFF"/>
+                <register caption="Oscillator Calibration Register 32kHz" name="OSCCAL1" offset="0x77" size="1" mask="0x03"/>
+                <register caption="Oscillator Temperature Calibration Register A" name="OSCTCAL0A" offset="0x75" size="1" mask="0xFF"/>
+                <register caption="Oscillator Temperature Calibration Register B" name="OSCTCAL0B" offset="0x76" size="1" mask="0xFF"/>
             </register-group>
             <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
                 <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
@@ -1129,8 +1046,7 @@
                     <bitfield caption="Timer Output Compare Channel 1 Selection Bits" mask="0x0C" name="TOCC1S"/>
                     <bitfield caption="Timer Output Compare Channel 0 Selection Bits" mask="0x03" name="TOCC0S"/>
                 </register>
-                <register caption="Timer Output Compare Pin Mux Channel Output Enable" name="TOCPMCOE" offset="0x66"
-                          size="1">
+                <register caption="Timer Output Compare Pin Mux Channel Output Enable" name="TOCPMCOE" offset="0x66" size="1">
                     <bitfield caption="Timer Output Compare Channel 7 Output Enable" mask="0x80" name="TOCC7OE"/>
                     <bitfield caption="Timer Output Compare Channel 6 Output Enable" mask="0x40" name="TOCC6OE"/>
                     <bitfield caption="Timer Output Compare Channel 5 Output Enable" mask="0x20" name="TOCC5OE"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY44A.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY44A.xml
index 84c09e72..75c1242e 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY44A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY44A.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny44A-CCU" package="UFBGA16" pinout="BGA_16" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny44A-MMH" package="VQFN20" pinout="QFN_20" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny44A-MU" package="QFN20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny44A-PU" package="PDIP14" pinout="SOIC_14" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny44A-SSU" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny44A-SSN" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny44A-MF" package="QFN20" pinout="QFN_20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny44A-SSF" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny44A-CCU" package="UFBGA16" pinout="BGA_16" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny44A-MMH" package="VQFN20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny44A-MU" package="QFN20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny44A-PU" package="PDIP14" pinout="SOIC_14" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny44A-SSU" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny44A-SSN" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny44A-MF" package="QFN20" pinout="QFN_20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny44A-SSF" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny44A" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0100" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -50,8 +40,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -64,8 +53,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -76,8 +64,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="ACIN" group="AIN" index="0" pad="PA1"/>
                         <signal function="ACIN" group="AIN" index="1" pad="PA2"/>
@@ -86,8 +73,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PA0"/>
                         <signal function="ADC" group="ADC" index="1" pad="PA1"/>
@@ -103,8 +89,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal function="TWI" group="SCL" pad="PA4"/>
                         <signal function="TWI" group="SDA" pad="PA6"/>
@@ -116,8 +101,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
                         <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
@@ -137,20 +121,17 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="T0" group="T0" pad="PA3"/>
                         <signal function="T0" group="OC0B" pad="PA7"/>
@@ -160,8 +141,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal function="T1" group="T1" pad="PA4"/>
                         <signal function="T1" group="OC1B" pad="PA5"/>
@@ -172,8 +152,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -182,8 +161,7 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="FUSE">
@@ -193,8 +171,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -273,8 +250,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -334,8 +310,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE_STK600">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -373,8 +348,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -383,94 +357,50 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -508,16 +438,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR0" offset="0x21" size="1">
                     <bitfield caption="ADC 1 Digital input buffer disable" mask="0x02" name="ADC1D"/>
@@ -543,23 +471,19 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
                     <bitfield caption="ADC Left Adjust Result" mask="0x10" name="ADLAR"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1" mask="0xFF"/>
             </register-group>
             <value-group caption="" name="ANALOG_ADC_V_REF">
-                <value caption="VCC used as analog reference, disconnected from PA0 (AREF)" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="External voltage reference at PA0 (AREF) pin, internal reference turned off"
-                       name="VAL_0x01" value="0x01"/>
+                <value caption="VCC used as analog reference, disconnected from PA0 (AREF)" name="VAL_0x00" value="0x00"/>
+                <value caption="External voltage reference at PA0 (AREF) pin, internal reference turned off" name="VAL_0x01" value="0x01"/>
                 <value caption="Internal 1.1V voltage reference" name="VAL_0x02" value="0x02"/>
                 <value caption="Reserved" name="VAL_0x03" value="0x03"/>
             </value-group>
@@ -614,8 +538,7 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
-                    <bitfield caption="Interrupt Sense Control 0" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
@@ -658,8 +581,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -680,14 +602,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -704,10 +623,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
@@ -728,14 +645,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2C" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -757,12 +671,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -777,8 +688,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
@@ -795,14 +705,12 @@
                     <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY45.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY45.xml
index 485f36bc..bae464c5 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY45.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY45.xml
@@ -1,32 +1,21 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny45V-10PU" package="PDIP8" pinout="SOIC_8" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny45V-10SU" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny45V-10SH" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny45V-10XU" package="TSSOP8" pinout="SOIC_8" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny45V-10MU" package="MLF20" pinout="QFN_20" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny45V-20PU" package="PDIP8" pinout="SOIC_8" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny45V-20SU" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny45V-20SH" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny45V-20XU" package="TSSOP8" pinout="SOIC_8" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny45V-20MU" package="MLF20" pinout="QFN_20" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny45V-10PU" package="PDIP8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny45V-10SU" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny45V-10SH" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny45V-10XU" package="TSSOP8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny45V-10MU" package="MLF20" pinout="QFN_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny45V-20PU" package="PDIP8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny45V-20SU" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny45V-20SH" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny45V-20XU" package="TSSOP8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny45V-20MU" package="MLF20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
     </variants>
     <device name="ATtiny45" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,8 +32,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0100" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
@@ -54,8 +42,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -68,8 +55,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="ACIN" group="AIN" index="1" pad="PB1"/>
                         <signal function="ACIN" group="AIN" index="0" pad="PB0"/>
@@ -78,8 +64,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PB5"/>
                         <signal function="ADC" group="ADC" index="1" pad="PB2"/>
@@ -90,8 +75,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal function="TWI" group="SDA" pad="PB0"/>
                         <signal function="TWI" group="SCL" pad="PB2"/>
@@ -103,8 +87,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXTINT" group="PCINT" index="0" pad="PB0"/>
                         <signal function="EXTINT" group="PCINT" index="1" pad="PB1"/>
@@ -118,20 +101,17 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="T0" group="T0" pad="PB2"/>
                         <signal function="T0" group="OC0B" pad="PB1"/>
@@ -139,8 +119,7 @@
                     </signals>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="T1" group="OC1B" pad="PB4"/>
                         <signal function="T1" group="OC1BINV" pad="PB3"/>
@@ -151,14 +130,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -172,8 +149,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -250,8 +226,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -311,8 +286,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE_STK600">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -350,8 +324,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -360,108 +333,57 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_1KCK_14CK_4MS"
-                       value="0x01"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_16KCK_14CK_4MS"
-                       value="0x11"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 64 ms" name="PLLCLK_1KCK_14CK_64MS"
-                       value="0x21"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="PLLCLK_16KCK_14CK_64MS" value="0x31"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
-                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="INTRCOSC_6MHZ4_6CK_14CK_64MS" value="0x03"/>
-                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_6MHZ4_6CK_14CK_4MS" value="0x23"/>
-                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 1 CK/14 CK + 0 ms"
-                       name="INTRCOSC_6MHZ4_1CK_14CK_0MS" value="0x33"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_1KCK_14CK_4MS" value="0x01"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_16KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 64 ms" name="PLLCLK_1KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="PLLCLK_16KCK_14CK_64MS" value="0x31"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_6MHZ4_6CK_14CK_64MS" value="0x03"/>
+                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_6MHZ4_6CK_14CK_4MS" value="0x23"/>
+                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 1 CK/14 CK + 0 ms" name="INTRCOSC_6MHZ4_1CK_14CK_0MS" value="0x33"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -494,15 +416,13 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR0" offset="0x34" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -530,15 +450,13 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
                     <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x34" size="1">
                     <bitfield caption="ADC0 Digital input Disable" mask="0x20" name="ADC0D"/>
@@ -599,8 +517,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
@@ -642,8 +559,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -664,10 +580,8 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10"
-                              name="OCIE0A"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08"
-                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1">
@@ -687,10 +601,8 @@
                     <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x49" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x49" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x4C" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR0"/>
@@ -700,8 +612,7 @@
                 <register caption="Timer/Counter Control Register" name="TCCR1" offset="0x50" size="1">
                     <bitfield caption="Clear Timer/Counter on Compare Match" mask="0x80" name="CTC1"/>
                     <bitfield caption="Pulse Width Modulator Enable" mask="0x40" name="PWM1A"/>
-                    <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1A"
-                              values="CLK_COMP_MATCH_OUT_MODE"/>
+                    <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1A" values="CLK_COMP_MATCH_OUT_MODE"/>
                     <bitfield caption="Clock Select Bits" mask="0x0F" name="CS1" values="CLK_SEL_4BIT"/>
                 </register>
                 <register caption="Timer/Counter Register" name="TCNT1" offset="0x4F" size="1" mask="0xFF" ocd-rw="R"/>
@@ -709,10 +620,8 @@
                 <register caption="Output Compare Register" name="OCR1B" offset="0x4B" size="1" mask="0xFF"/>
                 <register caption="Output compare register" name="OCR1C" offset="0x4D" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40"
-                              name="OCIE1A"/>
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20"
-                              name="OCIE1B"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1">
@@ -799,8 +708,7 @@
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
                     <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
                     <bitfield caption="BOD Sleep Enable" mask="0x04" name="BODSE"/>
-                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
@@ -808,14 +716,12 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="PLL Control and status register" name="PLLCSR" offset="0x47" size="1">
                     <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
@@ -859,8 +765,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Read Device Signature Imprint Table" mask="0x20" name="RSIG"/>
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY461.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY461.xml
index 32310a26..f336153f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY461.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY461.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny461V-10MU" package="MLF32" pinout="QFN_32" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny461V-10PU" package="PDIP20" pinout="SOIC_20" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny461V-10SU" package="SOIC20" pinout="SOIC_20" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny461-20MU" package="MLF32" pinout="QFN_32" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny461-20PU" package="PDIP20" pinout="SOIC_20" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny461-20SU" package="SOIC20" pinout="SOIC_20" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny461V-10MU" package="MLF32" pinout="QFN_32" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny461V-10PU" package="PDIP20" pinout="SOIC_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny461V-10SU" package="SOIC20" pinout="SOIC_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny461-20MU" package="MLF32" pinout="QFN_32" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny461-20PU" package="PDIP20" pinout="SOIC_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny461-20SU" package="SOIC20" pinout="SOIC_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
     </variants>
     <device name="ATtiny461" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0100" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -60,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -76,8 +66,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PA0"/>
                         <signal function="ADC" group="ADC" index="1" pad="PA1"/>
@@ -96,8 +85,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="ACIN" group="AIN" index="0" pad="PA7"/>
                         <signal function="ACIN" group="AIN" index="1" pad="PA6"/>
@@ -107,8 +95,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal field="USIPOS" function="USI" group="SDA" pad="PB0"/>
                         <signal field="USIPOS" function="USI" group="SCL" pad="PB2"/>
@@ -125,28 +112,24 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="T0" group="ICP0" pad="PA4"/>
                         <signal function="T0" group="T0" pad="PB6"/>
                     </signals>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="T1" group="OC1AINV" pad="PB0"/>
                         <signal function="T1" group="OC1A" pad="PB1"/>
@@ -159,14 +142,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
                         <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
@@ -191,8 +172,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -206,8 +186,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -288,8 +267,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -350,8 +328,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -377,8 +354,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -417,8 +393,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -427,102 +402,54 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS"
-                       value="0x20"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS"
-                       value="0x01"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS"
-                       value="0x11"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS"
-                       value="0x21"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms"
-                       name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms"
-                       name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms"
-                       name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -572,8 +499,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
@@ -582,8 +508,7 @@
                     <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
                     <bitfield caption="" mask="0x10" name="REFS2"/>
                     <bitfield caption="" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER3"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x22" size="1">
                     <bitfield caption="ADC10 Digital input Disable" mask="0x80" name="ADC10D"/>
@@ -637,8 +562,7 @@
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -699,8 +623,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -721,15 +644,12 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10"
-                              name="OCIE0A"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08"
-                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
                     <bitfield caption="Timer/Counter0 Input Capture Interrupt Enable" mask="0x01" name="TICIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
@@ -750,10 +670,8 @@
                 </register>
                 <register caption="Timer/Counter0 High" name="TCNT0H" offset="0x34" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Low" name="TCNT0L" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1" mask="0xFF"/>
             </register-group>
             <register-group caption="Timer/Counter, 8-bit" name="TC1">
                 <register caption="Timer/Counter Control Register A" name="TCCR1A" offset="0x50" size="1">
@@ -786,8 +704,7 @@
                     <bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES1"/>
                     <bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC1"/>
                     <bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF1"/>
-                    <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1"
-                              values="PULSE_WIDTH_MODU2"/>
+                    <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1" values="PULSE_WIDTH_MODU2"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register E" name="TCCR1E" offset="0x20" size="1">
                     <bitfield caption="Ouput Compare Override Enable Bits" mask="0x3F" name="OC1OE"/>
@@ -799,12 +716,9 @@
                 <register caption="Output compare register" name="OCR1C" offset="0x4B" size="1" mask="0xFF"/>
                 <register caption="Output compare register" name="OCR1D" offset="0x4A" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80"
-                              name="OCIE1D"/>
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40"
-                              name="OCIE1A"/>
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20"
-                              name="OCIE1B"/>
+                    <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80" name="OCIE1D"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -861,8 +775,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
@@ -894,8 +807,7 @@
                     <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
                     <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
-                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
                     <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
@@ -903,14 +815,12 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x48" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="PLL Control and status register" name="PLLCSR" offset="0x49" size="1">
                     <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
@@ -954,8 +864,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY461A.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY461A.xml
index 0a9e90f5..b2837550 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY461A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY461A.xml
@@ -12,8 +12,7 @@
     <device name="ATtiny461A" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -30,8 +29,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0100" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -41,8 +39,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -55,8 +52,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -71,54 +67,45 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
                 <instance name="TC1" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -127,8 +114,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="FUSE">
@@ -138,8 +124,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -220,8 +205,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -282,8 +266,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -309,8 +292,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -349,8 +331,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -359,102 +340,54 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS"
-                       value="0x20"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS"
-                       value="0x01"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS"
-                       value="0x11"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS"
-                       value="0x21"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms"
-                       name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms"
-                       name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms"
-                       name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -504,8 +437,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
@@ -514,8 +446,7 @@
                     <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
                     <bitfield caption="" mask="0x10" name="REFS2"/>
                     <bitfield caption="" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER3"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x22" size="1">
                     <bitfield caption="ADC10 Digital input Disable" mask="0x80" name="ADC10D"/>
@@ -569,8 +500,7 @@
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -631,8 +561,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -653,15 +582,12 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10"
-                              name="OCIE0A"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08"
-                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
                     <bitfield caption="Timer/Counter0 Input Capture Interrupt Enable" mask="0x01" name="TICIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
@@ -682,10 +608,8 @@
                 </register>
                 <register caption="Timer/Counter0 High" name="TCNT0H" offset="0x34" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Low" name="TCNT0L" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1" mask="0xFF"/>
             </register-group>
             <register-group caption="Timer/Counter, 8-bit" name="TC1">
                 <register caption="Timer/Counter Control Register A" name="TCCR1A" offset="0x50" size="1">
@@ -718,8 +642,7 @@
                     <bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES1"/>
                     <bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC1"/>
                     <bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF1"/>
-                    <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1"
-                              values="PULSE_WIDTH_MODU2"/>
+                    <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1" values="PULSE_WIDTH_MODU2"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register E" name="TCCR1E" offset="0x20" size="1">
                     <bitfield caption="Ouput Compare Override Enable Bits" mask="0x3F" name="OC1OE"/>
@@ -731,12 +654,9 @@
                 <register caption="Output compare register" name="OCR1C" offset="0x4B" size="1" mask="0xFF"/>
                 <register caption="Output compare register" name="OCR1D" offset="0x4A" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80"
-                              name="OCIE1D"/>
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40"
-                              name="OCIE1A"/>
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20"
-                              name="OCIE1B"/>
+                    <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80" name="OCIE1D"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -793,8 +713,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
@@ -828,8 +747,7 @@
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
                     <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
                     <bitfield caption="BOD Sleep Enable" mask="0x04" name="BODSE"/>
-                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
                     <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
@@ -837,14 +755,12 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x48" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="PLL Control and status register" name="PLLCSR" offset="0x49" size="1">
                     <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
@@ -888,8 +804,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY48.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY48.xml
index 3c5c19d5..052d97cd 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY48.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY48.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny48-MMU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="QFN28" pinout="QFN28"/>
-        <variant ordercode="ATtiny48-MMH" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="QFN28" pinout="QFN28"/>
-        <variant ordercode="ATtiny48-PU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="PDIP28" pinout="PDIP28"/>
-        <variant ordercode="ATtiny48-AU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="TQFP32" pinout="TQFP_QFN_32"/>
-        <variant ordercode="ATtiny48-CCU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="UFBGA32" pinout="UFBGA32"/>
-        <variant ordercode="ATtiny48-MU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="QFN32" pinout="TQFP_QFN_32"/>
+        <variant ordercode="ATtiny48-MMU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="QFN28" pinout="QFN28"/>
+        <variant ordercode="ATtiny48-MMH" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="QFN28" pinout="QFN28"/>
+        <variant ordercode="ATtiny48-PU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="PDIP28" pinout="PDIP28"/>
+        <variant ordercode="ATtiny48-AU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="TQFP32" pinout="TQFP_QFN_32"/>
+        <variant ordercode="ATtiny48-CCU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="UFBGA32" pinout="UFBGA32"/>
+        <variant ordercode="ATtiny48-MU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="QFN32" pinout="TQFP_QFN_32"/>
     </variants>
     <device name="ATtiny48" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0100" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" pad="PD5"/>
                         <signal group="ICP" pad="PB0"/>
@@ -58,8 +49,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" pad="PD6"/>
                         <signal group="AIN" index="1" pad="PD7"/>
@@ -68,8 +58,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -82,8 +71,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -96,8 +84,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -110,8 +97,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -122,8 +108,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SCK" pad="PB5"/>
                         <signal group="MISO" pad="PB4"/>
@@ -134,14 +119,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -150,8 +133,7 @@
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SCL" pad="PC6"/>
                         <signal group="SDA" pad="PC5"/>
@@ -160,8 +142,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" pad="PC0"/>
                         <signal group="ADC" index="1" pad="PC1"/>
@@ -176,8 +157,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" pad="PB0"/>
                         <signal group="PCINT" index="1" pad="PB1"/>
@@ -214,8 +194,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" pad="PD4"/>
                     </signals>
@@ -223,8 +202,7 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="FUSE">
@@ -234,14 +212,12 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -318,8 +294,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -380,8 +355,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -407,8 +381,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -447,8 +420,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -457,24 +429,15 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x0C"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x1C"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x2C"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x0E"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x1E"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x2E"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x0F"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x1F"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x2F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x0C"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x1C"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x2C"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x0E"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x1E"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x2E"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x0F"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x1F"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x2F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -499,14 +462,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -521,20 +481,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -553,16 +509,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -594,8 +548,7 @@
             </register-group>
             <register-group caption="I/O Port" name="PORTA">
                 <register caption="Port A Data Register" name="PORTA" offset="0x2E" size="1" mask="0x0F" ocd-rw="R"/>
-                <register caption="Port A Data Direction Register" name="DDRA" offset="0x2D" size="1" mask="0x0F"
-                          ocd-rw="R"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x2D" size="1" mask="0x0F" ocd-rw="R"/>
                 <register caption="Port A Input Pins" name="PINA" offset="0x2C" size="1" mask="0x0F" ocd-rw="R"/>
             </register-group>
         </module>
@@ -633,8 +586,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -661,14 +613,12 @@
                     <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -793,13 +743,11 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="" mask="0x02" name="AIN1D"/>
@@ -844,10 +792,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -883,24 +829,19 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x45" size="1">
                     <bitfield caption="Clear Timer on Compare Match" mask="0x08" name="CTC0"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY804.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY804.xml
index 4cc3da35..4b93deb8 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY804.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY804.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny804-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny804-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny804-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny804-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny804" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0xA000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0200" start="0x3e00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -370,10 +360,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -426,10 +414,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -450,8 +436,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -542,23 +527,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -606,14 +586,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -623,14 +600,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -716,12 +690,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -754,8 +726,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -783,12 +754,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -821,99 +790,61 @@
         </module>
         <module caption="Event System" id="I2603" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11"
-                          offset="0x1D" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11"
-                              rw="RW" values="EVSYS_ASYNCUSER11"/>
+                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
                 </register>
-                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12"
-                          offset="0x1E" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12"
-                              rw="RW" values="EVSYS_ASYNCUSER12"/>
+                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW"
-                              values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW"
-                              values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -973,29 +904,25 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1025,8 +952,7 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1079,16 +1005,12 @@
         </module>
         <module caption="Fuses" id="I2603" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1098,16 +1020,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1135,11 +1055,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1305,39 +1223,26 @@
         </module>
         <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1432,12 +1337,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1512,10 +1415,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1607,8 +1508,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1721,8 +1621,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1758,8 +1657,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -1834,10 +1732,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -1942,15 +1838,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -1965,19 +1859,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -1997,8 +1887,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2016,8 +1905,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2111,10 +1999,8 @@
         <module caption="Voltage reference" id="I2603" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x4">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY806.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY806.xml
index 6703a2bd..987c2422 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY806.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY806.xml
@@ -1,38 +1,26 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny806-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny806-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny806-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny806-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny806-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny806-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny806-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny806-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny806" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0xA000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0200" start="0x3e00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -414,10 +402,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -470,10 +456,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -494,8 +478,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -586,23 +569,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -650,14 +628,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -667,14 +642,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -760,12 +732,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -798,8 +768,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -827,12 +796,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -865,99 +832,61 @@
         </module>
         <module caption="Event System" id="I2603" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11"
-                          offset="0x1D" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11"
-                              rw="RW" values="EVSYS_ASYNCUSER11"/>
+                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
                 </register>
-                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12"
-                          offset="0x1E" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12"
-                              rw="RW" values="EVSYS_ASYNCUSER12"/>
+                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW"
-                              values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW"
-                              values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1017,29 +946,25 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1069,8 +994,7 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1123,16 +1047,12 @@
         </module>
         <module caption="Fuses" id="I2603" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1142,16 +1062,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1179,11 +1097,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1349,39 +1265,26 @@
         </module>
         <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1476,12 +1379,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1556,10 +1457,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1651,8 +1550,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1765,8 +1663,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1802,8 +1699,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -1878,10 +1774,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -1986,15 +1880,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2009,19 +1901,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2041,8 +1929,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2060,8 +1947,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2155,10 +2041,8 @@
         <module caption="Voltage reference" id="I2603" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x4">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY807.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY807.xml
index de3152d8..89ccada7 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY807.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY807.xml
@@ -1,34 +1,24 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny807-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny807-MRF" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny807-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny807-MRF" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny807" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0xA000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0200" start="0x3e00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -427,10 +417,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -483,10 +471,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -507,8 +493,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -599,23 +584,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -663,14 +643,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -680,14 +657,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -773,12 +747,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -811,8 +783,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -840,12 +811,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -878,99 +847,61 @@
         </module>
         <module caption="Event System" id="I2603" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11"
-                          offset="0x1D" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11"
-                              rw="RW" values="EVSYS_ASYNCUSER11"/>
+                <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
                 </register>
-                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12"
-                          offset="0x1E" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12"
-                              rw="RW" values="EVSYS_ASYNCUSER12"/>
+                <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW"
-                              values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW"
-                          size="1">
-                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW"
-                              values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1030,29 +961,25 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1082,8 +1009,7 @@
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
                 <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
@@ -1136,16 +1062,12 @@
         </module>
         <module caption="Fuses" id="I2603" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1155,16 +1077,14 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1192,11 +1112,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1362,39 +1280,26 @@
         </module>
         <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1489,12 +1394,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1569,10 +1472,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1664,8 +1565,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1778,8 +1678,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1815,8 +1714,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -1891,10 +1789,8 @@
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <mode name="DEFAULT">
                         <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
-                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
-                                  values="TWI_DEFAULT_SDAHOLD"/>
-                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
-                                  values="TWI_DEFAULT_SDASETUP"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
                     </mode>
                 </register>
                 <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
@@ -1999,15 +1895,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2022,19 +1916,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2054,8 +1944,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2073,8 +1962,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2168,10 +2056,8 @@
         <module caption="Voltage reference" id="I2603" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x4">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY814.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY814.xml
index 97198ff0..8e8fe736 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY814.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY814.xml
@@ -1,36 +1,25 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny814-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny814-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny814-SSNRES" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny814-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny814-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny814-SSNRES" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny814" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0xA000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0200" start="0x3e00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -412,10 +401,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x8" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x8" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -471,10 +458,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -495,8 +480,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -587,23 +571,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -656,14 +635,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -673,14 +649,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -766,12 +739,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -816,8 +787,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -845,12 +815,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -900,104 +868,64 @@
         </module>
         <module caption="Event System" id="I2600" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2"
-                          offset="0x04" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW"
-                              values="EVSYS_ASYNCCH2"/>
+                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
                 </register>
-                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3"
-                          offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW"
-                              values="EVSYS_ASYNCCH3"/>
+                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0"
-                          offset="0x22" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0"
-                              rw="RW" values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1"
-                          offset="0x23" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1"
-                              rw="RW" values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1097,8 +1025,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1107,8 +1034,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1117,8 +1043,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1127,8 +1052,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1173,8 +1097,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1236,16 +1159,12 @@
         </module>
         <module caption="Fuses" id="I2600" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1255,8 +1174,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1273,8 +1191,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1302,11 +1219,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1472,40 +1387,27 @@
         </module>
         <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1605,12 +1507,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1685,10 +1585,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1780,8 +1678,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1894,8 +1791,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1931,8 +1827,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2014,18 +1909,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2167,17 +2059,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x0"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x3"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
@@ -2294,15 +2183,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2317,19 +2204,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2348,8 +2231,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2367,8 +2249,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2462,10 +2343,8 @@
         <module caption="Voltage reference" id="I2600" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY816.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY816.xml
index b5384c88..7c180a82 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY816.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY816.xml
@@ -1,40 +1,27 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny816-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny816-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny816-MNRES" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny816-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny816-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny816-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny816-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny816-MNRES" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny816-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny816-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny816" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0xA000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0200" start="0x3e00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -460,10 +447,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x8" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x8" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -519,10 +504,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -543,8 +526,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -635,23 +617,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -704,14 +681,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -721,14 +695,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -814,12 +785,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -864,8 +833,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -893,12 +861,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -948,104 +914,64 @@
         </module>
         <module caption="Event System" id="I2600" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2"
-                          offset="0x04" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW"
-                              values="EVSYS_ASYNCCH2"/>
+                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
                 </register>
-                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3"
-                          offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW"
-                              values="EVSYS_ASYNCCH3"/>
+                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0"
-                          offset="0x22" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0"
-                              rw="RW" values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1"
-                          offset="0x23" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1"
-                              rw="RW" values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1145,8 +1071,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1155,8 +1080,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1165,8 +1089,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1175,8 +1098,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1221,8 +1143,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1284,16 +1205,12 @@
         </module>
         <module caption="Fuses" id="I2600" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1303,8 +1220,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1321,8 +1237,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1350,11 +1265,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1520,40 +1433,27 @@
         </module>
         <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1653,12 +1553,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1733,10 +1631,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1828,8 +1724,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1942,8 +1837,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1979,8 +1873,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2062,18 +1955,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2215,17 +2105,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x0"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x3"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
@@ -2342,15 +2229,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2365,19 +2250,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2396,8 +2277,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2415,8 +2295,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2510,10 +2389,8 @@
         <module caption="Voltage reference" id="I2600" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY817.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY817.xml
index 7affbd44..7a85d971 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY817.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY817.xml
@@ -1,36 +1,25 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny817-MFR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny817-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny817-MNRES" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny817-MFR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny817-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny817-MNRES" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny817" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
         <address-spaces>
             <address-space endianness="little" id="data" name="data" size="0xA000" start="0x0000">
-                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400"
-                                type="eeprom"/>
-                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
-                                type="fuses"/>
+                <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+                <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
                 <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0200" start="0x3e00" type="ram"/>
                 <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
-                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
-                                type="lockbits"/>
-                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000"
-                                type="other"/>
-                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
-                                type="signatures"/>
-                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
-                                type="signatures"/>
-                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
-                                type="user_signatures"/>
+                <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+                <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000" type="other"/>
+                <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+                <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+                <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
             </address-space>
             <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
-                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000"
-                                type="flash"/>
+                <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000" type="flash"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -473,10 +462,8 @@
                 </register>
                 <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
-                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
-                              values="AC_MUXNEG"/>
-                    <bitfield caption="Positive Input MUX Selection" mask="0x8" name="MUXPOS" rw="RW"
-                              values="AC_MUXPOS"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x8" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
@@ -532,10 +519,8 @@
                     <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
                 </register>
                 <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
-                              values="ADC_ASDV"/>
-                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
-                              values="ADC_INITDLY"/>
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
                     <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
                 </register>
                 <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
@@ -556,8 +541,7 @@
                     <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
                 </register>
                 <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
-                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
-                              values="ADC_MUXPOS"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
                 </register>
                 <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
                 <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
@@ -648,23 +632,18 @@
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
                     <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
-                          rw="RW" size="1">
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
                 </register>
-                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
-                          size="1">
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
                     <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
                 </register>
-                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
-                          size="1">
-                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
-                              values="BOD_VLMLVL"/>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
                 </register>
             </register-group>
             <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
@@ -717,14 +696,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
                     <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
@@ -734,14 +710,11 @@
                     <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
                 </register>
                 <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
-                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
-                              values="CCL_INSEL0"/>
-                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
-                              values="CCL_INSEL1"/>
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
                 </register>
                 <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
-                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
-                              values="CCL_INSEL2"/>
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
                 </register>
                 <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
@@ -827,12 +800,10 @@
                     <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
                     <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
                 </register>
-                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
                     <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
                 </register>
-                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
                     <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
                 </register>
@@ -877,8 +848,7 @@
         </module>
         <module caption="CPU" id="I2100" name="CPU">
             <register-group caption="CPU" name="CPU" size="0x10">
-                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
-                          size="1">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
                     <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
                 </register>
                 <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
@@ -906,12 +876,10 @@
                     <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
                     <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
                 </register>
-                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
@@ -961,104 +929,64 @@
         </module>
         <module caption="Event System" id="I2600" name="EVSYS">
             <register-group caption="Event System" name="EVSYS" size="0x40">
-                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
-                          offset="0x02" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
-                              values="EVSYS_ASYNCCH0"/>
+                <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
                 </register>
-                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
-                          offset="0x03" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
-                              values="EVSYS_ASYNCCH1"/>
+                <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
                 </register>
-                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2"
-                          offset="0x04" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW"
-                              values="EVSYS_ASYNCCH2"/>
+                <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
                 </register>
-                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3"
-                          offset="0x05" rw="RW" size="1">
-                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW"
-                              values="EVSYS_ASYNCCH3"/>
+                <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
                 </register>
-                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
-                          size="1"/>
-                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
-                          offset="0x12" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
-                              rw="RW" values="EVSYS_ASYNCUSER0"/>
+                <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+                <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
                 </register>
-                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
-                          offset="0x13" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
-                              rw="RW" values="EVSYS_ASYNCUSER1"/>
+                <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
                 </register>
-                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
-                          name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
-                              name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+                <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
                 </register>
-                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
-                          name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
-                              name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+                <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
                 </register>
-                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
-                          name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
-                              name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+                <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
                 </register>
-                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
-                          name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
-                              name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+                <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
                 </register>
-                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
-                          name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
-                              name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+                <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
                 </register>
-                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
-                          name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
-                              name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+                <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
                 </register>
-                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
-                          name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
-                              name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+                <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
                 </register>
-                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
-                          name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
-                              name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+                <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
                 </register>
-                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
-                          name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
-                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
-                              name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+                <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
                 </register>
-                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
-                          offset="0x0A" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
-                              values="EVSYS_SYNCCH0"/>
+                <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
                 </register>
-                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1"
-                          offset="0x0B" rw="RW" size="1">
-                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW"
-                              values="EVSYS_SYNCCH1"/>
+                <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
                 </register>
-                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
-                          size="1"/>
-                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0"
-                          offset="0x22" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0"
-                              rw="RW" values="EVSYS_SYNCUSER0"/>
+                <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+                <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
                 </register>
-                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1"
-                          offset="0x23" rw="RW" size="1">
-                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1"
-                              rw="RW" values="EVSYS_SYNCUSER1"/>
+                <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+                    <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
                 </register>
             </register-group>
             <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
@@ -1158,8 +1086,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
-                         name="EVSYS_ASYNCUSER2">
+            <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1168,8 +1095,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
-                         name="EVSYS_ASYNCUSER3">
+            <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1178,8 +1104,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
-                         name="EVSYS_ASYNCUSER4">
+            <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1188,8 +1113,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
-                         name="EVSYS_ASYNCUSER5">
+            <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1234,8 +1158,7 @@
                 <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
                 <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
             </value-group>
-            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
-                         name="EVSYS_ASYNCUSER10">
+            <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
                 <value caption="Off" name="OFF" value="0x00"/>
                 <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
                 <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
@@ -1297,16 +1220,12 @@
         </module>
         <module caption="Fuses" id="I2600" name="FUSE">
             <register-group caption="Fuses" name="FUSE" size="0x09">
-                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
-                          size="1"/>
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
                 <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
-                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
-                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
                     <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
-                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
-                              values="FUSE_SAMPFREQ"/>
-                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
-                              values="FUSE_SLEEP"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
                 </register>
                 <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
                 <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
@@ -1316,8 +1235,7 @@
                 <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
                     <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
                     <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
-                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
-                              values="FUSE_RSTPINCFG"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
                 </register>
                 <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
                     <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
@@ -1334,8 +1252,7 @@
                 </register>
                 <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
-                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
-                              values="FUSE_WINDOW"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
                 </register>
             </register-group>
             <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
@@ -1363,11 +1280,9 @@
                 <value caption="20 MHz" name="20MHZ" value="0x2"/>
             </value-group>
             <value-group caption="CRC Source select" name="FUSE_CRCSRC">
-                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
-                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
                 <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
-                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
-                       value="0x2"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
                 <value caption="Disable CRC." name="NOCRC" value="0x3"/>
             </value-group>
             <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
@@ -1533,40 +1448,27 @@
         </module>
         <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
             <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
-                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
                     <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
                     <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
                     <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
-                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
-                              values="PORTMUX_LUT0"/>
-                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
-                              values="PORTMUX_LUT1"/>
+                    <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+                    <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
                 </register>
-                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
                     <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
-                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
-                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
                 </register>
-                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
-                          size="1">
-                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
-                              values="PORTMUX_TCA00"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
-                              values="PORTMUX_TCA01"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
-                              values="PORTMUX_TCA02"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
-                              values="PORTMUX_TCA03"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
-                              values="PORTMUX_TCA04"/>
-                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
-                              values="PORTMUX_TCA05"/>
+                <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+                    <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
                 </register>
-                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
-                          size="1">
+                <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
                     <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
                 </register>
             </register-group>
@@ -1666,12 +1568,10 @@
                 <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
                     <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
-                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
-                          size="1">
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
                     <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
                 </register>
                 <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
@@ -1746,10 +1646,8 @@
                 <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
                 <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
                 <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
-                          size="1"/>
-                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
-                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
             </register-group>
         </module>
         <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
@@ -1841,8 +1739,7 @@
                     <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
                     <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
                     <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
-                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
-                              values="TCA_SINGLE_WGMODE"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
@@ -1955,8 +1852,7 @@
                 <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
                 <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
             </register-group>
-            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
-                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
                 <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
                 <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
             </register-group>
@@ -1992,8 +1888,7 @@
                 <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
                 <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
                 <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
-                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
-                       name="UPDOWN" value="0x03"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
             </value-group>
             <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
                 <value caption="System Clock" name="DIV1" value="0x00"/>
@@ -2075,18 +1970,15 @@
                     <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
                     <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
                     <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
-                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW"
-                              values="TCD_SYNCPRES"/>
+                    <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
                     <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
                 </register>
                 <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
                     <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
-                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW"
-                              values="TCD_CMPCSEL"/>
-                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW"
-                              values="TCD_CMPDSEL"/>
+                    <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+                    <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
                     <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
                     <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
                 </register>
@@ -2228,17 +2120,14 @@
                 <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
             </value-group>
             <value-group caption="edge select select" name="TCD_EDGE">
-                <value caption="The falling edge or low level of event generates retrigger or fault action"
-                       name="FALL_LOW" value="0x0"/>
-                <value caption="The rising edge or high level of event generates retrigger or fault action"
-                       name="RISE_HIGH" value="0x1"/>
+                <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+                <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
             </value-group>
             <value-group caption="Input mode select" name="TCD_INPUTMODE">
                 <value caption="Input has no actions" name="NONE" value="0x0"/>
                 <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
                 <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
-                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT"
-                       value="0x3"/>
+                <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
                 <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
                 <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
                 <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
@@ -2355,15 +2244,13 @@
             </value-group>
         </module>
         <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
-            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
-                            size="0x10">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
                 <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
                     <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
                     <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
                     <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
-                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
-                              values="USART_RS485"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
                     <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
                     <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
                     <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
@@ -2378,19 +2265,15 @@
                 </register>
                 <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
                     <mode name="MSPI">
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
                         <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
                         <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
                     </mode>
                     <mode name="NORMAL">
-                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
-                                  values="USART_NORMAL_CHSIZE"/>
-                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
-                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
                         <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
-                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
-                                  values="USART_NORMAL_SBMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
                     </mode>
                 </register>
                 <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
@@ -2409,8 +2292,7 @@
                 <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
                     <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
                 </register>
-                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
-                          rw="RW" size="1">
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
                     <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
                 </register>
                 <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
@@ -2428,8 +2310,7 @@
                 <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
                     <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
                 </register>
-                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
-                          rw="RW" size="1">
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
                     <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
                 </register>
             </register-group>
@@ -2523,10 +2404,8 @@
         <module caption="Voltage reference" id="I2600" name="VREF">
             <register-group caption="Voltage reference" name="VREF" size="0x2">
                 <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
-                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
-                              values="VREF_ADC0REFSEL"/>
-                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
-                              values="VREF_DAC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+                    <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
                 </register>
                 <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
                     <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY828.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY828.xml
index 1eee9fbf..53e0a0b1 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY828.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY828.xml
@@ -7,16 +7,11 @@
     <device name="ATtiny828" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
-                                pagesize="0x40"/>
-                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+                <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x40"/>
+                <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x40"/>
+                <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x40"/>
+                <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
@@ -44,14 +38,12 @@
         <peripherals>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -64,8 +56,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -78,8 +69,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTC" group="P" index="0" pad="PC0"/>
                         <signal function="PORTC" group="P" index="1" pad="PC1"/>
@@ -92,8 +82,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTD" group="P" index="0" pad="PD0"/>
                         <signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -104,8 +93,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -114,62 +102,52 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="TOCPM">
                 <instance name="TOCPM" caption="Timer/Counter Output Compare Pin">
-                    <register-group name="TOCPM" name-in-module="TOCPM" offset="0x00" address-space="data"
-                                    caption="Timer/Counter Output Compare Pin"/>
+                    <register-group name="TOCPM" name-in-module="TOCPM" offset="0x00" address-space="data" caption="Timer/Counter Output Compare Pin"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                 </instance>
             </module>
             <module name="USART">
                 <instance name="USART" caption="USART">
-                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
                 </instance>
             </module>
             <module name="FUSE">
@@ -179,14 +157,12 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -269,8 +245,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -331,8 +306,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -365,10 +339,8 @@
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
                     <bitfield caption="Select boot size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
                     <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
-                    <bitfield caption="BOD mode of operation when the device is in sleep mode" mask="0xC0" name="BODPD"
-                              values="ENUM_BODMODE"/>
-                    <bitfield caption="BOD mode of operation when the device is active or idle" mask="0x30"
-                              name="BODACT" values="ENUM_BODMODE"/>
+                    <bitfield caption="BOD mode of operation when the device is in sleep mode" mask="0xC0" name="BODPD" values="ENUM_BODMODE"/>
+                    <bitfield caption="BOD mode of operation when the device is active or idle" mask="0x30" name="BODACT" values="ENUM_BODMODE"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
                     <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)]" mask="0x80" name="RSTDISBL"/>
@@ -376,8 +348,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x6E">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -386,38 +357,22 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x01"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x11"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x30"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x21"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x31"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x32"/>
-                <value caption="Int. ULP Osc. 32kHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 0 ms"
-                       name="INTULPOSC_32KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="Int. ULP Osc. 32kHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 4.1 ms"
-                       name="INTULPOSC_32KHZ_6CK_14CK_4MS1" value="0x13"/>
-                <value caption="Int. ULP Osc. 32kHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms"
-                       name="INTULPOSC_32KHZ_6CK_14CK_65MS" value="0x23"/>
-                <value caption="Int. ULP Osc. 32kHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms"
-                       name="INTULPOSC_32KHZ_6CK_14CK_65MS" value="0x33"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x01"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x11"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x30"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x21"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x31"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x32"/>
+                <value caption="Int. ULP Osc. 32kHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 0 ms" name="INTULPOSC_32KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. ULP Osc. 32kHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 4.1 ms" name="INTULPOSC_32KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. ULP Osc. 32kHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="INTULPOSC_32KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Int. ULP Osc. 32kHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="INTULPOSC_32KHZ_6CK_14CK_65MS" value="0x33"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -533,8 +488,7 @@
                 </register>
                 <register caption="Configuration Change Protection" name="CCP" offset="0x56" size="1" mask="0xFF"/>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
@@ -563,8 +517,7 @@
                     <bitfield caption="Sleep Mode Select Bits" mask="0x06" name="SM" values="CPU_SLEEP_MODE2"/>
                     <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
                 </register>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
                     <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
                     <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
                     <bitfield caption="Read Device Signature Imprint Table" mask="0x20" name="RSIG"/>
@@ -574,14 +527,10 @@
                     <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
                     <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
                 </register>
-                <register caption="Oscillator Calibration Register 8MHz" name="OSCCAL0" offset="0x66" size="1"
-                          mask="0xFF"/>
-                <register caption="Oscillator Calibration Register 32kHz" name="OSCCAL1" offset="0x67" size="1"
-                          mask="0x03"/>
-                <register caption="Oscillator Temperature Calibration Register A" name="OSCTCAL0A" offset="0xF0"
-                          size="1" mask="0xFF"/>
-                <register caption="Oscillator Temperature Calibration Register B" name="OSCTCAL0B" offset="0xF1"
-                          size="1" mask="0xFF"/>
+                <register caption="Oscillator Calibration Register 8MHz" name="OSCCAL0" offset="0x66" size="1" mask="0xFF"/>
+                <register caption="Oscillator Calibration Register 32kHz" name="OSCCAL1" offset="0x67" size="1" mask="0x03"/>
+                <register caption="Oscillator Temperature Calibration Register A" name="OSCTCAL0A" offset="0xF0" size="1" mask="0xFF"/>
+                <register caption="Oscillator Temperature Calibration Register B" name="OSCTCAL0B" offset="0xF1" size="1" mask="0xFF"/>
             </register-group>
             <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
                 <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
@@ -607,10 +556,8 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
                     <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
@@ -624,14 +571,11 @@
                     <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -656,14 +600,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -678,20 +619,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -722,8 +659,7 @@
                     <bitfield caption="Timer Output Compare Channel 1 Selection Bits" mask="0x0C" name="TOCC1S"/>
                     <bitfield caption="Timer Output Compare Channel 0 Selection Bits" mask="0x03" name="TOCC0S"/>
                 </register>
-                <register caption="Timer Output Compare Pin Mux Channel Output Enable" name="TOCPMCOE" offset="0xE2"
-                          size="1">
+                <register caption="Timer Output Compare Pin Mux Channel Output Enable" name="TOCPMCOE" offset="0xE2" size="1">
                     <bitfield caption="Timer Output Compare Channel 7 Output Enable" mask="0x80" name="TOCC7OE"/>
                     <bitfield caption="Timer Output Compare Channel 6 Output Enable" mask="0x40" name="TOCC6OE"/>
                     <bitfield caption="Timer Output Compare Channel 5 Output Enable" mask="0x20" name="TOCC5OE"/>
@@ -750,14 +686,12 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x08" name="ADLAR"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register 2" name="DIDR3" offset="0xDF" size="1">
                     <bitfield caption="ADC27 Digital input Disable" mask="0x08" name="ADC27D"/>
@@ -823,8 +757,7 @@
                     <bitfield caption="Hysteresis Select" mask="0x80" name="HSEL"/>
                     <bitfield caption="Hysteresis Level" mask="0x40" name="HLEV"/>
                     <bitfield caption="Analog Comparator Negative Input Multiplexer" mask="0x0C" name="ACNMUX"/>
-                    <bitfield caption="Analog Comparator Positive Input Multiplexer Bits 1:0" mask="0x03"
-                              name="ACPMUX"/>
+                    <bitfield caption="Analog Comparator Positive Input Multiplexer Bits 1:0" mask="0x03" name="ACPMUX"/>
                 </register>
                 <register caption="Analog Comparator Control And Status Register A" name="ACSRA" offset="0x50" size="1">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
@@ -833,8 +766,7 @@
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -847,10 +779,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request Enables" mask="0x03" name="INT"/>
@@ -889,8 +819,7 @@
                 <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x60" size="1">
                     <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS_32KHZ"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS_32KHZ"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
             </register-group>
@@ -951,8 +880,7 @@
                     <bitfield caption="TWI Read/Write Direction" mask="0x02" name="TWDIR"/>
                     <bitfield caption="TWI Address or Stop" mask="0x01" name="TWAS"/>
                 </register>
-                <register caption="TWI Slave Address Register" name="TWSA" offset="0xBC" size="1" mask="0xFF"
-                          ocd-rw="R"/>
+                <register caption="TWI Slave Address Register" name="TWSA" offset="0xBC" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="TWI Slave Data Register" name="TWSD" offset="0xBD" size="1" ocd-rw="R">
                     <bitfield caption="TWI slave data bit" mask="0xFF" name="TWSD"/>
                 </register>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84.xml
index 6be68b84..9591415f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84.xml
@@ -8,8 +8,7 @@
     <device name="ATtiny84" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -26,8 +25,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -37,8 +35,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -51,8 +48,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -63,62 +59,52 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -132,8 +118,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -212,8 +197,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -273,8 +257,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE_STK600">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -312,8 +295,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -322,94 +304,50 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -447,16 +385,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR0" offset="0x21" size="1">
                     <bitfield caption="ADC 1 Digital input buffer disable" mask="0x02" name="ADC1D"/>
@@ -479,15 +415,13 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
                     <bitfield caption="ADC Left Adjust Result" mask="0x10" name="ADLAR"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1" mask="0xFF"/>
             </register-group>
@@ -543,8 +477,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
@@ -587,8 +520,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -609,14 +541,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -633,10 +562,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
@@ -657,14 +584,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2C" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -686,12 +610,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -706,8 +627,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
@@ -724,14 +644,12 @@
                     <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY841.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY841.xml
index 3b0a014f..5843b65b 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY841.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY841.xml
@@ -1,18 +1,14 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny841-SSU" package="SOIC14" pinout="SOIC_14" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.7"/>
-        <variant ordercode="ATtiny841-MU" package="MLF20" pinout="QFN_20" speedmax="16000000" tempmax="85" tempmin="-40"
-                 vccmax="5.5" vccmin="1.7"/>
-        <variant ordercode="ATtiny841-MMH" package="VQFN20" pinout="QFN_20" speedmax="16000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.7"/>
+        <variant ordercode="ATtiny841-SSU" package="SOIC14" pinout="SOIC_14" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.7"/>
+        <variant ordercode="ATtiny841-MU" package="MLF20" pinout="QFN_20" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.7"/>
+        <variant ordercode="ATtiny841-MMH" package="VQFN20" pinout="QFN_20" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.7"/>
     </variants>
     <device name="ATtiny841" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x10"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x10"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -29,8 +25,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
@@ -40,8 +35,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -50,8 +44,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -66,8 +59,7 @@
             </module>
             <module name="USART">
                 <instance name="USART1" caption="USART">
-                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal function="USART" group="RXD" pad="PA4"/>
                         <signal function="USART" group="TXD" pad="PA5"/>
@@ -75,8 +67,7 @@
                     </signals>
                 </instance>
                 <instance name="USART0" caption="USART">
-                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
-                                    caption="USART"/>
+                    <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
                     <signals>
                         <signal field="U0MAP" function="USART" group="TXD" pad="PA1"/>
                         <signal field="U0MAP" function="USART" group="RXD" pad="PA2"/>
@@ -89,14 +80,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal function="TWI" group="SCL" pad="PA4"/>
                         <signal function="TWI" group="SDA" pad="PA6"/>
@@ -105,8 +94,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PA0"/>
                         <signal function="ADC" group="ADC" index="1" pad="PA1"/>
@@ -126,8 +114,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="ACIN0" group="AIN0" index="0" pad="PA1"/>
                         <signal function="ACIN0" group="AIN0" index="1" pad="PA2"/>
@@ -140,14 +127,12 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal function="OC" group="TOCC" index="0" pad="PA1"/>
                         <signal function="OC" group="TOCC" index="1" pad="PA2"/>
@@ -164,8 +149,7 @@
                     </signals>
                 </instance>
                 <instance name="TC2" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal function="OC" group="TOCC" index="0" pad="PA1"/>
                         <signal function="OC" group="TOCC" index="1" pad="PA2"/>
@@ -184,8 +168,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="OC" group="TOCC" index="0" pad="PA1"/>
                         <signal function="OC" group="TOCC" index="0" pad="PA2"/>
@@ -203,8 +186,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
                         <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
@@ -224,8 +206,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -234,14 +215,12 @@
             </module>
             <module name="TOCPM">
                 <instance name="TOCPM" caption="Timer/Counter Output Compare Pin">
-                    <register-group name="TOCPM" name-in-module="TOCPM" offset="0x00" address-space="data"
-                                    caption="Timer/Counter Output Compare Pin"/>
+                    <register-group name="TOCPM" name-in-module="TOCPM" offset="0x00" address-space="data" caption="Timer/Counter Output Compare Pin"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal field="SPIMAP" function="SPI_ALT" group="MISO" pad="PA0"/>
                         <signal field="SPIMAP" function="SPI_ALT" group="MOSI" pad="PA1"/>
@@ -261,14 +240,12 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
             <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
@@ -356,8 +333,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE_STK600">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -417,8 +393,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -448,13 +423,9 @@
         <module caption="Fuses" name="FUSE">
             <register-group caption="Fuses" name="FUSE">
                 <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
-                    <bitfield
-                            caption="Frequency selection for internal ULP oscillator. The selection only affects system clock, watchdog and reset timeout always use 32 kHz clock."
-                            mask="0xE0" name="ULPOSCSEL" values="ENUM_ULPOSCSEL"/>
-                    <bitfield caption="BOD mode of operation when the device is in sleep mode" mask="0x18" name="BODPD"
-                              values="ENUM_BODMODE"/>
-                    <bitfield caption="BOD mode of operation when the device is active or idle" mask="0x06"
-                              name="BODACT" values="ENUM_BODMODE"/>
+                    <bitfield caption="Frequency selection for internal ULP oscillator. The selection only affects system clock, watchdog and reset timeout always use 32 kHz clock." mask="0xE0" name="ULPOSCSEL" values="ENUM_ULPOSCSEL"/>
+                    <bitfield caption="BOD mode of operation when the device is in sleep mode" mask="0x18" name="BODPD" values="ENUM_BODMODE"/>
+                    <bitfield caption="BOD mode of operation when the device is active or idle" mask="0x06" name="BODACT" values="ENUM_BODMODE"/>
                     <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
                 </register>
                 <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
@@ -463,8 +434,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -473,40 +443,23 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="EXTCLK_6CK_16CK_16MS"
-                       value="0x00"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms"
-                       name="INTRCOSC_8MHZ_6CK_16CK_16MS" value="0x02"/>
-                <value caption="Int. ULP Osc.; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms"
-                       name="INTULPOSC_32KHZ_6CK_16CK_16MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms"
-                       name="EXTLOFXTAL_1KCK_16CK_16MS" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/16 CK + 16 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_16MS" value="0x16"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_16CK_16MS" value="0x08"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_16CK_16MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_16CK_16MS" value="0x09"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_16CK_16MS" value="0x0a"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_16CK_16MS" value="0x1a"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_16CK_16MS" value="0x0b"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_16CK_16MS" value="0x0c"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_16CK_16MS" value="0x1c"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_16CK_16MS" value="0x0d"/>
-                <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_16CK_16MS" value="0x0e"/>
-                <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_16CK_16MS" value="0x1e"/>
-                <value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_16CK_16MS" value="0x0f"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="EXTCLK_6CK_16CK_16MS" value="0x00"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="INTRCOSC_8MHZ_6CK_16CK_16MS" value="0x02"/>
+                <value caption="Int. ULP Osc.; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="INTULPOSC_32KHZ_6CK_16CK_16MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTLOFXTAL_1KCK_16CK_16MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/16 CK + 16 ms" name="EXTLOFXTAL_32KCK_14CK_16MS" value="0x16"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_16CK_16MS" value="0x08"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_16CK_16MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_16CK_16MS" value="0x09"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_16CK_16MS" value="0x0a"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_16CK_16MS" value="0x1a"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_16CK_16MS" value="0x0b"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_3MHZ_8MHZ_258CK_16CK_16MS" value="0x0c"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_16CK_16MS" value="0x1c"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_16CK_16MS" value="0x0d"/>
+                <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_8MHZ_XX_258CK_16CK_16MS" value="0x0e"/>
+                <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_8MHZ_XX_1KCK_16CK_16MS" value="0x1e"/>
+                <value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_8MHZ_XX_16KCK_16CK_16MS" value="0x0f"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -658,8 +611,7 @@
                 <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x41" size="1">
                     <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS_32KHZ"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS_32KHZ"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
             </register-group>
@@ -702,8 +654,7 @@
                     <bitfield caption="TWI Read/Write Direction" mask="0x02" name="TWDIR"/>
                     <bitfield caption="TWI Address or Stop" mask="0x01" name="TWAS"/>
                 </register>
-                <register caption="TWI Slave Address Register" name="TWSA" offset="0xA2" size="1" mask="0xFF"
-                          ocd-rw="R"/>
+                <register caption="TWI Slave Address Register" name="TWSA" offset="0xA2" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="TWI Slave Data Register" name="TWSD" offset="0xA0" size="1" ocd-rw="R">
                     <bitfield caption="TWI slave data bit" mask="0xFF" name="TWSD"/>
                 </register>
@@ -728,14 +679,12 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x26" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x24" size="1">
                     <bitfield caption="" mask="0x08" name="ADLAR"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER_T841"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_T841"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x61" size="1">
                     <bitfield caption="ADC9 Digital Input Disable" mask="0x08" name="ADC9D"/>
@@ -777,44 +726,36 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator 0 Control And Status Register B" name="ACSR0B" offset="0x2B"
-                          size="1">
+                <register caption="Analog Comparator 0 Control And Status Register B" name="ACSR0B" offset="0x2B" size="1">
                     <bitfield caption="Analog Comparator 0 Hysteresis Select" mask="0x80" name="HSEL0"/>
                     <bitfield caption="Analog Comparator 0 Hysteresis Level" mask="0x40" name="HLEV0"/>
                     <bitfield caption="Analog Comparator 0 Output Pin Enable" mask="0x10" name="ACOE0"/>
                     <bitfield caption="Analog Comparator 0 Negative Input Multiplexer" mask="0x0C" name="ACNMUX"/>
-                    <bitfield caption="Analog Comparator 0 Positive Input Multiplexer Bits 1:0" mask="0x03"
-                              name="ACPMUX"/>
+                    <bitfield caption="Analog Comparator 0 Positive Input Multiplexer Bits 1:0" mask="0x03" name="ACPMUX"/>
                 </register>
-                <register caption="Analog Comparator 0 Control And Status Register A" name="ACSR0A" offset="0x2A"
-                          size="1">
+                <register caption="Analog Comparator 0 Control And Status Register A" name="ACSR0A" offset="0x2A" size="1">
                     <bitfield caption="Analog Comparator 0 Disable" mask="0x80" name="ACD0"/>
-                    <bitfield caption="Analog Comparator 0 Positive Input Multiplexer Bit 2" mask="0x40"
-                              name="ACPMUX2"/>
+                    <bitfield caption="Analog Comparator 0 Positive Input Multiplexer Bit 2" mask="0x40" name="ACPMUX2"/>
                     <bitfield caption="Analog Comparator 0 Output" mask="0x20" name="ACO0"/>
                     <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x10" name="ACI0"/>
                     <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x08" name="ACIE0"/>
                     <bitfield caption="Analog Comparator 0 Input Capture Enable" mask="0x04" name="ACIC0"/>
-                    <bitfield caption="Analog Comparator 0 Interrupt Mode Select bits" mask="0x03" name="ACIS0"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Mode Select bits" mask="0x03" name="ACIS0" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
-                <register caption="Analog Comparator 1 Control And Status Register B" name="ACSR1B" offset="0x2D"
-                          size="1">
+                <register caption="Analog Comparator 1 Control And Status Register B" name="ACSR1B" offset="0x2D" size="1">
                     <bitfield caption="Analog Comparator 1 Hysteresis Select" mask="0x80" name="HSEL1"/>
                     <bitfield caption="Analog Comparator 1 Hysteresis Level" mask="0x40" name="HLEV1"/>
                     <bitfield caption="Analog Comparator 1 Output Pin Enable" mask="0x10" name="ACOE1"/>
                     <bitfield caption="Analog Comparator 1 Multiplexer Enable" mask="0x04" name="ACME1"/>
                 </register>
-                <register caption="Analog Comparator 1 Control And Status Register A" name="ACSR1A" offset="0x2C"
-                          size="1">
+                <register caption="Analog Comparator 1 Control And Status Register A" name="ACSR1A" offset="0x2C" size="1">
                     <bitfield caption="Analog Comparator 1 Disable" mask="0x80" name="ACD1"/>
                     <bitfield caption="Analog Comparator 1 Bandgap Select" mask="0x40" name="ACBG1"/>
                     <bitfield caption="Analog Comparator 1 Output" mask="0x20" name="ACO1"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x10" name="ACI1"/>
                     <bitfield caption="Analog Comparator 1 Interrupt Enable" mask="0x08" name="ACIE1"/>
                     <bitfield caption="Analog Comparator 1 Input Capture Enable" mask="0x04" name="ACIC1"/>
-                    <bitfield caption="Analog Comparator 1 Interrupt Mode Select bits" mask="0x03" name="ACIS1"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Mode Select bits" mask="0x03" name="ACIS1" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -846,14 +787,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2E" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2E" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -875,12 +813,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR"/>
@@ -889,14 +824,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC2">
                 <register caption="Timer/Counter2 Interrupt Mask Register" name="TIMSK2" offset="0x31" size="1">
                     <bitfield caption="Timer/Counter2 Input Capture Interrupt Enable" mask="0x20" name="ICIE2"/>
-                    <bitfield caption="Timer/Counter2 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE2B"/>
-                    <bitfield caption="Timer/Counter2 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
                     <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR2" offset="0x30" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR2" offset="0x30" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter2 Input Capture Flag" mask="0x20" name="ICF2"/>
                     <bitfield caption="Timer/Counter2 Output Compare B Match Flag" mask="0x04" name="OCF2B"/>
                     <bitfield caption="Timer/Counter2 Output Compare A Match Flag" mask="0x02" name="OCF2A"/>
@@ -918,12 +850,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC2B"/>
                 </register>
                 <register caption="Timer/Counter2 Bytes" name="TCNT2" offset="0xC6" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter2 Output Compare Register A Bytes" name="OCR2A" offset="0xC4" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter2 Output Compare Register B Bytes" name="OCR2B" offset="0xC2" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter2 Input Capture Register Bytes" name="ICR2" offset="0xC0" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A Bytes" name="OCR2A" offset="0xC4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B Bytes" name="OCR2B" offset="0xC2" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter2 Input Capture Register Bytes" name="ICR2" offset="0xC0" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR"/>
@@ -943,14 +872,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -967,10 +893,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR"/>
@@ -991,8 +915,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
@@ -1040,8 +963,7 @@
                 </register>
                 <register caption="Configuration Change Protection" name="CCP" offset="0x71" size="1" mask="0xFF"/>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x73" size="1">
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Clock Control Register" name="CLKCR" offset="0x72" size="1">
                     <bitfield caption="Oscillator Ready" mask="0x80" name="OSCRDY"/>
@@ -1075,8 +997,7 @@
                 <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x35" size="1" mask="0xFF"/>
                 <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x34" size="1" mask="0xFF"/>
                 <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x33" size="1" mask="0xFF"/>
-                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
-                          size="1" ocd-rw="R">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Read Device Signature Imprint Table" mask="0x20" name="RSIG"/>
                     <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
@@ -1084,14 +1005,10 @@
                     <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
                     <bitfield caption="Store program Memory Enable" mask="0x01" name="SPMEN"/>
                 </register>
-                <register caption="Oscillator Calibration Register 8MHz" name="OSCCAL0" offset="0x74" size="1"
-                          mask="0xFF"/>
-                <register caption="Oscillator Calibration Register 32kHz" name="OSCCAL1" offset="0x77" size="1"
-                          mask="0x03"/>
-                <register caption="Oscillator Temperature Calibration Register A" name="OSCTCAL0A" offset="0x75"
-                          size="1" mask="0xFF"/>
-                <register caption="Oscillator Temperature Calibration Register B" name="OSCTCAL0B" offset="0x76"
-                          size="1" mask="0xFF"/>
+                <register caption="Oscillator Calibration Register 8MHz" name="OSCCAL0" offset="0x74" size="1" mask="0xFF"/>
+                <register caption="Oscillator Calibration Register 32kHz" name="OSCCAL1" offset="0x77" size="1" mask="0x03"/>
+                <register caption="Oscillator Temperature Calibration Register A" name="OSCTCAL0A" offset="0x75" size="1" mask="0xFF"/>
+                <register caption="Oscillator Temperature Calibration Register B" name="OSCTCAL0B" offset="0x76" size="1" mask="0xFF"/>
             </register-group>
             <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
                 <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
@@ -1129,8 +1046,7 @@
                     <bitfield caption="Timer Output Compare Channel 1 Selection Bits" mask="0x0C" name="TOCC1S"/>
                     <bitfield caption="Timer Output Compare Channel 0 Selection Bits" mask="0x03" name="TOCC0S"/>
                 </register>
-                <register caption="Timer Output Compare Pin Mux Channel Output Enable" name="TOCPMCOE" offset="0x66"
-                          size="1">
+                <register caption="Timer Output Compare Pin Mux Channel Output Enable" name="TOCPMCOE" offset="0x66" size="1">
                     <bitfield caption="Timer Output Compare Channel 7 Output Enable" mask="0x80" name="TOCC7OE"/>
                     <bitfield caption="Timer Output Compare Channel 6 Output Enable" mask="0x40" name="TOCC6OE"/>
                     <bitfield caption="Timer Output Compare Channel 5 Output Enable" mask="0x20" name="TOCC5OE"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84A.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84A.xml
index 4195e2f2..b1a5c9e5 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84A.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny84A-CCU" package="UFBGA16" pinout="BGA_16" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny84A-MMH" package="VQFN20" pinout="QFN_20" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny84A-MU" package="QFN20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40"
-                 vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny84A-PU" package="PDIP14" pinout="SOIC_14" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny84A-SSU" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny84A-SSF" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="125"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny84A-CCU" package="UFBGA16" pinout="BGA_16" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny84A-MMH" package="VQFN20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny84A-MU" package="QFN20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny84A-PU" package="PDIP14" pinout="SOIC_14" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny84A-SSU" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny84A-SSF" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
     </variants>
     <device name="ATtiny84A" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -60,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -72,8 +62,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="ACIN" group="AIN" index="0" pad="PA1"/>
                         <signal function="ACIN" group="AIN" index="1" pad="PA2"/>
@@ -82,8 +71,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PA0"/>
                         <signal function="ADC" group="ADC" index="1" pad="PA1"/>
@@ -99,8 +87,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal function="TWI" group="SCL" pad="PA4"/>
                         <signal function="TWI" group="SDA" pad="PA6"/>
@@ -112,8 +99,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
                         <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
@@ -133,20 +119,17 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="T0" group="T0" pad="PA3"/>
                         <signal function="T0" group="OC0B" pad="PA7"/>
@@ -156,8 +139,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal function="T1" group="T1" pad="PA4"/>
                         <signal function="T1" group="OC1B" pad="PA5"/>
@@ -168,8 +150,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -178,8 +159,7 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="FUSE">
@@ -189,8 +169,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -269,8 +248,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -330,8 +308,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE_STK600">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -369,8 +346,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -379,94 +355,50 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -504,16 +436,14 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR0" offset="0x21" size="1">
                     <bitfield caption="ADC 1 Digital input buffer disable" mask="0x02" name="ADC1D"/>
@@ -539,23 +469,19 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
                     <bitfield caption="ADC Left Adjust Result" mask="0x10" name="ADLAR"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1" mask="0xFF"/>
             </register-group>
             <value-group caption="" name="ANALOG_ADC_V_REF">
-                <value caption="VCC used as analog reference, disconnected from PA0 (AREF)" name="VAL_0x00"
-                       value="0x00"/>
-                <value caption="External voltage reference at PA0 (AREF) pin, internal reference turned off"
-                       name="VAL_0x01" value="0x01"/>
+                <value caption="VCC used as analog reference, disconnected from PA0 (AREF)" name="VAL_0x00" value="0x00"/>
+                <value caption="External voltage reference at PA0 (AREF) pin, internal reference turned off" name="VAL_0x01" value="0x01"/>
                 <value caption="Internal 1.1V voltage reference" name="VAL_0x02" value="0x02"/>
                 <value caption="Reserved" name="VAL_0x03" value="0x03"/>
             </value-group>
@@ -610,8 +536,7 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
-                    <bitfield caption="Interrupt Sense Control 0" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
@@ -654,8 +579,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -676,14 +600,11 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -700,10 +621,8 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
@@ -724,14 +643,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2C" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -753,12 +669,9 @@
                     <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -773,8 +686,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
@@ -791,14 +703,12 @@
                     <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY85.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY85.xml
index 597f566d..97f3ba5e 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY85.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY85.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny85V-10PU" package="PDIP8" pinout="SOIC_8" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny85V-10SU" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny85V-10SH" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny85V-10MU" package="MLF20" pinout="QFN_20" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny85V-20PU" package="PDIP8" pinout="SOIC_8" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny85V-20SU" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny85V-20SH" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny85V-20MU" package="MLF20" pinout="QFN_20" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny85V-10PU" package="PDIP8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny85V-10SU" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny85V-10SH" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny85V-10MU" package="MLF20" pinout="QFN_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny85V-20PU" package="PDIP8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny85V-20SU" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny85V-20SH" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny85V-20MU" package="MLF20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
     </variants>
     <device name="ATtiny85" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,8 +30,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
@@ -50,8 +40,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -64,8 +53,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="ACIN" group="AIN" index="1" pad="PB1"/>
                         <signal function="ACIN" group="AIN" index="0" pad="PB0"/>
@@ -74,8 +62,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PB5"/>
                         <signal function="ADC" group="ADC" index="1" pad="PB2"/>
@@ -86,8 +73,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal function="TWI" group="SDA" pad="PB0"/>
                         <signal function="TWI" group="SCL" pad="PB2"/>
@@ -99,8 +85,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXTINT" group="PCINT" index="0" pad="PB0"/>
                         <signal function="EXTINT" group="PCINT" index="1" pad="PB1"/>
@@ -114,20 +99,17 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="T0" group="T0" pad="PB2"/>
                         <signal function="T0" group="OC0B" pad="PB1"/>
@@ -137,8 +119,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal function="T1" group="OC1B" pad="PB4"/>
                         <signal function="T1" group="OC1BINV" pad="PB3"/>
@@ -149,14 +130,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -170,8 +149,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -248,8 +226,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -309,8 +286,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="HVSP_INTERFACE_STK600">
-                <property name="HvspControlStack"
-                          value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+                <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
                 <property name="HvspEnterProgMode_stabDelay" value="100"/>
                 <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
                 <property name="HvspEnterProgMode_synchCycles" value="6"/>
@@ -348,8 +324,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -358,108 +333,57 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x20"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_1KCK_14CK_4MS"
-                       value="0x01"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_16KCK_14CK_4MS"
-                       value="0x11"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 64 ms" name="PLLCLK_1KCK_14CK_64MS"
-                       value="0x21"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
-                       name="PLLCLK_16KCK_14CK_64MS" value="0x31"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
-                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="INTRCOSC_6MHZ4_6CK_14CK_64MS" value="0x03"/>
-                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_6MHZ4_6CK_14CK_4MS" value="0x23"/>
-                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 1 CK/14 CK + 0 ms"
-                       name="INTRCOSC_6MHZ4_1CK_14CK_0MS" value="0x33"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
-                       name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms"
-                       name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_1KCK_14CK_4MS" value="0x01"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_16KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 64 ms" name="PLLCLK_1KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="PLLCLK_16KCK_14CK_64MS" value="0x31"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_6MHZ4_6CK_14CK_64MS" value="0x03"/>
+                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_6MHZ4_6CK_14CK_4MS" value="0x23"/>
+                <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 1 CK/14 CK + 0 ms" name="INTRCOSC_6MHZ4_1CK_14CK_0MS" value="0x33"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
@@ -492,15 +416,13 @@
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="" name="DIDR0" offset="0x34" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -528,15 +450,13 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
                     <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
                     <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
                 </register>
                 <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x34" size="1">
                     <bitfield caption="ADC0 Digital input Disable" mask="0x20" name="ADC0D"/>
@@ -597,8 +517,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
@@ -640,8 +559,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -662,10 +580,8 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10"
-                              name="OCIE0A"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08"
-                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1">
@@ -685,10 +601,8 @@
                     <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x49" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x49" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x4C" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR0"/>
@@ -710,8 +624,7 @@
                 <register caption="Timer/Counter Control Register" name="TCCR1" offset="0x50" size="1">
                     <bitfield caption="Clear Timer/Counter on Compare Match" mask="0x80" name="CTC1"/>
                     <bitfield caption="Pulse Width Modulator Enable" mask="0x40" name="PWM1A"/>
-                    <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1A"
-                              values="CLK_COMP_MATCH_OUT_MODE"/>
+                    <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1A" values="CLK_COMP_MATCH_OUT_MODE"/>
                     <bitfield caption="Clock Select Bits" mask="0x0F" name="CS1" values="CLK_SEL_4BIT"/>
                 </register>
                 <register caption="Timer/Counter Register" name="TCNT1" offset="0x4F" size="1" mask="0xFF" ocd-rw="R"/>
@@ -719,10 +632,8 @@
                 <register caption="Output Compare Register" name="OCR1B" offset="0x4B" size="1" mask="0xFF"/>
                 <register caption="Output compare register" name="OCR1C" offset="0x4D" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40"
-                              name="OCIE1A"/>
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20"
-                              name="OCIE1B"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1">
@@ -776,8 +687,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Read Device Signature Imprint Table" mask="0x20" name="RSIG"/>
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
@@ -810,8 +720,7 @@
                     <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
                     <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
-                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
@@ -819,14 +728,12 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="PLL Control and status register" name="PLLCSR" offset="0x47" size="1">
                     <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY861.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY861.xml
index 371402ff..c8df5c45 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY861.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY861.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny861V-10MU" package="MLF32" pinout="QFN_32" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny861V-10PU" package="PDIP20" pinout="SOIC_20" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny861V-10SU" package="SOIC20" pinout="SOIC_20" speedmax="10000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny861-20MU" package="MLF32" pinout="QFN_32" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny861-20PU" package="PDIP20" pinout="SOIC_20" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
-        <variant ordercode="ATtiny861-20SU" package="SOIC20" pinout="SOIC_20" speedmax="20000000" tempmax="85"
-                 tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny861V-10MU" package="MLF32" pinout="QFN_32" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny861V-10PU" package="PDIP20" pinout="SOIC_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny861V-10SU" package="SOIC20" pinout="SOIC_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATtiny861-20MU" package="MLF32" pinout="QFN_32" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny861-20PU" package="PDIP20" pinout="SOIC_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+        <variant ordercode="ATtiny861-20SU" package="SOIC20" pinout="SOIC_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
     </variants>
     <device name="ATtiny861" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTA" group="P" index="0" pad="PA0"/>
                         <signal function="PORTA" group="P" index="1" pad="PA1"/>
@@ -60,8 +51,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal function="PORTB" group="P" index="0" pad="PB0"/>
                         <signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -76,8 +66,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal function="ADC" group="ADC" index="0" pad="PA0"/>
                         <signal function="ADC" group="ADC" index="1" pad="PA1"/>
@@ -96,8 +85,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal function="ACIN" group="AIN" index="0" pad="PA7"/>
                         <signal function="ACIN" group="AIN" index="1" pad="PA6"/>
@@ -107,8 +95,7 @@
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                     <signals>
                         <signal field="USIPOS" function="USI" group="SDA" pad="PB0"/>
                         <signal field="USIPOS" function="USI" group="SCL" pad="PB2"/>
@@ -125,20 +112,17 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal function="T0" group="ICP0" pad="PA4"/>
                         <signal function="T0" group="T0" pad="PB6"/>
@@ -147,8 +131,7 @@
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal function="T1" group="OC1AINV" pad="PB0"/>
                         <signal function="T1" group="OC1A" pad="PB1"/>
@@ -161,14 +144,12 @@
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
                         <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
@@ -193,8 +174,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -208,8 +188,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -290,8 +269,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -352,8 +330,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -379,8 +356,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -419,8 +395,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -429,102 +404,54 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS"
-                       value="0x20"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS"
-                       value="0x01"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS"
-                       value="0x11"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS"
-                       value="0x21"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms"
-                       name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms"
-                       name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms"
-                       name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -574,8 +501,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
@@ -584,8 +510,7 @@
                     <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
                     <bitfield caption="Reference Selection Bit" mask="0x10" name="REFS2"/>
                     <bitfield caption="Analog Channel and Gain Selection Bit 5" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER3"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x22" size="1">
                     <bitfield caption="ADC10 Digital input Disable" mask="0x80" name="ADC10D"/>
@@ -639,8 +564,7 @@
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -701,8 +625,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -723,15 +646,12 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10"
-                              name="OCIE0A"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08"
-                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
                     <bitfield caption="Timer/Counter0 Input Capture Interrupt Enable" mask="0x01" name="TICIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
@@ -752,10 +672,8 @@
                 </register>
                 <register caption="Timer/Counter0 High" name="TCNT0H" offset="0x34" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Low" name="TCNT0L" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1" mask="0xFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -800,8 +718,7 @@
                     <bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES1"/>
                     <bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC1"/>
                     <bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF1"/>
-                    <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1"
-                              values="PULSE_WIDTH_MODU2"/>
+                    <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1" values="PULSE_WIDTH_MODU2"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register E" name="TCCR1E" offset="0x20" size="1">
                     <bitfield caption="Ouput Compare Override Enable Bits" mask="0x3F" name="OC1OE"/>
@@ -813,12 +730,9 @@
                 <register caption="Output compare register" name="OCR1C" offset="0x4B" size="1" mask="0xFF"/>
                 <register caption="Output compare register" name="OCR1D" offset="0x4A" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80"
-                              name="OCIE1D"/>
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40"
-                              name="OCIE1A"/>
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20"
-                              name="OCIE1B"/>
+                    <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80" name="OCIE1D"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -865,8 +779,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
@@ -879,8 +792,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
@@ -923,8 +835,7 @@
                     <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
                     <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
-                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
                     <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
@@ -932,14 +843,12 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x48" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="PLL Control and status register" name="PLLCSR" offset="0x49" size="1">
                     <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY861A.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY861A.xml
index 977bcaf0..576834d7 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY861A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY861A.xml
@@ -12,8 +12,7 @@
     <device name="ATtiny861A" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -30,8 +29,7 @@
                 <memory-segment name="IRAM" start="0x0060" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -41,8 +39,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -55,8 +52,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -71,62 +67,52 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -140,8 +126,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -222,8 +207,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -284,8 +268,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -311,8 +294,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -351,8 +333,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -361,102 +342,54 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS"
-                       value="0x20"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS"
-                       value="0x01"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS"
-                       value="0x11"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS"
-                       value="0x21"/>
-                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms"
-                       name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS"
-                       value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms"
-                       name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms"
-                       name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
+                <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -506,8 +439,7 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
                 <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
@@ -516,8 +448,7 @@
                     <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
                     <bitfield caption="" mask="0x10" name="REFS2"/>
                     <bitfield caption="" mask="0x08" name="MUX5"/>
-                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER3"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x22" size="1">
                     <bitfield caption="ADC10 Digital input Disable" mask="0x80" name="ADC10D"/>
@@ -571,8 +502,7 @@
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -633,8 +563,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -655,15 +584,12 @@
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10"
-                              name="OCIE0A"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08"
-                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
                     <bitfield caption="Timer/Counter0 Input Capture Interrupt Enable" mask="0x01" name="TICIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
@@ -684,10 +610,8 @@
                 </register>
                 <register caption="Timer/Counter0 High" name="TCNT0H" offset="0x34" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0 Low" name="TCNT0L" offset="0x52" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1" mask="0xFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -732,8 +656,7 @@
                     <bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES1"/>
                     <bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC1"/>
                     <bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF1"/>
-                    <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1"
-                              values="PULSE_WIDTH_MODU2"/>
+                    <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1" values="PULSE_WIDTH_MODU2"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register E" name="TCCR1E" offset="0x20" size="1">
                     <bitfield caption="Ouput Compare Override Enable Bits" mask="0x3F" name="OC1OE"/>
@@ -745,12 +668,9 @@
                 <register caption="Output compare register" name="OCR1C" offset="0x4B" size="1" mask="0xFF"/>
                 <register caption="Output compare register" name="OCR1D" offset="0x4A" size="1" mask="0xFF" ocd-rw="R"/>
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
-                    <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80"
-                              name="OCIE1D"/>
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40"
-                              name="OCIE1A"/>
-                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20"
-                              name="OCIE1B"/>
+                    <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80" name="OCIE1D"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+                    <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
                 </register>
                 <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
@@ -797,8 +717,7 @@
         </module>
         <module caption="Bootloader" name="BOOT_LOAD">
             <register-group caption="Bootloader" name="BOOT_LOAD">
-                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
-                          ocd-rw="R">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
                     <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
                     <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
                     <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
@@ -811,8 +730,7 @@
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
                     <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
-                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
-                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
                 </register>
                 <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
@@ -857,8 +775,7 @@
                     <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
                     <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
                     <bitfield caption="BOD Sleep Enable" mask="0x04" name="BODSE"/>
-                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
                     <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
@@ -866,14 +783,12 @@
                     <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
                     <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x48" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="PLL Control and status register" name="PLLCSR" offset="0x49" size="1">
                     <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY87.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY87.xml
index 07ddc04e..76a15dbb 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY87.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY87.xml
@@ -7,8 +7,7 @@
     <device name="ATtiny87" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x80"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -25,8 +24,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -36,8 +34,7 @@
         <peripherals>
             <module name="PORT">
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -50,8 +47,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -66,80 +62,67 @@
             </module>
             <module name="LINUART">
                 <instance name="LINUART" caption="Local Interconnect Network">
-                    <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
-                                    caption="Local Interconnect Network"/>
+                    <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data" caption="Local Interconnect Network"/>
                 </instance>
             </module>
             <module name="USI">
                 <instance name="USI" caption="Universal Serial Interface">
-                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
-                                    caption="Universal Serial Interface"/>
+                    <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
                 </instance>
             </module>
             <module name="TC8_ASYNC">
                 <instance name="TC0" caption="Timer/Counter, 8-bit Async">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit Async"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
                 </instance>
             </module>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                 </instance>
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                 </instance>
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                 </instance>
             </module>
             <module name="CURRENT_SOURCE">
                 <instance name="CURRENT_SOURCE" caption="Current Source">
-                    <register-group name="CURRENT_SOURCE" name-in-module="CURRENT_SOURCE" offset="0x00"
-                                    address-space="data" caption="Current Source"/>
+                    <register-group name="CURRENT_SOURCE" name-in-module="CURRENT_SOURCE" offset="0x00" address-space="data" caption="Current Source"/>
                 </instance>
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                 </instance>
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
                 <instance name="BOOT_LOAD" caption="Bootloader">
-                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
-                                    caption="Bootloader"/>
+                    <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
                 </instance>
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -153,8 +136,7 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
@@ -236,8 +218,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -298,8 +279,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -338,8 +318,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always ON" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -348,94 +327,50 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x00"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS"
-                       value="0x10"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS"
-                       value="0x20"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
-                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
-                       name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK 4 ms"
-                       name="EXTLOFXTAL_1KCK_4MS" value="0x04"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK + 64 ms"
-                       name="EXTLOFXTAL_1KCK_64MS" value="0x14"/>
-                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32768 CK + 64 ms"
-                       name="EXTLOFXTAL_32KCK_64MS" value="0x24"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
-                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
-                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
-                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms"
-                       name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
-                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms"
-                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
-                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms"
-                       name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
-                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms"
-                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
-                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_16MHZ_258CK_14CK_4MS1" value="0x0E"/>
-                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_16MHZ_258CK_14CK_65MS" value="0x1E"/>
-                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms"
-                       name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_0MS" value="0x2E"/>
-                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms"
-                       name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_4MS1" value="0x3E"/>
-                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms"
-                       name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_65MS" value="0x0F"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_0MS" value="0x1F"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_4MS1" value="0x2F"/>
-                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms"
-                       name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+                <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK 4 ms" name="EXTLOFXTAL_1KCK_4MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32768 CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS" value="0x24"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_16MHZ_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_16MHZ_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_65MS" value="0x3F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -563,12 +498,10 @@
         <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
             <register-group caption="Timer/Counter, 8-bit Async" name="TC0">
                 <register caption="Timer/Counter0 Interrupt Mask register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
                 </register>
@@ -581,8 +514,7 @@
                     <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT"/>
                 </register>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x47" size="1" mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x48" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x48" size="1" mask="0xFF"/>
                 <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
                     <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
                     <bitfield caption="Asynchronous Timer/Counter0" mask="0x20" name="AS0"/>
@@ -612,14 +544,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
                     <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
@@ -634,38 +563,26 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Timer/Counter1 Clock Select bits" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Timer/Counter1 Clock Select bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
                     <bitfield caption="Timer/Counter1 Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
                     <bitfield caption="Timer/Counter1 Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register D" name="TCCR1D" offset="0x83" size="1">
-                    <bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel B" mask="0x80"
-                              name="OC1BX"/>
-                    <bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel B" mask="0x40"
-                              name="OC1BW"/>
-                    <bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel B" mask="0x20"
-                              name="OC1BV"/>
-                    <bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel B" mask="0x10"
-                              name="OC1BU"/>
-                    <bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel A" mask="0x08"
-                              name="OC1AX"/>
-                    <bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel A" mask="0x04"
-                              name="OC1AW"/>
-                    <bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel A" mask="0x02"
-                              name="OC1AV"/>
-                    <bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel A" mask="0x01"
-                              name="OC1AU"/>
+                    <bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel B" mask="0x80" name="OC1BX"/>
+                    <bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel B" mask="0x40" name="OC1BW"/>
+                    <bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel B" mask="0x20" name="OC1BV"/>
+                    <bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel B" mask="0x10" name="OC1BU"/>
+                    <bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel A" mask="0x08" name="OC1AX"/>
+                    <bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel A" mask="0x04" name="OC1AW"/>
+                    <bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel A" mask="0x02" name="OC1AV"/>
+                    <bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel A" mask="0x01" name="OC1AU"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
             </register-group>
             <value-group caption="" name="CLK_SEL_3BIT_EXT">
                 <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
@@ -683,8 +600,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -757,24 +673,19 @@
                     <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
                 </register>
                 <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
-                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
-                          ocd-rw="R">
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
                     <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
                     <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
-                <register caption="The ADC Control and Status register B (Shared with ANALOG_COMPARATOR IO_MODULE)"
-                          name="ADCSRB" offset="0x7B" size="1">
+                <register caption="The ADC Control and Status register B (Shared with ANALOG_COMPARATOR IO_MODULE)" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER4"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER4"/>
                 </register>
-                <register caption="Analog Miscellaneous Control Register (Shared with CURRENT_SOURCE IO_MODULE)"
-                          name="AMISCR" offset="0x77" size="1">
+                <register caption="Analog Miscellaneous Control Register (Shared with CURRENT_SOURCE IO_MODULE)" name="AMISCR" offset="0x77" size="1">
                     <bitfield caption="External Voltage Reference Input Enable" mask="0x04" name="AREFEN"/>
                     <bitfield caption="Internal Voltage Reference Output Enable" mask="0x02" name="XREFEN"/>
                 </register>
@@ -795,14 +706,10 @@
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_ADC_V_REF8">
-                <value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference.  "
-                       name="VAL_0x00" value="0x00"/>
-                <value caption="If AREFEN==0 then Internal 1.1V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 1.1V as Voltage Reference with external capacitor at AREF pin."
-                       name="VAL_0x01" value="0x01"/>
-                <value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference.  "
-                       name="VAL_0x02" value="0x02"/>
-                <value caption="If AREFEN==0 then Internal 2.56V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 2.56V as Voltage Reference with external capacitor at AREF pin."
-                       name="VAL_0x03" value="0x03"/>
+                <value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference.  " name="VAL_0x00" value="0x00"/>
+                <value caption="If AREFEN==0 then Internal 1.1V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 1.1V as Voltage Reference with external capacitor at AREF pin." name="VAL_0x01" value="0x01"/>
+                <value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference.  " name="VAL_0x02" value="0x02"/>
+                <value caption="If AREFEN==0 then Internal 2.56V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 2.56V as Voltage Reference with external capacitor at AREF pin." name="VAL_0x03" value="0x03"/>
             </value-group>
             <value-group caption="" name="ANALOG_ADC_PRESCALER">
                 <value caption="2" name="VAL_0x00" value="0x00"/>
@@ -827,31 +734,25 @@
         </module>
         <module caption="Current Source" name="CURRENT_SOURCE">
             <register-group caption="Current Source" name="CURRENT_SOURCE">
-                <register caption="Analog Miscellaneous Control Register (Shared with AD_CONVERTER IO_MODULE)"
-                          name="AMISCR" offset="0x77" size="1">
+                <register caption="Analog Miscellaneous Control Register (Shared with AD_CONVERTER IO_MODULE)" name="AMISCR" offset="0x77" size="1">
                     <bitfield caption="Current Source Enable" mask="0x01" name="ISRCEN"/>
                 </register>
             </register-group>
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register
-                        caption="Analog Comparator &amp; ADC Control and Status Register B (Shared with AD_CONVERTER IO_MODULE)"
-                        name="ADCSRB" offset="0x7B" size="1">
+                <register caption="Analog Comparator &amp; ADC Control and Status Register B (Shared with AD_CONVERTER IO_MODULE)" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
-                    <bitfield caption="Analog Comparator Internal Voltage Reference Select Bits" mask="0x30"
-                              name="ACIR"/>
+                    <bitfield caption="Analog Comparator Internal Voltage Reference Select Bits" mask="0x30" name="ACIR"/>
                 </register>
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Internal Reference Select" mask="0x40" name="ACIRS"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
             </register-group>
             <value-group caption="" name="ANALOG_COMP_INTERRUPT">
@@ -864,10 +765,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -944,14 +843,12 @@
                     <bitfield caption="Sleep Mode Select Bits" mask="0x06" name="SM" values="CPU_SLEEP_MODE2"/>
                     <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
                 </register>
-                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Clock Selection Register" name="CLKSELR" offset="0x63" size="1">
                     <bitfield caption="Clock Out - CKOUT fuse substitution" mask="0x40" name="COUT"/>
@@ -961,8 +858,7 @@
                 <register caption="Clock Control &amp; Status Register" name="CLKCSR" offset="0x62" size="1">
                     <bitfield caption="Clock Control Change Enable" mask="0x80" name="CLKCCE"/>
                     <bitfield caption="Clock Ready Flag" mask="0x10" name="CLKRDY"/>
-                    <bitfield caption="Clock Control bits" mask="0x0F" name="CLKC"
-                              values="CPU_CLK_COMMAND_LIST_4_BITS"/>
+                    <bitfield caption="Clock Control bits" mask="0x0F" name="CLKC" values="CPU_CLK_COMMAND_LIST_4_BITS"/>
                 </register>
                 <register caption="DebugWire data register" name="DWDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
                 <register caption="General Purpose IO register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY88.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY88.xml
index 5fd82579..782967b5 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY88.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY88.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATtiny88-MMU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="QFN28" pinout="QFN28"/>
-        <variant ordercode="ATtiny88-MMH" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="QFN28" pinout="QFN28"/>
-        <variant ordercode="ATtiny88-PU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="PDIP28" pinout="PDIP28"/>
-        <variant ordercode="ATtiny88-AU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="TQFP32" pinout="TQFP_QFN_32"/>
-        <variant ordercode="ATtiny88-CCU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="UFBGA32" pinout="UFBGA32"/>
-        <variant ordercode="ATtiny88-MU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="QFN32" pinout="TQFP_QFN_32"/>
+        <variant ordercode="ATtiny88-MMU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="QFN28" pinout="QFN28"/>
+        <variant ordercode="ATtiny88-MMH" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="QFN28" pinout="QFN28"/>
+        <variant ordercode="ATtiny88-PU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="PDIP28" pinout="PDIP28"/>
+        <variant ordercode="ATtiny88-AU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="TQFP32" pinout="TQFP_QFN_32"/>
+        <variant ordercode="ATtiny88-CCU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="UFBGA32" pinout="UFBGA32"/>
+        <variant ordercode="ATtiny88-MU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="QFN32" pinout="TQFP_QFN_32"/>
     </variants>
     <device name="ATtiny88" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
         <address-spaces>
             <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
-                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
-                                pagesize="0x40"/>
+                <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
             </address-space>
             <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
                 <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,8 +28,7 @@
                 <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
             </address-space>
             <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="0x04"/>
+                <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
             </address-space>
             <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
             <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
@@ -46,8 +38,7 @@
         <peripherals>
             <module name="TC16">
                 <instance name="TC1" caption="Timer/Counter, 16-bit">
-                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 16-bit"/>
+                    <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
                     <signals>
                         <signal group="T" pad="PD5"/>
                         <signal group="ICP" pad="PB0"/>
@@ -58,8 +49,7 @@
             </module>
             <module name="AC">
                 <instance name="AC" caption="Analog Comparator">
-                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
-                                    caption="Analog Comparator"/>
+                    <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
                     <signals>
                         <signal group="AIN" index="0" pad="PD6"/>
                         <signal group="AIN" index="1" pad="PD7"/>
@@ -68,8 +58,7 @@
             </module>
             <module name="PORT">
                 <instance name="PORTB" caption="I/O Port">
-                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PB0" index="0"/>
                         <signal group="P" function="default" pad="PB1" index="1"/>
@@ -82,8 +71,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
-                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PD0" index="0"/>
                         <signal group="P" function="default" pad="PD1" index="1"/>
@@ -96,8 +84,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
-                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PC0" index="0"/>
                         <signal group="P" function="default" pad="PC1" index="1"/>
@@ -110,8 +97,7 @@
                     </signals>
                 </instance>
                 <instance name="PORTA" caption="I/O Port">
-                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
-                                    caption="I/O Port"/>
+                    <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
                     <signals>
                         <signal group="P" function="default" pad="PA0" index="0"/>
                         <signal group="P" function="default" pad="PA1" index="1"/>
@@ -122,8 +108,7 @@
             </module>
             <module name="SPI">
                 <instance name="SPI" caption="Serial Peripheral Interface">
-                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
-                                    caption="Serial Peripheral Interface"/>
+                    <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
                     <signals>
                         <signal group="SCK" pad="PB5"/>
                         <signal group="MISO" pad="PB4"/>
@@ -134,14 +119,12 @@
             </module>
             <module name="WDT">
                 <instance name="WDT" caption="Watchdog Timer">
-                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
-                                    caption="Watchdog Timer"/>
+                    <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
                 </instance>
             </module>
             <module name="TWI">
                 <instance name="TWI" caption="Two Wire Serial Interface">
-                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
-                                    caption="Two Wire Serial Interface"/>
+                    <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
                     <signals>
                         <signal group="SCL" pad="PC6"/>
                         <signal group="SDA" pad="PC5"/>
@@ -150,8 +133,7 @@
             </module>
             <module name="ADC">
                 <instance name="ADC" caption="Analog-to-Digital Converter">
-                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
-                                    caption="Analog-to-Digital Converter"/>
+                    <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
                     <signals>
                         <signal group="ADC" index="0" pad="PC0"/>
                         <signal group="ADC" index="1" pad="PC1"/>
@@ -166,8 +148,7 @@
             </module>
             <module name="EXINT">
                 <instance name="EXINT" caption="External Interrupts">
-                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
-                                    caption="External Interrupts"/>
+                    <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
                     <signals>
                         <signal group="PCINT" index="0" pad="PB0"/>
                         <signal group="PCINT" index="1" pad="PB1"/>
@@ -204,8 +185,7 @@
             </module>
             <module name="TC8">
                 <instance name="TC0" caption="Timer/Counter, 8-bit">
-                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
-                                    caption="Timer/Counter, 8-bit"/>
+                    <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
                     <signals>
                         <signal group="T" pad="PD4"/>
                     </signals>
@@ -213,8 +193,7 @@
             </module>
             <module name="CPU">
                 <instance name="CPU" caption="CPU Registers">
-                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
-                                    caption="CPU Registers"/>
+                    <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
                     <parameters>
                         <param name="CORE_VERSION" value="V2"/>
                         <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
@@ -223,8 +202,7 @@
             </module>
             <module name="EEPROM">
                 <instance name="EEPROM" caption="EEPROM">
-                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
-                                    caption="EEPROM"/>
+                    <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
                 </instance>
             </module>
             <module name="FUSE">
@@ -234,14 +212,12 @@
             </module>
             <module name="LOCKBIT">
                 <instance name="LOCKBIT" caption="Lockbits">
-                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
-                                    caption="Lockbits"/>
+                    <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
                 </instance>
             </module>
         </peripherals>
         <interrupts>
-            <interrupt index="0" name="RESET"
-                       caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+            <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
             <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
             <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
             <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
@@ -318,8 +294,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -380,8 +355,7 @@
                 <property name="IspReadOsccal_pollIndex" value="4"/>
             </property-group>
             <property-group name="PP_INTERFACE_STK600">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -407,8 +381,7 @@
                 <property name="PpProgramLock_pollTimeout" value="5"/>
             </property-group>
             <property-group name="PP_INTERFACE_AVRDRAGON">
-                <property name="PpControlStack"
-                          value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
                 <property name="PpEnterProgMode_stabDelay" value="100"/>
                 <property name="PpEnterProgMode_progModeDelay" value="0"/>
                 <property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -447,8 +420,7 @@
                     <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
                     <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
                     <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
-                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
-                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
                 </register>
                 <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
                     <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
@@ -457,24 +429,15 @@
                 </register>
             </register-group>
             <value-group caption="" name="ENUM_SUT_CKSEL">
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
-                       value="0x0C"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
-                       value="0x1C"/>
-                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
-                       value="0x2C"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x0E"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x1E"/>
-                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value"
-                       name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x2E"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x0F"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x1F"/>
-                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
-                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x2F"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x0C"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x1C"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x2C"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x0E"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x1E"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x2E"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x0F"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x1F"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x2F"/>
             </value-group>
             <value-group caption="" name="ENUM_BODLEVEL">
                 <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
@@ -499,14 +462,11 @@
             <register-group caption="Timer/Counter, 16-bit" name="TC1">
                 <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
                     <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
-                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
-                              name="OCIE1B"/>
-                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
-                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
                     <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
                 </register>
-                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
                     <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
                     <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
                     <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
@@ -521,20 +481,16 @@
                     <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
                     <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
                     <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
-                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
-                              values="CLK_SEL_3BIT_EXT"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
                     <bitfield caption="" mask="0x80" name="FOC1A"/>
                     <bitfield caption="" mask="0x40" name="FOC1B"/>
                 </register>
                 <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
-                          mask="0xFFFF"/>
-                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
-                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
                 <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
                     <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
                     <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
@@ -553,16 +509,14 @@
         </module>
         <module caption="Analog Comparator" name="AC">
             <register-group caption="Analog Comparator" name="AC">
-                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
-                          ocd-rw="R">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
                     <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
                     <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
                     <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
                     <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
                     <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
                     <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
-                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
-                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
@@ -594,8 +548,7 @@
             </register-group>
             <register-group caption="I/O Port" name="PORTA">
                 <register caption="Port A Data Register" name="PORTA" offset="0x2E" size="1" mask="0x0F" ocd-rw="R"/>
-                <register caption="Port A Data Direction Register" name="DDRA" offset="0x2D" size="1" mask="0x0F"
-                          ocd-rw="R"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x2D" size="1" mask="0x0F" ocd-rw="R"/>
                 <register caption="Port A Input Pins" name="PINA" offset="0x2C" size="1" mask="0x0F" ocd-rw="R"/>
             </register-group>
         </module>
@@ -633,8 +586,7 @@
                 <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
                     <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
                     <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
-                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
-                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
                     <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
                     <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
                 </register>
@@ -701,13 +653,11 @@
                     <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
                     <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
                     <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
-                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
-                              values="ANALOG_ADC_PRESCALER"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
                 </register>
                 <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
                     <bitfield caption="" mask="0x40" name="ACME"/>
-                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
-                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
                 </register>
                 <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
                     <bitfield caption="" mask="0x02" name="AIN1D"/>
@@ -752,10 +702,8 @@
         <module caption="External Interrupts" name="EXINT">
             <register-group caption="External Interrupts" name="EXINT">
                 <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
-                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
-                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
-                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
                 </register>
                 <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
                     <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
@@ -791,24 +739,19 @@
         </module>
         <module caption="Timer/Counter, 8-bit" name="TC8">
             <register-group caption="Timer/Counter, 8-bit" name="TC0">
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
-                          mask="0xFF"/>
-                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
-                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
                 <register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x45" size="1">
                     <bitfield caption="Clear Timer on Compare Match" mask="0x08" name="CTC0"/>
                     <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
                 </register>
                 <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
-                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
-                              name="OCIE0B"/>
-                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
-                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
                 </register>
-                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
-                          ocd-rw="R">
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
                     <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
                     <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
@@ -838,14 +781,12 @@
                     <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
                     <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
                 </register>
-                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
-                          ocd-rw="R">
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
                     <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
                 </register>
                 <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
                     <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
-                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
-                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
                 </register>
                 <register caption="Status Register" name="SREG" offset="0x5F" size="1">
                     <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A1.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A1.xml
index aa05532a..b7b7c16c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A1.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A1.xml
@@ -1,20 +1,15 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA128A1-AU" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATXMEGA128A1-CU" package="CBGA100" pinout="BGA100" speedmax="32000000" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA128A1-AU" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA128A1-CU" package="CBGA100" pinout="BGA100" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega128A1" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x0000" size="0x22000" endianness="little">
-                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x1000000" endianness="little">
                 <memory-segment start="0x0000" size="0x001000" type="io" rw="RW" exec="0" name="IO"/>
@@ -25,8 +20,7 @@
                 <!--                                external="true"/>-->
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -38,12 +32,10 @@
                 <memory-segment start="0x0000" size="1" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x34" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x34" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -129,12 +121,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077">
@@ -566,8 +556,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -698,16 +687,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -869,19 +855,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1103,8 +1084,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1113,8 +1093,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1611,10 +1590,8 @@
                     <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
                     <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
                     <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1889,8 +1866,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1966,8 +1942,7 @@
                 </register>
                 <register caption="SDRAM Control Register C" name="SDRAMCTRLC" offset="0x09" size="1">
                     <bitfield caption="SDRAM Write Recovery Delay" mask="0xC0" name="WRDLY" values="EBI_WRDLY"/>
-                    <bitfield caption="SDRAM Exit-Self-refresh-to-Active Delay" mask="0x38" name="ESRDLY"
-                              values="EBI_ESRDLY"/>
+                    <bitfield caption="SDRAM Exit-Self-refresh-to-Active Delay" mask="0x38" name="ESRDLY" values="EBI_ESRDLY"/>
                     <bitfield caption="SDRAM Row-to-Column Delay" mask="0x07" name="ROWCOLDLY" values="EBI_ROWCOLDLY"/>
                 </register>
                 <register-group caption="Chip Select 0" name="CS0" offset="0x10" name-in-module="EBI_CS"/>
@@ -2451,14 +2426,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2531,10 +2502,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2733,8 +2702,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2847,8 +2815,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A1U.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A1U.xml
index ffb117f1..e675417e 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A1U.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A1U.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega128A1U-AU" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128A1U-CU" package="BGA100" pinout="BGA100" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128A1U-C7U" package="BGA100" pinout="BGA100" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128A1U-AN" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A1U-AU" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A1U-CU" package="BGA100" pinout="BGA100" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A1U-C7U" package="BGA100" pinout="BGA100" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A1U-AN" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega128A1U" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x22000" endianness="little">
-                <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x1000000" endianness="little">
                 <memory-segment start="0x0000" size="0x001000" type="io" rw="RW" exec="0" name="IO"/>
@@ -29,8 +22,7 @@
                 <!--                                external="true"/>-->
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
-                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -42,12 +34,10 @@
                 <memory-segment start="0x0000" size="1" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -811,14 +801,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAAU">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I6570" version="XMEGAAU">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -974,8 +962,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -1129,8 +1116,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -1138,18 +1124,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -1317,12 +1300,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="EBI Output register" name="EBIOUT" offset="0x05" size="1">
                     <bitfield caption="EBI Chip Select Output" mask="0x03" name="EBICSOUT" values="PORTCFG_EBICSOUT"/>
@@ -1488,19 +1469,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1714,8 +1690,7 @@
                     <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1724,8 +1699,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1734,8 +1708,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -2014,12 +1987,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -2398,8 +2368,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2476,8 +2445,7 @@
                 </register>
                 <register caption="SDRAM Control Register C" name="SDRAMCTRLC" offset="0x09" size="1">
                     <bitfield caption="SDRAM Write Recovery Delay" mask="0xC0" name="WRDLY" values="EBI_WRDLY"/>
-                    <bitfield caption="SDRAM Exit-Self-refresh-to-Active Delay" mask="0x38" name="ESRDLY"
-                              values="EBI_ESRDLY"/>
+                    <bitfield caption="SDRAM Exit-Self-refresh-to-Active Delay" mask="0x38" name="ESRDLY" values="EBI_ESRDLY"/>
                     <bitfield caption="SDRAM Row-to-Column Delay" mask="0x07" name="ROWCOLDLY" values="EBI_ROWCOLDLY"/>
                 </register>
                 <register-group caption="Chip Select 0" name="CS0" offset="0x10" name-in-module="EBI_CS"/>
@@ -2897,8 +2865,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -3045,14 +3012,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -3125,10 +3088,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -3306,20 +3267,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -3493,8 +3448,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -3605,8 +3559,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3711,10 +3664,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3.xml
index 08d0cf00..1b88889e 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3.xml
@@ -1,20 +1,15 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA128A3-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATXMEGA128A3-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA128A3-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA128A3-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega128A3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x0000" size="0x22000" endianness="little">
-                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -22,8 +17,7 @@
                 <memory-segment start="0x2000" size="0x2000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,12 +29,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -126,12 +118,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077">
@@ -489,8 +479,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -620,16 +609,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -791,19 +777,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1025,8 +1006,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1035,8 +1015,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1532,10 +1511,8 @@
                     <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
                     <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
                     <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1810,8 +1787,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2208,14 +2184,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2288,10 +2260,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2490,8 +2460,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2604,8 +2573,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3U.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3U.xml
index daba68c9..3d54873c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3U.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3U.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega128A3U-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128A3U-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128A3U-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128A3U-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A3U-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A3U-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A3U-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A3U-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega128A3U" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x22000" endianness="little">
-                <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -26,8 +19,7 @@
                 <memory-segment start="0x2000" size="0x2000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
-                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,12 +31,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -677,14 +667,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAAU">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I6570" version="XMEGAAU">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -831,8 +819,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -985,8 +972,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -994,18 +980,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -1173,12 +1156,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
                     <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
@@ -1328,19 +1309,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1554,8 +1530,7 @@
                     <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1564,8 +1539,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1574,8 +1548,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1854,12 +1827,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -2238,8 +2208,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2553,8 +2522,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2701,14 +2669,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2781,10 +2745,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2962,20 +2924,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -3149,8 +3105,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -3261,8 +3216,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3367,10 +3321,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A4U.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A4U.xml
index 7e1efd0e..44f8a593 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A4U.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A4U.xml
@@ -1,26 +1,18 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega128A4U-AU" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128A4U-MH" package="VQFN44PW" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128A4U-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128A4U-AN" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128A4U-M7" package="VQFN44PW" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A4U-AU" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A4U-MH" package="VQFN44PW" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A4U-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A4U-AN" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A4U-M7" package="VQFN44PW" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega128A4U" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x22000" endianness="little">
-                <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x004000" endianness="little">
                 <memory-segment start="0x0000" size="0x001000" type="io" rw="RW" exec="0" name="IO"/>
@@ -28,8 +20,7 @@
                 <memory-segment start="0x2000" size="0x002000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
-                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,12 +32,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -521,14 +510,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAA4U">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I6570" version="XMEGAAU">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -663,8 +650,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -817,8 +803,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -826,18 +811,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -1005,12 +987,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
                     <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
@@ -1160,19 +1140,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1386,8 +1361,7 @@
                     <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1396,8 +1370,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1406,8 +1379,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1686,12 +1658,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -2070,8 +2039,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2385,8 +2353,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2533,14 +2500,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2613,10 +2576,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2794,20 +2755,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2981,8 +2936,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -3093,8 +3047,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3199,10 +3152,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B1.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B1.xml
index 9d780f66..3388dd3f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B1.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B1.xml
@@ -1,22 +1,16 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega128B1-AU" package="TQFP100" pinout="QFP_100" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128B1-CU" package="VFBGA100" pinout="BGA_100" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128B1-AN" package="TQFP100" pinout="QFP_100" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128B1-AU" package="TQFP100" pinout="QFP_100" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128B1-CU" package="VFBGA100" pinout="BGA_100" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128B1-AN" package="TQFP100" pinout="QFP_100" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega128B1" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x22000" endianness="little">
-                <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -24,8 +18,7 @@
                 <memory-segment start="0x2000" size="0x2000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
-                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -37,12 +30,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -567,14 +558,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAAU">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3600" version="XMEGAB">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -697,8 +686,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -794,8 +782,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -803,18 +790,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -1019,12 +1003,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
                     <bitfield caption="Event Output Select" mask="0x04" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
@@ -1150,19 +1132,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1295,8 +1272,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1532,16 +1508,11 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1833,8 +1804,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2148,8 +2118,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2296,14 +2265,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2376,10 +2341,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2549,20 +2512,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2732,8 +2689,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2844,8 +2800,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3056,10 +3011,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B3.xml
index 575389d1..274d24aa 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B3.xml
@@ -1,22 +1,16 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega128B3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128B3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128B3-MCU" package="DRQFN64" pinout="DRQFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128B3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128B3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128B3-MCU" package="DRQFN64" pinout="DRQFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega128B3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x22000" endianness="little">
-                <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -24,8 +18,7 @@
                 <memory-segment start="0x2000" size="0x2000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
-                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -37,12 +30,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -445,14 +436,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAAU">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3600" version="XMEGAB">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -568,8 +557,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -665,8 +653,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -674,18 +661,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -890,12 +874,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
                     <bitfield caption="Event Output Select" mask="0x04" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
@@ -1021,19 +1003,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1166,8 +1143,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1403,16 +1379,11 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1704,8 +1675,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2019,8 +1989,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2167,14 +2136,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2247,10 +2212,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2420,20 +2383,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2603,8 +2560,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2715,8 +2671,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -2927,10 +2882,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128C3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128C3.xml
index 68661550..9a3ccc3a 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128C3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128C3.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega128C3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128C3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128C3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128C3-M7" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128C3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128C3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128C3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128C3-M7" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega128C3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x22000" endianness="little">
-                <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -26,8 +19,7 @@
                 <memory-segment start="0x2000" size="0x2000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
-                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,12 +31,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -508,14 +498,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAD">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3610" version="XMEGAC">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -637,8 +625,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -772,8 +759,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -781,18 +767,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -951,8 +934,7 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
                     <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
@@ -1064,8 +1046,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1322,12 +1303,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1595,8 +1573,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1910,8 +1887,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2058,14 +2034,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2138,10 +2110,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2311,20 +2281,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2494,8 +2458,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2606,8 +2569,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -2704,10 +2666,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128D3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128D3.xml
index a4ae106c..e28f7df3 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128D3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128D3.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega128D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega128D3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x0000" size="0x22000" endianness="little">
-                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -26,8 +19,7 @@
                 <memory-segment start="0x2000" size="0x2000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,12 +31,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -138,12 +128,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077">
@@ -609,8 +597,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -722,16 +709,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -921,8 +905,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1388,16 +1371,11 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1577,8 +1555,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1777,8 +1754,7 @@
                     <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
                     <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
                 </register>
-                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
-                          size="1">
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E" size="1">
                     <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
                     <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
                     <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
@@ -1984,14 +1960,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2064,10 +2036,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2280,20 +2250,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2409,8 +2373,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2523,8 +2486,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128D4.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128D4.xml
index a49c0a3c..1661a595 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128D4.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128D4.xml
@@ -1,26 +1,18 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega128D4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128D4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128D4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128D4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega128D4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega128D4" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x22000" endianness="little">
-                <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -28,8 +20,7 @@
                 <memory-segment start="0x2000" size="0x2000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
-                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,12 +32,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -434,14 +423,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAD">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I6570" version="XMEGAD">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -557,8 +544,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -671,8 +657,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -680,18 +665,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -849,8 +831,7 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
                     <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
@@ -962,8 +943,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1219,16 +1199,11 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1503,8 +1478,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1688,8 +1662,7 @@
                     <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
                     <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
                 </register>
-                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
-                          size="1">
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E" size="1">
                     <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
                     <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
                     <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
@@ -1811,14 +1784,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -1891,10 +1860,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2064,20 +2031,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2246,8 +2207,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2358,8 +2318,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -2456,10 +2415,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4.xml
index bcd29a3e..d98081ad 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4.xml
@@ -1,20 +1,15 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA16A4-AU" package="TQFP44" speedmax="32000000" pinout="QFP_QFN_44" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATXMEGA16A4-MH" package="VQFN44" speedmax="32000000" pinout="QFP_QFN_44" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA16A4-AU" package="TQFP44" speedmax="32000000" pinout="QFP_QFN_44" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA16A4-MH" package="VQFN44" speedmax="32000000" pinout="QFP_QFN_44" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega16A4" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x0000" size="0x5000" endianness="little">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x4000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x4000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x2800" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -22,8 +17,7 @@
                 <memory-segment start="0x2000" size="0x0800" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,12 +29,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -126,12 +118,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077">
@@ -427,8 +417,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -558,16 +547,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -729,19 +715,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -963,8 +944,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -973,8 +953,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1466,10 +1445,8 @@
                     <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
                     <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
                     <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1748,8 +1725,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2146,14 +2122,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2226,10 +2198,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2428,8 +2398,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2542,8 +2511,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4U.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4U.xml
index 1eb44091..0eb7f19b 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4U.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4U.xml
@@ -1,26 +1,18 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega16A4U-AU" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16A4U-MH" package="VQFN44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16A4U-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16A4U-AN" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16A4U-M7" package="VQFN44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16A4U-AU" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16A4U-MH" package="VQFN44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16A4U-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16A4U-AN" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16A4U-M7" package="VQFN44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega16A4U" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x5000" endianness="little">
-                <memory-segment start="0x00000" size="0x4000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x03000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x04000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x00000" size="0x4000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x03000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x04000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x2800" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -28,8 +20,7 @@
                 <memory-segment start="0x2000" size="0x0800" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0400">
-                <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,12 +32,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -521,14 +510,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAA4U">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I6570" version="XMEGAAU">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -663,8 +650,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -817,8 +803,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -826,18 +811,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -1005,12 +987,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
                     <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
@@ -1160,19 +1140,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1385,8 +1360,7 @@
                     <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1395,8 +1369,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1405,8 +1378,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1685,12 +1657,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -2060,8 +2029,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2375,8 +2343,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2523,14 +2490,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2603,10 +2566,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2784,20 +2745,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2971,8 +2926,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -3083,8 +3037,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3189,10 +3142,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16C4.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16C4.xml
index 5371664a..269f2798 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16C4.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16C4.xml
@@ -1,26 +1,18 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega16C4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16C4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16C4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16C4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16C4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16C4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16C4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16C4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16C4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16C4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega16C4" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x5000" endianness="little">
-                <memory-segment start="0x00000" size="0x4000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x03000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x04000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x00000" size="0x4000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x03000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x04000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x2800" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -28,8 +20,7 @@
                 <memory-segment start="0x2000" size="0x0800" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0400">
-                <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,12 +32,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -451,14 +440,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAD">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3610" version="XMEGAC">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -576,8 +563,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -711,8 +697,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -720,18 +705,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -890,8 +872,7 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
                     <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
@@ -1003,8 +984,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1261,16 +1241,11 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1551,8 +1526,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1866,8 +1840,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2014,14 +1987,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2094,10 +2063,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2267,20 +2234,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2450,8 +2411,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2562,8 +2522,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -2660,10 +2619,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16D4.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16D4.xml
index 8e36a4a6..8c4a992d 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16D4.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16D4.xml
@@ -1,26 +1,18 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega16D4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16D4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16D4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16D4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16D4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16D4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16D4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16D4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16D4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16D4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega16D4" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x0000" size="0x5000" endianness="little">
-                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x4000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x4000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x2800" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -28,8 +20,7 @@
                 <memory-segment start="0x2000" size="0x0800" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,12 +32,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -142,12 +131,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077">
@@ -519,8 +506,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -632,16 +618,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -831,8 +814,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1298,12 +1280,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1499,8 +1478,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1699,8 +1677,7 @@
                     <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
                     <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
                 </register>
-                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
-                          size="1">
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E" size="1">
                     <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
                     <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
                     <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
@@ -1906,14 +1883,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -1986,10 +1959,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2202,20 +2173,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2331,8 +2296,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2445,8 +2409,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16E5.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16E5.xml
index a48d1dd2..3b4432f3 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16E5.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16E5.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega16E5-AU" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16E5-MU" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16E5-M4U" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16E5-AN" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16E5-MN" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega16E5-M4N" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16E5-AU" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16E5-MU" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16E5-M4U" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16E5-AN" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16E5-MN" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16E5-M4N" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega16E5" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x5000" endianness="little">
-                <memory-segment start="0x00000" size="0x4000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="128"/>
-                <memory-segment start="0x03000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="128"/>
-                <memory-segment start="0x04000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="128"/>
+                <memory-segment start="0x00000" size="0x4000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="128"/>
+                <memory-segment start="0x03000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="128"/>
+                <memory-segment start="0x04000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="128"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x2800" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -30,8 +21,7 @@
                 <memory-segment start="0x2000" size="0x0800" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0200">
-                <memory-segment start="0x00000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,12 +33,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0080">
-                <memory-segment start="0x0000" size="0x0080" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="128"/>
+                <memory-segment start="0x0000" size="0x0080" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="128"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0036">
-                <memory-segment start="0x0000" size="0x0036" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="128"/>
+                <memory-segment start="0x0000" size="0x0036" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="128"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -427,14 +415,12 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3620" version="XMEGAE">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -551,8 +537,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -667,8 +652,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -676,19 +660,16 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
                 </register>
-                <register caption="Internal 8 MHz RC Oscillator Calibration Register" name="RC8MCAL" offset="0x07"
-                          size="1">
+                <register caption="Internal 8 MHz RC Oscillator Calibration Register" name="RC8MCAL" offset="0x07" size="1">
                     <bitfield caption="Calibration Bits" mask="0xFF" name="RC8MCAL"/>
                 </register>
             </register-group>
@@ -841,8 +822,7 @@
             <register-group caption="I/O port Configuration" name="PORTCFG" size="8">
                 <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
                 <register caption="Clock Out Register" name="CLKOUT" offset="0x04" size="1">
-                    <bitfield caption="Clock and Event Output Pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Clock and Event Output Pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                     <bitfield caption="RTC Clock Output Enable" mask="0x60" name="RTCOUT" values="PORTCFG_RTCCLKOUT"/>
                     <bitfield caption="Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
@@ -851,8 +831,7 @@
                     <bitfield caption="Analog Comparator Output Port" mask="0xC0" name="ACOUT" values="PORTCFG_ACOUT"/>
                     <bitfield caption="Event Channel Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="Asynchronous Event Enabled" mask="0x08" name="EVASYEN"/>
-                    <bitfield caption="Event Channel Output Selection" mask="0x07" name="EVOUTSEL"
-                              values="PORTCFG_EVOUTSEL"/>
+                    <bitfield caption="Event Channel Output Selection" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
                 </register>
                 <register caption="Slew Rate Limit Control Register" name="SRLCTRL" offset="0x07" size="1">
                     <bitfield caption="Slew Rate Limit Enable on PORTA" mask="0x01" name="SRLENRA"/>
@@ -986,54 +965,35 @@
                     <bitfield caption="Channel Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Channel Transaction Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Channel Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Channel Transaction Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="EDMA_CH_INTLVL"/>
-                    <bitfield caption="Channel Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="EDMA_CH_INTLVL"/>
+                    <bitfield caption="Channel Transaction Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="EDMA_CH_INTLVL"/>
+                    <bitfield caption="Channel Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="EDMA_CH_INTLVL"/>
                 </register>
-                <register
-                        caption="Memory Address Control for Peripheral Ch., or Source Address Control for Standard Ch."
-                        name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield
-                            caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch."
-                            mask="0x30" name="RELOAD" values="EDMA_CH_RELOAD"/>
-                    <bitfield caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch."
-                              mask="0x07" name="DIR" values="EDMA_CH_DIR"/>
+                <register caption="Memory Address Control for Peripheral Ch., or Source Address Control for Standard Ch." name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch." mask="0x30" name="RELOAD" values="EDMA_CH_RELOAD"/>
+                    <bitfield caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch." mask="0x07" name="DIR" values="EDMA_CH_DIR"/>
                 </register>
-                <register caption="Destination Address Control for Standard Channels Only." name="DESTADDRCTRL"
-                          offset="0x03" size="1">
-                    <bitfield caption="Destination Address Reload for Standard Channels Only." mask="0x30"
-                              name="DESTRELOAD" values="EDMA_CH_RELOAD"/>
-                    <bitfield caption="Destination Address Mode for Standard Channels Only." mask="0x07" name="DESTDIR"
-                              values="EDMA_CH_DESTDIR"/>
+                <register caption="Destination Address Control for Standard Channels Only." name="DESTADDRCTRL" offset="0x03" size="1">
+                    <bitfield caption="Destination Address Reload for Standard Channels Only." mask="0x30" name="DESTRELOAD" values="EDMA_CH_RELOAD"/>
+                    <bitfield caption="Destination Address Mode for Standard Channels Only." mask="0x07" name="DESTDIR" values="EDMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x04" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="EDMA_CH_TRIGSRC"/>
                 </register>
-                <register
-                        caption="Channel Block Transfer Count for Peripheral Ch., or Channel Block Transfer Count Low for Standard Ch."
-                        name="TRFCNT" offset="0x06" size="2"/>
-                <register
-                        caption="Channel Memory Address for Peripheral Ch., or Channel Source Address Low for Standard Ch."
-                        name="ADDR" offset="0x08" size="2"/>
-                <register caption="Channel Destination Address for Standard Channels Only." name="DESTADDR"
-                          offset="0x0C" size="2"/>
+                <register caption="Channel Block Transfer Count for Peripheral Ch., or Channel Block Transfer Count Low for Standard Ch." name="TRFCNT" offset="0x06" size="2"/>
+                <register caption="Channel Memory Address for Peripheral Ch., or Channel Source Address Low for Standard Ch." name="ADDR" offset="0x08" size="2"/>
+                <register caption="Channel Destination Address for Standard Channels Only." name="DESTADDR" offset="0x0C" size="2"/>
             </register-group>
             <value-group caption="Channel mode" name="EDMA_CHMODE">
                 <value caption="Channels 0, 1, 2 and 3 in peripheal conf." name="PER0123" value="0x00"/>
-                <value caption="Channel 0 in standard conf.; channels 2 and 3 in peripheral conf." name="STD0"
-                       value="0x01"/>
-                <value caption="Channel 2 in standard conf.; channels 0 and 1 in peripheral conf." name="STD2"
-                       value="0x02"/>
+                <value caption="Channel 0 in standard conf.; channels 2 and 3 in peripheral conf." name="STD0" value="0x01"/>
+                <value caption="Channel 2 in standard conf.; channels 0 and 1 in peripheral conf." name="STD2" value="0x02"/>
                 <value caption="Channels 0 and 2 in standard conf." name="STD02" value="0x03"/>
             </value-group>
             <value-group caption="Double buffer mode" name="EDMA_DBUFMODE">
                 <value caption="No double buffer enabled" name="DISABLE" value="0x00"/>
-                <value caption="Double buffer enabled on peripheral channels 0/1 (if exist) " name="BUF01"
-                       value="0x01"/>
+                <value caption="Double buffer enabled on peripheral channels 0/1 (if exist) " name="BUF01" value="0x01"/>
                 <value caption="Double buffer enabled on peripheral channels 2/3 (if exist)" name="BUF23" value="0x02"/>
-                <value caption="Double buffer enabled on peripheral channels 0/1 and 2/3 or standard channels 0/2"
-                       name="BUF0123" value="0x03"/>
+                <value caption="Double buffer enabled on peripheral channels 0/1 and 2/3 or standard channels 0/2" name="BUF0123" value="0x03"/>
             </value-group>
             <value-group caption="Priority mode" name="EDMA_PRIMODE">
                 <value caption="Round robin on all channels" name="RR0123" value="0x00"/>
@@ -1041,23 +1001,18 @@
                 <value caption="Ch0 &gt; Ch 1 &gt; round robin (Ch2 Ch3)" name="RR23" value="0x02"/>
                 <value caption="Ch0 &gt; Ch1 &gt; Ch2 &gt; Ch3 " name="CH0123" value="0x03"/>
             </value-group>
-            <value-group caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch."
-                         name="EDMA_CH_RELOAD">
+            <value-group caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch." name="EDMA_CH_RELOAD">
                 <value caption="No reload" name="NONE" value="0x00"/>
                 <value caption="Reload at end of each block transfer" name="BLOCK" value="0x01"/>
                 <value caption="Reload at end of each burst transfer" name="BURST" value="0x02"/>
                 <value caption="Reload at end of each transaction" name="TRANSACTION" value="0x03"/>
             </value-group>
-            <value-group caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch."
-                         name="EDMA_CH_DIR">
+            <value-group caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch." name="EDMA_CH_DIR">
                 <value caption="Fixed" name="FIXED" value="0x00"/>
                 <value caption="Increment" name="INC" value="0x01"/>
-                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'mask-match' (data: ADDRL, mask: ADDRH), else reserved conf. "
-                       name="MP1" value="0x04"/>
-                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'OR-match' (data-1: ADDRL OR data-2: ADDRH), else reserved conf. "
-                       name="MP2" value="0x05"/>
-                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 2-byte 'match' (data-1: ADDRL followed by data-2: ADDRH), else reserved conf. "
-                       name="MP3" value="0x06"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'mask-match' (data: ADDRL, mask: ADDRH), else reserved conf. " name="MP1" value="0x04"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'OR-match' (data-1: ADDRL OR data-2: ADDRH), else reserved conf. " name="MP2" value="0x05"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 2-byte 'match' (data-1: ADDRL followed by data-2: ADDRH), else reserved conf. " name="MP3" value="0x06"/>
             </value-group>
             <value-group caption="Destination addressing mode" name="EDMA_CH_DESTDIR">
                 <value caption="Fixed" name="FIXED" value="0x00"/>
@@ -1074,37 +1029,24 @@
                 <value caption="ADCA CH0 as trigger" name="ADCA_CH0" value="0x10"/>
                 <value caption="DACA CH0 as trigger" name="DACA_CH0" value="0x15"/>
                 <value caption="DACA CH1 as trigger" name="DACA_CH1" value="0x16"/>
-                <value caption="TCC4 overflow/underflow as trigger (Standard Channels Only)" name="TCC4_OVF"
-                       value="0x40"/>
+                <value caption="TCC4 overflow/underflow as trigger (Standard Channels Only)" name="TCC4_OVF" value="0x40"/>
                 <value caption="TCC4 error as trigger (Standard Channels Only)" name="TCC4_ERR" value="0x41"/>
-                <value caption="TCC4 compare or capture channel A as trigger (Standard Channels Only)" name="TCC4_CCA"
-                       value="0x42"/>
-                <value caption="TCC4 compare or capture channel B as trigger (Standard Channels Only)" name="TCC4_CCB"
-                       value="0x43"/>
-                <value caption="TCC4 compare or capture channel C as trigger (Standard Channels Only)" name="TCC4_CCC"
-                       value="0x44"/>
-                <value caption="TCC4 compare or capture channel D as trigger (Standard Channels Only)" name="TCC4_CCD"
-                       value="0x45"/>
-                <value caption="TCC5 overflow/underflow as trigger (Standard Channels Only)" name="TCC5_OVF"
-                       value="0x46"/>
+                <value caption="TCC4 compare or capture channel A as trigger (Standard Channels Only)" name="TCC4_CCA" value="0x42"/>
+                <value caption="TCC4 compare or capture channel B as trigger (Standard Channels Only)" name="TCC4_CCB" value="0x43"/>
+                <value caption="TCC4 compare or capture channel C as trigger (Standard Channels Only)" name="TCC4_CCC" value="0x44"/>
+                <value caption="TCC4 compare or capture channel D as trigger (Standard Channels Only)" name="TCC4_CCD" value="0x45"/>
+                <value caption="TCC5 overflow/underflow as trigger (Standard Channels Only)" name="TCC5_OVF" value="0x46"/>
                 <value caption="TCC5 error as trigger (Standard Channels Only)" name="TCC5_ERR" value="0x47"/>
-                <value caption="TCC5 compare or capture channel A as trigger (Standard Channels Only)" name="TCC5_CCA"
-                       value="0x48"/>
-                <value caption="TCC5 compare or capture channel B as trigger (Standard Channels Only)" name="TCC5_CCB"
-                       value="0x49"/>
-                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C receive complete as trigger (SPI Buffer Modes)"
-                       name="SPIC_RXC" value="0x4A"/>
-                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C data register empty as trigger (SPI Buffer modes)"
-                       name="SPIC_DRE" value="0x4B"/>
+                <value caption="TCC5 compare or capture channel A as trigger (Standard Channels Only)" name="TCC5_CCA" value="0x48"/>
+                <value caption="TCC5 compare or capture channel B as trigger (Standard Channels Only)" name="TCC5_CCB" value="0x49"/>
+                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C receive complete as trigger (SPI Buffer Modes)" name="SPIC_RXC" value="0x4A"/>
+                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C data register empty as trigger (SPI Buffer modes)" name="SPIC_DRE" value="0x4B"/>
                 <value caption="USART C0 receive complete as trigger" name="USARTC0_RXC" value="0x4C"/>
                 <value caption="USART C0 data register empty as trigger" name="USARTC0_DRE" value="0x4D"/>
-                <value caption="TCD5 overflow/underflow as trigger (Standard Channels Only)" name="TCD5_OVF"
-                       value="0x66"/>
+                <value caption="TCD5 overflow/underflow as trigger (Standard Channels Only)" name="TCD5_OVF" value="0x66"/>
                 <value caption="TCD5 error as trigger (Standard Channels Only)" name="TCD5_ERR" value="0x67"/>
-                <value caption="TCD5 compare or capture channel A as trigger (Standard Channels Only)" name="TCD5_CCA"
-                       value="0x68"/>
-                <value caption="TCD5 compare or capture channel B as trigger (Standard Channels Only)" name="TCD5_CCB"
-                       value="0x69"/>
+                <value caption="TCD5 compare or capture channel A as trigger (Standard Channels Only)" name="TCD5_CCA" value="0x68"/>
+                <value caption="TCD5 compare or capture channel B as trigger (Standard Channels Only)" name="TCD5_CCB" value="0x69"/>
                 <value caption="USART D0 receive complete as trigger" name="USARTD0_RXC" value="0x6C"/>
                 <value caption="USART D0 data register empty as trigger" name="USARTD0_DRE" value="0x6D"/>
             </value-group>
@@ -1149,8 +1091,7 @@
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
                     <bitfield caption="Rotary Decoder Enable" mask="0x80" name="ROTARY"/>
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1402,12 +1343,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC Input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC Input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC Input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC Input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC Input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC Input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1786,8 +1724,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1869,10 +1806,8 @@
                 </register>
                 <register caption="Control Register G" name="CTRLG" offset="0x06" size="1">
                     <bitfield caption="Event Action Enable" mask="0x80" name="EVACTEN"/>
-                    <bitfield caption="Event Action Selection on Timer/Counter 1" mask="0x60" name="EVACT1"
-                              values="XCL_EVACT"/>
-                    <bitfield caption="Event Action Selection on Timer/Counter 0" mask="0x18" name="EVACT0"
-                              values="XCL_EVACT"/>
+                    <bitfield caption="Event Action Selection on Timer/Counter 1" mask="0x60" name="EVACT1" values="XCL_EVACT"/>
+                    <bitfield caption="Event Action Selection on Timer/Counter 0" mask="0x18" name="EVACT0" values="XCL_EVACT"/>
                     <bitfield caption="Event Source Selection" mask="0x07" name="EVSRC" values="XCL_EVSRC"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x07" size="1">
@@ -1884,10 +1819,8 @@
                     <bitfield caption="Compare Or Capture 1 Interrupt Enable" mask="0x20" name="CC1IE"/>
                     <bitfield caption="Peripheral Low Counter 2 Interrupt Enable" mask="0x20" name="PEC20IE"/>
                     <bitfield caption="Compare Or Capture 0 Interrupt Enable" mask="0x10" name="CC0IE"/>
-                    <bitfield caption="Timer Underflow Interrupt Level" mask="0x0C" name="UNFINTLVL"
-                              values="XCL_UNF_INTLVL"/>
-                    <bitfield caption="Timer Compare or Capture Interrupt Level" mask="0x03" name="CCINTLVL"
-                              values="XCL_CC_INTLVL"/>
+                    <bitfield caption="Timer Underflow Interrupt Level" mask="0x0C" name="UNFINTLVL" values="XCL_UNF_INTLVL"/>
+                    <bitfield caption="Timer Compare or Capture Interrupt Level" mask="0x03" name="CCINTLVL" values="XCL_CC_INTLVL"/>
                 </register>
                 <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x08" size="1">
                     <bitfield caption="Timer/Counter 1 Underflow Interrupt Flag" mask="0x80" name="UNF1IF"/>
@@ -1997,13 +1930,10 @@
                 <value caption="16-bit timer/counter" name="TC16" value="0x00"/>
                 <value caption="One 8-bit timer/counter" name="BTC0" value="0x01"/>
                 <value caption="Two 8-bit timer/counters" name="BTC01" value="0x02"/>
-                <value caption="One 8-bit timer/counter and one 8-bit peripheral transmitter counter" name="BTC0PEC1"
-                       value="0x03"/>
-                <value caption="One 8-bit timer/counter and one 8-bit peripheral receiver counter" name="PEC0BTC1"
-                       value="0x04"/>
+                <value caption="One 8-bit timer/counter and one 8-bit peripheral transmitter counter" name="BTC0PEC1" value="0x03"/>
+                <value caption="One 8-bit timer/counter and one 8-bit peripheral receiver counter" name="PEC0BTC1" value="0x04"/>
                 <value caption="Two 8-bit peripheral counters" name="PEC01" value="0x05"/>
-                <value caption="One 8-bit timer/counter and two 4-bit peripheral counters" name="BTC0PEC2"
-                       value="0x06"/>
+                <value caption="One 8-bit timer/counter and two 4-bit peripheral counters" name="BTC0PEC2" value="0x06"/>
             </value-group>
             <value-group caption="Timer/Counter Mode" name="XCL_TCMODE">
                 <value caption="Normal mode with compare/period" name="NORMAL" value="0x00"/>
@@ -2066,8 +1996,7 @@
                 </register>
                 <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
                 <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
-                <register-group caption="TWI SMBUS timeout module" name="TIMEOUT" offset="0x000E"
-                                name-in-module="TWI_TIMEOUT"/>
+                <register-group caption="TWI SMBUS timeout module" name="TIMEOUT" offset="0x000E" name-in-module="TWI_TIMEOUT"/>
             </register-group>
             <register-group caption="" name="TWI_MASTER" size="7">
                 <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
@@ -2143,10 +2072,8 @@
                     <bitfield caption="Slave Ttimeout Interrupt Flag" mask="0x10" name="TTOUTSIF"/>
                 </register>
                 <register caption="Timeout Configuration Register" name="TOCONF" offset="0x01" size="1">
-                    <bitfield caption="Master Ttimeout Select" mask="0x07" name="TTOUTMSEL"
-                              values="TWI_MASTER_TTIMEOUT"/>
-                    <bitfield caption="Master/Slave Timeout Select" mask="0x18" name="TMSEXTSEL"
-                              values="TWI_MASTER_TMSEXT"/>
+                    <bitfield caption="Master Ttimeout Select" mask="0x07" name="TTOUTMSEL" values="TWI_MASTER_TTIMEOUT"/>
+                    <bitfield caption="Master/Slave Timeout Select" mask="0x18" name="TMSEXTSEL" values="TWI_MASTER_TMSEXT"/>
                     <bitfield caption="Slave Ttimeout Select" mask="0xE0" name="TTOUTSSEL" values="TWI_SLAVE_TTIMEOUT"/>
                 </register>
             </register-group>
@@ -2360,58 +2287,35 @@
                     <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC45_EVSEL"/>
                 </register>
                 <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
-                    <bitfield caption="Channel D Compare or Capture Mode" mask="0xC0" name="CCDMODE"
-                              values="TC45_CCDMODE"/>
-                    <bitfield caption="Channel C Compare or Capture Mode" mask="0x30" name="CCCMODE"
-                              values="TC45_CCCMODE"/>
-                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE"
-                              values="TC45_CCBMODE"/>
-                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE"
-                              values="TC45_CCAMODE"/>
-                    <bitfield caption="Channel Low D Compare or Capture Mode" mask="0xC0" name="LCCDMODE"
-                              values="TC45_LCCDMODE"/>
-                    <bitfield caption="Channel Low C Compare or Capture Mode" mask="0x30" name="LCCCMODE"
-                              values="TC45_LCCCMODE"/>
-                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE"
-                              values="TC45_LCCBMODE"/>
-                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE"
-                              values="TC45_LCCAMODE"/>
+                    <bitfield caption="Channel D Compare or Capture Mode" mask="0xC0" name="CCDMODE" values="TC45_CCDMODE"/>
+                    <bitfield caption="Channel C Compare or Capture Mode" mask="0x30" name="CCCMODE" values="TC45_CCCMODE"/>
+                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE" values="TC45_CCBMODE"/>
+                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE" values="TC45_CCAMODE"/>
+                    <bitfield caption="Channel Low D Compare or Capture Mode" mask="0xC0" name="LCCDMODE" values="TC45_LCCDMODE"/>
+                    <bitfield caption="Channel Low C Compare or Capture Mode" mask="0x30" name="LCCCMODE" values="TC45_LCCCMODE"/>
+                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE" values="TC45_LCCBMODE"/>
+                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE" values="TC45_LCCAMODE"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x05" size="1">
-                    <bitfield caption="Channel High D Compare or Capture Mode" mask="0xC0" name="HCCDMODE"
-                              values="TC45_HCCDMODE"/>
-                    <bitfield caption="Channel High C Compare or Capture Mode" mask="0x30" name="HCCCMODE"
-                              values="TC45_HCCCMODE"/>
-                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE"
-                              values="TC45_HCCBMODE"/>
-                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE"
-                              values="TC45_HCCAMODE"/>
+                    <bitfield caption="Channel High D Compare or Capture Mode" mask="0xC0" name="HCCDMODE" values="TC45_HCCDMODE"/>
+                    <bitfield caption="Channel High C Compare or Capture Mode" mask="0x30" name="HCCCMODE" values="TC45_HCCCMODE"/>
+                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE" values="TC45_HCCBMODE"/>
+                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE" values="TC45_HCCAMODE"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL"
-                              values="TC45_TRGINTLVL"/>
-                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="TC45_ERRINTLVL"/>
-                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL"
-                              values="TC45_OVFINTLVL"/>
+                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL" values="TC45_TRGINTLVL"/>
+                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC45_ERRINTLVL"/>
+                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="TC45_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Channel D Compare or Capture Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC45_CCDINTLVL"/>
-                    <bitfield caption="Channel C Compare or Capture Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC45_CCCINTLVL"/>
-                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC45_CCBINTLVL"/>
-                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC45_CCAINTLVL"/>
-                    <bitfield caption="Channel Low D Compare or Capture Interrupt Level" mask="0xC0" name="LCCDINTLVL"
-                              values="TC45_LCCDINTLVL"/>
-                    <bitfield caption="Channel Low C Compare or Capture Interrupt Level" mask="0x30" name="LCCCINTLVL"
-                              values="TC45_LCCCINTLVL"/>
-                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL"
-                              values="TC45_LCCBINTLVL"/>
-                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL"
-                              values="TC45_LCCAINTLVL"/>
+                    <bitfield caption="Channel D Compare or Capture Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC45_CCDINTLVL"/>
+                    <bitfield caption="Channel C Compare or Capture Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC45_CCCINTLVL"/>
+                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC45_CCBINTLVL"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC45_CCAINTLVL"/>
+                    <bitfield caption="Channel Low D Compare or Capture Interrupt Level" mask="0xC0" name="LCCDINTLVL" values="TC45_LCCDINTLVL"/>
+                    <bitfield caption="Channel Low C Compare or Capture Interrupt Level" mask="0x30" name="LCCCINTLVL" values="TC45_LCCCINTLVL"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL" values="TC45_LCCBINTLVL"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL" values="TC45_LCCAINTLVL"/>
                 </register>
                 <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x08" size="1">
                     <bitfield caption="Timer/Counter Stop" mask="0x20" name="STOP"/>
@@ -2503,38 +2407,25 @@
                     <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC45_EVSEL"/>
                 </register>
                 <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
-                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE"
-                              values="TC45_CCBMODE"/>
-                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE"
-                              values="TC45_CCAMODE"/>
-                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE"
-                              values="TC45_LCCBMODE"/>
-                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE"
-                              values="TC45_LCCAMODE"/>
+                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE" values="TC45_CCBMODE"/>
+                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE" values="TC45_CCAMODE"/>
+                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE" values="TC45_LCCBMODE"/>
+                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE" values="TC45_LCCAMODE"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x05" size="1">
-                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE"
-                              values="TC45_HCCBMODE"/>
-                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE"
-                              values="TC45_HCCAMODE"/>
+                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE" values="TC45_HCCBMODE"/>
+                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE" values="TC45_HCCAMODE"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL"
-                              values="TC45_TRGINTLVL"/>
-                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="TC45_ERRINTLVL"/>
-                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL"
-                              values="TC45_OVFINTLVL"/>
+                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL" values="TC45_TRGINTLVL"/>
+                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC45_ERRINTLVL"/>
+                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="TC45_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC45_CCBINTLVL"/>
-                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC45_CCAINTLVL"/>
-                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL"
-                              values="TC45_LCCBINTLVL"/>
-                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL"
-                              values="TC45_LCCAINTLVL"/>
+                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC45_CCBINTLVL"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC45_CCAINTLVL"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL" values="TC45_LCCBINTLVL"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL" values="TC45_LCCAINTLVL"/>
                 </register>
                 <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x08" size="1">
                     <bitfield caption="Timer/Counter Stop" mask="0x20" name="STOP"/>
@@ -2906,8 +2797,7 @@
                     <bitfield caption="Dead-Time Insertion Generator 1 Enable" mask="0x02" name="DTI1EN"/>
                     <bitfield caption="Dead-Time Insertion Generator 0 Enable" mask="0x01" name="DTI0EN"/>
                 </register>
-                <register caption="Dead-time Concurrent Write to Both Sides Register" name="DTBOTH" offset="0x01"
-                          size="1"/>
+                <register caption="Dead-time Concurrent Write to Both Sides Register" name="DTBOTH" offset="0x01" size="1"/>
                 <register caption="Dead-time Low Side Register" name="DTLS" offset="0x02" size="1"/>
                 <register caption="Dead-time High Side Register" name="DTHS" offset="0x03" size="1"/>
                 <register caption="Status Clear Register" name="STATUSCLR" offset="0x04" size="1">
@@ -2985,8 +2875,7 @@
                     <bitfield caption="Data Reception Interrupt Enable" mask="0x40" name="DRIE"/>
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x03" size="1">
                     <bitfield caption="One Wire Mode" mask="0x80" name="ONEWIRE"/>
@@ -3006,8 +2895,7 @@
                 <register caption="Control Register D" name="CTRLD" offset="0x05" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="DECTYPE" values="USART_DECTYPE"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="LUTACT" values="USART_LUTACT"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="PECACT"
-                              values="USART_PECACT"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="PECACT" values="USART_PECACT"/>
                 </register>
                 <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
                     <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
@@ -3062,8 +2950,7 @@
             <value-group caption="Encoding and Decoding Type" name="USART_DECTYPE">
                 <value caption="DATA Field Encoding" name="DATA" value="0x00"/>
                 <value caption="Start and Data Fields Encoding" name="SDATA" value="0x02"/>
-                <value caption="Start and Data Fields Encoding, with invertion in START field" name="NOTSDATA"
-                       value="0x03"/>
+                <value caption="Start and Data Fields Encoding, with invertion in START field" name="NOTSDATA" value="0x03"/>
             </value-group>
             <value-group caption="XCL LUT Action" name="USART_LUTACT">
                 <value caption="Standard Frame Configuration" name="OFF" value="0x00"/>
@@ -3094,27 +2981,19 @@
                     <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
-                    <bitfield caption="Receive Complete Interrupt Enable (In Buffer Modes Only)." mask="0x80"
-                              name="RXCIE"/>
-                    <bitfield caption="Transmit Complete Interrupt Enable (In Buffer Modes Only)." mask="0x40"
-                              name="TXCIE"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable (In Buffer Modes Only)." mask="0x20"
-                              name="DREIE"/>
-                    <bitfield caption="Slave Select Trigger Interrupt Enable (In Buffer Modes Only)." mask="0x10"
-                              name="SSIE"/>
+                    <bitfield caption="Receive Complete Interrupt Enable (In Buffer Modes Only)." mask="0x80" name="RXCIE"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable (In Buffer Modes Only)." mask="0x40" name="TXCIE"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable (In Buffer Modes Only)." mask="0x20" name="DREIE"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Enable (In Buffer Modes Only)." mask="0x10" name="SSIE"/>
                     <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
                 </register>
                 <register caption="Status Register" name="STATUS" offset="0x02" size="1">
                     <bitfield caption="Interrupt Flag (In Standard Mode Only)." mask="0x80" name="IF"/>
-                    <bitfield caption="Receive Complete Interrupt Flag (In Buffer Modes Only)." mask="0x80"
-                              name="RXCIF"/>
+                    <bitfield caption="Receive Complete Interrupt Flag (In Buffer Modes Only)." mask="0x80" name="RXCIF"/>
                     <bitfield caption="Write Collision Flag (In Standard Mode Only)." mask="0x40" name="WRCOL"/>
-                    <bitfield caption="Transmit Complete Interrupt Flag (In Buffer Modes Only)." mask="0x40"
-                              name="TXCIF"/>
-                    <bitfield caption="Data Register Empty Interrupt Flag (In Buffer Modes Only)." mask="0x20"
-                              name="DREIF"/>
-                    <bitfield caption="Slave Select Trigger Interrupt Flag (In Buffer Modes Only)." mask="0x10"
-                              name="SSIF"/>
+                    <bitfield caption="Transmit Complete Interrupt Flag (In Buffer Modes Only)." mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag (In Buffer Modes Only)." mask="0x20" name="DREIF"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Flag (In Buffer Modes Only)." mask="0x10" name="SSIF"/>
                     <bitfield caption="Buffer Overflow (In Buffer Modes Only)." mask="0x01" name="BUFOVF"/>
                 </register>
                 <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
@@ -3124,14 +3003,10 @@
                 </register>
             </register-group>
             <value-group caption="SPI Mode" name="SPI_MODE">
-                <value caption="SPI Mode 0, base clock at &#34;0&#34;, sampling on leading edge (rising) &amp; set-up on trailling edge (falling)."
-                       name="0" value="0x00"/>
-                <value caption="SPI Mode 1, base clock at &#34;0&#34;, set-up on leading edge (rising) &amp; sampling on trailling edge (falling)."
-                       name="1" value="0x01"/>
-                <value caption="SPI Mode 2, base clock at &#34;1&#34;, sampling on leading edge (falling) &amp; set-up on trailling edge (rising)."
-                       name="2" value="0x02"/>
-                <value caption="SPI Mode 3, base clock at &#34;1&#34;, set-up on leading edge (falling) &amp; sampling on trailling edge (rising)."
-                       name="3" value="0x03"/>
+                <value caption="SPI Mode 0, base clock at &#34;0&#34;, sampling on leading edge (rising) &amp; set-up on trailling edge (falling)." name="0" value="0x00"/>
+                <value caption="SPI Mode 1, base clock at &#34;0&#34;, set-up on leading edge (rising) &amp; sampling on trailling edge (falling)." name="1" value="0x01"/>
+                <value caption="SPI Mode 2, base clock at &#34;1&#34;, sampling on leading edge (falling) &amp; set-up on trailling edge (rising)." name="2" value="0x02"/>
+                <value caption="SPI Mode 3, base clock at &#34;1&#34;, set-up on leading edge (falling) &amp; sampling on trailling edge (rising)." name="3" value="0x03"/>
             </value-group>
             <value-group caption="Prescaler setting" name="SPI_PRESCALER">
                 <value caption="If CLK2X=1 CLKper/2, else (CLK2X=0) CLKper/4." name="DIV4" value="0x00"/>
@@ -3159,8 +3034,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3179,10 +3053,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3.xml
index 0fff17cc..2b3eb127 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3.xml
@@ -1,20 +1,15 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA192A3-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATXMEGA192A3-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA192A3-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA192A3-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega192A3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x0000" size="0x32000" endianness="little">
-                <memory-segment start="0x0000" size="0x30000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x2E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x30000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x30000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x2E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x30000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x6000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -22,8 +17,7 @@
                 <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x0000" size="0x800">
-                <memory-segment start="0x0000" size="0x800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x0000" size="0x800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,12 +29,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -126,12 +118,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077">
@@ -489,8 +479,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -620,16 +609,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -791,19 +777,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1025,8 +1006,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1035,8 +1015,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1532,10 +1511,8 @@
                     <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
                     <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
                     <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1810,8 +1787,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2208,14 +2184,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2288,10 +2260,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2490,8 +2460,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2604,8 +2573,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3U.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3U.xml
index e1c27bcc..1c95e4e3 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3U.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3U.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega192A3U-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega192A3U-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega192A3U-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega192A3U-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega192A3U-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega192A3U-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega192A3U-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega192A3U-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega192A3U" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x32000" endianness="little">
-                <memory-segment start="0x00000" size="0x30000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x2E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x30000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x00000" size="0x30000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x2E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x30000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x6000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -26,8 +19,7 @@
                 <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x800">
-                <memory-segment start="0x00000" size="0x800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,12 +31,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -677,14 +667,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAAU">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I6570" version="XMEGAAU">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -831,8 +819,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -985,8 +972,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -994,18 +980,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -1173,12 +1156,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
                     <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
@@ -1328,19 +1309,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1554,8 +1530,7 @@
                     <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1564,8 +1539,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1574,8 +1548,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1967,12 +1940,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -2238,8 +2208,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2553,8 +2522,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2701,14 +2669,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2781,10 +2745,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2962,20 +2924,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -3149,8 +3105,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -3261,8 +3216,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3367,10 +3321,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192C3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192C3.xml
index 645f6b48..e87b0bee 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192C3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192C3.xml
@@ -1,20 +1,15 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA192C3-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATXMEGA192C3-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA192C3-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA192C3-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega192C3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x32000" endianness="little">
-                <memory-segment start="0x00000" size="0x30000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x2E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x30000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x00000" size="0x30000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x2E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x30000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -22,8 +17,7 @@
                 <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
-                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,12 +29,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -331,14 +323,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAD">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3610" version="XMEGAC">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -460,8 +450,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -595,8 +584,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -604,18 +592,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -774,8 +759,7 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
                     <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
@@ -887,8 +871,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1145,12 +1128,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1418,8 +1398,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1733,8 +1712,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -1881,14 +1859,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -1961,10 +1935,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2134,20 +2106,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2317,8 +2283,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2429,8 +2394,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -2527,10 +2491,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192D3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192D3.xml
index 950258c9..ddd08a73 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192D3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192D3.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega192D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega192D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega192D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega192D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega192D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega192D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega192D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega192D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega192D3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x0000" size="0x32000" endianness="little">
-                <memory-segment start="0x0000" size="0x30000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x2E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x30000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x30000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x2E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x30000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x6000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -26,8 +19,7 @@
                 <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x0000" size="0x800">
-                <memory-segment start="0x0000" size="0x800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x0000" size="0x800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,12 +31,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -138,12 +128,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077">
@@ -609,8 +597,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -722,16 +709,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -921,8 +905,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1388,16 +1371,11 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1577,8 +1555,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1777,8 +1754,7 @@
                     <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
                     <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
                 </register>
-                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
-                          size="1">
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E" size="1">
                     <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
                     <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
                     <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
@@ -1984,14 +1960,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2064,10 +2036,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2280,20 +2250,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2409,8 +2373,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2523,8 +2486,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3.xml
index 222bf9e1..d80956fd 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3.xml
@@ -1,20 +1,15 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA256A3-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATXMEGA256A3-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA256A3-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA256A3-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega256A3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x42000" endianness="little">
-                <memory-segment start="0x00000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x00000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x00000" size="0x6000" endianness="little">
                 <memory-segment start="0x00000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -22,8 +17,7 @@
                 <memory-segment start="0x02000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x1000">
-                <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,12 +29,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x00000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x00000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -126,12 +118,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077">
@@ -489,8 +479,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -620,16 +609,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -756,8 +742,7 @@
                 </register>
             </register-group>
         </module>
-        <module name="PMIC"
-                caption="Programmable Multi-level Interrupt Controller" id="I6057">
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
             <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
                 <register name="STATUS" caption="Status Register" size="1" offset="0x00">
                     <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
@@ -792,19 +777,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1026,8 +1006,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1036,8 +1015,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1533,10 +1511,8 @@
                     <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
                     <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
                     <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1811,8 +1787,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2209,14 +2184,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2289,10 +2260,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2491,8 +2460,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2605,8 +2573,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3B.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3B.xml
index 859b7156..9909d494 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3B.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3B.xml
@@ -1,20 +1,15 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA256A3B-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATXMEGA256A3B-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA256A3B-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA256A3B-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega256A3B" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x42000" endianness="little">
-                <memory-segment start="0x00000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x00000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x00000" size="0x6000" endianness="little">
                 <memory-segment start="0x00000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -22,8 +17,7 @@
                 <memory-segment start="0x02000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x1000">
-                <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,12 +29,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x00000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x00000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -126,12 +118,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077">
@@ -483,8 +473,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -614,16 +603,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -785,19 +771,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1019,8 +1000,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1029,8 +1009,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1526,10 +1505,8 @@
                     <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
                     <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
                     <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1805,8 +1782,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC32_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC32_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC32_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2192,14 +2168,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2272,10 +2244,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2474,8 +2444,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2588,8 +2557,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -2639,8 +2607,7 @@
                     <bitfield caption="32-kHz Crystal Oscillator High Power Mode" mask="0x20" name="HIGHESR"/>
                     <bitfield caption="32-kHz Crystal Oscillator Output Selection" mask="0x10" name="XOSCSEL"/>
                     <bitfield caption="Crystal Oscillator Enable" mask="0x08" name="XOSCEN"/>
-                    <bitfield caption="Crystal Oscillator Failure Detection Monitor Enable" mask="0x04"
-                              name="XOSCFDEN"/>
+                    <bitfield caption="Crystal Oscillator Failure Detection Monitor Enable" mask="0x04" name="XOSCFDEN"/>
                     <bitfield caption="Access Enable" mask="0x02" name="ACCEN"/>
                     <bitfield caption="Reset" mask="0x01" name="RESET"/>
                 </register>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3BU.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3BU.xml
index b50ca7d1..253730d7 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3BU.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3BU.xml
@@ -1,20 +1,15 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega256A3BU-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega256A3BU-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256A3BU-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256A3BU-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega256A3BU" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x42000" endianness="little">
-                <memory-segment start="0x00000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x00000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x6000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -22,8 +17,7 @@
                 <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x1000">
-                <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,12 +29,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -613,14 +605,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAAU">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I6570" version="XMEGAAU">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -765,8 +755,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -919,8 +908,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -928,18 +916,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -1107,12 +1092,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
                     <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
@@ -1253,8 +1236,7 @@
                     <bitfield caption="32-kHz Crystal Oscillator High Power Mode" mask="0x20" name="HIGHESR"/>
                     <bitfield caption="32-kHz Crystal Oscillator Output Selection" mask="0x10" name="XOSCSEL"/>
                     <bitfield caption="Crystal Oscillator Enable" mask="0x08" name="XOSCEN"/>
-                    <bitfield caption="Crystal Oscillator Failure Detection Monitor Enable" mask="0x04"
-                              name="XOSCFDEN"/>
+                    <bitfield caption="Crystal Oscillator Failure Detection Monitor Enable" mask="0x04" name="XOSCFDEN"/>
                     <bitfield caption="Access Enable" mask="0x02" name="ACCEN"/>
                     <bitfield caption="Reset" mask="0x01" name="RESET"/>
                 </register>
@@ -1284,19 +1266,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1510,8 +1487,7 @@
                     <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1520,8 +1496,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1530,8 +1505,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1810,12 +1784,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -2186,8 +2157,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC32_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC32_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC32_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2490,8 +2460,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2638,14 +2607,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2718,10 +2683,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2899,20 +2862,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -3086,8 +3043,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -3198,8 +3154,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3304,10 +3259,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3U.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3U.xml
index bfec639d..a7dcf1f9 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3U.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3U.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega256A3U-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega256A3U-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega256A3U-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega256A3U-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256A3U-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256A3U-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256A3U-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256A3U-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega256A3U" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x42000" endianness="little">
-                <memory-segment start="0x00000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x00000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x6000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -26,8 +19,7 @@
                 <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x1000">
-                <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,12 +31,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -677,14 +667,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAAU">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I6570" version="XMEGAAU">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -831,8 +819,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -985,8 +972,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -994,18 +980,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -1173,12 +1156,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
                     <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
@@ -1328,19 +1309,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1554,8 +1530,7 @@
                     <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1564,8 +1539,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1574,8 +1548,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1854,12 +1827,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -2238,8 +2208,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2553,8 +2522,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2701,14 +2669,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2781,10 +2745,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2962,20 +2924,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -3149,8 +3105,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -3261,8 +3216,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3367,10 +3321,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256C3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256C3.xml
index 7db6de68..9f4c6166 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256C3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256C3.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega256C3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega256C3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega256C3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega256C3-M7" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256C3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256C3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256C3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256C3-M7" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega256C3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x42000" endianness="little">
-                <memory-segment start="0x00000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x00000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x6000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -26,8 +19,7 @@
                 <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x1000">
-                <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,12 +31,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -508,14 +498,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAD">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3610" version="XMEGAC">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -637,8 +625,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -772,8 +759,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -781,18 +767,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -951,8 +934,7 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
                     <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
@@ -1064,8 +1046,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1322,12 +1303,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1595,8 +1573,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1910,8 +1887,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2058,14 +2034,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2138,10 +2110,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2311,20 +2281,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2494,8 +2458,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2606,8 +2569,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -2704,10 +2666,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256D3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256D3.xml
index f8c15807..30559bb3 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256D3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256D3.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega256D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega256D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega256D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega256D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega256D3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x0000" size="0x42000" endianness="little">
-                <memory-segment start="0x0000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x6000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -26,8 +19,7 @@
                 <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x0000" size="0x1000">
-                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,12 +31,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -138,12 +128,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077" version="XMEGAD">
@@ -609,8 +597,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -722,16 +709,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -921,8 +905,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1385,16 +1368,11 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1574,8 +1552,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1774,8 +1751,7 @@
                     <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
                     <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
                 </register>
-                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
-                          size="1">
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E" size="1">
                     <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
                     <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
                     <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
@@ -1981,14 +1957,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2061,10 +2033,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2277,20 +2247,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2406,8 +2370,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2520,8 +2483,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4.xml
index 5e3f899b..94870990 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4.xml
@@ -1,20 +1,15 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA32A4-AU" package="TQFP44" speedmax="32000000" pinout="QFP_QFN_44" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATXMEGA32A4-MH" package="VQFN44" speedmax="32000000" pinout="QFP_QFN_44" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA32A4-AU" package="TQFP44" speedmax="32000000" pinout="QFP_QFN_44" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA32A4-MH" package="VQFN44" speedmax="32000000" pinout="QFP_QFN_44" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega32A4" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x0000" size="0x9000" endianness="little">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x07000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x8000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x07000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x8000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -22,8 +17,7 @@
                 <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,12 +29,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -126,12 +118,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077">
@@ -427,8 +417,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -558,16 +547,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -729,19 +715,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -963,8 +944,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -973,8 +953,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1466,10 +1445,8 @@
                     <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
                     <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
                     <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1748,8 +1725,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2146,14 +2122,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2226,10 +2198,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2428,8 +2398,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2542,8 +2511,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4U.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4U.xml
index 21d43150..aff3c027 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4U.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4U.xml
@@ -1,26 +1,18 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega32A4U-AU" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32A4U-MH" package="VQFN44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32A4U-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32A4U-AN" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32A4U-M7" package="VQFN44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32A4U-AU" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32A4U-MH" package="VQFN44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32A4U-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32A4U-AN" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32A4U-M7" package="VQFN44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega32A4U" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x9000" endianness="little">
-                <memory-segment start="0x00000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x07000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x08000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x00000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x07000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x08000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -28,8 +20,7 @@
                 <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0400">
-                <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,12 +32,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -521,14 +510,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAA4U">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I6570" version="XMEGAAU">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -663,8 +650,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -817,8 +803,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -826,18 +811,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -1005,12 +987,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
                     <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
@@ -1160,19 +1140,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1386,8 +1361,7 @@
                     <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1396,8 +1370,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1406,8 +1379,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1686,12 +1658,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -2061,8 +2030,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2376,8 +2344,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2524,14 +2491,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2604,10 +2567,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2785,20 +2746,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2972,8 +2927,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -3084,8 +3038,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3190,10 +3143,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32C3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32C3.xml
index e414e53d..3154ef7d 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32C3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32C3.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega32C3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32C3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32C3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32C3-M7" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C3-M7" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega32C3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x0000" size="0x9000" endianness="little">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x8000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x8000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -26,8 +19,7 @@
                 <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0400">
-                <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,12 +31,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -508,14 +498,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAD">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3610" version="XMEGAC">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -637,8 +625,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -772,8 +759,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -781,18 +767,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -951,8 +934,7 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
                     <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
@@ -1064,8 +1046,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1322,12 +1303,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1595,8 +1573,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1910,8 +1887,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2058,14 +2034,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2138,10 +2110,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2311,20 +2281,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2494,8 +2458,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2606,8 +2569,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -2704,10 +2666,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32C4.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32C4.xml
index 487e9892..217fb1b5 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32C4.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32C4.xml
@@ -1,26 +1,18 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega32C4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32C4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32C4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32C4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32C4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega32C4" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x9000" endianness="little">
-                <memory-segment start="0x00000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x07000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x08000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x00000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x07000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x08000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -28,8 +20,7 @@
                 <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0400">
-                <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,12 +32,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -451,14 +440,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAD">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3610" version="XMEGAC">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -576,8 +563,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -711,8 +697,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -720,18 +705,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -890,8 +872,7 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
                     <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
@@ -1003,8 +984,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1261,16 +1241,11 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1551,8 +1526,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1866,8 +1840,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2014,14 +1987,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2094,10 +2063,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2267,20 +2234,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2450,8 +2411,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2562,8 +2522,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -2660,10 +2619,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32D3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32D3.xml
index 706dd0fd..388734fb 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32D3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32D3.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega32D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega32D3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x0000" size="0x9000" endianness="little">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x8000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x8000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -26,8 +19,7 @@
                 <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,12 +31,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -138,12 +128,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077">
@@ -609,8 +597,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -722,16 +709,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -921,8 +905,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1388,16 +1371,11 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1576,8 +1554,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1776,8 +1753,7 @@
                     <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
                     <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
                 </register>
-                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
-                          size="1">
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E" size="1">
                     <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
                     <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
                     <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
@@ -1983,14 +1959,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2063,10 +2035,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2279,20 +2249,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2408,8 +2372,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2522,8 +2485,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32D4.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32D4.xml
index 460ab9be..5fbeca19 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32D4.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32D4.xml
@@ -1,26 +1,18 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega32D4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32D4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32D4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32D4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32D4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega32D4" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x0000" size="0x9000" endianness="little">
-                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x8000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x8000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -28,8 +20,7 @@
                 <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0400">
-                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,12 +32,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -142,12 +131,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077">
@@ -519,8 +506,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -632,16 +618,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -831,8 +814,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1298,12 +1280,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1499,8 +1478,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1699,8 +1677,7 @@
                     <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
                     <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
                 </register>
-                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
-                          size="1">
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E" size="1">
                     <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
                     <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
                     <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
@@ -1906,14 +1883,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -1986,10 +1959,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2202,20 +2173,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2331,8 +2296,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2445,8 +2409,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32E5.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32E5.xml
index 0f7d00e8..25a2c4a8 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32E5.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32E5.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega32E5-AU" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32E5-MU" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32E5-M4U" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32E5-AN" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32E5-MN" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega32E5-M4N" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32E5-AU" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32E5-MU" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32E5-M4U" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32E5-AN" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32E5-MN" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32E5-M4N" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega32E5" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x9000" endianness="little">
-                <memory-segment start="0x00000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="128"/>
-                <memory-segment start="0x07000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="128"/>
-                <memory-segment start="0x08000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="128"/>
+                <memory-segment start="0x00000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="128"/>
+                <memory-segment start="0x07000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="128"/>
+                <memory-segment start="0x08000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="128"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -30,8 +21,7 @@
                 <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0400">
-                <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,12 +33,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0080">
-                <memory-segment start="0x0000" size="0x0080" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="128"/>
+                <memory-segment start="0x0000" size="0x0080" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="128"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0036">
-                <memory-segment start="0x0000" size="0x0036" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="128"/>
+                <memory-segment start="0x0000" size="0x0036" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="128"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -427,14 +415,12 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3620" version="XMEGAE">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -551,8 +537,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -667,8 +652,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -676,19 +660,16 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
                 </register>
-                <register caption="Internal 8 MHz RC Oscillator Calibration Register" name="RC8MCAL" offset="0x07"
-                          size="1">
+                <register caption="Internal 8 MHz RC Oscillator Calibration Register" name="RC8MCAL" offset="0x07" size="1">
                     <bitfield caption="Calibration Bits" mask="0xFF" name="RC8MCAL"/>
                 </register>
             </register-group>
@@ -841,8 +822,7 @@
             <register-group caption="I/O port Configuration" name="PORTCFG" size="8">
                 <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
                 <register caption="Clock Out Register" name="CLKOUT" offset="0x04" size="1">
-                    <bitfield caption="Clock and Event Output Pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Clock and Event Output Pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                     <bitfield caption="RTC Clock Output Enable" mask="0x60" name="RTCOUT" values="PORTCFG_RTCCLKOUT"/>
                     <bitfield caption="Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
@@ -851,8 +831,7 @@
                     <bitfield caption="Analog Comparator Output Port" mask="0xC0" name="ACOUT" values="PORTCFG_ACOUT"/>
                     <bitfield caption="Event Channel Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="Asynchronous Event Enabled" mask="0x08" name="EVASYEN"/>
-                    <bitfield caption="Event Channel Output Selection" mask="0x07" name="EVOUTSEL"
-                              values="PORTCFG_EVOUTSEL"/>
+                    <bitfield caption="Event Channel Output Selection" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
                 </register>
                 <register caption="Slew Rate Limit Control Register" name="SRLCTRL" offset="0x07" size="1">
                     <bitfield caption="Slew Rate Limit Enable on PORTA" mask="0x01" name="SRLENRA"/>
@@ -986,54 +965,35 @@
                     <bitfield caption="Channel Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Channel Transaction Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Channel Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Channel Transaction Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="EDMA_CH_INTLVL"/>
-                    <bitfield caption="Channel Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="EDMA_CH_INTLVL"/>
+                    <bitfield caption="Channel Transaction Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="EDMA_CH_INTLVL"/>
+                    <bitfield caption="Channel Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="EDMA_CH_INTLVL"/>
                 </register>
-                <register
-                        caption="Memory Address Control for Peripheral Ch., or Source Address Control for Standard Ch."
-                        name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield
-                            caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch."
-                            mask="0x30" name="RELOAD" values="EDMA_CH_RELOAD"/>
-                    <bitfield caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch."
-                              mask="0x07" name="DIR" values="EDMA_CH_DIR"/>
+                <register caption="Memory Address Control for Peripheral Ch., or Source Address Control for Standard Ch." name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch." mask="0x30" name="RELOAD" values="EDMA_CH_RELOAD"/>
+                    <bitfield caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch." mask="0x07" name="DIR" values="EDMA_CH_DIR"/>
                 </register>
-                <register caption="Destination Address Control for Standard Channels Only." name="DESTADDRCTRL"
-                          offset="0x03" size="1">
-                    <bitfield caption="Destination Address Reload for Standard Channels Only." mask="0x30"
-                              name="DESTRELOAD" values="EDMA_CH_RELOAD"/>
-                    <bitfield caption="Destination Address Mode for Standard Channels Only." mask="0x07" name="DESTDIR"
-                              values="EDMA_CH_DESTDIR"/>
+                <register caption="Destination Address Control for Standard Channels Only." name="DESTADDRCTRL" offset="0x03" size="1">
+                    <bitfield caption="Destination Address Reload for Standard Channels Only." mask="0x30" name="DESTRELOAD" values="EDMA_CH_RELOAD"/>
+                    <bitfield caption="Destination Address Mode for Standard Channels Only." mask="0x07" name="DESTDIR" values="EDMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x04" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="EDMA_CH_TRIGSRC"/>
                 </register>
-                <register
-                        caption="Channel Block Transfer Count for Peripheral Ch., or Channel Block Transfer Count Low for Standard Ch."
-                        name="TRFCNT" offset="0x06" size="2"/>
-                <register
-                        caption="Channel Memory Address for Peripheral Ch., or Channel Source Address Low for Standard Ch."
-                        name="ADDR" offset="0x08" size="2"/>
-                <register caption="Channel Destination Address for Standard Channels Only." name="DESTADDR"
-                          offset="0x0C" size="2"/>
+                <register caption="Channel Block Transfer Count for Peripheral Ch., or Channel Block Transfer Count Low for Standard Ch." name="TRFCNT" offset="0x06" size="2"/>
+                <register caption="Channel Memory Address for Peripheral Ch., or Channel Source Address Low for Standard Ch." name="ADDR" offset="0x08" size="2"/>
+                <register caption="Channel Destination Address for Standard Channels Only." name="DESTADDR" offset="0x0C" size="2"/>
             </register-group>
             <value-group caption="Channel mode" name="EDMA_CHMODE">
                 <value caption="Channels 0, 1, 2 and 3 in peripheal conf." name="PER0123" value="0x00"/>
-                <value caption="Channel 0 in standard conf.; channels 2 and 3 in peripheral conf." name="STD0"
-                       value="0x01"/>
-                <value caption="Channel 2 in standard conf.; channels 0 and 1 in peripheral conf." name="STD2"
-                       value="0x02"/>
+                <value caption="Channel 0 in standard conf.; channels 2 and 3 in peripheral conf." name="STD0" value="0x01"/>
+                <value caption="Channel 2 in standard conf.; channels 0 and 1 in peripheral conf." name="STD2" value="0x02"/>
                 <value caption="Channels 0 and 2 in standard conf." name="STD02" value="0x03"/>
             </value-group>
             <value-group caption="Double buffer mode" name="EDMA_DBUFMODE">
                 <value caption="No double buffer enabled" name="DISABLE" value="0x00"/>
-                <value caption="Double buffer enabled on peripheral channels 0/1 (if exist) " name="BUF01"
-                       value="0x01"/>
+                <value caption="Double buffer enabled on peripheral channels 0/1 (if exist) " name="BUF01" value="0x01"/>
                 <value caption="Double buffer enabled on peripheral channels 2/3 (if exist)" name="BUF23" value="0x02"/>
-                <value caption="Double buffer enabled on peripheral channels 0/1 and 2/3 or standard channels 0/2"
-                       name="BUF0123" value="0x03"/>
+                <value caption="Double buffer enabled on peripheral channels 0/1 and 2/3 or standard channels 0/2" name="BUF0123" value="0x03"/>
             </value-group>
             <value-group caption="Priority mode" name="EDMA_PRIMODE">
                 <value caption="Round robin on all channels" name="RR0123" value="0x00"/>
@@ -1041,23 +1001,18 @@
                 <value caption="Ch0 &gt; Ch 1 &gt; round robin (Ch2 Ch3)" name="RR23" value="0x02"/>
                 <value caption="Ch0 &gt; Ch1 &gt; Ch2 &gt; Ch3 " name="CH0123" value="0x03"/>
             </value-group>
-            <value-group caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch."
-                         name="EDMA_CH_RELOAD">
+            <value-group caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch." name="EDMA_CH_RELOAD">
                 <value caption="No reload" name="NONE" value="0x00"/>
                 <value caption="Reload at end of each block transfer" name="BLOCK" value="0x01"/>
                 <value caption="Reload at end of each burst transfer" name="BURST" value="0x02"/>
                 <value caption="Reload at end of each transaction" name="TRANSACTION" value="0x03"/>
             </value-group>
-            <value-group caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch."
-                         name="EDMA_CH_DIR">
+            <value-group caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch." name="EDMA_CH_DIR">
                 <value caption="Fixed" name="FIXED" value="0x00"/>
                 <value caption="Increment" name="INC" value="0x01"/>
-                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'mask-match' (data: ADDRL, mask: ADDRH), else reserved conf. "
-                       name="MP1" value="0x04"/>
-                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'OR-match' (data-1: ADDRL OR data-2: ADDRH), else reserved conf. "
-                       name="MP2" value="0x05"/>
-                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 2-byte 'match' (data-1: ADDRL followed by data-2: ADDRH), else reserved conf. "
-                       name="MP3" value="0x06"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'mask-match' (data: ADDRL, mask: ADDRH), else reserved conf. " name="MP1" value="0x04"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'OR-match' (data-1: ADDRL OR data-2: ADDRH), else reserved conf. " name="MP2" value="0x05"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 2-byte 'match' (data-1: ADDRL followed by data-2: ADDRH), else reserved conf. " name="MP3" value="0x06"/>
             </value-group>
             <value-group caption="Destination addressing mode" name="EDMA_CH_DESTDIR">
                 <value caption="Fixed" name="FIXED" value="0x00"/>
@@ -1074,37 +1029,24 @@
                 <value caption="ADCA CH0 as trigger" name="ADCA_CH0" value="0x10"/>
                 <value caption="DACA CH0 as trigger" name="DACA_CH0" value="0x15"/>
                 <value caption="DACA CH1 as trigger" name="DACA_CH1" value="0x16"/>
-                <value caption="TCC4 overflow/underflow as trigger (Standard Channels Only)" name="TCC4_OVF"
-                       value="0x40"/>
+                <value caption="TCC4 overflow/underflow as trigger (Standard Channels Only)" name="TCC4_OVF" value="0x40"/>
                 <value caption="TCC4 error as trigger (Standard Channels Only)" name="TCC4_ERR" value="0x41"/>
-                <value caption="TCC4 compare or capture channel A as trigger (Standard Channels Only)" name="TCC4_CCA"
-                       value="0x42"/>
-                <value caption="TCC4 compare or capture channel B as trigger (Standard Channels Only)" name="TCC4_CCB"
-                       value="0x43"/>
-                <value caption="TCC4 compare or capture channel C as trigger (Standard Channels Only)" name="TCC4_CCC"
-                       value="0x44"/>
-                <value caption="TCC4 compare or capture channel D as trigger (Standard Channels Only)" name="TCC4_CCD"
-                       value="0x45"/>
-                <value caption="TCC5 overflow/underflow as trigger (Standard Channels Only)" name="TCC5_OVF"
-                       value="0x46"/>
+                <value caption="TCC4 compare or capture channel A as trigger (Standard Channels Only)" name="TCC4_CCA" value="0x42"/>
+                <value caption="TCC4 compare or capture channel B as trigger (Standard Channels Only)" name="TCC4_CCB" value="0x43"/>
+                <value caption="TCC4 compare or capture channel C as trigger (Standard Channels Only)" name="TCC4_CCC" value="0x44"/>
+                <value caption="TCC4 compare or capture channel D as trigger (Standard Channels Only)" name="TCC4_CCD" value="0x45"/>
+                <value caption="TCC5 overflow/underflow as trigger (Standard Channels Only)" name="TCC5_OVF" value="0x46"/>
                 <value caption="TCC5 error as trigger (Standard Channels Only)" name="TCC5_ERR" value="0x47"/>
-                <value caption="TCC5 compare or capture channel A as trigger (Standard Channels Only)" name="TCC5_CCA"
-                       value="0x48"/>
-                <value caption="TCC5 compare or capture channel B as trigger (Standard Channels Only)" name="TCC5_CCB"
-                       value="0x49"/>
-                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C receive complete as trigger (SPI Buffer Modes)"
-                       name="SPIC_RXC" value="0x4A"/>
-                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C data register empty as trigger (SPI Buffer modes)"
-                       name="SPIC_DRE" value="0x4B"/>
+                <value caption="TCC5 compare or capture channel A as trigger (Standard Channels Only)" name="TCC5_CCA" value="0x48"/>
+                <value caption="TCC5 compare or capture channel B as trigger (Standard Channels Only)" name="TCC5_CCB" value="0x49"/>
+                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C receive complete as trigger (SPI Buffer Modes)" name="SPIC_RXC" value="0x4A"/>
+                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C data register empty as trigger (SPI Buffer modes)" name="SPIC_DRE" value="0x4B"/>
                 <value caption="USART C0 receive complete as trigger" name="USARTC0_RXC" value="0x4C"/>
                 <value caption="USART C0 data register empty as trigger" name="USARTC0_DRE" value="0x4D"/>
-                <value caption="TCD5 overflow/underflow as trigger (Standard Channels Only)" name="TCD5_OVF"
-                       value="0x66"/>
+                <value caption="TCD5 overflow/underflow as trigger (Standard Channels Only)" name="TCD5_OVF" value="0x66"/>
                 <value caption="TCD5 error as trigger (Standard Channels Only)" name="TCD5_ERR" value="0x67"/>
-                <value caption="TCD5 compare or capture channel A as trigger (Standard Channels Only)" name="TCD5_CCA"
-                       value="0x68"/>
-                <value caption="TCD5 compare or capture channel B as trigger (Standard Channels Only)" name="TCD5_CCB"
-                       value="0x69"/>
+                <value caption="TCD5 compare or capture channel A as trigger (Standard Channels Only)" name="TCD5_CCA" value="0x68"/>
+                <value caption="TCD5 compare or capture channel B as trigger (Standard Channels Only)" name="TCD5_CCB" value="0x69"/>
                 <value caption="USART D0 receive complete as trigger" name="USARTD0_RXC" value="0x6C"/>
                 <value caption="USART D0 data register empty as trigger" name="USARTD0_DRE" value="0x6D"/>
             </value-group>
@@ -1149,8 +1091,7 @@
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
                     <bitfield caption="Rotary Decoder Enable" mask="0x80" name="ROTARY"/>
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1402,12 +1343,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC Input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC Input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC Input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC Input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC Input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC Input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1786,8 +1724,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1869,10 +1806,8 @@
                 </register>
                 <register caption="Control Register G" name="CTRLG" offset="0x06" size="1">
                     <bitfield caption="Event Action Enable" mask="0x80" name="EVACTEN"/>
-                    <bitfield caption="Event Action Selection on Timer/Counter 1" mask="0x60" name="EVACT1"
-                              values="XCL_EVACT"/>
-                    <bitfield caption="Event Action Selection on Timer/Counter 0" mask="0x18" name="EVACT0"
-                              values="XCL_EVACT"/>
+                    <bitfield caption="Event Action Selection on Timer/Counter 1" mask="0x60" name="EVACT1" values="XCL_EVACT"/>
+                    <bitfield caption="Event Action Selection on Timer/Counter 0" mask="0x18" name="EVACT0" values="XCL_EVACT"/>
                     <bitfield caption="Event Source Selection" mask="0x07" name="EVSRC" values="XCL_EVSRC"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x07" size="1">
@@ -1884,10 +1819,8 @@
                     <bitfield caption="Compare Or Capture 1 Interrupt Enable" mask="0x20" name="CC1IE"/>
                     <bitfield caption="Peripheral Low Counter 2 Interrupt Enable" mask="0x20" name="PEC20IE"/>
                     <bitfield caption="Compare Or Capture 0 Interrupt Enable" mask="0x10" name="CC0IE"/>
-                    <bitfield caption="Timer Underflow Interrupt Level" mask="0x0C" name="UNFINTLVL"
-                              values="XCL_UNF_INTLVL"/>
-                    <bitfield caption="Timer Compare or Capture Interrupt Level" mask="0x03" name="CCINTLVL"
-                              values="XCL_CC_INTLVL"/>
+                    <bitfield caption="Timer Underflow Interrupt Level" mask="0x0C" name="UNFINTLVL" values="XCL_UNF_INTLVL"/>
+                    <bitfield caption="Timer Compare or Capture Interrupt Level" mask="0x03" name="CCINTLVL" values="XCL_CC_INTLVL"/>
                 </register>
                 <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x08" size="1">
                     <bitfield caption="Timer/Counter 1 Underflow Interrupt Flag" mask="0x80" name="UNF1IF"/>
@@ -1997,13 +1930,10 @@
                 <value caption="16-bit timer/counter" name="TC16" value="0x00"/>
                 <value caption="One 8-bit timer/counter" name="BTC0" value="0x01"/>
                 <value caption="Two 8-bit timer/counters" name="BTC01" value="0x02"/>
-                <value caption="One 8-bit timer/counter and one 8-bit peripheral transmitter counter" name="BTC0PEC1"
-                       value="0x03"/>
-                <value caption="One 8-bit timer/counter and one 8-bit peripheral receiver counter" name="PEC0BTC1"
-                       value="0x04"/>
+                <value caption="One 8-bit timer/counter and one 8-bit peripheral transmitter counter" name="BTC0PEC1" value="0x03"/>
+                <value caption="One 8-bit timer/counter and one 8-bit peripheral receiver counter" name="PEC0BTC1" value="0x04"/>
                 <value caption="Two 8-bit peripheral counters" name="PEC01" value="0x05"/>
-                <value caption="One 8-bit timer/counter and two 4-bit peripheral counters" name="BTC0PEC2"
-                       value="0x06"/>
+                <value caption="One 8-bit timer/counter and two 4-bit peripheral counters" name="BTC0PEC2" value="0x06"/>
             </value-group>
             <value-group caption="Timer/Counter Mode" name="XCL_TCMODE">
                 <value caption="Normal mode with compare/period" name="NORMAL" value="0x00"/>
@@ -2066,8 +1996,7 @@
                 </register>
                 <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
                 <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
-                <register-group caption="TWI SMBUS timeout module" name="TIMEOUT" offset="0x000E"
-                                name-in-module="TWI_TIMEOUT"/>
+                <register-group caption="TWI SMBUS timeout module" name="TIMEOUT" offset="0x000E" name-in-module="TWI_TIMEOUT"/>
             </register-group>
             <register-group caption="" name="TWI_MASTER" size="7">
                 <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
@@ -2143,10 +2072,8 @@
                     <bitfield caption="Slave Ttimeout Interrupt Flag" mask="0x10" name="TTOUTSIF"/>
                 </register>
                 <register caption="Timeout Configuration Register" name="TOCONF" offset="0x01" size="1">
-                    <bitfield caption="Master Ttimeout Select" mask="0x07" name="TTOUTMSEL"
-                              values="TWI_MASTER_TTIMEOUT"/>
-                    <bitfield caption="Master/Slave Timeout Select" mask="0x18" name="TMSEXTSEL"
-                              values="TWI_MASTER_TMSEXT"/>
+                    <bitfield caption="Master Ttimeout Select" mask="0x07" name="TTOUTMSEL" values="TWI_MASTER_TTIMEOUT"/>
+                    <bitfield caption="Master/Slave Timeout Select" mask="0x18" name="TMSEXTSEL" values="TWI_MASTER_TMSEXT"/>
                     <bitfield caption="Slave Ttimeout Select" mask="0xE0" name="TTOUTSSEL" values="TWI_SLAVE_TTIMEOUT"/>
                 </register>
             </register-group>
@@ -2360,58 +2287,35 @@
                     <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC45_EVSEL"/>
                 </register>
                 <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
-                    <bitfield caption="Channel D Compare or Capture Mode" mask="0xC0" name="CCDMODE"
-                              values="TC45_CCDMODE"/>
-                    <bitfield caption="Channel C Compare or Capture Mode" mask="0x30" name="CCCMODE"
-                              values="TC45_CCCMODE"/>
-                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE"
-                              values="TC45_CCBMODE"/>
-                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE"
-                              values="TC45_CCAMODE"/>
-                    <bitfield caption="Channel Low D Compare or Capture Mode" mask="0xC0" name="LCCDMODE"
-                              values="TC45_LCCDMODE"/>
-                    <bitfield caption="Channel Low C Compare or Capture Mode" mask="0x30" name="LCCCMODE"
-                              values="TC45_LCCCMODE"/>
-                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE"
-                              values="TC45_LCCBMODE"/>
-                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE"
-                              values="TC45_LCCAMODE"/>
+                    <bitfield caption="Channel D Compare or Capture Mode" mask="0xC0" name="CCDMODE" values="TC45_CCDMODE"/>
+                    <bitfield caption="Channel C Compare or Capture Mode" mask="0x30" name="CCCMODE" values="TC45_CCCMODE"/>
+                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE" values="TC45_CCBMODE"/>
+                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE" values="TC45_CCAMODE"/>
+                    <bitfield caption="Channel Low D Compare or Capture Mode" mask="0xC0" name="LCCDMODE" values="TC45_LCCDMODE"/>
+                    <bitfield caption="Channel Low C Compare or Capture Mode" mask="0x30" name="LCCCMODE" values="TC45_LCCCMODE"/>
+                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE" values="TC45_LCCBMODE"/>
+                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE" values="TC45_LCCAMODE"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x05" size="1">
-                    <bitfield caption="Channel High D Compare or Capture Mode" mask="0xC0" name="HCCDMODE"
-                              values="TC45_HCCDMODE"/>
-                    <bitfield caption="Channel High C Compare or Capture Mode" mask="0x30" name="HCCCMODE"
-                              values="TC45_HCCCMODE"/>
-                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE"
-                              values="TC45_HCCBMODE"/>
-                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE"
-                              values="TC45_HCCAMODE"/>
+                    <bitfield caption="Channel High D Compare or Capture Mode" mask="0xC0" name="HCCDMODE" values="TC45_HCCDMODE"/>
+                    <bitfield caption="Channel High C Compare or Capture Mode" mask="0x30" name="HCCCMODE" values="TC45_HCCCMODE"/>
+                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE" values="TC45_HCCBMODE"/>
+                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE" values="TC45_HCCAMODE"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL"
-                              values="TC45_TRGINTLVL"/>
-                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="TC45_ERRINTLVL"/>
-                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL"
-                              values="TC45_OVFINTLVL"/>
+                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL" values="TC45_TRGINTLVL"/>
+                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC45_ERRINTLVL"/>
+                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="TC45_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Channel D Compare or Capture Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC45_CCDINTLVL"/>
-                    <bitfield caption="Channel C Compare or Capture Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC45_CCCINTLVL"/>
-                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC45_CCBINTLVL"/>
-                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC45_CCAINTLVL"/>
-                    <bitfield caption="Channel Low D Compare or Capture Interrupt Level" mask="0xC0" name="LCCDINTLVL"
-                              values="TC45_LCCDINTLVL"/>
-                    <bitfield caption="Channel Low C Compare or Capture Interrupt Level" mask="0x30" name="LCCCINTLVL"
-                              values="TC45_LCCCINTLVL"/>
-                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL"
-                              values="TC45_LCCBINTLVL"/>
-                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL"
-                              values="TC45_LCCAINTLVL"/>
+                    <bitfield caption="Channel D Compare or Capture Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC45_CCDINTLVL"/>
+                    <bitfield caption="Channel C Compare or Capture Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC45_CCCINTLVL"/>
+                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC45_CCBINTLVL"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC45_CCAINTLVL"/>
+                    <bitfield caption="Channel Low D Compare or Capture Interrupt Level" mask="0xC0" name="LCCDINTLVL" values="TC45_LCCDINTLVL"/>
+                    <bitfield caption="Channel Low C Compare or Capture Interrupt Level" mask="0x30" name="LCCCINTLVL" values="TC45_LCCCINTLVL"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL" values="TC45_LCCBINTLVL"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL" values="TC45_LCCAINTLVL"/>
                 </register>
                 <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x08" size="1">
                     <bitfield caption="Timer/Counter Stop" mask="0x20" name="STOP"/>
@@ -2503,38 +2407,25 @@
                     <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC45_EVSEL"/>
                 </register>
                 <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
-                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE"
-                              values="TC45_CCBMODE"/>
-                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE"
-                              values="TC45_CCAMODE"/>
-                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE"
-                              values="TC45_LCCBMODE"/>
-                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE"
-                              values="TC45_LCCAMODE"/>
+                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE" values="TC45_CCBMODE"/>
+                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE" values="TC45_CCAMODE"/>
+                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE" values="TC45_LCCBMODE"/>
+                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE" values="TC45_LCCAMODE"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x05" size="1">
-                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE"
-                              values="TC45_HCCBMODE"/>
-                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE"
-                              values="TC45_HCCAMODE"/>
+                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE" values="TC45_HCCBMODE"/>
+                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE" values="TC45_HCCAMODE"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL"
-                              values="TC45_TRGINTLVL"/>
-                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="TC45_ERRINTLVL"/>
-                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL"
-                              values="TC45_OVFINTLVL"/>
+                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL" values="TC45_TRGINTLVL"/>
+                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC45_ERRINTLVL"/>
+                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="TC45_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC45_CCBINTLVL"/>
-                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC45_CCAINTLVL"/>
-                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL"
-                              values="TC45_LCCBINTLVL"/>
-                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL"
-                              values="TC45_LCCAINTLVL"/>
+                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC45_CCBINTLVL"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC45_CCAINTLVL"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL" values="TC45_LCCBINTLVL"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL" values="TC45_LCCAINTLVL"/>
                 </register>
                 <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x08" size="1">
                     <bitfield caption="Timer/Counter Stop" mask="0x20" name="STOP"/>
@@ -2906,8 +2797,7 @@
                     <bitfield caption="Dead-Time Insertion Generator 1 Enable" mask="0x02" name="DTI1EN"/>
                     <bitfield caption="Dead-Time Insertion Generator 0 Enable" mask="0x01" name="DTI0EN"/>
                 </register>
-                <register caption="Dead-time Concurrent Write to Both Sides Register" name="DTBOTH" offset="0x01"
-                          size="1"/>
+                <register caption="Dead-time Concurrent Write to Both Sides Register" name="DTBOTH" offset="0x01" size="1"/>
                 <register caption="Dead-time Low Side Register" name="DTLS" offset="0x02" size="1"/>
                 <register caption="Dead-time High Side Register" name="DTHS" offset="0x03" size="1"/>
                 <register caption="Status Clear Register" name="STATUSCLR" offset="0x04" size="1">
@@ -2985,8 +2875,7 @@
                     <bitfield caption="Data Reception Interrupt Enable" mask="0x40" name="DRIE"/>
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x03" size="1">
                     <bitfield caption="One Wire Mode" mask="0x80" name="ONEWIRE"/>
@@ -3006,8 +2895,7 @@
                 <register caption="Control Register D" name="CTRLD" offset="0x05" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="DECTYPE" values="USART_DECTYPE"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="LUTACT" values="USART_LUTACT"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="PECACT"
-                              values="USART_PECACT"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="PECACT" values="USART_PECACT"/>
                 </register>
                 <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
                     <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
@@ -3062,8 +2950,7 @@
             <value-group caption="Encoding and Decoding Type" name="USART_DECTYPE">
                 <value caption="DATA Field Encoding" name="DATA" value="0x00"/>
                 <value caption="Start and Data Fields Encoding" name="SDATA" value="0x02"/>
-                <value caption="Start and Data Fields Encoding, with invertion in START field" name="NOTSDATA"
-                       value="0x03"/>
+                <value caption="Start and Data Fields Encoding, with invertion in START field" name="NOTSDATA" value="0x03"/>
             </value-group>
             <value-group caption="XCL LUT Action" name="USART_LUTACT">
                 <value caption="Standard Frame Configuration" name="OFF" value="0x00"/>
@@ -3094,27 +2981,19 @@
                     <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
-                    <bitfield caption="Receive Complete Interrupt Enable (In Buffer Modes Only)." mask="0x80"
-                              name="RXCIE"/>
-                    <bitfield caption="Transmit Complete Interrupt Enable (In Buffer Modes Only)." mask="0x40"
-                              name="TXCIE"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable (In Buffer Modes Only)." mask="0x20"
-                              name="DREIE"/>
-                    <bitfield caption="Slave Select Trigger Interrupt Enable (In Buffer Modes Only)." mask="0x10"
-                              name="SSIE"/>
+                    <bitfield caption="Receive Complete Interrupt Enable (In Buffer Modes Only)." mask="0x80" name="RXCIE"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable (In Buffer Modes Only)." mask="0x40" name="TXCIE"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable (In Buffer Modes Only)." mask="0x20" name="DREIE"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Enable (In Buffer Modes Only)." mask="0x10" name="SSIE"/>
                     <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
                 </register>
                 <register caption="Status Register" name="STATUS" offset="0x02" size="1">
                     <bitfield caption="Interrupt Flag (In Standard Mode Only)." mask="0x80" name="IF"/>
-                    <bitfield caption="Receive Complete Interrupt Flag (In Buffer Modes Only)." mask="0x80"
-                              name="RXCIF"/>
+                    <bitfield caption="Receive Complete Interrupt Flag (In Buffer Modes Only)." mask="0x80" name="RXCIF"/>
                     <bitfield caption="Write Collision Flag (In Standard Mode Only)." mask="0x40" name="WRCOL"/>
-                    <bitfield caption="Transmit Complete Interrupt Flag (In Buffer Modes Only)." mask="0x40"
-                              name="TXCIF"/>
-                    <bitfield caption="Data Register Empty Interrupt Flag (In Buffer Modes Only)." mask="0x20"
-                              name="DREIF"/>
-                    <bitfield caption="Slave Select Trigger Interrupt Flag (In Buffer Modes Only)." mask="0x10"
-                              name="SSIF"/>
+                    <bitfield caption="Transmit Complete Interrupt Flag (In Buffer Modes Only)." mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag (In Buffer Modes Only)." mask="0x20" name="DREIF"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Flag (In Buffer Modes Only)." mask="0x10" name="SSIF"/>
                     <bitfield caption="Buffer Overflow (In Buffer Modes Only)." mask="0x01" name="BUFOVF"/>
                 </register>
                 <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
@@ -3124,14 +3003,10 @@
                 </register>
             </register-group>
             <value-group caption="SPI Mode" name="SPI_MODE">
-                <value caption="SPI Mode 0, base clock at &#34;0&#34;, sampling on leading edge (rising) &amp; set-up on trailling edge (falling)."
-                       name="0" value="0x00"/>
-                <value caption="SPI Mode 1, base clock at &#34;0&#34;, set-up on leading edge (rising) &amp; sampling on trailling edge (falling)."
-                       name="1" value="0x01"/>
-                <value caption="SPI Mode 2, base clock at &#34;1&#34;, sampling on leading edge (falling) &amp; set-up on trailling edge (rising)."
-                       name="2" value="0x02"/>
-                <value caption="SPI Mode 3, base clock at &#34;1&#34;, set-up on leading edge (falling) &amp; sampling on trailling edge (rising)."
-                       name="3" value="0x03"/>
+                <value caption="SPI Mode 0, base clock at &#34;0&#34;, sampling on leading edge (rising) &amp; set-up on trailling edge (falling)." name="0" value="0x00"/>
+                <value caption="SPI Mode 1, base clock at &#34;0&#34;, set-up on leading edge (rising) &amp; sampling on trailling edge (falling)." name="1" value="0x01"/>
+                <value caption="SPI Mode 2, base clock at &#34;1&#34;, sampling on leading edge (falling) &amp; set-up on trailling edge (rising)." name="2" value="0x02"/>
+                <value caption="SPI Mode 3, base clock at &#34;1&#34;, set-up on leading edge (falling) &amp; sampling on trailling edge (rising)." name="3" value="0x03"/>
             </value-group>
             <value-group caption="Prescaler setting" name="SPI_PRESCALER">
                 <value caption="If CLK2X=1 CLKper/2, else (CLK2X=0) CLKper/4." name="DIV4" value="0x00"/>
@@ -3159,8 +3034,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3179,10 +3053,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA384C3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA384C3.xml
index 30a68ade..3c813704 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA384C3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA384C3.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega384C3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega384C3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega384C3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega384C3-M7" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega384C3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega384C3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega384C3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega384C3-M7" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega384C3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x62000" endianness="little">
-                <memory-segment start="0x00000" size="0x60000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x5E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x60000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x00000" size="0x60000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x5E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x60000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0xA000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -26,8 +19,7 @@
                 <memory-segment start="0x2000" size="0x8000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x1000">
-                <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,12 +31,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -518,14 +508,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAD">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3610" version="XMEGAC">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -649,8 +637,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -803,8 +790,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -812,18 +798,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -982,12 +965,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
                     <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
@@ -1137,19 +1118,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1299,8 +1275,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1557,12 +1532,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1829,8 +1801,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2144,8 +2115,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2292,14 +2262,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2372,10 +2338,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2545,20 +2509,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2728,8 +2686,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2840,8 +2797,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -2938,10 +2894,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA384D3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA384D3.xml
index 38b6f7bf..b4d347a5 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA384D3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA384D3.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega384D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega384D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega384D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega384D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega384D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega384D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega384D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega384D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega384D3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x62000" endianness="little">
-                <memory-segment start="0x00000" size="0x60000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x5E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="512"/>
-                <memory-segment start="0x60000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="512"/>
+                <memory-segment start="0x00000" size="0x60000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="512"/>
+                <memory-segment start="0x5E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="512"/>
+                <memory-segment start="0x60000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="512"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0xA000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -26,8 +19,7 @@
                 <memory-segment start="0x2000" size="0x8000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x1000">
-                <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,12 +31,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
-                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="512"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="512"/>
+                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="512"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -507,14 +497,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAD">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3610" version="XMEGAC">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -635,8 +623,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -749,8 +736,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -758,18 +744,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -928,12 +911,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
                     <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
@@ -1050,8 +1031,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1308,16 +1288,11 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1596,8 +1571,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1894,14 +1868,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -1974,10 +1944,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2147,20 +2115,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2329,8 +2291,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2441,8 +2402,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -2539,10 +2499,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A1.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A1.xml
index 0f7baeb9..3935a08e 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A1.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A1.xml
@@ -1,20 +1,15 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA64A1-AU" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATXMEGA64A1-CU" package="CBGA100" pinout="BGA100" speedmax="32000000" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA64A1-AU" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA64A1-CU" package="CBGA100" pinout="BGA100" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega64A1" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x0000" size="0x11000" endianness="little">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x1000000" endianness="little">
                 <memory-segment start="0x0000" size="0x001000" type="io" rw="RW" exec="0" name="IO"/>
@@ -25,8 +20,7 @@
                 <!--                                external="true"/>-->
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -38,12 +32,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -129,12 +121,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077">
@@ -566,8 +556,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -698,16 +687,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -869,19 +855,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1103,8 +1084,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1113,8 +1093,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1611,10 +1590,8 @@
                     <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
                     <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
                     <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1889,8 +1866,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1966,8 +1942,7 @@
                 </register>
                 <register caption="SDRAM Control Register C" name="SDRAMCTRLC" offset="0x09" size="1">
                     <bitfield caption="SDRAM Write Recovery Delay" mask="0xC0" name="WRDLY" values="EBI_WRDLY"/>
-                    <bitfield caption="SDRAM Exit-Self-refresh-to-Active Delay" mask="0x38" name="ESRDLY"
-                              values="EBI_ESRDLY"/>
+                    <bitfield caption="SDRAM Exit-Self-refresh-to-Active Delay" mask="0x38" name="ESRDLY" values="EBI_ESRDLY"/>
                     <bitfield caption="SDRAM Row-to-Column Delay" mask="0x07" name="ROWCOLDLY" values="EBI_ROWCOLDLY"/>
                 </register>
                 <register-group caption="Chip Select 0" name="CS0" offset="0x10" name-in-module="EBI_CS"/>
@@ -2451,14 +2426,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2531,10 +2502,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2733,8 +2702,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2847,8 +2815,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A1U.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A1U.xml
index 0ad76f84..2946c4bf 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A1U.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A1U.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega64A1U-AU" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64A1U-CU" package="BGA100" pinout="BGA100" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64A1U-C7U" package="BGA100" pinout="BGA100" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64A1U-AN" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A1U-AU" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A1U-CU" package="BGA100" pinout="BGA100" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A1U-C7U" package="BGA100" pinout="BGA100" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A1U-AN" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega64A1U" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x11000" endianness="little">
-                <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x1000000" endianness="little">
                 <memory-segment start="0x0000" size="0x001000" type="io" rw="RW" exec="0" name="IO"/>
@@ -29,8 +22,7 @@
                 <!--                                external="true"/>-->
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
-                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -42,12 +34,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -811,14 +801,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAAU">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I6570" version="XMEGAAU">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -974,8 +962,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -1129,8 +1116,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -1138,18 +1124,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -1317,12 +1300,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="EBI Output register" name="EBIOUT" offset="0x05" size="1">
                     <bitfield caption="EBI Chip Select Output" mask="0x03" name="EBICSOUT" values="PORTCFG_EBICSOUT"/>
@@ -1488,19 +1469,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1714,8 +1690,7 @@
                     <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1724,8 +1699,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1734,8 +1708,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -2014,12 +1987,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -2398,8 +2368,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2476,8 +2445,7 @@
                 </register>
                 <register caption="SDRAM Control Register C" name="SDRAMCTRLC" offset="0x09" size="1">
                     <bitfield caption="SDRAM Write Recovery Delay" mask="0xC0" name="WRDLY" values="EBI_WRDLY"/>
-                    <bitfield caption="SDRAM Exit-Self-refresh-to-Active Delay" mask="0x38" name="ESRDLY"
-                              values="EBI_ESRDLY"/>
+                    <bitfield caption="SDRAM Exit-Self-refresh-to-Active Delay" mask="0x38" name="ESRDLY" values="EBI_ESRDLY"/>
                     <bitfield caption="SDRAM Row-to-Column Delay" mask="0x07" name="ROWCOLDLY" values="EBI_ROWCOLDLY"/>
                 </register>
                 <register-group caption="Chip Select 0" name="CS0" offset="0x10" name-in-module="EBI_CS"/>
@@ -2897,8 +2865,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -3045,14 +3012,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -3125,10 +3088,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -3306,20 +3267,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -3493,8 +3448,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -3605,8 +3559,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3711,10 +3664,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3.xml
index 4eb976da..2376c131 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3.xml
@@ -1,20 +1,15 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA64A3-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATXMEGA64A3-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
-                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA64A3-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA64A3-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0" tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega64A3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x0000" size="0x11000" endianness="little">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -22,8 +17,7 @@
                 <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,12 +29,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -126,12 +118,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077">
@@ -489,8 +479,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -620,16 +609,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -791,19 +777,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1025,8 +1006,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1035,8 +1015,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1532,10 +1511,8 @@
                     <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
                     <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
                     <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1810,8 +1787,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2208,14 +2184,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2288,10 +2260,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2490,8 +2460,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2604,8 +2573,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3U.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3U.xml
index aacb1c1a..b8aec620 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3U.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3U.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega64A3U-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64A3U-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64A3U-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64A3U-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A3U-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A3U-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A3U-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A3U-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega64A3U" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x11000" endianness="little">
-                <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -26,8 +19,7 @@
                 <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
-                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,12 +31,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -677,14 +667,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAAU">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I6570" version="XMEGAAU">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -831,8 +819,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -985,8 +972,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -994,18 +980,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -1173,12 +1156,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
                     <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
@@ -1328,19 +1309,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1554,8 +1530,7 @@
                     <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1564,8 +1539,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1574,8 +1548,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1854,12 +1827,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -2238,8 +2208,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2553,8 +2522,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2701,14 +2669,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2781,10 +2745,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2962,20 +2924,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -3149,8 +3105,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -3261,8 +3216,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3367,10 +3321,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A4U.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A4U.xml
index b59c0fc7..1a8a57dd 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A4U.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A4U.xml
@@ -1,26 +1,18 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega64A4U-AU" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64A4U-MH" package="VQFN44PW" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64A4U-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64A4U-AN" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64A4U-M7" package="VQFN44PW" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A4U-AU" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A4U-MH" package="VQFN44PW" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A4U-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A4U-AN" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A4U-M7" package="VQFN44PW" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega64A4U" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x11000" endianness="little">
-                <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -28,8 +20,7 @@
                 <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
-                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,12 +32,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -521,14 +510,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAA4U">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I6570" version="XMEGAAU">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -663,8 +650,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -817,8 +803,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -826,18 +811,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -1005,12 +987,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
                     <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
@@ -1160,19 +1140,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1386,8 +1361,7 @@
                     <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1396,8 +1370,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1406,8 +1379,7 @@
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
                 </register>
                 <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1686,12 +1658,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -2070,8 +2039,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2385,8 +2353,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2533,14 +2500,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2613,10 +2576,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2794,20 +2755,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2981,8 +2936,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -3093,8 +3047,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3199,10 +3152,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B1.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B1.xml
index b65e0842..5cbf6f0d 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B1.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B1.xml
@@ -1,20 +1,15 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega64B1-AU" package="TQFP100" pinout="QFP_100" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64B1-CU" package="VFBGA100" pinout="BGA_100" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64B1-AU" package="TQFP100" pinout="QFP_100" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64B1-CU" package="VFBGA100" pinout="BGA_100" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega64B1" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x11000" endianness="little">
-                <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -22,8 +17,7 @@
                 <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
-                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,12 +29,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -565,14 +557,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAAU">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3600" version="XMEGAB">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -695,8 +685,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -792,8 +781,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -801,18 +789,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -1017,12 +1002,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
                     <bitfield caption="Event Output Select" mask="0x04" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
@@ -1148,19 +1131,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1293,8 +1271,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1530,16 +1507,11 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1831,8 +1803,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2146,8 +2117,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2294,14 +2264,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2374,10 +2340,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2547,20 +2511,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2730,8 +2688,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2842,8 +2799,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3054,10 +3010,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B3.xml
index 0251c16c..7b200a4c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B3.xml
@@ -1,20 +1,15 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega64B3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64B3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64B3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64B3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega64B3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x11000" endianness="little">
-                <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -22,8 +17,7 @@
                 <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
-                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -35,12 +29,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -443,14 +435,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAAU">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3600" version="XMEGAB">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -566,8 +556,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -663,8 +652,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -672,18 +660,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -888,12 +873,10 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
-                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                 </register>
                 <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
                     <bitfield caption="Event Output Select" mask="0x04" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
@@ -1019,19 +1002,14 @@
                     <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="DMA_CH_ERRINTLVL"/>
-                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="DMA_CH_TRNINTLVL"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="DMA_CH_TRNINTLVL"/>
                 </register>
                 <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
-                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD" values="DMA_CH_SRCRELOAD"/>
                     <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
-                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
-                              values="DMA_CH_DESTRELOAD"/>
-                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
-                              values="DMA_CH_DESTDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD" values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR" values="DMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
@@ -1164,8 +1142,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1401,16 +1378,11 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1702,8 +1674,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -2017,8 +1988,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2165,14 +2135,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2245,10 +2211,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2418,20 +2382,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2601,8 +2559,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2713,8 +2670,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -2925,10 +2881,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64C3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64C3.xml
index 5ba4cff6..0c913895 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64C3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64C3.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega64C3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64C3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64C3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64C3-M7" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64C3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64C3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64C3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64C3-M7" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega64C3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x11000" endianness="little">
-                <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x0E000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x0E000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -26,8 +19,7 @@
                 <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
-                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,12 +31,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -508,14 +498,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAD">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3610" version="XMEGAC">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -637,8 +625,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -773,8 +760,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -782,18 +768,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -952,8 +935,7 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
                     <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
@@ -1065,8 +1047,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1323,12 +1304,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1596,8 +1574,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1911,8 +1888,7 @@
                 <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
             </value-group>
             <interrupt-group name="USB">
-                <interrupt index="0" name="BUSEVENT"
-                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="0" name="BUSEVENT" caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
                 <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
             </interrupt-group>
         </module>
@@ -2059,14 +2035,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2139,10 +2111,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2312,20 +2282,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2495,8 +2459,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2607,8 +2570,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -2705,10 +2667,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64D3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64D3.xml
index 6344508a..8e4eb8dd 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64D3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64D3.xml
@@ -1,24 +1,17 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega64D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega64D3" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x0000" size="0x11000" endianness="little">
-                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -26,8 +19,7 @@
                 <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0800">
-                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -39,12 +31,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
-                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -138,12 +128,10 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
             <module name="AC" id="I6077">
@@ -609,8 +597,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -722,16 +709,13 @@
                 <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
-                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
-                          size="1">
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
@@ -921,8 +905,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1388,16 +1371,11 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1577,8 +1555,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1777,8 +1754,7 @@
                     <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
                     <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
                 </register>
-                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
-                          size="1">
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E" size="1">
                     <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
                     <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
                     <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
@@ -1984,14 +1960,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2064,10 +2036,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2280,20 +2250,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2409,8 +2373,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2523,8 +2486,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64D4.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64D4.xml
index ef817ce6..a70e1a84 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64D4.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64D4.xml
@@ -1,26 +1,18 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega64D4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64D4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64D4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64D4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega64D4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega64D4" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x11000" endianness="little">
-                <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="256"/>
-                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="256"/>
+                <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="256"/>
+                <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="256"/>
+                <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="256"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -28,8 +20,7 @@
                 <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
-                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -41,12 +32,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
-                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="256"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
-                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="256"/>
+                <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="256"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -434,14 +423,12 @@
             </module>
             <module name="LOCKBIT" id="I6570" version="XMEGAD">
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I6570" version="XMEGAD">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -557,8 +544,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -671,8 +657,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -680,18 +665,15 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
-                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
-                              values="OSC_RC2MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF" values="OSC_RC2MCREF"/>
                 </register>
             </register-group>
             <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
@@ -849,8 +831,7 @@
                 </register>
                 <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
                     <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
-                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
-                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
                     <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
@@ -962,8 +943,7 @@
                     <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1219,16 +1199,11 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
-                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
-                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
-                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07" name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07" name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1503,8 +1478,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1801,14 +1775,10 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC_CCDINTLVL"/>
-                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC_CCCINTLVL"/>
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -1881,10 +1851,8 @@
                     <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC_CCBINTLVL"/>
-                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC_CCAINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC_CCAINTLVL"/>
                 </register>
                 <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD"/>
@@ -2054,20 +2022,14 @@
                     <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
-                              values="TC2_HUNFINTLVL"/>
-                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
-                              values="TC2_LUNFINTLVL"/>
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL" values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL" values="TC2_LUNFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
-                              values="TC2_LCMPDINTLVL"/>
-                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
-                              values="TC2_LCMPCINTLVL"/>
-                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
-                              values="TC2_LCMPBINTLVL"/>
-                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
-                              values="TC2_LCMPAINTLVL"/>
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL" values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL" values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL" values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL" values="TC2_LCMPAINTLVL"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
                     <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
@@ -2236,8 +2198,7 @@
                 <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
                     <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
@@ -2348,8 +2309,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -2446,10 +2406,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA8E5.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA8E5.xml
index 946ad8c6..0a3fd99e 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA8E5.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA8E5.xml
@@ -1,28 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATxmega8E5-AU" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega8E5-MU" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega8E5-M4U" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega8E5-AN" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega8E5-MN" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
-        <variant ordercode="ATxmega8E5-M4N" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
-                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega8E5-AU" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega8E5-MU" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega8E5-M4U" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega8E5-AN" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega8E5-MN" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega8E5-M4N" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105" tempmin="-40" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega8E5" family="AVR8" architecture="AVR8_XMEGA" avr-family="AVR XMEGA">
         <address-spaces>
             <address-space name="prog" id="prog" start="0x00000" size="0x2800" endianness="little">
-                <memory-segment start="0x00000" size="0x2000" type="flash" rw="RW" exec="1" name="APP_SECTION"
-                                pagesize="128"/>
-                <memory-segment start="0x01800" size="0x0800" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
-                                pagesize="128"/>
-                <memory-segment start="0x02000" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
-                                pagesize="128"/>
+                <memory-segment start="0x00000" size="0x2000" type="flash" rw="RW" exec="1" name="APP_SECTION" pagesize="128"/>
+                <memory-segment start="0x01800" size="0x0800" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION" pagesize="128"/>
+                <memory-segment start="0x02000" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION" pagesize="128"/>
             </address-space>
             <address-space name="data" id="data" start="0x0000" size="0x2400" endianness="little">
                 <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
@@ -30,8 +21,7 @@
                 <memory-segment start="0x2000" size="0x0400" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
             </address-space>
             <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0200">
-                <memory-segment start="0x00000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
-                                pagesize="32"/>
+                <memory-segment start="0x00000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="32"/>
             </address-space>
             <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
                 <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -43,12 +33,10 @@
                 <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
             </address-space>
             <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0080">
-                <memory-segment start="0x0000" size="0x0080" type="user_signatures" rw="RW" exec="0"
-                                name="USER_SIGNATURES" pagesize="128"/>
+                <memory-segment start="0x0000" size="0x0080" type="user_signatures" rw="RW" exec="0" name="USER_SIGNATURES" pagesize="128"/>
             </address-space>
             <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0036">
-                <memory-segment start="0x0000" size="0x0036" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
-                                pagesize="128"/>
+                <memory-segment start="0x0000" size="0x0036" type="other" rw="R" exec="0" name="PROD_SIGNATURES" pagesize="128"/>
             </address-space>
         </address-spaces>
         <peripherals>
@@ -427,14 +415,12 @@
                     <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
                 </instance>
                 <instance name="LOCKBIT">
-                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
-                                    name="LOCKBIT"/>
+                    <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS" name="LOCKBIT"/>
                 </instance>
             </module>
             <module name="SIGROW" id="I3620" version="XMEGAE">
                 <instance name="PROD_SIGNATURES">
-                    <register-group address-space="prod_signatures" offset="0x00"
-                                    name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    <register-group address-space="prod_signatures" offset="0x00" name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
                 </instance>
             </module>
         </peripherals>
@@ -551,8 +537,7 @@
                 </register>
                 <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
                     <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
-                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
-                              values="CLK_PSBCDIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV" values="CLK_PSBCDIV"/>
                 </register>
                 <register caption="Lock register" name="LOCK" offset="0x02" size="1">
                     <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
@@ -667,8 +652,7 @@
                     <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
                     <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
                     <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
-                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL"
-                              values="OSC_XOSCSEL"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL" values="OSC_XOSCSEL"/>
                 </register>
                 <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
                     <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
@@ -676,19 +660,16 @@
                     <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
                     <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
                 </register>
-                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
-                          size="1"/>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04" size="1"/>
                 <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
                     <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
                     <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
                     <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
                 </register>
                 <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
-                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
-                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF" values="OSC_RC32MCREF"/>
                 </register>
-                <register caption="Internal 8 MHz RC Oscillator Calibration Register" name="RC8MCAL" offset="0x07"
-                          size="1">
+                <register caption="Internal 8 MHz RC Oscillator Calibration Register" name="RC8MCAL" offset="0x07" size="1">
                     <bitfield caption="Calibration Bits" mask="0xFF" name="RC8MCAL"/>
                 </register>
             </register-group>
@@ -841,8 +822,7 @@
             <register-group caption="I/O port Configuration" name="PORTCFG" size="8">
                 <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
                 <register caption="Clock Out Register" name="CLKOUT" offset="0x04" size="1">
-                    <bitfield caption="Clock and Event Output Pin Select" mask="0x80" name="CLKEVPIN"
-                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="Clock and Event Output Pin Select" mask="0x80" name="CLKEVPIN" values="PORTCFG_CLKEVPIN"/>
                     <bitfield caption="RTC Clock Output Enable" mask="0x60" name="RTCOUT" values="PORTCFG_RTCCLKOUT"/>
                     <bitfield caption="Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
                     <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
@@ -851,8 +831,7 @@
                     <bitfield caption="Analog Comparator Output Port" mask="0xC0" name="ACOUT" values="PORTCFG_ACOUT"/>
                     <bitfield caption="Event Channel Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
                     <bitfield caption="Asynchronous Event Enabled" mask="0x08" name="EVASYEN"/>
-                    <bitfield caption="Event Channel Output Selection" mask="0x07" name="EVOUTSEL"
-                              values="PORTCFG_EVOUTSEL"/>
+                    <bitfield caption="Event Channel Output Selection" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
                 </register>
                 <register caption="Slew Rate Limit Control Register" name="SRLCTRL" offset="0x07" size="1">
                     <bitfield caption="Slew Rate Limit Enable on PORTA" mask="0x01" name="SRLENRA"/>
@@ -986,54 +965,35 @@
                     <bitfield caption="Channel Block Transfer Pending" mask="0x40" name="CHPEND"/>
                     <bitfield caption="Channel Transaction Error Interrupt Flag" mask="0x20" name="ERRIF"/>
                     <bitfield caption="Channel Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
-                    <bitfield caption="Channel Transaction Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="EDMA_CH_INTLVL"/>
-                    <bitfield caption="Channel Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
-                              values="EDMA_CH_INTLVL"/>
+                    <bitfield caption="Channel Transaction Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="EDMA_CH_INTLVL"/>
+                    <bitfield caption="Channel Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL" values="EDMA_CH_INTLVL"/>
                 </register>
-                <register
-                        caption="Memory Address Control for Peripheral Ch., or Source Address Control for Standard Ch."
-                        name="ADDRCTRL" offset="0x02" size="1">
-                    <bitfield
-                            caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch."
-                            mask="0x30" name="RELOAD" values="EDMA_CH_RELOAD"/>
-                    <bitfield caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch."
-                              mask="0x07" name="DIR" values="EDMA_CH_DIR"/>
+                <register caption="Memory Address Control for Peripheral Ch., or Source Address Control for Standard Ch." name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch." mask="0x30" name="RELOAD" values="EDMA_CH_RELOAD"/>
+                    <bitfield caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch." mask="0x07" name="DIR" values="EDMA_CH_DIR"/>
                 </register>
-                <register caption="Destination Address Control for Standard Channels Only." name="DESTADDRCTRL"
-                          offset="0x03" size="1">
-                    <bitfield caption="Destination Address Reload for Standard Channels Only." mask="0x30"
-                              name="DESTRELOAD" values="EDMA_CH_RELOAD"/>
-                    <bitfield caption="Destination Address Mode for Standard Channels Only." mask="0x07" name="DESTDIR"
-                              values="EDMA_CH_DESTDIR"/>
+                <register caption="Destination Address Control for Standard Channels Only." name="DESTADDRCTRL" offset="0x03" size="1">
+                    <bitfield caption="Destination Address Reload for Standard Channels Only." mask="0x30" name="DESTRELOAD" values="EDMA_CH_RELOAD"/>
+                    <bitfield caption="Destination Address Mode for Standard Channels Only." mask="0x07" name="DESTDIR" values="EDMA_CH_DESTDIR"/>
                 </register>
                 <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x04" size="1">
                     <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="EDMA_CH_TRIGSRC"/>
                 </register>
-                <register
-                        caption="Channel Block Transfer Count for Peripheral Ch., or Channel Block Transfer Count Low for Standard Ch."
-                        name="TRFCNT" offset="0x06" size="2"/>
-                <register
-                        caption="Channel Memory Address for Peripheral Ch., or Channel Source Address Low for Standard Ch."
-                        name="ADDR" offset="0x08" size="2"/>
-                <register caption="Channel Destination Address for Standard Channels Only." name="DESTADDR"
-                          offset="0x0C" size="2"/>
+                <register caption="Channel Block Transfer Count for Peripheral Ch., or Channel Block Transfer Count Low for Standard Ch." name="TRFCNT" offset="0x06" size="2"/>
+                <register caption="Channel Memory Address for Peripheral Ch., or Channel Source Address Low for Standard Ch." name="ADDR" offset="0x08" size="2"/>
+                <register caption="Channel Destination Address for Standard Channels Only." name="DESTADDR" offset="0x0C" size="2"/>
             </register-group>
             <value-group caption="Channel mode" name="EDMA_CHMODE">
                 <value caption="Channels 0, 1, 2 and 3 in peripheal conf." name="PER0123" value="0x00"/>
-                <value caption="Channel 0 in standard conf.; channels 2 and 3 in peripheral conf." name="STD0"
-                       value="0x01"/>
-                <value caption="Channel 2 in standard conf.; channels 0 and 1 in peripheral conf." name="STD2"
-                       value="0x02"/>
+                <value caption="Channel 0 in standard conf.; channels 2 and 3 in peripheral conf." name="STD0" value="0x01"/>
+                <value caption="Channel 2 in standard conf.; channels 0 and 1 in peripheral conf." name="STD2" value="0x02"/>
                 <value caption="Channels 0 and 2 in standard conf." name="STD02" value="0x03"/>
             </value-group>
             <value-group caption="Double buffer mode" name="EDMA_DBUFMODE">
                 <value caption="No double buffer enabled" name="DISABLE" value="0x00"/>
-                <value caption="Double buffer enabled on peripheral channels 0/1 (if exist) " name="BUF01"
-                       value="0x01"/>
+                <value caption="Double buffer enabled on peripheral channels 0/1 (if exist) " name="BUF01" value="0x01"/>
                 <value caption="Double buffer enabled on peripheral channels 2/3 (if exist)" name="BUF23" value="0x02"/>
-                <value caption="Double buffer enabled on peripheral channels 0/1 and 2/3 or standard channels 0/2"
-                       name="BUF0123" value="0x03"/>
+                <value caption="Double buffer enabled on peripheral channels 0/1 and 2/3 or standard channels 0/2" name="BUF0123" value="0x03"/>
             </value-group>
             <value-group caption="Priority mode" name="EDMA_PRIMODE">
                 <value caption="Round robin on all channels" name="RR0123" value="0x00"/>
@@ -1041,23 +1001,18 @@
                 <value caption="Ch0 &gt; Ch 1 &gt; round robin (Ch2 Ch3)" name="RR23" value="0x02"/>
                 <value caption="Ch0 &gt; Ch1 &gt; Ch2 &gt; Ch3 " name="CH0123" value="0x03"/>
             </value-group>
-            <value-group caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch."
-                         name="EDMA_CH_RELOAD">
+            <value-group caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch." name="EDMA_CH_RELOAD">
                 <value caption="No reload" name="NONE" value="0x00"/>
                 <value caption="Reload at end of each block transfer" name="BLOCK" value="0x01"/>
                 <value caption="Reload at end of each burst transfer" name="BURST" value="0x02"/>
                 <value caption="Reload at end of each transaction" name="TRANSACTION" value="0x03"/>
             </value-group>
-            <value-group caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch."
-                         name="EDMA_CH_DIR">
+            <value-group caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch." name="EDMA_CH_DIR">
                 <value caption="Fixed" name="FIXED" value="0x00"/>
                 <value caption="Increment" name="INC" value="0x01"/>
-                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'mask-match' (data: ADDRL, mask: ADDRH), else reserved conf. "
-                       name="MP1" value="0x04"/>
-                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'OR-match' (data-1: ADDRL OR data-2: ADDRH), else reserved conf. "
-                       name="MP2" value="0x05"/>
-                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 2-byte 'match' (data-1: ADDRL followed by data-2: ADDRH), else reserved conf. "
-                       name="MP3" value="0x06"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'mask-match' (data: ADDRL, mask: ADDRH), else reserved conf. " name="MP1" value="0x04"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'OR-match' (data-1: ADDRL OR data-2: ADDRH), else reserved conf. " name="MP2" value="0x05"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 2-byte 'match' (data-1: ADDRL followed by data-2: ADDRH), else reserved conf. " name="MP3" value="0x06"/>
             </value-group>
             <value-group caption="Destination addressing mode" name="EDMA_CH_DESTDIR">
                 <value caption="Fixed" name="FIXED" value="0x00"/>
@@ -1074,37 +1029,24 @@
                 <value caption="ADCA CH0 as trigger" name="ADCA_CH0" value="0x10"/>
                 <value caption="DACA CH0 as trigger" name="DACA_CH0" value="0x15"/>
                 <value caption="DACA CH1 as trigger" name="DACA_CH1" value="0x16"/>
-                <value caption="TCC4 overflow/underflow as trigger (Standard Channels Only)" name="TCC4_OVF"
-                       value="0x40"/>
+                <value caption="TCC4 overflow/underflow as trigger (Standard Channels Only)" name="TCC4_OVF" value="0x40"/>
                 <value caption="TCC4 error as trigger (Standard Channels Only)" name="TCC4_ERR" value="0x41"/>
-                <value caption="TCC4 compare or capture channel A as trigger (Standard Channels Only)" name="TCC4_CCA"
-                       value="0x42"/>
-                <value caption="TCC4 compare or capture channel B as trigger (Standard Channels Only)" name="TCC4_CCB"
-                       value="0x43"/>
-                <value caption="TCC4 compare or capture channel C as trigger (Standard Channels Only)" name="TCC4_CCC"
-                       value="0x44"/>
-                <value caption="TCC4 compare or capture channel D as trigger (Standard Channels Only)" name="TCC4_CCD"
-                       value="0x45"/>
-                <value caption="TCC5 overflow/underflow as trigger (Standard Channels Only)" name="TCC5_OVF"
-                       value="0x46"/>
+                <value caption="TCC4 compare or capture channel A as trigger (Standard Channels Only)" name="TCC4_CCA" value="0x42"/>
+                <value caption="TCC4 compare or capture channel B as trigger (Standard Channels Only)" name="TCC4_CCB" value="0x43"/>
+                <value caption="TCC4 compare or capture channel C as trigger (Standard Channels Only)" name="TCC4_CCC" value="0x44"/>
+                <value caption="TCC4 compare or capture channel D as trigger (Standard Channels Only)" name="TCC4_CCD" value="0x45"/>
+                <value caption="TCC5 overflow/underflow as trigger (Standard Channels Only)" name="TCC5_OVF" value="0x46"/>
                 <value caption="TCC5 error as trigger (Standard Channels Only)" name="TCC5_ERR" value="0x47"/>
-                <value caption="TCC5 compare or capture channel A as trigger (Standard Channels Only)" name="TCC5_CCA"
-                       value="0x48"/>
-                <value caption="TCC5 compare or capture channel B as trigger (Standard Channels Only)" name="TCC5_CCB"
-                       value="0x49"/>
-                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C receive complete as trigger (SPI Buffer Modes)"
-                       name="SPIC_RXC" value="0x4A"/>
-                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C data register empty as trigger (SPI Buffer modes)"
-                       name="SPIC_DRE" value="0x4B"/>
+                <value caption="TCC5 compare or capture channel A as trigger (Standard Channels Only)" name="TCC5_CCA" value="0x48"/>
+                <value caption="TCC5 compare or capture channel B as trigger (Standard Channels Only)" name="TCC5_CCB" value="0x49"/>
+                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C receive complete as trigger (SPI Buffer Modes)" name="SPIC_RXC" value="0x4A"/>
+                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C data register empty as trigger (SPI Buffer modes)" name="SPIC_DRE" value="0x4B"/>
                 <value caption="USART C0 receive complete as trigger" name="USARTC0_RXC" value="0x4C"/>
                 <value caption="USART C0 data register empty as trigger" name="USARTC0_DRE" value="0x4D"/>
-                <value caption="TCD5 overflow/underflow as trigger (Standard Channels Only)" name="TCD5_OVF"
-                       value="0x66"/>
+                <value caption="TCD5 overflow/underflow as trigger (Standard Channels Only)" name="TCD5_OVF" value="0x66"/>
                 <value caption="TCD5 error as trigger (Standard Channels Only)" name="TCD5_ERR" value="0x67"/>
-                <value caption="TCD5 compare or capture channel A as trigger (Standard Channels Only)" name="TCD5_CCA"
-                       value="0x68"/>
-                <value caption="TCD5 compare or capture channel B as trigger (Standard Channels Only)" name="TCD5_CCB"
-                       value="0x69"/>
+                <value caption="TCD5 compare or capture channel A as trigger (Standard Channels Only)" name="TCD5_CCA" value="0x68"/>
+                <value caption="TCD5 compare or capture channel B as trigger (Standard Channels Only)" name="TCD5_CCB" value="0x69"/>
                 <value caption="USART D0 receive complete as trigger" name="USARTD0_RXC" value="0x6C"/>
                 <value caption="USART D0 data register empty as trigger" name="USARTD0_DRE" value="0x6D"/>
             </value-group>
@@ -1149,8 +1091,7 @@
                 </register>
                 <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
                     <bitfield caption="Rotary Decoder Enable" mask="0x80" name="ROTARY"/>
-                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
-                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM" values="EVSYS_QDIRM"/>
                     <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
                     <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
                     <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
@@ -1402,12 +1343,9 @@
                     <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
                 </register>
                 <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
-                    <bitfield caption="MUX selection on Positive ADC Input" mask="0x78" name="MUXPOS"
-                              values="ADC_CH_MUXPOS"/>
-                    <bitfield caption="MUX selection on Internal ADC Input" mask="0x78" name="MUXINT"
-                              values="ADC_CH_MUXINT"/>
-                    <bitfield caption="MUX selection on Negative ADC Input" mask="0x07" name="MUXNEG"
-                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Positive ADC Input" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC Input" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC Input" mask="0x07" name="MUXNEG" values="ADC_CH_MUXNEG"/>
                 </register>
                 <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
                     <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
@@ -1786,8 +1724,7 @@
                     <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
-                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
-                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL" values="RTC_COMPINTLVL"/>
                     <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
@@ -1869,10 +1806,8 @@
                 </register>
                 <register caption="Control Register G" name="CTRLG" offset="0x06" size="1">
                     <bitfield caption="Event Action Enable" mask="0x80" name="EVACTEN"/>
-                    <bitfield caption="Event Action Selection on Timer/Counter 1" mask="0x60" name="EVACT1"
-                              values="XCL_EVACT"/>
-                    <bitfield caption="Event Action Selection on Timer/Counter 0" mask="0x18" name="EVACT0"
-                              values="XCL_EVACT"/>
+                    <bitfield caption="Event Action Selection on Timer/Counter 1" mask="0x60" name="EVACT1" values="XCL_EVACT"/>
+                    <bitfield caption="Event Action Selection on Timer/Counter 0" mask="0x18" name="EVACT0" values="XCL_EVACT"/>
                     <bitfield caption="Event Source Selection" mask="0x07" name="EVSRC" values="XCL_EVSRC"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x07" size="1">
@@ -1884,10 +1819,8 @@
                     <bitfield caption="Compare Or Capture 1 Interrupt Enable" mask="0x20" name="CC1IE"/>
                     <bitfield caption="Peripheral Low Counter 2 Interrupt Enable" mask="0x20" name="PEC20IE"/>
                     <bitfield caption="Compare Or Capture 0 Interrupt Enable" mask="0x10" name="CC0IE"/>
-                    <bitfield caption="Timer Underflow Interrupt Level" mask="0x0C" name="UNFINTLVL"
-                              values="XCL_UNF_INTLVL"/>
-                    <bitfield caption="Timer Compare or Capture Interrupt Level" mask="0x03" name="CCINTLVL"
-                              values="XCL_CC_INTLVL"/>
+                    <bitfield caption="Timer Underflow Interrupt Level" mask="0x0C" name="UNFINTLVL" values="XCL_UNF_INTLVL"/>
+                    <bitfield caption="Timer Compare or Capture Interrupt Level" mask="0x03" name="CCINTLVL" values="XCL_CC_INTLVL"/>
                 </register>
                 <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x08" size="1">
                     <bitfield caption="Timer/Counter 1 Underflow Interrupt Flag" mask="0x80" name="UNF1IF"/>
@@ -1997,13 +1930,10 @@
                 <value caption="16-bit timer/counter" name="TC16" value="0x00"/>
                 <value caption="One 8-bit timer/counter" name="BTC0" value="0x01"/>
                 <value caption="Two 8-bit timer/counters" name="BTC01" value="0x02"/>
-                <value caption="One 8-bit timer/counter and one 8-bit peripheral transmitter counter" name="BTC0PEC1"
-                       value="0x03"/>
-                <value caption="One 8-bit timer/counter and one 8-bit peripheral receiver counter" name="PEC0BTC1"
-                       value="0x04"/>
+                <value caption="One 8-bit timer/counter and one 8-bit peripheral transmitter counter" name="BTC0PEC1" value="0x03"/>
+                <value caption="One 8-bit timer/counter and one 8-bit peripheral receiver counter" name="PEC0BTC1" value="0x04"/>
                 <value caption="Two 8-bit peripheral counters" name="PEC01" value="0x05"/>
-                <value caption="One 8-bit timer/counter and two 4-bit peripheral counters" name="BTC0PEC2"
-                       value="0x06"/>
+                <value caption="One 8-bit timer/counter and two 4-bit peripheral counters" name="BTC0PEC2" value="0x06"/>
             </value-group>
             <value-group caption="Timer/Counter Mode" name="XCL_TCMODE">
                 <value caption="Normal mode with compare/period" name="NORMAL" value="0x00"/>
@@ -2066,8 +1996,7 @@
                 </register>
                 <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
                 <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
-                <register-group caption="TWI SMBUS timeout module" name="TIMEOUT" offset="0x000E"
-                                name-in-module="TWI_TIMEOUT"/>
+                <register-group caption="TWI SMBUS timeout module" name="TIMEOUT" offset="0x000E" name-in-module="TWI_TIMEOUT"/>
             </register-group>
             <register-group caption="" name="TWI_MASTER" size="7">
                 <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
@@ -2143,10 +2072,8 @@
                     <bitfield caption="Slave Ttimeout Interrupt Flag" mask="0x10" name="TTOUTSIF"/>
                 </register>
                 <register caption="Timeout Configuration Register" name="TOCONF" offset="0x01" size="1">
-                    <bitfield caption="Master Ttimeout Select" mask="0x07" name="TTOUTMSEL"
-                              values="TWI_MASTER_TTIMEOUT"/>
-                    <bitfield caption="Master/Slave Timeout Select" mask="0x18" name="TMSEXTSEL"
-                              values="TWI_MASTER_TMSEXT"/>
+                    <bitfield caption="Master Ttimeout Select" mask="0x07" name="TTOUTMSEL" values="TWI_MASTER_TTIMEOUT"/>
+                    <bitfield caption="Master/Slave Timeout Select" mask="0x18" name="TMSEXTSEL" values="TWI_MASTER_TMSEXT"/>
                     <bitfield caption="Slave Ttimeout Select" mask="0xE0" name="TTOUTSSEL" values="TWI_SLAVE_TTIMEOUT"/>
                 </register>
             </register-group>
@@ -2360,58 +2287,35 @@
                     <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC45_EVSEL"/>
                 </register>
                 <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
-                    <bitfield caption="Channel D Compare or Capture Mode" mask="0xC0" name="CCDMODE"
-                              values="TC45_CCDMODE"/>
-                    <bitfield caption="Channel C Compare or Capture Mode" mask="0x30" name="CCCMODE"
-                              values="TC45_CCCMODE"/>
-                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE"
-                              values="TC45_CCBMODE"/>
-                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE"
-                              values="TC45_CCAMODE"/>
-                    <bitfield caption="Channel Low D Compare or Capture Mode" mask="0xC0" name="LCCDMODE"
-                              values="TC45_LCCDMODE"/>
-                    <bitfield caption="Channel Low C Compare or Capture Mode" mask="0x30" name="LCCCMODE"
-                              values="TC45_LCCCMODE"/>
-                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE"
-                              values="TC45_LCCBMODE"/>
-                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE"
-                              values="TC45_LCCAMODE"/>
+                    <bitfield caption="Channel D Compare or Capture Mode" mask="0xC0" name="CCDMODE" values="TC45_CCDMODE"/>
+                    <bitfield caption="Channel C Compare or Capture Mode" mask="0x30" name="CCCMODE" values="TC45_CCCMODE"/>
+                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE" values="TC45_CCBMODE"/>
+                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE" values="TC45_CCAMODE"/>
+                    <bitfield caption="Channel Low D Compare or Capture Mode" mask="0xC0" name="LCCDMODE" values="TC45_LCCDMODE"/>
+                    <bitfield caption="Channel Low C Compare or Capture Mode" mask="0x30" name="LCCCMODE" values="TC45_LCCCMODE"/>
+                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE" values="TC45_LCCBMODE"/>
+                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE" values="TC45_LCCAMODE"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x05" size="1">
-                    <bitfield caption="Channel High D Compare or Capture Mode" mask="0xC0" name="HCCDMODE"
-                              values="TC45_HCCDMODE"/>
-                    <bitfield caption="Channel High C Compare or Capture Mode" mask="0x30" name="HCCCMODE"
-                              values="TC45_HCCCMODE"/>
-                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE"
-                              values="TC45_HCCBMODE"/>
-                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE"
-                              values="TC45_HCCAMODE"/>
+                    <bitfield caption="Channel High D Compare or Capture Mode" mask="0xC0" name="HCCDMODE" values="TC45_HCCDMODE"/>
+                    <bitfield caption="Channel High C Compare or Capture Mode" mask="0x30" name="HCCCMODE" values="TC45_HCCCMODE"/>
+                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE" values="TC45_HCCBMODE"/>
+                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE" values="TC45_HCCAMODE"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL"
-                              values="TC45_TRGINTLVL"/>
-                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="TC45_ERRINTLVL"/>
-                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL"
-                              values="TC45_OVFINTLVL"/>
+                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL" values="TC45_TRGINTLVL"/>
+                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC45_ERRINTLVL"/>
+                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="TC45_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Channel D Compare or Capture Interrupt Level" mask="0xC0" name="CCDINTLVL"
-                              values="TC45_CCDINTLVL"/>
-                    <bitfield caption="Channel C Compare or Capture Interrupt Level" mask="0x30" name="CCCINTLVL"
-                              values="TC45_CCCINTLVL"/>
-                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC45_CCBINTLVL"/>
-                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC45_CCAINTLVL"/>
-                    <bitfield caption="Channel Low D Compare or Capture Interrupt Level" mask="0xC0" name="LCCDINTLVL"
-                              values="TC45_LCCDINTLVL"/>
-                    <bitfield caption="Channel Low C Compare or Capture Interrupt Level" mask="0x30" name="LCCCINTLVL"
-                              values="TC45_LCCCINTLVL"/>
-                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL"
-                              values="TC45_LCCBINTLVL"/>
-                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL"
-                              values="TC45_LCCAINTLVL"/>
+                    <bitfield caption="Channel D Compare or Capture Interrupt Level" mask="0xC0" name="CCDINTLVL" values="TC45_CCDINTLVL"/>
+                    <bitfield caption="Channel C Compare or Capture Interrupt Level" mask="0x30" name="CCCINTLVL" values="TC45_CCCINTLVL"/>
+                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC45_CCBINTLVL"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC45_CCAINTLVL"/>
+                    <bitfield caption="Channel Low D Compare or Capture Interrupt Level" mask="0xC0" name="LCCDINTLVL" values="TC45_LCCDINTLVL"/>
+                    <bitfield caption="Channel Low C Compare or Capture Interrupt Level" mask="0x30" name="LCCCINTLVL" values="TC45_LCCCINTLVL"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL" values="TC45_LCCBINTLVL"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL" values="TC45_LCCAINTLVL"/>
                 </register>
                 <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x08" size="1">
                     <bitfield caption="Timer/Counter Stop" mask="0x20" name="STOP"/>
@@ -2503,38 +2407,25 @@
                     <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC45_EVSEL"/>
                 </register>
                 <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
-                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE"
-                              values="TC45_CCBMODE"/>
-                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE"
-                              values="TC45_CCAMODE"/>
-                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE"
-                              values="TC45_LCCBMODE"/>
-                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE"
-                              values="TC45_LCCAMODE"/>
+                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE" values="TC45_CCBMODE"/>
+                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE" values="TC45_CCAMODE"/>
+                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE" values="TC45_LCCBMODE"/>
+                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE" values="TC45_LCCAMODE"/>
                 </register>
                 <register caption="Control Register F" name="CTRLF" offset="0x05" size="1">
-                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE"
-                              values="TC45_HCCBMODE"/>
-                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE"
-                              values="TC45_HCCAMODE"/>
+                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE" values="TC45_HCCBMODE"/>
+                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE" values="TC45_HCCAMODE"/>
                 </register>
                 <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
-                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL"
-                              values="TC45_TRGINTLVL"/>
-                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
-                              values="TC45_ERRINTLVL"/>
-                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL"
-                              values="TC45_OVFINTLVL"/>
+                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL" values="TC45_TRGINTLVL"/>
+                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC45_ERRINTLVL"/>
+                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="TC45_OVFINTLVL"/>
                 </register>
                 <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
-                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL"
-                              values="TC45_CCBINTLVL"/>
-                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL"
-                              values="TC45_CCAINTLVL"/>
-                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL"
-                              values="TC45_LCCBINTLVL"/>
-                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL"
-                              values="TC45_LCCAINTLVL"/>
+                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL" values="TC45_CCBINTLVL"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL" values="TC45_CCAINTLVL"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL" values="TC45_LCCBINTLVL"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL" values="TC45_LCCAINTLVL"/>
                 </register>
                 <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x08" size="1">
                     <bitfield caption="Timer/Counter Stop" mask="0x20" name="STOP"/>
@@ -2906,8 +2797,7 @@
                     <bitfield caption="Dead-Time Insertion Generator 1 Enable" mask="0x02" name="DTI1EN"/>
                     <bitfield caption="Dead-Time Insertion Generator 0 Enable" mask="0x01" name="DTI0EN"/>
                 </register>
-                <register caption="Dead-time Concurrent Write to Both Sides Register" name="DTBOTH" offset="0x01"
-                          size="1"/>
+                <register caption="Dead-time Concurrent Write to Both Sides Register" name="DTBOTH" offset="0x01" size="1"/>
                 <register caption="Dead-time Low Side Register" name="DTLS" offset="0x02" size="1"/>
                 <register caption="Dead-time High Side Register" name="DTHS" offset="0x03" size="1"/>
                 <register caption="Status Clear Register" name="STATUSCLR" offset="0x04" size="1">
@@ -2985,8 +2875,7 @@
                     <bitfield caption="Data Reception Interrupt Enable" mask="0x40" name="DRIE"/>
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
-                              values="USART_DREINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL" values="USART_DREINTLVL"/>
                 </register>
                 <register caption="Control Register B" name="CTRLB" offset="0x03" size="1">
                     <bitfield caption="One Wire Mode" mask="0x80" name="ONEWIRE"/>
@@ -3006,8 +2895,7 @@
                 <register caption="Control Register D" name="CTRLD" offset="0x05" size="1">
                     <bitfield caption="Receive Interrupt Level" mask="0x30" name="DECTYPE" values="USART_DECTYPE"/>
                     <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="LUTACT" values="USART_LUTACT"/>
-                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="PECACT"
-                              values="USART_PECACT"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="PECACT" values="USART_PECACT"/>
                 </register>
                 <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
                     <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
@@ -3062,8 +2950,7 @@
             <value-group caption="Encoding and Decoding Type" name="USART_DECTYPE">
                 <value caption="DATA Field Encoding" name="DATA" value="0x00"/>
                 <value caption="Start and Data Fields Encoding" name="SDATA" value="0x02"/>
-                <value caption="Start and Data Fields Encoding, with invertion in START field" name="NOTSDATA"
-                       value="0x03"/>
+                <value caption="Start and Data Fields Encoding, with invertion in START field" name="NOTSDATA" value="0x03"/>
             </value-group>
             <value-group caption="XCL LUT Action" name="USART_LUTACT">
                 <value caption="Standard Frame Configuration" name="OFF" value="0x00"/>
@@ -3094,27 +2981,19 @@
                     <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
                 </register>
                 <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
-                    <bitfield caption="Receive Complete Interrupt Enable (In Buffer Modes Only)." mask="0x80"
-                              name="RXCIE"/>
-                    <bitfield caption="Transmit Complete Interrupt Enable (In Buffer Modes Only)." mask="0x40"
-                              name="TXCIE"/>
-                    <bitfield caption="Data Register Empty Interrupt Enable (In Buffer Modes Only)." mask="0x20"
-                              name="DREIE"/>
-                    <bitfield caption="Slave Select Trigger Interrupt Enable (In Buffer Modes Only)." mask="0x10"
-                              name="SSIE"/>
+                    <bitfield caption="Receive Complete Interrupt Enable (In Buffer Modes Only)." mask="0x80" name="RXCIE"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable (In Buffer Modes Only)." mask="0x40" name="TXCIE"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable (In Buffer Modes Only)." mask="0x20" name="DREIE"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Enable (In Buffer Modes Only)." mask="0x10" name="SSIE"/>
                     <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
                 </register>
                 <register caption="Status Register" name="STATUS" offset="0x02" size="1">
                     <bitfield caption="Interrupt Flag (In Standard Mode Only)." mask="0x80" name="IF"/>
-                    <bitfield caption="Receive Complete Interrupt Flag (In Buffer Modes Only)." mask="0x80"
-                              name="RXCIF"/>
+                    <bitfield caption="Receive Complete Interrupt Flag (In Buffer Modes Only)." mask="0x80" name="RXCIF"/>
                     <bitfield caption="Write Collision Flag (In Standard Mode Only)." mask="0x40" name="WRCOL"/>
-                    <bitfield caption="Transmit Complete Interrupt Flag (In Buffer Modes Only)." mask="0x40"
-                              name="TXCIF"/>
-                    <bitfield caption="Data Register Empty Interrupt Flag (In Buffer Modes Only)." mask="0x20"
-                              name="DREIF"/>
-                    <bitfield caption="Slave Select Trigger Interrupt Flag (In Buffer Modes Only)." mask="0x10"
-                              name="SSIF"/>
+                    <bitfield caption="Transmit Complete Interrupt Flag (In Buffer Modes Only)." mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag (In Buffer Modes Only)." mask="0x20" name="DREIF"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Flag (In Buffer Modes Only)." mask="0x10" name="SSIF"/>
                     <bitfield caption="Buffer Overflow (In Buffer Modes Only)." mask="0x01" name="BUFOVF"/>
                 </register>
                 <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
@@ -3124,14 +3003,10 @@
                 </register>
             </register-group>
             <value-group caption="SPI Mode" name="SPI_MODE">
-                <value caption="SPI Mode 0, base clock at &#34;0&#34;, sampling on leading edge (rising) &amp; set-up on trailling edge (falling)."
-                       name="0" value="0x00"/>
-                <value caption="SPI Mode 1, base clock at &#34;0&#34;, set-up on leading edge (rising) &amp; sampling on trailling edge (falling)."
-                       name="1" value="0x01"/>
-                <value caption="SPI Mode 2, base clock at &#34;1&#34;, sampling on leading edge (falling) &amp; set-up on trailling edge (rising)."
-                       name="2" value="0x02"/>
-                <value caption="SPI Mode 3, base clock at &#34;1&#34;, set-up on leading edge (falling) &amp; sampling on trailling edge (rising)."
-                       name="3" value="0x03"/>
+                <value caption="SPI Mode 0, base clock at &#34;0&#34;, sampling on leading edge (rising) &amp; set-up on trailling edge (falling)." name="0" value="0x00"/>
+                <value caption="SPI Mode 1, base clock at &#34;0&#34;, set-up on leading edge (rising) &amp; sampling on trailling edge (falling)." name="1" value="0x01"/>
+                <value caption="SPI Mode 2, base clock at &#34;1&#34;, sampling on leading edge (falling) &amp; set-up on trailling edge (rising)." name="2" value="0x02"/>
+                <value caption="SPI Mode 3, base clock at &#34;1&#34;, set-up on leading edge (falling) &amp; sampling on trailling edge (rising)." name="3" value="0x03"/>
             </value-group>
             <value-group caption="Prescaler setting" name="SPI_PRESCALER">
                 <value caption="If CLK2X=1 CLKper/2, else (CLK2X=0) CLKper/4." name="DIV4" value="0x00"/>
@@ -3159,8 +3034,7 @@
                 <register caption="Control Register" name="CTRL" offset="0x00" size="1">
                     <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
                 </register>
-                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
-                          size="1"/>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01" size="1"/>
                 <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
             </register-group>
             <value-group caption="Event channel selection" name="IRDA_EVSEL">
@@ -3179,10 +3053,8 @@
             <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
                 <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
                     <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
-                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
-                              values="FUSE_BLBA"/>
-                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
-                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="FUSE_BLBAT"/>
                     <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
                 </register>
             </register-group>